Flexible AC Transmission Systems(FACTS)

Multi level inverter II

Dr. Avik Bhattacharya

Assistant Professor
Room No. 227, Department of Electrical Engineering
Indian Institute of Technology Roorkee
Phone: 01332285375
Email: [email protected]

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Flying Capacitor or Capacitor Clamped MLI

Fig.6 :Three-level Flying Capacitor MLI

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Flying Capacitor or Capacitor Clamped MLI

Fig.6: Three-level FC switching states and corresponding output

voltage levels

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 Flying Capacitor or Capacitor Clamped MLI
• Voltage level redundancies can be used for extra degrees
of freedom for control or optimization purposes.
• Flying capacitor multilevel inverter also offers output
voltage waveforms of lower THD and dv/dt.
• Require large number of bulky dc capacitors with a
separate pre-charge circuit.
• The dc capacitor voltages in the inverter vary with the
inverter working conditions.
• Complex capacitor voltage balancing control.
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 Cascaded H-Bridge MLI
• Formed by the series
connection of two or more
single phase H-bridge inverters.
• A single H-bridge converter is
able to generate three different
voltage levels.
• Each leg has only two possible
switching states to avoid dc link
short circuit.
• Total four different switching
states are possible in a H-bridge
Fig. 7: Five-level cascaded H-bridge inverter

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 Cascaded H-Bridge MLI
Van (a)

Van (b)

(c)
Van

Fig. 8: Three-level H-bridge switching states (single phase)

• When ‘k’ H-bridges are connected in series, 2k+1 different voltage

levels are obtained and a maximum output voltage of kVdc,
where Vdc is the input voltage of a single H-bridge.
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 Cascaded H-Bridge MLI
Merits
• Modularity of structure
• Enable fault-tolerant operation
• All semiconductors have to block only Vdc.
• So effective increase in the output voltage and power.
• High-voltage operation without switching devices in series.
Drawback
• Each H-bridge inverter needs an isolated dc-source.
• High component count: The CHB inverter uses a large number of
IGBT modules.

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Cascaded H-Bridge MLI with equal dc voltage sources

Fig. 9: Nine-level symmetric cascaded H-bridge: (a) power

circuit and (b) output voltage waveforms (single phase)

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Cascaded H-Bridge MLI with unequal dc voltage
sources
• For a 9-level CHB MLI, only
‘two’ H-bridges are
required.
• DC voltage sources should
be of different magnitude.
• Modularity of structure is
lost.
• Less no. of redundant
voltage levels.
• Switching pattern design
becomes difficult
Fig. 10: Nine-level asymmetric H-bridge circuit
and waveforms(single phase).

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 Carrier-based PWM Schemes
Multilevel
Modulation
Low switching frequency High switching frequency

Hybrid Modulation Multi carrier PWM SVM

SHE
Phase-shifted
Nearest vector
Level-shifted
Nearest level

Hybrid PWM

Fig. 11: Different modulation methods for multilevel inverter

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Phase-Shifted PWM (PS-PWM)

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Phase-Shifted PWM (PS-PWM)

Fig. 12: Phase-shifted PWM for seven-level CHB inverters 12

Phase-Shifted PWM (PS-PWM)

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 Phase-Shifted PWM (PS-PWM)

For a 7-level CHB inverter,

• The harmonics in vH1 appear as

sidebands cantered around 2mf and
its multiples such as 4mf and 6mf.
• The harmonics in vAN and vAB appear
as sidebands cantered around 6mf .
• Triplent harmonics are present in
vAN
• Triplent harmonics such as (6mf± 3)
and (6mf ± 9) do not appear in vAB.
Fig. 13: Harmonic Spectrum of 7-level CHB
inverter with PS- PWM (mf = 10)

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 Phase-Shifted PWM (PS-PWM)

• The frequency of the dominant harmonic in the inverter output voltage

represents the inverter switching frequency fsw,inv.
• For a seven-level CHB inverter,
fsw,inv = 6mf × fm = 6fsw,dev
• A high value of fsw,inv allows more harmonics in vAB to be eliminated while
a low value of fsw,dev helps to reduce device switching losses.

• In general, for a m level inverter, fsw,inv = (m – 1) fsw,dev

• The maximum fundamental-frequency voltage (rms) can be found from
VAB1,max = 1.224Vd = 0.612(m – 1)E {ma = 1}

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 Phase-Shifted PWM (PS-PWM)
Advantages:
• Device switching frequency is same for all switches.
• The switch device usage and the average power handled by each
module is evenly distributed.
• Better total harmonic distortion (THD) is obtained at the output,
using (m-1) times lower frequency carriers than inverter switching
frequency.
• The magnitude of voltage step change during switching is only E.
This leads to a low dv/dt and reduced electromagnetic interference
(EMI).
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Level-Shifted PWM (LS-PWM)

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 Level-Shifted PWM (LS-PWM)
Three Schemes of LS-PWM:-
• In-phase disposition (IPD)
All carriers are in phase.

• Phase opposite disposition (POD)

All carriers above the zero reference are
in phase but in opposition with those
below the zero reference.

• Alternative phase opposite

disposition (APOD)
All carriers are alternatively in opposite
disposition.
Fig. 14: LS-PWM carrier arrangements: (a) PD, (b) POD,
and (c) APOD 18
Level-Shifted PWM using IPD scheme

Fig. 15: Level-shifted PWM for a seven-level CHB inverter

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 Level-Shifted PWM (LS-PWM)
• The device switching frequency is obtained by multiplying the number of
gating pulses per cycle by the frequency of the modulating wave.
• The device switching frequency is not same for devices in different H-
bridge cells.
• The output voltages of the H-bridges, vH1, vH2, and vH3, are all different
• In LS-PWM, the device switching frequency is not equal to the carrier
frequency.
• The inverter switching frequency is equal to the carrier frequency.
• The average device switching frequency is given by,
fsw,dev = fcr/(m-1)

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 Level-Shifted PWM (LS-PWM)

• The dominant harmonics

in vAN and vAB appear as
sidebands cantered
around mf.
• The inverter phase
voltage contains triplen
harmonics, such as mf
and mf ± 6, with mf being
a dominant harmonic.
• Triplen harmonics are
absent in line voltage, vAB
Fig. 16: Harmonic spectrum for a seven-level CHB inverter with
IPD modulation (mf = 60)

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 Level-Shifted PWM (LS-PWM)
• The conduction time of the devices is not evenly distributed.
• The switch device usage and the average power handled by each
module is not evenly distributed.
• It causes current distortion at the input side.
• To evenly distribute the switching and conduction losses, the
switching pattern should rotate among the H-bridge cells.

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 LS-PWM with Even Power Distribution
• The problem of uneven power distribution in LS-PWM is solved by
alternating level shifts of carriers of each module.
• The rotation of levels are performed separately for positive and
negative carriers.

Fig. 17: LS-PWM and Modified LS-PWM

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 LS-PWM with Even Power Distribution
• A square wave signal of half the
carrier frequency with appropriate
amplitude to provide offset is added
with the carrier signal.
• As the number of voltage levels
increase, the square wave signal has
to be replaced by a stair waveform.
• The output voltage waveform will be
the same as that of LS-PWM. Only H-
bridge output voltage will change.

Fig. 18: Carrier rotation method in

modified LS-PWM

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Hybrid LS-PS PWM

Fig. 19: Hybrid LS-PS PWM

for a 5 level CHB inverter

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Hybrid Modulation for Asymmetric CHB MLI

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 Hybrid PWM Modulation

Fig. 21: Hybrid modulation operating principle

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 Hybrid PWM Modulation
• The total output
voltage, vaN = va1 +
va2 + va3
• Hybrid modulation
has non-uniform
power dissipation
among the
modules.

Fig.22: Output voltages for asymmetric CHB using 28

hybrid modulation
Thank You

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