International Journal of Computer Science and Information Security (IJCSIS),

Vol. 23, No. 2, March-April 2025

A Survey on NAND Flash and Non-Volatile Memories

Dileep Kumar
The University of Suwon, Hwaseong-Si South Korea.
[email protected]

Abstract (Electrically Erasable and Programmable Read Only

Memory) [1].
This paper presents an upcoming nonvolatile
memories (NVM) overview. Non-volatile memory
devices are electrically programmable and erasable to
store charge in a location within the device and to
retain that charge when voltage supply from the device
is disconnected. The non-volatile memory is typically a
semiconductor memory comprising thousands of
individual transistors configured on a substrate to
form a matrix of rows and columns of memory cells.
Non-volatile memories are used in digital computing
devices for the storage of data. In this paper we have Figure 1. A typical floating gate memory structure.
given introduction including a brief survey on
upcoming NVM's such as FeRAM, MRAM, CBRAM,
Nonvolatile memory (NVM) retains its data without
PRAM, SONOS, RRAM, Racetrack memory and
power. Today’s ubiquitous Flash memory can be found
NRAM. In future Non-volatile memory may eliminate
in cell phones, personal digital assistants (PDAs),
the need for comparatively slow forms of secondary
cameras, MP3 players, and a host of other portable
storage systems, which include hard disks.
consumer products. In a computer system, non-volatile
memory is used for long-term storage of programs and
data which seldom or never changes, and volatile
1. Introduction memory devices are used for the short-term storage of
program instructions and data during the execution of a
Memory is divided into two main parts: volatile and
program. According to the application functions,
nonvolatile. Volatile memory loses any data when the memories can be categorized into read only memory
system is turned off; it requires constant power to (ROM) and random access memory (RAM). As the
remain viable. Most kinds of random access memory name implies, the read only memory is only read
(RAM) fall into this category. Nonvolatile memory accessible. A ROM device cannot be rewritten once it
has been programmed. Embedded software
does not lose its data when the system or device is
applications use ROM to store embedded code and
turned off. A nonvolatile memory (NVM) device is a data records. The processor in an embedded software
MOS transistor that has a source, a drain, an access or application retrieves each instruction from ROM and
a control gate, and a floating gate. In floating gate executes it. The random access memory can perform
memory devices, charge or data is stored in the floating both write and read operations. Random access
memory (RAM) also differs from ROM in that when
gate and is retained when the power is removed. All
power is disconnected from RAM, the data stored in
floating gate memories have the same generic cell random access memory is lost whereas when power is
structure. They consist of a stacked gate MOS disconnected from ROM the data stored in read only
transistor as shown in figure 1. Floating gate devices memory remains. The read only memory is further
are typically used in EPROM (Electrically categorized into a mask read only memory
programmable read only memory (PROM), erasable
Programmable Read Only Memory) and EEPROM's programmable read only memory (EPROM), and

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electrically erasable programmable read only memory such technology save energy, but it would allow for
(EEPROM). Whereas, the random access memory can computers that could be turned on and off almost
be further categorized into a static random access instantly, bypassing the slow start-up and shutdown
memory (SRAM) and a dynamic random access sequence. A number of conferences are held every year
memory (DRAM). Static read/write random-access that focus specifically on non-volatile memory. One of
memory (SRAM) is a type of volatile memory in which the most prominent is the Non-Volatile Memory
the data, once it is written to a memory location, Technology Symposium.
remains stored there as long as power is applied to the
memory chip. The magneto resistive random access Non-volatile data storage can be categorized in
memory (MRAM) is an alternative memory device to electrically addressed systems read only memory and
dynamic random access memory (DRAM). An MRAM mechanically addressed systems hard disks, optical
device uses magnetic orientations to retain data in its disc, magnetic tape, Holographic memory and such.
memory cells. MRAM devices are relatively fast, are Electrically addressed systems are expensive, but fast,
nonvolatile, consume relatively little power, and do not whereas mechanically addressed systems have a low
suffer from a write cycle limitation. Programmable read price per bit, but are slow.
only memory (PROM) allows the device manufacturer 2.1 Electrically addressed systems
to program the embedded code. This allows for
revisions in the code but still does not allow for Electrically addressed non-volatile memories
modification or erasure of the ROM once it has been based on charge storage can be categorized according
programmed. Erasable programmable read only to their write mechanism:
memory (EPROM), electronically erasable
programmable read only memory (EEPROM) and flash Read only memory: ROM is a class of storage media
memory are a growing class of non-volatile storage used in computers and other electronic devices.
integrated circuits based on floating gate transistors. Because data stored in ROM cannot easily and soon
Flash memory devices typically use a one-transistor alter. In its strictest sense, ROM refers only to mask
memory cell that allows for high memory densities, ROM, which is fabricated with the desired data
high reliability, and low power consumption. permanently stored in it, and thus can never be
modified. However, more modern types such as
2. Background EPROM and flash EEPROM can be erased and re-
programmed multiple times; they are still described as
"read-only memory" because the reprogramming
One type of computer memory is Non-volatile process is generally infrequent, comparatively slow.
memory, nonvolatile memory, NVM or non-volatile
storage, which can retain the stored information even Mask-programmed ROM: One of the earliest forms
when not electrical supply is provided. Examples of of non-volatile read-only memory, the mask-
non-volatile memory include read-only memory, flash programmed ROM was prewired at the design stage to
memory, most types of magnetic computer storage contain specific data; once the mask was used to
devices (e.g. hard disks, floppy disk drives, and manufacture the integrated circuits, the data was cast in
magnetic tape), optical disc drives, and early computer stone (silicon, actually) and could not be changed.
storage methods such as paper tape and punch cards.
Non-volatile memory is typically used for the task of Programmable ROM: PROM was invented in 1956
secondary storage, or long-term persistent storage. The by Wen Tsing Chow, is a form of digital memory
most widely used form of primary storage today is a where the setting of each bit is locked by a fuse or
volatile form of random access memory (RAM), antifuse. Such PROMs are used to store programs
meaning that when the computer is shut down, anything permanently. The Advantages are Reliability, Stores
contained in RAM is lost. Unfortunately, most forms of data permanently, moderate price, Built using
non-volatile memory have limitations that make them integrated circuits rather than discrete components, and
unsuitable for use as primary storage. Typically, non- speed is between 35ns and 60ns.
volatile memory either costs more or performs worse
than volatile random access memory. Several Erasable PROMs: The EPROM was invented by
companies are working on developing non-volatile Israeli engineer Dov Frohman in 1971. It is an array of
memory systems comparable in speed and capacity to floating-gate transistors individually programmed by an
volatile RAM. For instance, IBM is currently electronic device that supplies higher voltages than
developing MRAM (Magnetic RAM). Not only would those normally used in digital circuits. Once

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programmed, an EPROM can be erased only by recording tape is of this type, whether used for
exposing it to strong ultraviolet light. There are two recording audio or video or for computer data storage.
classes of non-volatile memory chips based on EPROM
technology, UV-erase EPROM and OTP (one-time
Hard disk drive: HDDs introduced in 1956 as data
programmable) ROM.
storage for an IBM accounting computer [3], which
stores digitally encoded data on rapidly rotating platters
Electrically erasable PROM: EEPROM is a type of with magnetic surfaces. Strictly speaking, "drive" refers
non-volatile memory used in computers and other to a device distinct from its medium, such as a tape
electronic devices to store small amounts of data that drive and its tape, or a floppy disk drive and its floppy
must be saved when power is removed, e.g., calibration disk. In the 21st century, applications for HDDs have
tables or device configuration. Electrically erasable expanded to include digital video recorders, digital
PROM's have the advantage of being able to selectively audio players, personal digital assistants, digital
erase any part of the chip without the need to erase the cameras and video game consoles.
entire chip and without the need to remove the chip
from the circuit. While an erase and rewrite of a Optical disk: The optical disc was invented in 1958.
location appears nearly instantaneous to the user, the An optical disc is a flat, circular disc usually
write process is slightly slower than the read process; polycarbonate wherein data are stored in the pits or
the chip can be read at full system speeds. The limited bumps in its flat surface — sequentially on the
number of times a single location can be rewritten is continuous, spiral track extending from the innermost
usually in the 10000-100000 range; the capacity of an track to the outermost track, covering the entire disc
EEPROM also tends to be smaller than that of other surface. The data are accessed in the disc when a
non-volatile memories. special material illuminated with a laser diode that is
aluminum. The pits distort the reflected laser light;
Flash memory: Flash memory (both NOR and NAND hence, most optical discs characteristically have an
types) was invented by Dr. Fujio Masuoka in 1980. iridescent appearance created by the grooves of the
The flash memory chip is a near contrast with the reflective layer. Write-once optical discs commonly use
EEPROM; difference is that it can only be erased one an organic dye, and re-writable discs use phase change
block or "page" at a time. Flash memory has been alloys.
widely used for high volume data storage in devices
such as personal computers, personal digital assistants Millipede memory: Millipede is a non-volatile
(PDAs), digital cameras, and cellular telephones. computer memory stored on nanoscopic pits burned
Program code and system data such as a basic into the surface of a thin polymer layer, read and
input/output system (BIOS) are typically stored in flash written by a MEMS-based probe. Millipede storage
memory devices for use in personal computer systems. technology is being pursued as a potential replacement
A typical flash memory comprises a memory array, for magnetic recording in hard drives, at the same time
which includes a large number of memory cells. The reducing the form-factor to that of Flash media.
cells are usually grouped into blocks. Each of the cells
within a block can be electrically programmed in a Holographic data storage: Holographic data storage
random basis by charging the floating gate. A flash is a potential replacement technology in the area of
memory is provided with a high-voltage transistor and high-capacity data storage currently dominated by
a low-voltage transistor for driving cells in view of a magnetic and conventional optical data storage.
device's characteristic. Magnetic and optical data storage devices rely on
individual bits being stored as distinct magnetic or
2.2 Mechanically addressed systems optical changes on the surface of the recording
medium. Additionally, whereas magnetic and optical
Mechanically addressed systems have a low data storage records information a bit at a time in a
price per bit, but are slow. linear fashion, holographic storage is capable of
recording and reading millions of bits in parallel,
Magnetic tape: Magnetic tape was first invented by enabling data transfer rates greater than those attained
Fritz Pfleumer in 1928 in Germany for recording by optical storage.[2]
sound. Magnetic tape is a source for magnetic
recording generally consisting of a thin magnetizable 3. Upcoming Non-Volatile Memories
coating on a long and narrow strip of plastic. Nearly all

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Most of famous memory technologies have phones and game machines, or as a recording medium
certain shortcomings: DRAMs are volatile means needs for voice or images.
the power supply. Flash memory technologies are non-
volatile but they have limited write endurance and low
write speed. SRAMs are fast while these are volatile
and comprises of large cell sizes. So related with these
current technologies performance, now we have need
of upcoming non-volatility memory technologies with
high speed, high write endurance and a small size.
Below we will discuss detailed overview of upcoming
non-volatile memory technologies; the focus here is on
the most widely pursued technologies: FeRAM,
MRAM, CBRAM, PRAM, SONOS, RRAM, Racetrack
memory, NRAM and PCRAM. These kinds of made of
new materials not used ever before in IC technologies.
3.1 Ferroelectric random access memory
(FeRAM):
A ferroelectric random access memory
(FRAM) is a nonvolatile semiconductor memory
device capable of operation without the need for Figure 2. Comparison of FRAM with other memory
refresh as in a dynamic random access memory products
(DRAM) device. A ferroelectric random access
memory uses a ferroelectric capacitor as a storage Features of FRAM: There are conventional
element of each memory cell. Each ferroelectric nonvolatile memories since as EEPROM and Flash.
memory cell stores a logic state based upon electric However, on the demand of high-speed and low-power
polarization of its ferroelectric capacitor. Ferroelectric consumption and high-rewriting endurance, FRAM has
random access memory (FRAM) devices are the superior performance as compared with those
"nonvolatile" memory devices because they preserve nonvolatile memories.
data stored therein even in the absence of a power
supply signal. The nonvolatile nature of a ferroelectric
memory cell is a direct consequence of using a
ferroelectric material as the dielectric of the cell's
capacitor. A ferroelectric material has ferroelectricity.
The ferroelectricity is a physical property in which if an
external voltage is applied to electric dipoles arranged
in the ferroelectric material, a spontaneous polarization
of the electric dipoles is generated. The FRAMs using
the ferroelectric material are largely classified into two
types; a first type which operates by detecting a change
in a charge amount stored in a ferroelectric capacitor, Figure 3. Structure of a FeRAM cell.
and a second type which operates by detecting a change
in resistance of a semiconductor due to spontaneous
polarization of the ferroelectric material. In the FRAM,
a memory cell is composed of a ferroelectric capacitor
and an access transistor and stores logical data `1` or
`0` depending on an electrical polarization state of the
ferroelectric capacitor. When a voltage is applied
across the ferroelectric capacitor, a ferroelectric
material is polarized according to the direction of an
electric field. FRAM can be used as main memory in Figure 4. Structure of a 1 transistor FeRAM cell and its
various electronic equipment having file storage and working mechanism.
search functions, such as portable computers, cellular

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3.2 Magnetoresistive Random Access Memory since there is no background refreshing required. The
(MRAM): straightforward integration scheme used for MRAM
makes it easier to embed. Comparison with SRAM
A magnetoresistive random access memory shows that MRAM will compete favorably in cost
(MRAM) is a non-volatile memory device using because of its smaller cell size. It also is non-volatile,
magnetic elements having magnetoresistance effects in which is only available in more complex and expensive
a memory cell. The magnetoresistive random access battery backup solutions for SRAM. When compared
memory (MRAM) has been developed as a next with Flash, MRAM achieves much better performance
generation memory device capable of replacing a in write characteristics since no high-voltage tunneling
conventional dynamic random access memory mode is required and MRAM write cycle is much
(DRAM) in which it has a fast data write speed but data faster. MRAM consumes much less energy in a write
stored inside is erased once an electric power is off, cycle because the energy/bit is several orders of
and a flash memory having a data write speed 1,000 magnitude lower than Flash. In addition, MRAM
times slower than the DRAM. A magnetoresistance endurance is unlimited, with no known or expected
effect is a phenomenon that occurs when a magnetic deterioration mechanism, while typical Flash endurance
field is applied to a ferromagnetic material, electric is only 105 write cycles.
resistance changes in accordance with the direction of
magnetization of the ferromagnetic material. The
MRAM has a plurality of memory cells. Each memory
cell is a multilayered structure in which two layers of
magnetic material are separated by a layer of non-
magnetic metallic conducting material. Each memory
cell comprises a memory element (e.g., a giant
magnetoresistance (GMR) element or a magnetic
tunnel junction (MTJ) element) in electrical
communication with a transistor through an
interconnect stack. An MTJ element has a structure
formed by sandwiching an insulating film by two
magnetic films having conductivity. Two states are
created depending on whether the spin directions in the Figure 5. Comparison of MRAM with other memory
two magnetic films that sandwich the insulating film products.
are parallel or anti-parallel. In each memory cell of an
MRAM, an MTJ element serving as an information
storage element is formed at the interconnection
between a bit line and a word line. In a data write
mode, a current is supplied to each of a selected bit line
and a selected word line. Data is written in the MTJ
element of the selected cell located at the intersection
between the selected bit line and the selected word line
by a composed magnetic field generated by the
currents. An MRAM using a tunneling
magnetoresistance effect (TMR) in a magnetic tunnel Figure 6. Chip design of MRAM.
junction has a sandwich structure in which an
insulating layer (tunnel barrier layer) is inserted
between two ferromagnetic layers (MTJ).

Comparison to Other Memory Technologies:

Comparison of MRAM with other memory
technologies suggests that it can be competitive in
overall performance. Since MRAM is nonvolatile, it
retains the data when completely turned off. System
power can be significantly reduced compared to
DRAM by shutting down the MRAM when inactive Figure 7. Simplified structure of an MRAM cell

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3.3 Conductive-Bridging RAM (CBRAM): widely used flash memory, providing a combination of
longer lifetimes, lower power, and better memory
The CBRAM memory effect is based on a density.
polarity-dependent, resistive switching at a low write
threshold voltage Vth of ~250 mV with typically ~2 μA 3.4 Phase-change memory (PCM or PRAM):
write current and an erase voltage threshold of ~80
mV. Key attributes are low voltage and current This entirely new class of non-volatile
operations, excellent scalability, and a simple memory brings together the best attributes of NOR,
fabrication sequence. In Fig.8, the CBRAM switching NAND and RAM. It simplifies memory and produces
mechanism is depicted. The ON-state of a CBRAM is more capabilities within a single chip. It is also known
achieved by applying a positive bias larger than the as PCM, PRAM, PCRAM, Ovonic Unified Memory,
threshold voltage Vth at the oxidizable anode resulting Chalcogenide RAM and C-RAM. PCM holds promise
in redox reactions driving Ag ions in the chalcogenide to revolutionize applications through new capabilities
glass. This leads to the formation of metal rich clusters, and dramatic improvements to speed, durability, and
which form a conductive bridge between both power. PRAM is based on chalcogenide glass, which
electrodes. The device can be switched back to the can be altered using the heat generation by an electric
OFF state by applying an opposite voltage. In this case, current. Heat changes the physical structure of the glass
the metal ions are removed, which in turn erases the to either a crystalline or amorphous state. Each of these
conductive bridge. states has a distinct electrical resistance that is used to
represent the ones and zeroes needed to represent
stored data in binary terms. PRAM looks set to offer
better read-write speed and durability than flash
memory, which works by trapping electrons in a
memory cell. Over time, electrons inevitably become
trapped in these cells and can no longer be removed,
rendering the memory chip useless.
Intel and other companies are counting on PRAM to
replace both NOR and NAND flash memory to
generate the demand required to produce the new
memory chips in volume, and drive down costs.

Fig.8: Schematic illustration of the CBRAM switching

mechanism: ON state: Redox reaction drives Ag ions in
chalcogenide glass, resulting in a conductive bridge.
OFF state: Size and number of Ag-rich clusters is
reduced breaking the conductive bridge [4].

CBRAM vs. RRAM: CBRAM differs from RRAM in

that for CBRAM metal ions dissolve readily in the
material between the two electrodes, while for RRAM,
the material between the electrodes requires a high
electric field causing local damage akin to dielectric
breakdown, producing a trail of conducting defects
(sometimes called a "filament"). Hence for CBRAM, Figure 9. A cross-section of two PRAM memory cells.
one electrode must provide the dissolving ions, while One cell is in low resistance crystalline state, the other
for RRAM, a one-time "forming" step is required to in high resistance amorphous state.
generate the local damage.
PRAM Comparison with Flash: the new phase
change memory is about 100,000 faster than Flash
The programmable metallization cell, or PMC, is a new
Memory. The write speed has gone from 1ms to 10ns
form of non-volatile computer memory being
per byte. With its faster merit also it is more durable.
developed at Arizona State University and its spinoff,
Each time data is written to flash memory, the process
Axon Technologies. PMC is one of a number of
will cause damage and degradation. Most flash devices
technologies that are being developed to replace the
will be able to erase count is 10,000 - 100,000 writes

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per sector. Phase change memory on the other hand can 3.5 Silicon-Oxide-Nitride-Oxide-Silicon
withstand 100,000,000 writes per sector. It can also (SONOS):
retain data without it becoming corrupted for much
longer; estimates range from years to a decade, but Silicon-Oxide-Nitride-Oxide-Silicon is a kind
those are conservative estimates. Compared to the of high-performance non-volatile computer memory. It
advantages of phase change memory, the disadvantages is similar to the widely used Flash RAM, but offers
are minor. Perhaps the biggest disadvantage is that due lower power usage and a somewhat longer lifetime.
to the high temperatures involved in the manufacturing SONOS is being developed as one of a number of
process, it is impossible to solder pre-programmed potential Flash Memory replacements.
phase change memory chips onto a board. The chips Silicon/oxide/nitride/oxide/silicon (SONOS) is a
must be programmed after they have been soldered into memory technology that provides most of the
place. Some might also consider that higher voltages advantages of floating gate without any of its
are also required to write data to the phase change disadvantages. It differs from floating gate in that the
memory to be a disadvantage. electrons used to store the data are distributed
throughout a thin insulating layer of silicon nitride
(Si3N4) rather than concentrated on a thick conducting
layer of polysilicon. Figure 12 depicts a comparison of
the cross-section of the cells.

Figure 10. Diagram of test setup.

Phase change memory offers us faster and more Figure 12. The stack height of floating gate can be
durable memory. It could be ready for sale by the end twice the stacking of SONOS, primarily caused by the
of this year, though chances are that many difference in the thickness of the storage layer.
manufacturers will wait a little before joining the cause.
MP3 players and the like will probably continue to use Improvements in the technology have made
flash memory for the time being. I Assuming that Intel SONOS a formidable competitor to floating gate in
manage to put their phase change memory to market commercial-grade applications as well, with the latest
within the next few months and Samsung come in early SONOS devices offering faster read times, longer data
next year, we can expect the technology to proliferate retention and a significantly greater number of
as the older flash chips get used up. read/write cycles. Most importantly, SONOS doesn't
have the scaling limitations of floating gate, so it may
very well become the NVM of choice for the advanced
applications of the future.
Alternatives to SONOS: SONOS is not the only
alternative to floating gate technology. Recent
developments have brought more exotic technologies
into the limelight, including ferroelectrics (FRAM),
magnetoresistive memories (MRAM) and phase-
change memories (PCM). However, these technologies
are still quite new and present a number of serious
manufacturing hurdles. They also require unusual
materials and processing equipment, adding significant
costs to the manufacturing process. SONOS, on the
Figure 11. Chip Design of Phase Change RAM. other hand, uses materials that are readily available in

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any wafer fab, and the silicon nitride layer used to store and 100,000 times, depending on the type. SONOS
the data can be deposited using standard processing devices require much lower write power, typically 5 to
equipment. 8 V, and do not degrade in the same way. SONOS does
suffer from an unrelated problem, however, where
Description: SONOS "cells" consist of a standard electrons become strongly trapped in the ONO later
NMOS transistor with an additional layering of and cannot be removed again. Over long usage this can
insulators on the gate (the transistor's "switch"). The eventually lead to enough trapped electrons to
layering consists of an oxide layer approximately 2 nm permanently set the cell to the "1" state, similar to the
thick, a silicon nitride layer about 5 nm, and a second problems in Flash. However, in SONOS this requires
oxide layer with a thickness between 5 and 10 nm. on the order of a 100,000,000 write cycles, 1000 to
When the gate is biased positively, electrons from the 10,000 times better than Flash.
source-drain circuit "above" the layer tunnel through
the oxide layer and get trapped in the silicon nitride. 3.6 Resistive random-access memory (PRAM):
This results in an energy barrier between the drain and
the source, raising the threshold voltage Vt (the gate- Resistive Random Access Memory (RRAM)
source voltage necessary for current to flow through is a non-volatile memory based on resistance switching
the transistor). The electrons can be removed again by caused by internal stoichiometry changes in compound
applying a negative bias on the gate. A SONOS materials. The basic idea is that a dielectric, which is
memory device is constructed by fabricating a grid of normally insulating, can be made to conduct through a
SONOS transistors along with a small amount of filament or conduction path formed after application of
control circuitry. After storing or erasing the cell, the a sufficiently high voltage. RRAM based on transition
controller can measure the state of the cell by passing a metal oxide and compatible electrode metals for more
small voltage across the source-drain pair; if current than a million cycles of continuous use. Endurance of
flows the cell must be in the "no trapped electrons" 10 yrs at 85°C has been demonstrated as well.
state, which is considered to mean "0". If no current is Literature data are giving more indications that RRAM
seen the cell is in the "1" state. The needed voltages are is closest to becoming a universal memory. Compared
normally about 2 V for the erased state, and around to PRAM, RRAM operates at a faster timescale
4.5 V for the programmed state. (switching time can be less than 10 ns), while
compared to MRAM, it has a simpler, smaller cell
structure (a 4-8 F2 MIM stack). Compared to flash
memory, a lower voltage is sufficient. Compared to
DRAM, the data is retained longer (10 years).

Figure 13. Schematic drawing of a SONOS memory

cell.

Comparison with Flash: SONOS and Flash have Figure 14. RRAM uses simple cell structure.
same theory. But Flash requires the construction of a
very high-performance insulating barrier on the gate It is still difficult to predict the scalability of RRAM,
leads of its transistors, often requiring as many as nine when the underlying mechanism is not well understood
different steps, whereas the oxide layering in SONOS yet. However, it is believed that if a filament is
can be more easily produced on existing lines. SONOS, responsible, it would not exhibit direct scaling with cell
on the other hand, requires a very thin layer of insulator size.[6] Instead, the current compliance limit (set by an
in order to work, making the gate area smaller than outside resistor, for example) could define the current-
Flash. This allows SONOS to scale to smaller carrying capacity of the filament.[7]
linewidth, with recent examples being produced on Applications: PRAM’s applications are Cellular
40 nm fabs and claims that it will scale to 20 nm.[5] Phone, Embedded Memory, Data storage, Hard drive
Flash devices can only be written to between 10,000 replacement and Stand-alone RAM.

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3.7 Racetrack memory: a hard drive, writing is much slower. Flash works by
"trapping" electrons in the chip surface, and requires a
As both silicon-based microelectronic devices burst of high voltage to remove this charge and reset
and HDDs are essentially two-dimensional (2D) arrays the cell. In order to do this, charge is accumulated in a
of transistors and magnetic bits, respectively, the device known as a charge pump, which takes a
conventional means of developing cheaper and faster relatively long time to charge up. In the case of "NOR"
devices relies on reducing the size of individual flash, which allows random bit-wise access like IBM
memory elements or data storage bits. An alternative Racetrack Memory, read times are on the order of
approach is to consider constructing truly 3D devices. 70 ns, while write times are much slower, about
One such approach is "racetrack" memory (RM) [8], in 2,500 ns. To address this concern, "NAND" flash
which magnetic domains are used to store information allows reading and writing only in large blocks, but this
in tall columns of magnetic material arranged means that the time to access any random bit is greatly
perpendicularly on the surface of a silicon wafer as increased, to about 1,000 ns. Additionally, the use of
shown in Figure. 15. the burst of high voltage physically degrades the cell,
so most flash devices allow on the order of 10,000
writes to any particular bit before their operation
becomes unpredictable Wear leveling and other
techniques can spread this out, but only if the
underlying data can be re-arranged.
DRAM has a cell size of about 6 F², SRAM is much
worse at 120 F². NAND flash is currently the densest
form of non-volatile memory in widespread use, with a
cell size of about 4.5 F², but storing two bits per cell
for an effective size of 2.25 F². NOR is slightly less
dense, at an effective 4.75 F², accounting for 2-bit
operation on a 9.5 F² cell size.[9]
IBM Racetrack Memory appears to scale to much
smaller sizes than any current memory device. In the
Figure. 15. The racetrack is a ferromagnetic nanowire, vertical orientation (U-shaped) about 128 bits are
with data encoded as a pattern of magnetic domains stored per cell, which itself can have a physical size of
along a portion of the wire. at least about 20 F². No other near-term solid-stage
technology appears to be able to scale anywhere near
(A) A vertical-configuration racetrack offers the these densities, representing a storage density about
highest storage density by storing the pattern in a U- 100 times that of Flash.[9] The caveat here is that bits
shaped nanowire normal to the plane of the substrate. at different positions on the "track" would take
The two cartoons show the magnetic patterns in the different times (from ~10 ns to nearly a microsecond,
racetrack before and after the domain walls (DW) have or 10 ns/bit) to be accessed by the read/write sensor,
moved down one branch of the U, past the read and because the "track" is moved at fixed speed (~100 m/s)
write elements, and then up the other branch. past the read/write sensor.
(B) A horizontal configuration uses a nanowire parallel IBM Racetrack Memory is one of a number of new
to the plane of the substrate. technologies aiming to replace Flash, and potentially
(C) Reading data from the stored pattern is done by offer a "universal" memory device applicable to a wide
measuring the tunnel magnetoresistance of a magnetic variety of roles. Other leading contenders include
tunnel junction element connected to the racetrack. MRAM, PCRAM and FeRAM. Most of these
(D) Writing data is accomplished, for example, by the technologies offer densities similar to Flash, in most
fringing fields of a DW moved in a second cases worse, and their primary advantage is the lack of
ferromagnetic nanowire oriented at right angles to the write endurance limits like those in Flash. Field-
storage nanowire. MRAM offers excellent performance as high as 3 ns
(E) Arrays of racetracks are built on a chip to enable access time, but requires a large 25 to 40 F² cell size. It
high-density storage. might see use as a SRAM replacement, but not as a
Comparison to other memory devices: Flash, in mass storage device. The highest densities from any of
particular, is a highly asymmetrical device. Although these devices is offered by PCRAM, which has a cell
read performance is fairly fast, especially compared to size of about 5.8 F², similar to Flash, as well as fairly

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good performance around 50 ns. Nevertheless, none of Advantages: NRAM has a density, at least in theory,
these can come close to competing with IBM Racetrack similar to that of DRAM. DRAM consists of a number
Memory in overall terms, especially density. For of capacitors, which are essentially two small metal
example, 50 ns allows about 5 bits to be operated in an plates with a thin insulator between them. NRAM is
IBM Racetrack Memory device, resulting in an similar, with the terminals and electrodes being roughly
effective cell size of 20/5=4 F², easily exceeding the the same size as the plates in a DRAM, the nanotubes
speed-density product of PCM. between them being so much smaller they add nothing
to the overall size. However it seems there is a
3.8 Nano-RAM (NRAM): minimum size at which a DRAM can be built, below
which there simply not enough charge is being stored
Nano-RAM is a proprietary computer memory to be able to effectively read it. NRAM appears to be
technology from the company Nantero and limited only by the current state of the art in
NANOMOTOR is invented by University of bologna lithography. This means that NRAM may be able to
and California nano systems. NRAM is a type of become much denser than DRAM, meaning that it will
nonvolatile random access memory based on the also be less expensive; if it becomes possible to control
mechanical position of carbon nanotubes deposited on the locations of carbon nanotubes at the scale the
a chip-like substrate. In theory the small size of the semiconductor industry can control the placement of
nanotubes allows for very high density memories. devices on silicon. Additionally, unlike DRAM,
Nantero also refers to it as NRAM in short, but this NRAM does not require power to "refresh" it, and will
acronym is also commonly used as a synonym for the retain its memory even after the power is removed.
more common NVRAM, which refers to all non- Additionally the power needed to write to the device is
volatile RAM memories. Nanomotor is a molecular much lower than a DRAM, which has to build up
motor which works continuously without the charge on the plates. This means that NRAM will not
consumption of fuels. It is powered by sunlight. only compete with DRAM in terms of cost, but will
Storage in NRAM works by balancing the on ridges of require much less power to run, and as a result also be
silicon. Under differing electric charges, the tubes can much faster (write speed is largely determined by the
be physically swung into one or two positions total charge needed). NRAM can theoretically reach
representing one and zeros. Once in position the tubes speeds similar to SRAM, which is faster than DRAM
stay there until a signal resets them. The bit itself is not but much less dense, and thus much more expensive. In
stored in the nano tubes, but rather is stored as the comparison with other NVRAM technologies, NRAM
position of the nanotube. Up is bit 0 and down is bit 1. has the potential to be even more advantageous. The
Bits are switched between the states by the application most common form of NVRAM today is Flash RAM,
of the electric field. which combines a bistable transistor circuit known as a
flip-flop (also the basis of SRAM) with a high-
performance insulator wrapped around one of the
transistor's bases. After being written to, the insulator
traps electrons in the base electrode, locking it into the
"1" state. However, in order to change that bit the
insulator has to be "overcharged" to erase any charge
already stored in it. This requires high voltage, about
10 volts, much more than a battery can provide. Flash
Figure 16. NANO-RAM systems thus have to include a "charge pump" that
slowly builds up power and then releases it at higher
voltage. This process is not only very slow, but
degrades the insulators as well. For this reason Flash
has a limited lifetime, between 10,000 and 1,000,000
"writes" before the device will no longer operate
effectively. NRAM potentially avoids all of these
issues. The read and write process are both "low
energy" in comparison to Flash (or DRAM for that
matter), meaning that NRAM can result in longer
battery life in conventional devices. It may also be
Figure 17. NRAM with Carbon Nanotubes (CNT) much faster to write than either, meaning it may be

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used to replace both. A modern cell phone will often individual transistors configured on a substrate to form
include Flash memory for storing phone numbers and a matrix of rows and columns of memory cells. Non-
such, DRAM for higher speed working memory volatile memories are used in digital computing devices
because flash is too slow, and additionally some SRAM for the storage of data. In this paper we have given
in the CPU because DRAM is too slow for its own use. introduction including a brief survey on upcoming
With NRAM all of these may be replaced, with some NVM's such as FeRAM, MRAM, CBRAM, PRAM,
NRAM placed on the CPU to act as the CPU cache, SONOS, RRAM, Racetrack memory and NRAM. In
and more in other chips replacing both the DRAM and future Non-volatile memory may eliminate the need for
Flash. comparatively slow forms of secondary storage
systems, which include hard disks.
Comparison with other proposed systems: NRAM is
one of a variety of new memory systems, many of Acknowledgement
which claim to be "universal" in the same fashion as
NRAM – replacing everything from Flash to DRAM to This research was supported The University of
SRAM. The only system currently ready for Suwon.
commercial use is ferroelectric RAM (FRAM or
FeRAM). FeRAM adds a small amount of a ferro- 5. References
electric material in an otherwise "normal" DRAM cell,
the state of the field in the material encoding the bit in [1] Jitu J. Makwana, Dr. Dieter K. Schroder “A Nonvolatile
a non-destructive format. FeRAM has all of the Memory Overview”.
advantages of NRAM, although the smallest possible [2] "Holographic data storage." Retrieved on 2008-04-28.
cell size is much larger than for NRAM. FeRAM is [3] IBM 350 disk storage unit.
currently in use in a number of applications where the [4] Michael Kund and etal; “Conductive bridging RAM (CBRAM):
limited number of writes in Flash is an issue, but due to An emerging non-volatile memory technology scalable to
the massive investment in Flash factories (fabs), it has
sub 20nm.”
not yet been able to even replace Flash in the market.
[5] Samsung unwraps 40nm "charge trap flash" device.
Other more speculative memory systems include
[6] I. G. Baek et al.,IEDM 2004.
MRAM and PRAM. MRAM is based on a magnetic
[7] C-Y. Lin et al., J. Electrochem. Soc., 154, G189-G192.
effect similar to that utilized in modern hard drives, the
[8] S. S. P. Parkin, U.S. Patents 6,834,005, 6,898,132,
memory as a whole consisting of a grid of small
6,920,062, 7,031,178, and 7,236,386 (2004 to 2007).
magnetic "dots" each holding one bit. Key to MRAM's
potential is the way it reads the memory using the [9] Parkin, et al., Magnetic Domain-Wall Racetrack Memory,
magneto-restrictive effect, allowing it to read the Science, 320, 190 (11 April 2008), DOI: 10.1126/science.
memory both non-destructively and with very little [10] http://zenov.wordpress.com/2008/04/28/skool-art/
power. Unfortunately it appears MRAM is already [11] http://en.wikipedia.org/wiki/Non-volatile_memory
reaching its fundamental smallest cell size, already [12] http://www.itri.org.tw/eng/EOL/research-and-development-
much larger than existing Flash devices. PRAM detail.asp?RootNodeId=020&NavRootNodeId=02042&NodeId=02042
appears to have a small cell size as well, although 23&ArticleNBR=1728
current devices are nowhere near small enough to find [13] http://www.smso.net/Non-volatile_memory
if there is some practical limit. [14] http://www.electronics-manufacturers.com/products/computer-
hardware/computer-memory
4. Conclusion: [15] Gerhard Müller(a), Nicolas Nagel (b), Cay-Uwe Pinnow(a),
Thomas Röhr, “Emerging Non-Volatile Memory Technologies”.
In this paper we have discussed an upcoming non- [16] Anselmo Lastra, “Nonvolatile Memories and Programmable Logic”.
volatile memories (NVM) overview in detail with [17] Roberto Bez, Livio Baldi, Emilio Camerlenghi and
regarding their cell structures, architectures, advantages Paolo Cappelletti, “An Overview of Flash Memories”.
and comparisons with current memory technologies. [18] Daniel Elmhurst, “Non-Volatile Memories”.
We have also introduced the previous non-volatile [19] Stefan Lai, “Nonvolatile Memory Technologies: A Look into the
memories in short overview. As Non-volatile memory Future”.
devices are electrically programmable and erasable to [20] Todd Wallinger, Simtek Corp., Colorado Springs, Colo,
store charge in a location within the device and to “SONOS Eases Non-Volatile Memory Integration in SoC”.
retain that charge when voltage supply from the device [21] Scott Wilkinson, “NANO-RAM” Jul 1, 2005.
is disconnected. The non-volatile memory is typically a [22] Sumner Lemon, “Intel set for first public demo of PRAM”.
semiconductor memory comprising thousands of

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ISSN 1947-5500
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[23] Nano-RAM - A proprietary Computer Memory Technology.

[24] Stuart S. P. Parkin, Masamitsu Hayashi, Luc Thomas,
“Magnetic Domain-Wall Racetrack Memory”.

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CALL FOR PAPERS

Special Issue: "Information, Network & Computer Security" (Due Date: May 15th, 2025)
Journal: International Journal of Computer Science and Information Security (IJCSIS, ISSN Online:
"1947-5500")
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Citations/Article: 9.7 https://scholar.google.com/citations?user=XfS9TlUAAAAJ&hl=en&authuser=1

Dear Researcher,

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