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Miller's Approximation in Circuit Design

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66 views3 pages

Miller's Approximation in Circuit Design

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nemat
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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c ircu it intu itions

Ali Sheikholeslami

Miller’s Approximation

W
Welcome to the seventh article in small voltage increment at the input
this column series. As the title sug- results in a much larger decrement C12
gests, each article provides insights at the output, which in turn attracts a
I1 I2
and intuitions into circuit design large amount of charge on the capaci-
and analysis. These articles are tor plates, as if the capacitor were V1 –A0 V2 = –A0V1
aimed at undergraduate students much larger! From the perspective of
but may serve the interests of other the output node, however, a change Ideal Voltage Amplifier
readers as well. If you read this arti- in the output voltage corresponds to (a)
cle, I would appreciate your com- a much smaller change at the input.
ments and feedback, as well as your We can then simply assume the input Ideal Voltage Amplifier
requests and suggestions for future node is grounded. This is equivalent
articles in this series. Please e-mail to saying the capacitor seen from the V1 –A0 V2 = –A0V1
your comments to me at: ali@ece. output is the same as C 12 . I1 I2
utoronto.ca. When the amplifier is ideal but its
C1M C2M
In the previous article, we pre- gain (A) is frequency dependent (i.e.,
sented an intuitive view of Miller’s not constant) or when the amplifier
theorem, especially as it applies to is nonideal (e.g., has a finite output
resistors. In this article, we use Mill- impedance), there may be confusion C1M = C12 (1 + A0)
1
er’s theorem to estimate the band- as how to apply Miller’s theorem or C2M = C12 (1 + )
A0
width of an amplifier with a capacitor how useful it may be. We focus on
(b)
between its input and output nodes. this in the remainder of this article.
Figure 1 shows an ideal voltage First, let us examine a slightly
Figure 1: Miller’s theorem: (a) capacitance
amplifier (i.e., one with infinite input generalized case where the ampli-
C 12 is connected between the input and
impedance and zero output imped- fier is ideal but it has a frequency- output nodes of an ideal voltage amplifier
ance) with a constant voltage gain of dependent gain A v (j~), instead of with a constant gain of - A 0, and (b) Miller’s
“ - A 0 ” and a capacitor C 12 between constant - A 0, with a single pole fre- equivalent circuit.
its input and output nodes. Miller’s quency, fp . In other words, assume
theorem says that we can replace C 12 low frequencies (below fp), C 12 is
with two capacitors, C 1M and C 2M , - A0 simply multiplied by the dc gain of the
A v (j~) = .
jf
connected from the input and output 1+ amplifier. At midfrequencies (between
fp
node, respectively, to ground, where, fp and + A 0 fp), when the voltage
Note that since this is an ideal gain drops, C 1M drops also. Beyond
C 1M = C 12 (1 + A 0) (1) amplifier, adding C 12 across it will the amplifier’s unity-gain frequency
C 2M = C 12 (1 + 1/A 0) .(2) not change the voltage transfer (i.e., A 0 fp), C 1M approaches C 12 . This
function. We can therefore apply makes intuitive sense because, at
If we assume A 0 & 1, then Miller’s Miller’s theorem (1), to arrive at the very high frequencies, the gain of the
theorem tells us that the capacitor following equation: amplifier will approach zero and the
between the two nodes appears as output node becomes grounded, pro-
much larger at the input node (by a fac- jf ducing C 12 at the input node.
tor of +A 0) but as the same capacitor 1+ We do not need to derive an equa-
fp (1 + A 0)
C 1M = C 12 (1 + A 0) .
(by a factor of +1) at the output node. jf tion for the output node capacitance
1+
This makes intuitive sense because a fp (C 2M ) in this case because C 2M will
have no impact on V2, given that the
Digital Object Identifier 10.1109/MSSC.2015.2475995 This equation simply states that amplifier is assumed to have zero
Date of publication: 2 December 2015 C 1M is now frequency dependent. At output impedance.

IEEE SOLID-STATE CIRCUITS MAGAZINE fa l l 2 0 15 7


C12
Vs V1 V2
C12
Vs V1 V2 g2V1

Vs V1 V2 g2V1
g1Vs R1 C1 C1M R2 C2 C2M
A1 A2
g1Vs R1 C1 R2 C2

(a) (b) (c)

Figure 2: Miller’s approximation: (a) a two-stage amplifier with a Miller capacitance across the second stage, (b) a small-signal equivalent
circuit for (a), and (c) a small-signal equivalent circuit where C 12 is replaced by C 1M and C 2M according to Miller’s theorem.

To summarize, a C 12 across a fre- due to C 12 . We do not know the ex- becomes that of a capacitive divider,
quency-dependent ideal amplifier act locations of the poles, but we do which has a constant gain and does
may only impact the capacitive load know that in the vicinity of the first not drop with increasing frequency, a
seen at the input node of the ampli- pole (i.e., the dominant pole) Alv2 (j~) clear sign of the existence of a zero.
fier but will have no impact on the can be approximated by the dc gain of But none of these points should
output node of the amplifier. A v2 (j~), A v20 . The actual gain at the imply that Miller’s theorem is inac-
Now, let us consider a more general dominant pole frequency is 3 dB low- curate; they only tell us the limita-
case where the amplifier is nonideal er, but we accept this approximation. tion of Miller’s approximation. In
(i.e., it has a finite input impedance Therefore, in calculating the location fact, one can show that if we use the
and a nonzero output impedance). of the first pole, Miller’s approxima- proper frequency-dependent gain in
We further assume this amplifier is tion does provide a reasonable esti- calculating C 1M and C 2M (as we did
driven by another nonideal amplifier mate, as follows: in the case of an ideal amplifier),
as shown in Figure 2(a). we can accurately find the original
Let us denote by A v1 (j~) and fp1 = 1 . poles. But this will defeat the pur-
2rR 1 (C 1 + C 12 (1 + A v20))
A v2 (j~) the voltage transfer func- pose of using Miller’s theorem for a
tions of the two stages without the At the frequency of the second simple, quick estimation of the cir-
presence of C 12 . A linear model for pole, however, the gain has already cuit bandwidth.
this two-stage amplifier along with dropped substantially from the dc If Miller’s approximation cannot
the added C 12 is shown in Figure 2(b). gain, and hence Miller’s approxima- be used to derive an expression for
In this figure, R 1 and C 1 represent tion does not yield a good estimate the second pole of the circuit in Fig-
the total resistance and capacitance for C 2M , and consequently for fp2 . In ure 2(b), what can we do instead? The
of node 1, respectively, and g 1 rep- fact, if fp2 & fp1, our estimate of fp2 answer will actually depend on the rel-
resents the transconductance of the may be off by an order of magnitude. ative ratios of the capacitors. Here, we
first stage. R 2, C 2, and g 2 are the Miller’s approximation also miss- provide a quick and intuitive method
corresponding parameters of the es the zero that exists in the circuit for the case when C 12 & C 1 and C 2 .
­second stage. of Figure 2(b). A quick inspection In this case, C 12, which is referred to
An important observation in this of this circuit reveals that a zero as the Miller compensation capacitor,
case is that the addition of C 12 will lies at a frequency where the cur- improves the circuit stability when
change A v2 (j~) to Alv2 (j~), which rent through C 12 becomes equal to placed in a feedback loop [1], [2].
is unknown and needs to be deter- g 2 V1 . When this occurs, the current Given C 12 & C 1 and C 2, as we
mined. However, to replace C 12 with through the parallel combination of increase frequency, C 12 will short
its Miller’s equivalents, as shown in C 2 and R 2 becomes zero, creating a the two nodes together, creating a
Figure 2(c), we need Alv2 (j~) in the zero in the transfer function. In oth- total capacitance of C 1 + C 2 in par-
first place. What can we do? er words, we can write allel with a total resistance 1/g 2,
In Miller’s approximation, we where we have assumed 1/g 2 is
g2
simply use the dc gain of the second fz = . much smaller than R 1 and R 2 .
2rC 12
stage (A v20) in (1) and (2) to find an Therefore, we can write an expres-
estimate of C 1M and C 2M . We then The existence of the zero makes sion for the second pole as follows:
proceed to write an expression for intuitive sense because, as we
Alv1 (j~) and Alv2 (j~) . increase the frequency, there will g2
fp2 = .
How valid is this approximation? be a point where the impedances of 2r (C 1 + C 2)
Alv (j~) (= Alv1 (j~) Alv2 (j~)) has two C 12 and C 2 will be much smaller
poles corresponding to the two capac- than R 2 . At these frequencies, the
itive nodes in the circuit and a zero transfer function of the second stage (Continued on p. 13)

8 fa l l 2 0 15 IEEE SOLID-STATE CIRCUITS MAGAZINE


small-signal bandwidth must potential difference to remain [6] S. Galal and B. Razavi, “10-Gb/s limiting
amplifier and laser/modulator driver in 0.18
be far greater than the input less than VDD, VX must not μm CMOS technology,” IEEE J. Solid-State Cir-
frequency. exceed 2VDD - VTH . cuits, vol. 38, pp. 2138–2146, Dec. 2003.
[7] S. Galal and B. Razavi, “Broadband ESD
2) To which node(s) should the protection circuits in CMOS technology,”
n -wells of M 3 and M 8 in Figure 10 References IEEE J. Solid-State Circuits, vol. 38, pp.
[1] E. L. Ginzton, W. R. Hewlett, J. H. Jasberg, 2334–2340, Dec. 2003.
be connected? and J. D. Noe, “Distributed amplification,” [8] J. Paramesh and D. J. Allstot, “Analysis
They should be connected to Proc. IRE, vol. 36, pp. 956–969, Aug. 1948. of the bridged T-coil circuit using the
[2] J. Williams, ed. Analog Circuit Design: Art, extra-element theorem,” IEEE Trans. Cir-
node P to ensure the source and Science, and Personalities, Oxford, U.K.: cuits Syst.-II, vol. 53, pp. 1408–1412, Dec.
drain junctions of these transis- Butterworth-Heinemann, 1991. 2006.
[3] D. Feucht, Handbook of Analog Circuit De- [9] S. C. D. Roy, “Comments on the ‘Analysis
tors are not forward biased. sign. New York: Academic Press, 1990. of the bridged T-coil circuit using the ex-
3) How high can VX in Figure 10 go [4] C. Hutchinson and W. Kennan, “A low tra-element theorem’,” IEEE Trans. Circuits
noise amplifier with gain control,” in Proc. Syst.-II, vol. 54, pp. 673–674, Aug. 2007.
to avoid stressing M 14 ? IEEE GaAs IC Symp., 1987, pp. 119–122. [10] T. T. True, “Bridged-T termination net-
When M 14 is off, its source [5] L. Selmi, D. Estreich, and B. Ricco, “Small- work,” U.S. patent 3,155,927, Nov. 3, 1964.
signal MMIC amplifiers with bridged T-coil
voltage reaches approximately matching networks,” IEEE J. Solid-State Cir-
VDD - VTH . For the source-drain cuits, vol. 27, pp. 1093–1096, July 1992. 

editor’s note (Continued from p. 4) circuit intuitions (Continued from p. 8)

■■ Willy Sansen, in “Minimum Power in Analog Ampli- This equation, along with equations for fp1 and fz,
fying Blocks: Presenting a Design Procedure,” can now be used to form the equation for the overall
answers questions he received from his 2015 ISSCC voltage transfer function of the two-stage amplifier.
plenary talk. It is worth noting that as we increase C 12, fp1 and
■■ Behzad Razavi continues his column series “A Cir- fp2 (as found by their respective equations) will move
cuit for All Seasons” by providing an article that dis- farther apart, a phenomenon referred to as pole split-
cusses the bridged T-coil. This article fits well into ting [1], [2].
this issue’s feature of wireline communications due In summary, Miller’s approximation uses the dc gain
to the use of the T-coil for extending the bandwidth of the amplifier to provide a relatively accurate estima-
of a circuit. tion of its dominant pole (i.e., the circuit bandwidth).
■■ Ali Sheikholeslami provides another piece in his well-re- This approximation, however, becomes inaccurate
ceived series, “Circuit Intuitions.” In this issue, he contin- when determining the second pole of the amplifier;
ues discussing Miller’s theorem, its uses and shortcom- other intuitive methods exist for this purpose.
ings when analyzing circuits. As usual (and the e-mail we For further discussions and intuition into Miller’s
receive would support this), the article provides useful theorem, we refer the readers to [3].
insight into circuit analysis and design.
■■ Finally, Marcel Pelgrom discusses “The Next Hype” References
[1] A. S. Sedra and K. C. Smith, Microelectronic Circuits, 7th ed. Lon-
in his column, which is always an entertaining arti- don, U.K.: Oxford Univ. Press, 2014.
cle that provokes thought. It’s one of my favorite [2] B. Razavi, Fundamentals of Microelectronics. New York: Wiley,
2008.
reads in each magazine issue. I hope you agree! [3] B. Mazhari, “On the estimation of frequency response in ampli-
We hope you enjoy reading IEEE Solid-State Circuits Mag- fiers using Miller’s theorem,” IEEE Trans. Education, vol. 48, no.
3, pp. 559–561, Aug. 2005.
azine. Please send comments to me at r­jacobbaker@
gmail.com. 

IEEE SOLID-STATE CIRCUITS MAGAZINE fa l l 2 0 15 13

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