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Intet Face

The document provides an overview of microcomputers and interfacing, detailing components such as microprocessors, memory, and I/O devices, as well as the process of interfacing with external devices. It discusses microcontrollers, their applications in various fields, and the evolution of microprocessors, particularly Intel's advancements. Additionally, it explains the architecture and functioning of the 8086 microprocessor, including its execution and bus interface units, instruction fetching, and execution processes.

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Berento Yasin
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0% found this document useful (0 votes)
27 views34 pages

Intet Face

The document provides an overview of microcomputers and interfacing, detailing components such as microprocessors, memory, and I/O devices, as well as the process of interfacing with external devices. It discusses microcontrollers, their applications in various fields, and the evolution of microprocessors, particularly Intel's advancements. Additionally, it explains the architecture and functioning of the 8086 microprocessor, including its execution and bus interface units, instruction fetching, and execution processes.

Uploaded by

Berento Yasin
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
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Micro computer & Interfacing

Lecturers
Misganaw A. BLD 143, R- 104

Amlakie A. BLD 143, R- 109


Micro computer and Interfacing
A microcomputer is a complete, self-contained computer
system designed around a microprocessor.
Microprocessor: The central processing unit (CPU) of the
system.
Memory: RAM (Random Access Memory) and storage
devices like hard drives or SSDs.
Input/Output Devices: Keyboards, monitors, USB ports,
Software: Operating system and applications.
Examples of microcomputers include personal computers
(PCs), laptops.
Interfacing: refers to the process of connecting a
microprocessor with external devices such as sensors,
displays, keyboards, and other peripherals to allow data
exchange and control.
Types of Interfacing:
Memory Interfacing: Connecting external memory (RAM,
ROM) to the microprocessor.
I/O Interfacing: Connecting input/output devices like
keyboards, LCDs, sensors, or motors.
Serial Interfacing: Using communication protocols to
transfer data between microprocessors and external devices.
Microcontroller: is a compact, integrated system that combines a
microprocessor with additional built-in components, including:

•Memory: RAM and often flash memory for storage.

•Peripherals: Integrated input/output (I/O) ports, timers, communication


interfaces analog-to-digital converters (ADC), and more.

• Microcontrollers are designed for specific tasks in embedded systems

and typically run simple, dedicated applications.

• Unlike microprocessors, they can operate independently with minimal

external components.

Examples of microcontrollers include the Arduino boards, Raspberry Pi Pico,


and PIC microcontrollers.
Home Automation: Microcontrollers are at the heart of smart devices that
control lighting, temperature, security, etc.

Industrial Automation: Used in control systems, robotics, and machinery.

Consumer Electronics: Microcontrollers are found in everyday devices,


such as remote controls, microwave ovens, and washing machines.

Automotive: Microcontrollers manage a variety of automotive functions like


engine control, braking systems, and more

Low power consumption: Designed for real-time and power-efficient tasks.

Self-contained: Includes CPU, memory, and I/O in one chip, making it a


complete system for embedded applications.
Micro-processor: is the central processing unit (CPU) of a system, typically
found in a microcomputer or other types of computers.

is a single integrated circuit (IC) that handles the primary tasks of


processing instructions but does not include memory, input/output, or
storage.

Personal Computers and Laptops: Microprocessors form the core of these


devices, enabling them to perform a wide range of functions.

Smartphones and Tablets: Microprocessors are used in mobile devices for


processing, multitasking, and supporting a range of applications.

Embedded Systems: More powerful embedded systems that need


processing but rely on external memory and peripherals.
History of Microprocessors
It was first developed in the early 1970s, revolutionizing computing by replacing bulky

transistor-based CPUs.

1971 – Intel introduced the first commercial microprocessor, the Intel 4004, a 4-bit
processor designed for calculators.

1974 – Intel released the 8080, an 8-bit processor that became widely used in early

personal computers.

Late 1970s to 1980s – The introduction of 16-bit and 32-bit processors like the Intel

8086 and 80386 enhanced computing capabilities.

1990s to Present – The evolution of multi-core and high-performance processors,

including Intel’s Pentium, Core i-Series, and Xeon, led to significant advancements in
computing power.
Evolution of the Intel Processor
Intel has been a leader in microprocessor development, continuously improving

processing speed, architecture, and efficiency.

Intel 4004 (1971) – First 4-bit microprocessor with 2,300 transistors.

Intel 8086 (1978) – 16-bit architecture, foundation for x86 architecture.

Intel 80386 (1985) – 32-bit processor, supporting multitasking.

Intel Pentium Series (1993) – Improved performance with superscalar architecture.

Intel Core Series (2006-Present) – Introduction of multi-core processors for

enhanced parallel processing.

Intel Core i9 & Xeon (2017-Present) – High-performance processors with AI

acceleration and advanced computing capabilities.


How does a Microprocessor Work?
A microprocessor is the brain of a computer system, responsible for executing

instructions and performing computations. It operates using the fetch-decode-execute

cycle, which involves the following steps:

Initially, the instructions are stored in the memory in a sequential order.

The microprocessor fetches those instructions from the memory,

Then decodes it and executes those instructions till STOP instruction is reached.

Later, it sends the result in binary to the output port.

Between these processes, the register stores the temporarily data and ALU performs

the computing functions.


A microprocessor can be classified into three categories:
RISC Processor
RISC stands for Reduced Instruction Set Computer. It is designed to reduce the execution time by

simplifying the instruction set of the computer. Using RISC processors, each instruction requires

only one clock cycle to execute results in uniform execution time. This reduces the efficiency as

there are more lines of code, hence more RAM is needed to store the instructions. The compiler also

has to work more to convert high-level language instructions into machine code.

Some of the RISC processors are

Power PC: 601, 604, 615, 620

DEC Alpha: 210642, 211066, 21068, 21164

MIPS: TS (R10000) RISC Processor

PA-RISC: HP 7100LC
Architecture of RISC: RISC microprocessor architecture uses highly-optimized set of instructions. It is used in

portable devices like Apple iPod due to its power efficiency.

Hardwired Control Unit: Responsible for


generating control signals to execute
instructions.
Data Path: Performs computations and
processes data as directed by the
control unit.
Instruction Cache: Stores frequently
used instructions to speed up execution.
Data Cache: Stores frequently used data
to reduce access time to main memory.
Main Memory: Holds both instructions
and data.
Characteristics of RISC
The major characteristics of a RISC processor are as follows


It consists of simple instructions.


It supports various data-type formats.


It utilizes simple addressing modes and fixed length instructions for pipelining.


It supports register to use in any context.


“LOAD” and “STORE” instructions are used to access the memory location.


It consists of larger number of registers.


It consists of less number of transistors.
CISC Processor
CISC stands for Complex Instruction Set Computer.

It is designed to minimize the number of instructions per program, ignoring the number of cycles per

instruction.

The emphasis is on building complex instructions directly into the hardware.

The compiler has to do very little work to translate a high-level language into assembly level language/

machine code because the length of the code is relatively short, so very little RAM is required to store the

instructions.

Some of the CISC Processors are

IBM 370/168

VAX 11/780

Intel 80486
Micro computer and Interfacing
Architecture of CISC
Its architecture is designed to decrease the memory cost because more storage is needed in larger
programs resulting in higher memory cost. To resolve this, the number of instructions per program
can be reduced by embedding the number of operations in a single instruction.

Control Unit: Manages instruction execution by


generating control signals.
Micro-program Control Memory: Stores
microinstructions that define control sequences
for various operations.
Instruction & Data Path: Processes instructions
and manipulates data.
Cache: Temporarily stores frequently accessed
instructions and data for faster execution.
Main Memory: Holds both program instructions
and data.
CISC & RISC
CISC & RISC
Architecture of 8086
Microprocessor
Features of 8086 Microprocessor
The 8086 microprocessor has several key features that differentiate it from
the other processors:

•16-bit Processor: The ALU (Arithmetic Logic Unit), internal registers, and
data bus are all 16-bit, allowing it to process 16-bit data at a time.

•20-bit Address Bus: Can address up to 1MB of memory using a segmented


memory model.

•Instruction Queue: A 6-byte pre-fetch queue allows instruction fetching to


overlap with execution, improving speed.

Registers: Includes general-purpose registers, segment registers, pointer


registers, and index registers.
Features of 8086 Microprocessor
• Memory Segmentation: Uses segmented addressing, where
memory is divided into 64KB segments (Code, Data, Stack,
Extra).
• Interrupt Handling: Supports 256 interrupts, including both
hardware and software interrupts.
• Clock Speed: Available in 5 MHz, 8 MHz, and 10 MHz versions.
• Multiplication and Division Support: Can perform
multiplication and division operations internally.
Internal Architecture of 8086
Two main units
Execution Unit (EU)
Bus Interface Unit (BIU)
Supports instruction pipelining for faster
execution
8086 Microprocessor Architecture
Execution Unit (EU)
• Contains general-purpose registers (AH, AL, BH, BL, CH, CL,
DH, DL) and special-purpose registers (SP, BP, SI, DI).
• Includes the Arithmetic and Logic Unit (ALU), responsible for
arithmetic and logical operations.
• Uses temporary registers for intermediate calculations.
• Has a flags register, which stores the status of operations.
• The Execution Unit Control System manages operations and
interacts with the Bus Interface Unit.
Bus Interface Unit (BIU):
• Contains segment registers (CS, DS, SS, ES) and the
instruction pointer (IP).
• Has an instruction queue for pipelining, allowing prefetching
of instructions for faster execution.
• Uses an adder to compute the 20-bit address from segment
and offset.
• Manages communication with memory and I/O using the
external bus.
8086 Microprocessor Architecture
Each unit has specific responsibilities to ensure efficient
instruction execution.
1. Execution Unit (EU)
The Execution Unit (EU) is responsible for executing instructions.
It includes:
a) General Purpose Registers
The EU contains eight general-purpose registers divided into high
(H) and low (L) parts:
AH, AL → AX (Accumulator Register)
BH, BL → BX (Base Register)
CH, CL → CX (Count Register)
DH, DL → DX (Data Register)
These registers are used for arithmetic, logical, and data
manipulation operations.
8086 Microprocessor Architecture
b) Special Purpose Registers
SP (Stack Pointer) → Points to the top of the stack.
BP (Base Pointer) → Used for stack-based addressing.
SI (Source Index) & DI (Destination Index) → Used for string and memory
operations.
c) Arithmetic and Logic Unit (ALU)
Performs arithmetic operations (addition, subtraction, etc.).
Performs logical operations (AND, OR, XOR, etc.).
d) Temporary Registers & Flags Register
Temporary Registers: Used to hold intermediate results during computations.
Flags Register: Stores the status of the last operation (Zero Flag, Carry Flag,
etc.), which affects conditional execution.
e) Execution Unit Control System
Directs the flow of execution and interacts with the Bus Interface Unit (BIU).
8086 Microprocessor Architecture
2. Bus Interface Unit (BIU)

The BIU is responsible for memory addressing and fetching instructions from memory.
It consists of:

a) Instruction Queue (Pipelining)

The 8086 uses prefetching, where instructions are fetched in advance and stored in a
6-byte queue.

This improves efficiency by reducing delays between instruction execution.

b) Segment Registers

The BIU uses segment registers to handle memory addressing efficiently:

CS (Code Segment) → Holds the address of the code being executed.

DS (Data Segment) → Holds the address of the data being used.

SS (Stack Segment) → Holds the address of the stack.

ES (Extra Segment) → Used for additional memory addressing.


8086 Microprocessor Architecture
c) Instruction Pointer (IP)
The IP register stores the address of the next instruction to be executed.
d) Address Adder (Address Calculation)
The 8086 generates a 20-bit physical address by combining a 16-bit
segment address and an offset.
This is done using an adder, allowing the processor to access 1MB of
memory.
e) Bus Control Logic
Manages communication with external devices and memory via the
External Bus.
Handles data transfer between memory and the CPU using the 16-bit data
bus.
8086 Microprocessor Architecture
8086 Microprocessor Architecture
8086 Microprocessor Architecture
Step-by-Step Execution of 8086 Microprocessor
1. BIU Fetches Instructions
1. The BIU fetches MOV AX, 1234H into the instruction queue.
2. Then, it fetches ADD AX, 5678H.
2. Instruction Decoding by EU
1. The EU decodes MOV AX, 1234H and sends a signal to load 1234H into
AX.
2. Then, it decodes ADD AX, 5678H.
3. ALU Executes the Operation
1. The ALU adds 1234H + 5678H = 68ACH.
2. The result (68ACH) is stored in AX.
4. Flags are Updated
1. If the result was zero, ZF would be set.
2. If there was a carry, CF would be set.
8086 Microprocessor Architecture
Example 1: Basic Arithmetic Operation
MOV AX, 1234H ; Load AX with 1234H
ADD AX, 5678H ; Add 5678H to AX
Instruction Fetching (BIU)
• The Bus Interface Unit (BIU) fetches MOV AX, 1234H and places it in the
instruction queue.
• Simultaneously, ADD AX, 5678H is also pre-fetched.
Instruction Decoding (EU)
• The Execution Unit (EU) decodes MOV AX, 1234H.
• AX is loaded with 1234H.
Instruction Execution (ALU)
• The next instruction ADD AX, 5678H is fetched from the queue.
• The Arithmetic Logic Unit (ALU) adds: 1234H + 5678H = 68ACH

The result (68ACH) is stored in AX.


8086 Microprocessor Architecture
Example 2: Data Transfer and Logical Operations
MOV AL, 0F0H ; Load AL with F0H
AND AL, 0F1H ; Perform AND operation with F1H
Instruction Fetching (BIU)
• MOV AL, 0F0H is fetched and queued.
• AND AL, 0F1H is pre-fetched.
Instruction Decoding (EU)
• MOV AL, 0F0H is decoded.
• AL is loaded with F0H (1111 0000B).
Instruction Execution (ALU)
• AND AL, 0F1H is executed.
• Bitwise AND operation is performed:
1111 0000 (F0H)
1111 0001 (F1H)
-------------
1111 0000 (F0H)
8086 Microprocessor Architecture
Example 3: Memory Access & Stack Operations
MOV AX, 3000H ; Load AX with 3000H
MOV [5000H], AX ; Store AX value in memory location 5000H
PUSH AX ; Push AX onto the stack
POP BX ; Pop value from stack into BX
• Instruction Fetching (BIU)
– MOV AX, 3000H is fetched and queued.
– MOV [5000H], AX is pre-fetched.
• Instruction Execution
– AX is loaded with 3000H.
– The value 3000H is stored at memory location 5000H.
– PUSH AX stores AX (3000H) onto the stack.
– POP BX retrieves the last pushed value and stores it in BX.
• Memory Access
– The Stack Pointer (SP) is updated after PUSH/POP.
– Before PUSH AX, SP decreases (e.g., from FFFEH to FFFC).
– After POP BX, SP increases (back to FFFEH).
8086 Microprocessor Architecture
Example 4: String Operations
MOV SI, 1000H ; Source index
MOV DI, 2000H ; Destination index
MOV CX, 0003H ; Counter for 3 bytes
REP MOVSB ; Move bytes from [SI] to [DI]
Instruction Fetching
• MOV SI, 1000H, MOV DI, 2000H, and MOV CX, 0003H are
fetched.
String Operation Execution
• MOVSB moves one byte from [SI] to [DI].
SI and DI are automatically incremented.
CX is decremented each time.
Repeat Execution
• REP repeats the operation until CX = 0.

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