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Performance Task

The document outlines the design of half adder circuits using NAND and NOR gates. It explains the implementation of each design, detailing how the sum output is derived through XOR operations and the carry output through AND operations. The explanations provide a step-by-step breakdown of the logic used in both designs.

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John Vic
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154 views2 pages

Performance Task

The document outlines the design of half adder circuits using NAND and NOR gates. It explains the implementation of each design, detailing how the sum output is derived through XOR operations and the carry output through AND operations. The explanations provide a step-by-step breakdown of the logic used in both designs.

Uploaded by

John Vic
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
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Angelo Rogel M. Aguilar BSCPE3.

1
PERFORMANCE TASK 24/10/2024

1. Design a half adder circuit implementation using a NAND gate

2. Design a half adder circuit implementation using a NOR gate


3. Explain each of the two (2) designs in at least 5 sentences

a. The first design is a diagram showing the sum and the carry through the NAND gates
shown. By following the lessons I learned I designed the diagram that shows an output
of “S = x ⊕︀ y”. To get the sum output, I first use an inverted gate for the x and y and then
follow it up with a AND gate to combine the two variables. In order to combine the two I
used the OR gate which brings the output of the NAND gate into “xȳ + x̄y ”. The output is
an XOR operation hence it can be simplified into S = x ⊕︀ y.

In finding the carry, simply use an AND gate for the variables to be combined.

b. For the second design, it shows the diagram that has the same output of a sum and
carry but this time using NOR gates. Again, by following the rules in creating NOR gates, I
first use inverter gates to combine it to a normal one through an AND gate to get an
output of xȳ and x̄y. I then combined the two AND gate outputs through an OR gate in
order to have an addition operation, this results into output of x̄y + xȳ. This again is an
XOR operation, which can be simplified again into S = x ⊕︀ y.

For the next part in finding the carry, I first use inverter gates to change the variables
into inverted ones, and by following the rules in making NOR gates, I combined the two
to make an AND gate, resulting into an output of C = xy

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