D D D D D D D D D D D D: Description/ordering Information
D D D D D D D D D D D D: Description/ordering Information
ORDERING INFORMATION
ORDERABLE TOP-SIDE
TA PACKAGE†
PART NUMBER MARKING
Tube of 25 SN75C23243DL
SSOP (DL) 75C23243
−0°C
−0 C to 70
70°C
C Reel of 1000 SN75C23243DLR
TSSOP (DGG) Reel of 2000 SN75C23243DGGR 75C23243
Tube of 25 SN65C23243DL
SSOP (DL) 65C23243
−40°C
−40 C to 85
85°C
C Reel of 1000 SN65C23243DLR
TSSOP (DGG) Reel of 2000 SN65C23243DGGR 65C23243
† Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are
available at www.ti.com/sc/package.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Function Tables
EACH DRIVER
(each port)
INPUTS
OUTPUT
VALID RIN DRIVER STATUS
DIN FORCEON FORCEOFF DOUT
RS-232 LEVEL
X X L X Z Powered off
L H H X H Normal operation with
H H H X L auto-powerdown disabled
L L H Yes H Normal operation with
H L H Yes L auto-powerdown enabled
L L H No Z Powered off by
H L H No Z auto-powerdown feature
H = high level, L = low level, X = irrelevant, Z = high impedance
EACH RECEIVER
(each port)
INPUTS OUTPUTS
RIN1, VALID RIN RECEIVER STATUS
RIN2 FORCEOFF ROUT2 ROUT
RIN3−RIN5 RS-232 LEVEL
L X L X L Z Powered off while
H X L X H Z ROUT2 is active
L L H Yes L H
L H H Yes L L Normal operation with
H L H Yes H H auto-powerdown
disabled/enabled
H H H Yes H L
Open Open H No L H
H = high level, L = low level, X = irrelevant, Z = high impedance (off), Open = input disconnected or connected
driver off
3 46
RIN3A ROUT3A
4 45
RIN2A ROUT2A
5 44
RIN1A ROUT1A
43
ROUT2A
6
INVA Auto-powerdown
7 42
DOUT3A DIN3A
8 41
DOUT2A DIN2A
9 40
DOUT1A DIN1A
39
FORCEON
10
FORCEOFFA
Charge
Pump
15
FORCEOFFB
16 33
DOUT1B DIN1B
17 32
DOUT2B DIN2B
18 31
DOUT3B DIN3B
19
INVB Auto-powerdown
30
ROUT2B
20 29
RIN1B ROUT1B
21 28
RIN2B ROUT2B
22 27
RIN3B ROUT3B
23 26
RIN4B ROUT4B
24 25
RIN5B ROUT5B
timing
Figure 1 shows how the two independent serial ports can be enabled or disabled. As shown by the logic states,
depending on the FORCEOFF, FORCEON, and receiver input levels, either port can be powered down.
Intermediate receiver input levels indicate a 0-V input. Also, it is assumed a pulldown resistor to ground is used
for the receiver outputs. The INV pin goes low when its respective receiver input does not supply a valid RS-232
level. For simplicity, voltage levels, timing differences, and input/output edge rates are not shown.
FORCEOFFA
FORCEOFFB
FORCEON
0V
RIN2A
0V
RIN2B
DINA
DINB
ROUT2A
ROUT2A
ROUT2B
ROUT2B
DOUTA 0V
DOUTB 0V
INVA
INVB
A B C D E
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)†
Supply voltage range, VCC (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.3 V to 6 V
Positive output supply voltage range, V+ (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.3 V to 7 V
Negative output supply voltage, V− (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.3 V to −7 V
Supply voltage difference, V+ − V− (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 V
Input voltage range, VI: Driver (FORCEOFF, FORCEON) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.3 V to 6 V
Receiver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −25 V to 25 V
Output voltage range, VO: Driver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −13.2 V to 13.2 V
Receiver (INV) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.3 V to VCC + 0.3 V
Package thermal impedance, θJA (see Notes 2 and 3): DGG package . . . . . . . . . . . . . . . . . . . . . . . . . 70°C/W
DL package . . . . . . . . . . . . . . . . . . . . . . . . . . . 63°C/W
Operating virtual junction temperature, TJ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 150°C
Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150°C
† Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. All voltages are with respect to network GND.
2. Maximum power dissipation is a function of TJ(max), θJA, and TA. The maximum allowable power dissipation at any allowable
ambient temperature is PD = (TJ(max) − TA)/θJA. Operating at the absolute maximum TJ of 150°C can affect reliability.
3. The package thermal impedance is calculated in accordance with JESD 51-7.
electrical characteristics over recommended ranges of supply voltage and operating free-air
temperature (unless otherwise noted) (see Note 4 and Figure 7)
PARAMETER TEST CONDITIONS MIN TYP‡ MAX UNIT
II Input leakage current FORCEOFF, FORCEON ±0.01 ±1 µA
No load,
Auto-powerdown disabled 0.6 2 mA
FORCEOFF and FORCEON at VCC
Supply current Powered off No load, FORCEOFF at GND 1 20
ICC
(TA = 25
25°C)
C) No load, FORCEOFF at VCC, µA
Auto-powerdown enabled FORCEON at GND, 1 20
All RIN are open or grounded
‡ All typical values are at VCC = 3.3 V or VCC = 5 V and TA = 25°C.
NOTE 4: Test conditions are C1−C4 = 0.22 µF at VCC = 3.3 V ± 0.3 V; C1 = 0.047 µF, C2−C4 = 0.33 µF at VCC = 5 V ± 0.5 V.
DRIVER SECTION
electrical characteristics over recommended ranges of supply voltage and operating free-air
temperature (unless otherwise noted) (see Note 4 and Figure 7)
PARAMETER TEST CONDITIONS MIN TYP† MAX UNIT
VOH High-level output voltage All DOUT at RL = 3 kΩ to GND 5 5.4 V
VOL Low-level output voltage All DOUT at RL = 3 kΩ to GND −5 −5.4 V
Output voltage DIN1 = DIN2 = GND, DIN3 = VCC,
VO ±5 V
(mouse driveability) 3-kΩ to GND at DOUT3, DOUT1 = DOUT2 = −2.5 mA
IIH High-level input current VI = VCC ±0.01 ±1 µA
IIL Low-level input current VI at GND ±0.01 ±1 µA
VCC = 3.6 V, VO = 0 V
IOS Short-circuit output current‡ ±35 ±60 mA
VCC = 5.5 V, VO = 0 V
ro Output resistance VCC, V+, and V− = 0 V, VO = ±2 V 300 10M Ω
VO = ±12 V, VCC = 3 V to 3.6 V ±25
Ioff Output leakage current FORCEOFF = GND µA
VO = ±10 V, VCC = 4.5 V to 5.5 V ±25
† All typical values are at VCC = 3.3 V or VCC = 5 V and TA = 25°C.
‡ Short-circuit durations should be controlled to prevent exceeding the device absolute power dissipation ratings, and not more than one output
should be shorted at a time.
NOTE 4: Test conditions are C1−C4 = 0.22 µF at VCC = 3.3 V ± 0.3 V; C1 = 0.047 µF, C2−C4 = 0.33 µF at VCC = 5 V ± 0.5 V.
switching characteristics over recommended ranges of supply voltage and operating free-air
temperature (unless otherwise noted) (see Note 4 and Figure 7)
PARAMETER TEST CONDITIONS MIN TYP† MAX UNIT
CL = 1000 pF, RL = 3 kΩ,
Maximum data rate 250 kbit/s
One DOUT switching, See Figure 1
RL = 3 kΩ to 7 kΩ,
tsk(p) Pulse skew§ CL = 150 pF to 2500 pF 100 ns
See Figure 2
Slew rate, transition region VCC = 3.3 V, CL = 150 pF to 1000 pF 6 30
SR(tr) V/µs
(see Figure 1) RL = 3 kΩ to 7 kΩ CL = 150 pF to 2500 pF 4 30
† All typical values are at VCC = 3.3 V or VCC = 5 V and TA = 25°C.
§ Pulse skew is defined as |tPLH − tPHL| of each channel of the same device.
NOTE 4: Test conditions are C1−C4 = 0.22 µF at VCC = 3.3 V ± 0.3 V; C1 = 0.047 µF, C2−C4 = 0.33 µF at VCC = 5 V ± 0.5 V.
RECEIVER SECTION
electrical characteristics over recommended ranges of supply voltage and operating free-air
temperature (unless otherwise noted) (see Note 4 and Figure 7)
PARAMETER TEST CONDITIONS MIN TYP† MAX UNIT
VOH High-level output voltage IOH = −1 mA VCC − 0.6 V VCC − 0.1 V V
VOL Low-level output voltage IOL = 1.6 mA 0.4 V
VCC = 3.3 V 1.6 2.4
VIT+ Positive-going input threshold voltage V
VCC = 5 V 1.9 2.4
VCC = 3.3 V 0.6 1.1
VIT− Negative-going input threshold voltage V
VCC = 5 V 0.8 1.4
Vhys Input hysteresis (VIT+ − VIT−) 0.5 V
Ioff Output leakage current (except ROUT2B) FORCEOFF = 0 V ±0.05 ±10 µA
ri Input resistance VI = ±3 V to ±25 V 3 5 7 kΩ
† All typical values are at VCC = 3.3 V or VCC = 5 V and TA = 25°C.
NOTE 4: Test conditions are C1−C4 = 0.22 µF at VCC = 3.3 V ± 0.3 V; C1 = 0.047 µF, C2−C4 = 0.33 µF at VCC = 5 V ± 0.5 V.
switching characteristics over recommended ranges of supply voltage and operating free-air
temperature (unless otherwise noted) (see Note 4 and Figure 7)
PARAMETER TEST CONDITIONS MIN TYP† MAX UNIT
tPLH Propagation delay time, low- to high-level output 150 ns
CL = 150 pF, See Figure 4
tPHL Propagation delay time, high- to low-level output 150 ns
ten Output enable time 200 ns
CL = 150 pF, RL = 3 kΩ,
kΩ See Figure 5
tdis Output disable time 200 ns
tsk(p) Pulse skew‡ See Figure 4 50 ns
† All typical values are at VCC = 3.3 V or VCC = 5 V and TA = 25°C.
‡ Pulse skew is defined as |tPLH − tPHL| of each channel of the same device.
NOTE 4: Test conditions are C1−C4 = 0.22 µF at VCC = 3.3 V ± 0.3 V; C1 = 0.047 µF, C2−C4 = 0.33 µF at VCC = 5 V ± 0.5 V.
AUTO-POWERDOWN SECTION
electrical characteristics over recommended ranges of supply voltage and operating free-air
temperature (unless otherwise noted) (see Figure 6)
PARAMETER TEST CONDITIONS MIN MAX UNIT
Receiver input threshold FORCEON = GND,
VT+(valid) 2.7 V
for INV high-level output voltage FORCEOFF = VCC
Receiver input threshold FORCEON = GND,
VT−(valid) −2.7 V
for INV high-level output voltage FORCEOFF = VCC
Receiver input threshold FORCEON = GND,
VT(invalid) −0.3 0.3 V
for INV low-level output voltage FORCEOFF = VCC
IOH = −1 mA, FORCEON = GND,
VOH INV high-level output voltage VCC − 0.6 V
FORCEOFF = VCC
IOL = 1.6 mA, FORCEON = GND,
VOL INV low-level output voltage 0.4 V
FORCEOFF = VCC
switching characteristics over recommended ranges of supply voltage and operating free-air
temperature (unless otherwise noted) (see Figure 6)
PARAMETER MIN TYP† MAX UNIT
tvalid Propagation delay time, low- to high-level output 1 µs
tinvalid Propagation delay time, high- to low-level output 30 µs
ten Supply enable time 100 µs
† All typical values are at VCC = 3.3 V or VCC = 5 V and TA = 25°C.
3V
RS-232 Input 1.5 V 1.5 V
Output 0V
Generator
50 Ω
(see Note B) CL tPHL tPLH
RL (see Note A)
VOH
3V
Output 50% 50%
FORCEOFF
VOL
3 V or 0 V
FORCEON 3V
Input 1.5 V 1.5 V
−3 V
Output
Generator tPHL tPLH
50 Ω
(see Note B) CL
3V (see Note A)
VOH
FORCEOFF Output 50% 50%
VOL
3 V or 0 V Output VOH
Output 50%
CL 0.3 V
FORCEOFF (see Note A)
tPLZ tPZL
(S1 at VCC) (S1 at VCC)
Generator
(see Note B) 50 Ω
0.3 V
Output 50%
VOL
3V
2.7 V 2.7 V
Receiver 0V
Input 0V
VCC
INV 50% VCC 50% VCC
Output 0V
Auto- ten
INV
powerdown
CL = 30 pF V+ ≈V+
(see Note A) 0.3 V
Supply VCC
FORCEOFF Voltages 0V
0.3 V
DIN DOUT
FORCEON V− ≈V−
ÎÎÎÎÎÎÎÎÎÎÎÎ
If Signal Remains Within This Region
0V for More Than 30 µs, INV Is Low†
ÎÎÎÎÎÎÎÎÎÎÎÎ
−0.3 V
ÎÎÎÎÎÎÎÎÎÎÎÎ
Indeterminate
−2.7 V
Valid RS-232 Level, INV High
APPLICATION INFORMATION
36
C1+
37
12 V+
+ C2+ +
C2 C3† +
− 11 −
C2− 14 C1
VCC −
+ CBYPASS
38 13, 34 − = 0.1 µF
V−
− GND
C4
+ 35
C1−
5 (20) 39
RIN1 FORCEON
4 (21)
RIN2
powerdown
3 (22)
Auto-
RS-232 Inputs RIN3 10 (15)
FORCEOFF
2 (23)
RIN4
1 (24)
RIN5
6 (19)
INV
9 (16) 43 (30)
DOUT1 ROUT2
8 (17) 44 (29)
RS-232 Outputs DOUT2 ROUT1
5 kΩ
7 (18) 45 (28)
DOUT3 ROUT2
5 kΩ
Logic Outputs
42 (31) 46 (27)
DIN3 ROUT3
5 kΩ
41 (32) 47 (26)
Logic Inputs DIN2 ROUT4
5 kΩ
40 (33) 48 (25)
DIN1 ROUT5
5 kΩ
www.ti.com 6-Apr-2024
PACKAGING INFORMATION
Orderable Device Status Package Type Package Pins Package Eco Plan Lead finish/ MSL Peak Temp Op Temp (°C) Device Marking Samples
(1) Drawing Qty (2) Ball material (3) (4/5)
(6)
SN65C23243DGGR ACTIVE TSSOP DGG 48 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 65C23243 Samples
SN65C23243DLR ACTIVE SSOP DL 48 1000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 65C23243 Samples
SN75C23243DGGR ACTIVE TSSOP DGG 48 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM 0 to 70 75C23243 Samples
SN75C23243DLR ACTIVE SSOP DL 48 1000 RoHS & Green NIPDAU Level-1-260C-UNLIM 0 to 70 75C23243 Samples
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.
(3)
MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4)
There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5)
Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6)
Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two
lines if the finish value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com 6-Apr-2024
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com 1-Aug-2023
B0 W
Reel
Diameter
Cavity A0
A0 Dimension designed to accommodate the component width
B0 Dimension designed to accommodate the component length
K0 Dimension designed to accommodate the component thickness
W Overall width of the carrier tape
P1 Pitch between successive cavity centers
Sprocket Holes
Q1 Q2 Q1 Q2
Pocket Quadrants
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com 1-Aug-2023
Width (mm)
H
W
Pack Materials-Page 2
PACKAGE OUTLINE
DGG0048A SCALE 1.350
TSSOP - 1.2 mm max height
SMALL OUTLINE PACKAGE
C
8.3 SEATING PLANE
TYP
7.9
PIN 1 ID 0.1 C
A
AREA
46X 0.5
48
1
12.6 2X
12.4 11.5
NOTE 3
24
25
0.27
48X
6.2 0.17 1.2
B
6.0 0.08 C A B 1.0
(0.15) TYP
0.25
SEE DETAIL A GAGE PLANE
0.15
0 -8 0.75 0.05
0.50
DETAIL A
TYPICAL
4214859/B 11/2020
NOTES:
1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. This dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not
exceed 0.15 mm per side.
4. Reference JEDEC registration MO-153.
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EXAMPLE BOARD LAYOUT
DGG0048A TSSOP - 1.2 mm max height
SMALL OUTLINE PACKAGE
48X (0.3)
46X (0.5)
(R0.05) SYMM
TYP
24 25
(7.5)
4214859/B 11/2020
NOTES: (continued)
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EXAMPLE STENCIL DESIGN
DGG0048A TSSOP - 1.2 mm max height
SMALL OUTLINE PACKAGE
48X (0.3)
46X (0.5)
SYMM
(R0.05) TYP
24 25
(7.5)
4214859/B 11/2020
NOTES: (continued)
7. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate
design recommendations.
8. Board assembly site may have different recommendations for stencil design.
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MECHANICAL DATA
0,27
0,50 0,08 M
0,17
48 25
6,20 8,30
6,00 7,90 0,15 NOM
Gage Plane
0,25
1 24
0°– 8°
A 0,75
0,50
Seating Plane
0,15
1,20 MAX 0,10
0,05
PINS **
48 56 64
DIM
4040078 / F 12/97
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