KENYATTA UNIVERSITY

School of Engineering
ICT Department
P.O Box 43844, 00200
Nairobi
http://ku.ac.ke

PRIORITIZED BUSY LANES

DIGITAL TRAFFIC LIGHTS CONTROL

By

Martin Mbiyú

I26/1789/2004

SCE509: ENGINEERING PROJECT II

Final Year Project Report

2008/2009 Academic Year

SUPERVISOR
Eng. Peter K. Muiruri

14th October 2009

A project submitted in partial fulfillment of the requirement for the award of the degree in
Bachelor of Science in Computer Engineering at Kenyatta University, Nairobi.

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 ABSTRACT
Traffic jam is one of the most dreaded road nuisances for every commuter and other road
users. While efforts have been made to reduce the nuisance, it still remains a recurring
problem in roads linking into major cities in the country. It’s obvious that a lot of valuable
time is wasted while in a jam .Vehicles waste substantial amount of valuable fuel while in the
jam as the engines are still running. This impact negatively to the economy not to mention
on health matters of air pollution.
The existing traffic lights control has done little to minimize the traffic jam witnessed in
most cities in Kenya. It’s a common thing to find a green light on for a purely empty lane,
while the lane with heavy traffic is on red stop light. Moreover, supplemented efforts of the
traffic police don’t seem to solve the problem to the core.
While building of wider roads may seem as a perfect solution, the rate of acquisition of
vehicles or the increase in number of commuters is not linear with the road construction. It’s
also worth mentioning that road construction is very expensive and takes considerable
amount of time.
The objective of the project is to design an efficient, inexpensive low power traffic lights
control that uses principles of digital electronics to efficiently control traffic giving priority
to the busy lanes for faster movement depending on the time of the day. The sequencing of
the lights is controlled in such a way that the busy lanes leading to town, (when commuters
are going to work and thus the traffic is heavy), gets a longer duration on the green (GO)
light than their counterparts leaving town where their lanes are less busy. The lanes priority
is effectively swapped in the evening when people are leaving work for home and thus
there’s heavy traffic coming from town.
The priority circuit made of purely logic gates is the heart of control of the entire project.
Attention is also drawn on the use of luminous LEDs as a replacement of the current
incandescent lamps used in the conventional traffic lights whose life span is smaller and are
relatively unreliable compared to luminous LEDs.

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Declaration
This project report is presented in partial fulfillment of the requirements for the degree of
Bachelor of Science in Computer Engineering at Kenyatta University, Nairobi, Kenya.
It is entirely my own work and has not been submitted to any other institution of higher
education for any academic award. Where use has been made of the work of other people
it has been fully ci t e d , acknowledged and referenced.

Signature:
Martin Mbiyú

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Acknowledgements
I would very much like to gratefully extend my sincere thanks to all the people who gave
generously their time, takes one and all. Especially my supervisor Eng. P.K Muiruri whose
analysis and creative criticism on the project, made it more realistic and for the guidance he
showed me right through every stage of the project, from initial conception to its
completion.
To the I.C.T Department technicians and the entire support staff in the School of Engineering
for kindly granting me access to t he laboratory for initial research work and later simulation
and testing and many more of colleagues including Isaac and Dennis K who helped me with a
lot of the tedious leg work involved in giving life to a design and implementation project.
And finally on the sacred feminine, I would be remiss if I did not mention the two
extraordinary women who have touched my life. First, my mother- my inspiration, mentor
and without a doubt the most astonishingly resilient woman I have ever known. And to my
aunt A. Zippy; a woman of steel, nurturer and a perfect blessing- thanks.
To Gladys Muthoni, Sylvia Wangechi and Janet for their encouragement and inspiration when
the project was too tasking and demanding.
To Mrs. Grace Kanana form the traffic control room of the Nairobi City Council for her invaluable
information on traffic controls, thank you
And to the Lord God Almighty, eternal praise is to you for Your countless blessings.

You are all my heroes and heroines.

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Dedication
To the lady who took me to class and gave me the ultimate gift, education.
Thank you, Grandmother. May your soul rest in eternal peace.

And to all my family. May God’s blessings exceed your capacity.

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Table of Contents
ABSTRACT ............................................................................................................................................ 1
DECLARATION..................................................................................................................................... 2
ACKNOWLEDGEMENTS...................................................................................................................... 3
DEDICATION........................................................................................................................................ 4
1. INTRODUCTION............................................................................................................................... 6
1.1 PURPOSE ........................................................................................................................................ 7
1.2 PROBLEM STATEMENT .................................................................................................................... 7
1.3 PROJECT OBJECTIVES ..................................................................................................................... 8
1.4 PROJECT JUSTIFICATION ................................................................................................................. 9
2. LITERATURE REVIEW................................................................................................................... 10
2.1 INTRODUCTION ............................................................................................................................ 10
2.2 THE CONVENTIONAL TRAFFIC LIGHTS .......................................................................................... 10
2.2.1 Construction and control .................................................................................................... 11
2.2.2 Drawbacks of the conventional traffic lights ...................................................................... 12
2.3 L.E.DS FOR TRAFFIC CONTROL ..................................................................................................... 12
2.4 THE KENYA TRAFFIC CONTROL CASE STUDY.................................................................................. 13
2.4.1 The Nairobi road traffic jam ................................................................................................ 13
2.4.2 Kenya’s Road Traffic Management...................................................................................... 14
2.4.3 Recommendation on the Kenya traffic management .......................................................... 15
3. DESIGN & ANALYSIS ..................................................................................................................... 17
3.1 BLOCK DIAGRAM ......................................................................................................................... 17
3.2 BLOCK DESCRIPTIONS .................................................................................................................. 18
3.3 SYSTEM DESIGN DESCRIPTION ...................................................................................................... 19
3.3.1 AC Input.............................................................................................................................. 19
3.3.2 Power unit ..................................................................................................................... 19
3.3.3 Timing Circuit 1 .................................................................................................................. 29
3.3.3 Counter ......................................................................................................................... 35
3.3.4 Decoder Unit ................................................................................................................. 37
3.3.5 Timing Circuit 2 ............................................................................................................ 39
3.3.6 Priority Logic ................................................................................................................ 39
3.3.7 LED Output Array ......................................................................................................... 41
3.4 SUMMARY CIRCUIT OPERATION ............................................................................................. 43
3.5 SYSTEMS CIRCUIT DIAGRAM ................................................................................................... 43
4. VERIFICATION............................................................................................................................... 44
4.1 TEST CRITERIA AND METHODS ...................................................................................................... 44
4.2 PERFORMANCE TESTING............................................................................................................... 44
4.3 TESTS ANALYSIS ........................................................................................................................... 45
4.4 COMPARISON OF PROJECT TO SPECIFICATIONS: ............................................................................ 46

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5. COST ................................................................................................................................................ 47
5.1 COST ANALYSIS FOR DEVELOPMENT: ...................................................................................... 47
5.1.1 Labor Costs: ......................................................................................................................... 47
5.1.2 Parts Costs ........................................................................................................................... 47
5.1.3 Other costs .......................................................................................................................... 48
5.2 PROJECT FUNDING .................................................................................................................. 48
6. CONCLUSIONS & RECOMMENDATIONS .................................................................................... 49
7. REFERENCES................................................................................................................................... 51
8. APPENDIX....................................................................................................................................... 54
8.1 APPENDIX A........................................................................................................................... 54
8.1.1 Bill of Materials for:............................................................................................................. 54
8.1.2 External Components Calculation Using 555 Timer Design Ver 1.1............................. 55
8.2 APPENDIX B ............................................................................................................................. 56
List of Acronyms .......................................................................................................................... 56

List of tables
Table 1: Colors Selected on lanes by decoder lines.................................................................... 38
Table 2: LED connections on decoder outputs........................................................................... 38
Table 3: Counter Truth tables ..................................................................................................... 40
Table 4: Average ON time for green light .................................................................................. 44
Table 5: Tests on Amber Light .................................................................................................... 44
Table 6: Parts Costs in KES.......................................................................................................... 47

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 1. INTRODUCTION

1.1 Purpose
The transport industry is a crucial pillar in any economy. Agriculture products need to be
ferried from the farms to factories, people need to access their businesses every morning to
mention but a few. A good economy is a reflection of good transport infrastructure. That’s
why the government invests a huge fraction of its budget in the sector. It has also set state
corporations and special departments such as KCAA, KRB, RRBA, and KURA, Highway
Patrol Division of the Police, KENHA, and traffic department of the police e.t.c to monitor
and control the pivotal sector. Many different means of transport are available to fulfill
transport needs- tarmac roads, railway lines, airplanes, and ships. The roads are by far the
most common transport medium given their wide network to different locations within and
outside the country.
Road transport offers some major advantages over other means. These advantages are:
increased connectivity, greater ease of use, and lower costs of fuel per unit load hence cheap,
relative faster delivery compared to railway lines and ships, and easy accessibility to remote
locations. For these reasons, road transport remains the means of choice for most commuters.
Needless to say, it experiences, among other problems, congestion. This is where the need for
traffic control becomes eminent especially in major roads such as Thika-Nairobi highway
and Nairobi-Mombasa highway.
There have been slight developments to control the heavy traffic but the efforts are
disappointed by the lack of a clear solution to the nuisance.
Solid state low power traffic lights control has already begun to make inroads in developed
countries Light-Emitting Diodes (LEDs) have begun to be used to replace the thyristor
powered lamps. Today these LEDs are designed to generate 10–100 lumens per LED (a 15 W
incandescent bulb generates approximately 92 lumens) with efficiencies that surpass
incandescent and halogen bulbs. It is their superior efficiencies at lower power levels that
make them ideal for battery powered (or low voltage) applications. The disadvantage to using
LEDs is their sensitivity to variations in input voltage and therefore the need for voltage
regulation circuitry.[2] As a result, a small, reliable and cost-effective variable output load
resistance to 6V output voltage regulator.

1.2 Problem Statement

Traffic jams continue to devastate many motorists and their patrons. Timely access to major
towns has been made a priority to ‘early birds’ who wake up early to beat the jam that would
otherwise cost them a lot of time routing to their destinations. The conventional traffic lights
follow a rigid sequence that’s inconsiderate of the amount of traffic on the lanes depending
on the time of the day. A green light on an extremely heavy traffic lane lights as long as its
counterpart on the less heavy lane, which at times may be even empty.

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The aim of the project is to design a digital system that addresses the issue of priority on the
heavy traffic lanes and use low power LEDs for lighting the traffic lights. This would mean,
depending on the time of the day, the heavy traffic lane would be allocated more time on the
green (GO) light than the less heavy lane to ensure speedy flow of the congested lane. The
lanes priority is switchable. Say, for instance, traffic is heavy on lanes leading to town in the
morning than those leaving town hence a priority is assigned on these lanes. This changes in
the evening when commuters are leaving town to their home, and thus the priority is
assigned to those lanes that leave town. When traffic subsides on sides, say after morning
(10AM-5PM) or on weekends, the normal (with no priority on either lanes) sequencing
applies.

1.3 Project Objectives

While designing the traffic control system, outlined are a number of features and
performance requirements that were to be implemented. The features of the system
included
 a stable control using a digital circuit, small size, at low cost that offer green on time
priority on the busy lane
 Good efficiency (greater than 70%) low power LEDs traffic lighting.
Along with these features, the system should meet several performance requirements.
 Economic: A low cost solution to the traffic congestion problem.
 Environmental: The project is to be harmful to the environment in no way. The chosen
electric energy has no gaseous emission. Design sought for sources of energy that had no
issues with environmental pollution. Proper protection of the traffic light was necessary
so as to avoid damage due to rain, winds, high temperatures, and other extreme weather
conditions. While the prototype model did not include any of these protective
components, suggestions and design specifications are presented as recommendation.
 Ethical: The traffic light system is to benefit to the community and a safety
implementation for the proper protection of pedestrians and motorists.
 Health and Safety: A set of requirements standards on the design of traffic light systems
to be met. The design had to meet the following objectives.
o To design a traffic light face of a minimum size so as to be clearly seen by any
motorist or pedestrian whose path is affected by the traffic light
o Attain a brightness level to be clearly seen by anyone whose path is affected by
the light
o A safe to use design that minimize the risk of shock
 Social: The design is to benefit traffic flow of the major towns rather than impede the
traffic further in any way. Therefore the design specifications must be set up to
efficiently direct the flow of traffic.
 Sustainability: To build a sustainable system that can tolerate fluctuating voltages and to
ensure availability of proper control at any time of the day.

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 Aesthetics: The appearance of the traffic light is an important characteristic to the traffic
light. The design was to follow the conventional traffic lights color code and of ample
brightness to make the LEDs clearly viewable and a background that does not impede the
clearness of color on the traffic faces. A good looking project that appear organized in the
design and production of the system to bridge between the design complexity and
simplicity of operation.

1.4 Project Justification

The conventional existing traffic control does not incorporate its system the concept of
priority. This takes up a lot of time and fuel while waiting on stop (RED) light on the less
busy lane to initiate movement on the busy lane. The project incorporates priority logic into
the traffic system that assigns the busy lanes a longer time on the green (GO) light for faster
movement.
Built on basic digital electronics principles, the system is simple to construct and friendly to
the user as the priority circuit is built on pure logic gates which can be easily understood.
It is cost effective in that one only has to incur the initial cost for purchasing a simple
electronic components and devices to implement the circuitry only once unless maintenance
is required at later stages as a result of operational failures.
It is efficient in its control mechanism using a meager 6V of energy to power low voltage
LEDs hence saves on energy consumption and cost respectively.

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 2. LITERATURE REVIEW

2.1 Introduction
A traffic signal light is used to control vehicles and passengers so that traffic can flow
smoothly and both drivers and passengers are safe. Traffic signal lights have been around for
years and are used to efficiently control traffic through intersections. Although traffic signal
lights are relatively simple and commonplace, they are critical for ensuring the safety of the
driving public.
The growing use of traffic lights attests to their effectiveness in directing traffic flow,
reducing the incidence of accidents, and most recently to their utility in controlling the flow
of traffic through large metropolitan areas when used in conjunction with computer driven
systems. A traffic light is an important feature in traffic control today. Not only does the
traffic light provide an efficient means of controlling traffic flow, it adds greatly the safety of
drivers on the road. Traffic signal lights improve road safety and reduce congestion by
providing for the orderly and predictable movement of traffic through intersections. Traffic
control lights are provided for traffic control on streets and highways, especially at
intersections.[x]

2.2 The Conventional Traffic Lights

The traffic signals are cyclically displayed through a suitable timing and control mechanism.
Such traffic control lamps are usually provided with green, red or amber lenses or sometimes
with lenses having arrows to indicate direction. Typical traffic lights operate using at least
red and green light phases, with traffic required to stop when the light is red, and permitted
to pass through the intersection when the light is green. A yellow/amber/orange light phase
may further be used to indicate that the light will change to red shortly. Driving through a
red light without justification may be a citationable traffic offense.
Traffic signal lights are generally comprised of an enclosure that houses green, amber and red
lights. The switching mechanism for controlling the activation of the lights may be located
within the enclosure or at a remote site. Traffic lights have been used since the early 1900's
to control vehicular traffic flow by advising drivers when and where to stop, proceed, turn,
etc. Modern traffic light is no different today than it was decades ago. The basic light still
employs red, yellow, and green filters over lamps that are sequentially turned on and off by
an electromechanical timing switch or by more modern solid state traffic controllers.[x]

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Photo 1: The Conventional traffic (Source: wkipedia.com) Photo 2: Fine on Red light violation

2.2.1 Construction and control

A regular traffic signal light is generally comprised of a reflective lamp shade, a light bulb
mounted inside the lamp shade, and a lens covered on the front open side of the lamp shade.
Traffic light assemblies are arranged in multiple groupings about central vertical post means.
Typically, each traffic light assembly comprises a red stop light, a green "go" light, and a
yellow caution light. The three lights of each assembly are arranged in vertical or horizontal
array. Each multiple group of lights is commonly located at a traffic intersection so that one
set of lights faces each oncoming stream of vehicular traffic. In the case of a four-way traffic
intersection, each traffic signal system will include four sets of traffic signals facing the four
directions of oncoming traffic. Three-way traffic intersections and two-way intersections
will have three sets of signals and two sets of signals, respectively. As the world becomes a
more crowded and busy place, there are an increasing number of automobiles, trucks, buses
and other vehicles on the road. Very early in the development of our roadway system, the
traffic light was developed to control the flow of traffic at intersections. [x] The earliest
traffic lights were simply controlled by timers; each light was on for an allotted period of
time within a cycle which repeated over and over. Modern traffic control signals, or traffic
lights, are commonly controlled by a computer based controller. Modern traffic signal
systems include two major components: the controller and the display (lights).
A conventional traffic light employs red, yellow/amber/orange and green filters over
incandescent bulbs that are sequentially turned on and off by an electromechanical timing
switch or by solid state controllers.

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2.2.2 Drawbacks of the conventional traffic lights
Each bulb is electrically coupled to a conventional power source, such as the conventional
power distribution network. A considerable cost factor with such traffic signal installations
with conventional incandescent lamps is the relatively often required replacement of these
lamps. Traffic lights using this technology have many drawbacks: the bulbs power
consumption is high (each being between 100 W and 150 W), thus increasing the operation
cost. The bulb lifetime is short and decreases with environmental conditions. For example, a
light bulb's lifetime decreases with vibrations and temperature. These problems are of special
concern because most traffic signals operate continuously. Another drawback with
conventional traffic signals is that the masked lenses used to create the illuminated symbol
images waste energy because they block light produced by the lamp in order to form the
images. Therefore, a significant amount of light from the lamps is wasted as heat absorbed by
the lenses instead of light being projected out to the traffic. [2]

2.3 L.E.Ds for Traffic Control

Light emitting diode (LED) lamps have been developed to replace conventional incandescent
or fluorescent lamps for reducing electrical and maintenance costs, and for increasing
reliability. LEDs offer the considerable advantage of consuming significantly less power than
incandescent lamps. An LED traffic light uses only a fraction of the electrical power a light
bulb traffic light used and is thus less expensive for long term use. In most cases, an LED
array will consume about one tenth the power that a filtered incandescent bulb will consume
to produce the same light output. The life cycle costs of a traffic signal using an LED array in
lieu of an incandescent bulb is also significantly reduced since incandescent bulbs used in
traffic signals typically must be replaced once or twice a year. A well designed LED array
could be expected to function for more than twenty years before requiring replacement. LED
lamps also generally require less frequent replacement due to burn out than incandescent
lamps. The LED array is more resistant to the elements and is more mechanically durable
than an incandescent bulb. It is also possible to achieve a higher flashing rate with an LED
array than with an incandescent bulb. LED lamps typically include a power supply and a
plurality of LEDs mounted on a flat or curved surface. An LED array does not require a light
reflector like the relatively large parabolic reflectors used with incandescent bulbs. The
elimination of the reflector is an advantage because during certain seasons at certain times of
day, sunlight can be reflected off the reflector in an incandescent bulb traffic signal and cause
a confusing display.[1]

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 Photo 3: The LED lit traffic lights (Source: googlepics.com)

2.4 The Kenya traffic control case study

Road traffic situation in Kenya is a major problem to road users and the overall economy. It
is estimated that millions of shillings are lost in traffic jams each year. A recent survey said
traffic jams were costing drivers up to 50-million shillings (R5.2-million, $746 000) a day
through increased fuel consumption, mechanical damage and pollution in major towns. [xxi]
There are a number of reasons as to why the congestion in our roads is an eternal problem. A
combination of undisciplined drivers, ramshackle vehicles, overloaded trucks, potholed roads
and corrupt traffic police make one of Africa's biggest cities resemble the dodgems on a good
day and, when things get really bad, reduce it to gridlock.
The institutions entrusted with traffic control seem overwhelmed by the heavy traffic as
they lack adequate and efficient resources to control it. While vehicles continue thronging
into the limited volume roads, there are no similar efforts by the authorities to manage how
their flow will be.
The traffic department of the police work tirelessly to control the traffic but there’s no
doubt, their resources are over stretched. The NCC erects and controls traffic lights in the
CBD. There however seems to be problems still.

2.4.1 The Nairobi road traffic jam

Since being founded by the British in 1899 as a supply depot for the Uganda Railway, the
Kenyan city of Nairobi has grown to be one of the largest in Africa, with the highest urban
population in East Africa. The city's infrastructure has failed to keep pace with the rapid
growth, resulting in some of the worst traffic on the continent.

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Less than one-tenth of Nairobi's three million citizens own cars. Yet traffic is a serious
problem. Every morning and evening, during peak commuters’ hours, the city comes to a
standstill.
This is not just a problem for commuters, but is also increasingly a major health risk.
Millions of Kenyans are believed to be suffering from diseases related to pollution.
Nairobi is struggling with crippling car congestion - a problem some say is so bad the country
should consider transferring its capital to another city.
Once known as East Africa's green "City in the Sun", Nairobi is so choked with traffic that
Kenya's architects suggest moving to a new capital and angry business leaders say the
booming economy is under threat.
The major arteries feeding traffic in and out of downtown Nairobi are single-lane roads and
they split off at different junctions by the way of roundabouts, which separate incoming and
outgoing traffic.
But while roundabouts are generally considered safer than traditional intersections because
they force drivers to slow down to enter the roundabouts, they are ill-suited to handle high-
volume traffic.
If an accident or a vehicle breakdown occurs in one direction, as it frequently happens
during rush hour in Nairobi, it quickly blocks the roundabout and the backup spreads to all
other roads. Traffic throughout the city often comes to a standstill until the source of the
traffic jam can be cleared off the road.
Photo 4: The Nairobi roads snarl up
(Source: http://krb.go.ke)

2.4.2 Kenya’s Road Traffic Management

Traffic management is basically the responsibility of police. There must be a business and
technological wide approach to managing congestion. Right now, the length of time it takes
to move from one part of the city to another has reached a totally inefficient point.

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Part of the traffic management solution lies in thinking outside the box. The traffic
department, in conjunction with city planners, should isolate the common thinking about
the increase in the number of newly-registered vehicles from other reasons such as
malfunctioning traffic signals, potholes, speed bumps, minor accidents, bus-stop spaces, and
inept traffic police.
The latter sometimes causes obstruction in the smooth flow of traffic. It is most annoying to
see two traffic officers standing beneath a functional green light waving on vehicles. This
implicates the inefficiency and lack of confidence with the existing traffic lights control

The standard sequence in Kenya for traffic light is to be adopted, which is shown below
Table 1: Standard sequencing for traffic lights
(Source: NCC- City Engineer Department, Highways Section)
Green
Amber
Red
Red +Amber
Green time and inter green time is usually as below
Green on 30 seconds
Amber on 7 seconds
Red on 48 seconds
Red + Amber 5 seconds
Duty cycle 90 seconds

The above sequence is rather rigid and inconsiderate of the traffic volume. The project
designed assigns a longer Green “on” time for the busy lane above the normal 30s to allow for
decongestion of traffic.
The project also recommends the use of LEDs in place of the presently employed
incandescent lamps that consumes a lot of energy.

2.4.3 Recommendation on the Kenya traffic management

There is an urgent need to seek money to procure more patrol motorbikes, instead of
employing more standing police officers. It is not clear whose responsibility this should be -
the Nairobi Metropolitan ministry or the Office of the President under which the Police
Department falls. More mobile police officers need to move with the traffic.

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It is also necessary to map Nairobi, and other jam ridden cities say 10-15 kilometer radius
from the CBD where each main artery is covered by a senior police officer.
Whereas one can understand congestion arising from convergence in the CBD at 8am, it is
not clear why this should be so when vehicles are leaving the city.
The objective of mapping and patrolling is to get to the problem spots, sort out the problems,
and move on. This mobility must be maintained all week.
In addition, the traffic commandant should retain the services of a towing truck to
immediately pull out heavy commercial vehicles which may stall and block the roads.
There is also need for mobile police because PSVs drivers communicate to each other about
the absence of traffic officers and promptly begin to overlap what was a slow but orderly
queue.
The traffic police need to move around in plainclothes and unmarked vehicles. This way,
flouting of traffic rules can be contained.
The traffic department should work within certain standards. For example, let it be a target
that a motorist from the CBD, will on average, not take more than 10 minutes to the Kenya
Science Teachers College during off-peak hours and not more than 20 minutes during peak
hours.
Such targets are important because a vehicle should not cover the Umoja-city trip in the
same time that a motorist would cover the Nairobi-Nakuru trip.
Slow moving vehicles are a sign of either incompetent drivers, unroadworthy or overloaded
vehicles.
Any or all these factors cause poor road capacity utilization, hence a build-up of traffic.
Mobile policeman should pull such vehicles to the side and get traffic moving.
It is important to monitor motorists at junctions, including roundabouts. There is the right
lane to use to turn at a junction or roundabout.
Wrong use of lanes and exits at roundabouts slows down traffic flow. Anyone slowing traffic
must be ruthlessly removed from the road.
In summary, I am requesting that the Police Traffic Department rethink its strategies in
enforcing the Traffic Act. Currently, motorists, especially PSV drivers, are only likely to
obey the Highway Code if they perceive a traffic police officer to be in the vicinity.

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 3. DESIGN & ANALYSIS

3.1 Block Diagram

The block diagram for the system is shown in figure 1.

TIMING
CIRCUIT
POWER UNIT 1
 V step down
I/P COUNTER DECODER
240V  Rectification
AC  Filtering Clock
 Regulation Pulse
Generator
DC

Normal Priority

L
PRIORITY E
LOGIC
CIRCUIT
D

TIMING
CIRCUIT 2
24 Hr RTC
8 24hr
Display
Circuit

8
Figure 1: Block diagram for the Prioritized busy lane traffic lights control system

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3.2 Block Descriptions
Input AC voltage: This block represents the 230-240 V from the mains supply tapped from
the wall outlet.

Power Unit: Since the system operates on 6V DC driving 5V rated ICs, the AC voltage from
the wall input is stepped down by a transformer and then rectified to DC through the full
wave rectifier. A shunt filtering capacitor is used to smoothen the DC voltage to ensure as
ripple free DC voltage as possible.
A regulator IC is incorporated to ensure a stable 6V supply to the system components.

Timing circuit 1: The purpose of this circuit is to generate clock pulses that are fed to the
counter for the sequencing of the traffic lights. This block of the system is based around a
NE555 timer operated in astable multivibrator mode.

Counter: This is based on the 74LS160 synchronous counter. The three outputs from the
counter act as inputs to a 3-to-8 line decoder that select the LEDs to be lit. One output is
tapped and fed back to the timing circuit, this is for reducing the duration of the ON for the
AMBER LEDs. They light for the shortest duration. This is achieved by a diode and a resistor
connected to the timing circuit.

Decoder Unit: A 3-to-8 line decoder receives inputs from the counter which selects what
LEDs are to be lit and on what lane.

Priority Logic circuit: This is the heart of control for the system. It is composed of purely
logic gates, AND, OR and NOT that determines what lanes to give priority on the green GO
light depending on the time which is referenced from tapings from the Timing circuit 2,
RTC, that gives the 24hr clock. Priority is assigned on peak traffic hours, taken to be 7am,
8am and 9am. After 10am till 5pm, the priority circuit is inoperational and resumes operation
at 5pm, having switched the lanes that were assigned priority before.

Timing Circuit 2: This unit is designed to function as a 24 hour digital clock. The priority
circuit is dependent on the output (time) of this circuitry to determine where and when
priority is applicable. The circuitry is composed of two 74LS160 counters- one at modulo ten
(-:-10) and the other set at -:-6 to attain at 60 count for the hourly count. A 555 timer
generates clock signals to the counter every minute.

24 hour Display: This is part of the 24 hour timer set for displaying the time for
demonstration purposes. It consists of two 7-segment displays. One is set to read the most
significant digit (MSD) of the 24 hour time format while the other the LSD. Combined

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readings give the time. There’s no display for minutes and seconds to minimize the
complexity of the system while attaining the same results.

LED Array: This is the eventual output section of the system for which there’s intention to
control their lighted. Coupled with the individual LEDs are diodes that form an OR gate. The
LED array is part of the load and may be considered the ultimate output. The system
proposes the use of LEDs in place of incandescent lamps where an array of diodes for one
traffic light color be arrested in a single unit to replace a bulb in the conventional design.

3.3 System Design Description

3.3.1 AC Input
This is directly fed from the wall outlet of 240V (as per Kenya’s domestic consumption and
ratings standards) AC mains supply. It’s part of the power unit, but it’s discussed separately as
simply such

3.3.2 Power unit

The system is purely a DC system driving low voltage ICs and other components. There’s
therefore a need to step down the high voltage to useful and safe amount, rectify the AC to
DC, filter it off AC ripples and regulate the amount of voltage at a constant 6V. A 6V battery
would have sufficed but there was need to have a constant voltage supply to the system
hence the use of a step down transformer.
The following components of this unit do the named tasks.

3.3.2.1 Step down transformer

To achieve the driving voltage of up to 6V, the 240V is stepped down to 6V. The transformer
to be used was readily available and of exact specification- a 220V to 6V AC at 0.5A current
output. This suppressed the necessity to design a complex transformer circuit for the project.
The transformer operates on the principle of electromagnetic induction.

Figure 2: Schematic of a step down transformer

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The primary winding is connected to a 50 hertz ac voltage source. The magnetic field (flux)
builds up (expands) and collapses (contracts) about the primary winding. The expanding and
contracting magnetic field around the primary winding cuts the secondary winding and
induces an alternating voltage into the winding. This voltage causes alternating current to
flow through the load. The voltage is stepped down since the primary windings have more
turns than the secondary windings. [ii]
From the relation

ep ÷ es = Np ÷ Ns Equation 3.1

where ep is the primary voltage and es is the secondary voltage Np and Ns are the number of
turns in the primary and secondary windings respectively, we can define turns ratio as

Np ÷ Ns

The ICs in the circuit are rated 5V of Vcc but could tolerate the available supplied 6V form
the transformer.

3.3.2.2 Full Wave Diode Rectifier & AC ripple filter

The 6V AC from the transformer T1 needs to be rectified to DC. A diode bridge rectifier D1
achieves this. The set up is made of four diodes connected in the manner shown in Figure 3
with input from the 6V secondary side of the preceding transformer. A shunt capacitor of
1000 microfarads is employed to filter off the AC component (ripple) of the attained DC
voltage.
The value was derived from the standard shunt capacitors ratings as per the transformer
secondary voltage.

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 D1
240V-6V, 500mA BRIDGE
T1 D3
D1

D4
+ C1
D2 RL
1000uF

Figure 3: Diode bridge full wave rectifier

Labeled clockwise from the D1 BRIDGE label, the diodes are D1, D4, D2, and D3.
During the positive half cycle of the secondary voltage, the top end becomes positive and
bottom end negative this makes D1 and D2 forward biased while D2 and D4 are reverse
biased .this allows current to flow throw RL. In the negative half cycle D3 and D4 are
forward biased while D1 and D3 are reverse biased ,this allow current to flow in the same
direction through RL . [3]

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 Figure 4: Voltage and Current waveforms of the bridge rectifier

For a full-wave rectifier,

Equation 3.2

for both positive and negative half cycles. v L being instantaneous load voltage

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Rewriting equation 3.2 gives

Equation 3.3
Vdc being the DC voltage.

Therefore

Equation 3.4
The root-mean-square (rms) value of load voltage vL is VL, which is defined as

Equation 3.5

for both the positive and negative half-cycles. Hence, Eq. (10.6) can be
rewritten as

Equation 3.6
OR

Equation 3.7

3.3.2.3 Transformer Voltage Regulation

The output voltage of a transformer varies some with varying load resistances, even with a
constant voltage input. The degree of variance is affected by the primary and secondary
winding inductances, among other factors, not the least of which includes winding resistance
and the degree of mutual inductance (magnetic coupling) between the primary and

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secondary windings. For power transformer applications, such as the designed traffic lights
project where the transformer is seen by the load (ideally) as a constant source of voltage, it
is good to have the secondary voltage vary as little as possible for wide variances in load
current.
The measure of how well a power transformer maintains constant secondary voltage over a
range of load currents is called the transformer's voltage regulation. It can be calculated from
the following formula:
 Eno _ load  Efull _ load ) 
 Re %  Efull _ load  100% Equation 3.8
 
Full-load means the point at which the transformer is operating at maximum permissible
secondary current. This operating point will be determined primarily by the winding wire
size (ampacity) and the method of transformer cooling.
To power the resistive load of the system, it is desired that the transformer exhibit a
regulation percentage of less than 3%. Spice simulation on the system gave a regulation of
1.2% which is OK for our system.

Linear Voltage Regulators

A voltage regulator generates a fixed output voltage of a preset magnitude that remains
constant regardless of changes to its input voltage or load conditions. Of the two types of
voltage regulators, linear and switching, the linear regulator was selected for the project.
A linear regulator employs an active (bipolar junction transistor (BJT) or MOSFET) pass
device (series or shunt) controlled by a high-gain differential amplifier. It compares the
output voltage with a precise reference voltage and adjusts the pass device to maintain a
constant output voltage.
Voltage regulation is achieved by use of IC regulator.

Figure 5: Linear regulator functional diagram

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The control circuitry must monitor (sense) the output voltage, and adjust the current source
(as required by the load) to hold the output voltage at the desired value. The design limit of
the current source defines the maximum load current the regulator can source and still
maintain regulation. The output voltage is controlled using a feedback loop, which requires
some type of compensation to assure loop stability. Most linear regulators have built-in
compensation, and are completely stable without external components. Some regulators
(like Low-Dropout types), do require some external capacitance
connected from the output lead to ground to assure regulator stability. [3]
Another characteristic of any linear regulator is that it requires a finite amount of time to
"correct" the output voltage after a change in load current demand. This "time lag" defines
the characteristic called transient response, which is a measure of how fast the regulator
returns to steady-state conditions after a load change.

The Standard voltage regulator

The first IC voltage regulators made used the NPN Darlington configuration for the pass
device, and are designated as the Standard regulator (see Figure 6). [4]

Figure 6: Standard (NPN) regulator circuit diagram

An important consideration of the Standard regulator is that to maintain output

regulation, the pass transistor requires a minimum voltage across it given by:

VD(MIN) = 2 VBE + VCE (Standard Regulator)

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Allowing for the -55°C to +150°C temperature range, this minimum voltage requirement is
usually set at about 2.5V to 3V by the manufacturer to guarantee specified performance
limits.
The voltage where the output actually falls out of regulation (called the dropout voltage) will
probably be somewhere between 1.5V and 2.2V for a Standard regulator (it is dependent on
both load current and temperature). The dropout voltage of the Standard regulator is the
highest (worst) of the three types. [5]
The ground pin current of the Standard regulator is very low (an LM309 can supply 1A of
load current with less than 10 mA of ground pin current). The reason for this is that the base
drive current to the pass transistor (which flows out the ground pin) is equal to the load
current divided by the gain of the pass device. In the Standard regulator, the pass device is a
network composed of one PNP and two
NPN transistors, which means the total current gain is extremely high (>300). The result of
using a pass device with such high current gain is that very little current is needed to drive
the base of the pass transistor, which results in less ground pin current. The ground pin
current of the Standard regulator is the lowest (best) of the three regulator types.

The operation of the control loop

The function of the control loop is similar in all of the linear regulator types.
The pass device (Q1) in this regulator is made up of an NPN Darlington driven by a PNP
transistor (this topology is a Standard regulator, as detailed above. The current flowing out
the emitter of the pass transistor (which is also the load current IL) is controlled by Q2 and
the voltage error amplifier. The current through the R1, R2 resistive divider is assumed to be
negligible compared to the load current.

Figure 7: Typical Linear voltage regulator

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The feedback loop which controls the output voltage is obtained by using R1 and R2 to
"sense" the output voltage, and applying this sensed voltage to the inverting input of the
voltage error amplifier. The non-inverting input is tied to a reference voltage, which means
the error amplifier will constantly adjust its output voltage (and the current through Q1) to
force the voltages at its inputs to be equal.
The feedback loop action continuously holds the regulated output at a fixed value which is a
multiple of the reference voltage (as set by R1 and R2), regardless of changes in load current.
It is important to note that a sudden increase or decrease in load current demand (a "step"
change in load resistance) will cause the output voltage to change until the loop can correct
and stabilize to the new level (this is called transient response). The output voltage change is
sensed through R1 and R2 and appears as an "error signal" at the input of the error amplifier,
causing it to correct the current through Q1. [3]

Regulator selection
In selecting the best IC regulator for the project, the following key specifications dictated the
ultimate choice.
 Maximum Load Current
 Type of Input Voltage Source (Battery or AC)
 Output Voltage Precision (Tolerance)
 Quiescent (Idling) Current
 Special Features (Shutdown Pin, Error Flag, etc.)

Since the DC supply is generated from a rectified AC source, the dropout voltage of the
regulator is not as critical because additional regulator input voltage is easily obtained by
increasing the secondary voltage of the AC transformer (by adding turns to the secondary
winding). [6]
Since the transformer was a step down one, increasing the turns would have significantly
affected our system output. Rather a standard regulator is usually the most economical choice
and can also provide more load current. However, in some cases the additional features and
better output voltage precision of some of the new LDO (Low Drop Out) regulators would
still make them the best choice.
Typical linear regulators usually have an output voltage specification that guarantees the
regulated output will be within 5% of nominal. This level of accuracy is adequate for most
applications.
There are many new regulators which have tighter output tolerances (better than 2% is
common), achieved through the use of a laser-trim process.
Also, many of the new regulators have separate output specifications that cover room
temperature/full
operating temperature range, and full-load/light-load conditions.

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The quiescent current that a part draws from the source when idling (either shut down or
not delivering significant amounts of load current) can be of critical importance in battery-
powered applications.
In some applications, a regulator may spend most of its life shut off (in standby mode) and
only supply load current when a main regulator fails. In these cases, the quiescent current
determines the battery life.
Many of the new LDO regulators are optimized for low quiescent current (like 75 to 150A),
and provide significant improvement over typical regulators which draw several milliamps.
The L7806 is selected for a 6V regulation. It’s an off the shelf positive voltage IC regulator of
the 7800 series that meet our system’s need. These regulators can provide local on-card
regulation, eliminating the distribution problems associated with single point regulation.
Each type employs internal current limiting, thermal shut-down and safe area protection,
making it essentially indestructible. If adequate heat sinking is provided, they can deliver
over 1A output current. Although designed primarily as fixed voltage regulators, these
devices can be used with external components to obtain adjustable voltage and currents.

78L06
IN OUT

COM
+

C2
+

C1

Figure 8: L7806 IC voltage regulator schematic

The above figure shows the arrangement of an IC regulator. The 7800 series IC regulator is
representative of 3 terminal devices that provide positive voltage.
C1 located on the input prevent oscillation when the regulator is some distance from power
supply.
It can produce output in excess of 1A when used with adequate heat sink. In this project IC
7806 was used for voltage stabilization. It provides an output of 6V

Figure 9: L7806 Voltage regulator IC Figure 10: L7800 series pin configuration

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The load regulation that a linear regulator can deliver is often much better than what is
actually seen in the application due to voltage drops occurring along high-current paths. To
understand how and why this occurs, we will look at examples of fixed and adjustable linear
regulators.
The system requires a fixed voltage regulation using an L7806 three-terminal regulator (see
Figure 11). The design major interest is in the voltage at the load, but the L7806 regulates the
voltage that appears between its output and ground pins. Any voltage drops that occur
between the regulator pins and the load terminals reduce the voltage across the load (and
degrade the load regulation).

L7806 L7806

Figure 11: Load regulation due to wire drops

In the typical application, VLOAD is always less than VOUT by the sum of the voltage drops
appearing along the positive PC board trace (or wire) and the negative trace (or wire). The
voltage drops along the leads are equal to the resistances (shown as RWP and RWN)
multiplied times the load current.
This shows very clearly how trace resistance can cause "voltage errors" to occur at the load
terminals, with the amount of "error" being directly related to the load current. In such
cases, the regulation seen at the load would be considerably worse than the specification for
the IC regulator.
This can be improved in two ways:
1) Move the regulator ground lead over and tie it directly to the negative load
terminal, so that no other current can flow in this lead and cause voltage drops.
2) Minimize the drop in the positive lead by using the maximum possible conductor
thickness, and place the IC regulator as near the load as is physically possible.

3.3.3 Timing Circuit 1

This circuit comprises of a 555 timer IC operated in astable mode. The timer generate clock
pulses that drive a cascaded counter 74LS160 after every 30s for normal operation of the

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traffic lights and also give a clock pulse after 15s when there’s a feedback signal from one of
the outputs (QA) of the connected counter.
The required time, duty cycle, and frequency for switching on and off is prescribed and a
careful mathematical selection of coupling resistors and capacitors for astable mode
connected 555 timer is done. A formula exists for these parts selection. Also there are a
number of software calculators for this that are quite handy. In the project, 555 timer
calculator was used together with the existing mathematical formulas.
When the IC 555timer is connected as an astable multivibrator it will trigger itself, and work
as a free running multivibrator. An Astable mulivibrator spontaneously switches from one
state to another (say +5V to 0V to +5V). The time it stays high and the time it stays low is
determined by the values of the external components.

Figure 12: 555 Timer internal structure

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 V1
+V

R1

U1
555

R2 1 Gnd Vcc 8
2 Trg Dis 7
3 Out Thr 6
4 Rst Ctl 5

C2
C1 0.01uF

Figure 13: Astable mode 555 timer connection

With astable operation, the trigger and threshold inputs (pins 2 and 6) to the two
comparators inside are connected together and to the external capacitor. The capacitor
charges toward the supply voltage through the two resistors, R1 and R2. The discharge pin
(7) connected to the internal transistor is connected to the junction of those two resistors.
When power is first applied to the circuit, the capacitor will be uncharged; therefore, both
the trigger and threshold inputs will be near zero volts. The lower comparator sets the
control flip-flop causing the output to switch high. That also turns off transistor. That allows
the capacitor to begin charging through R1 and R2. As soon as the charge on the capacitor
reaches 2/3 of the supply voltage, the upper comparator will trigger causing the flip-flop to
reset. That causes the output to switch low. Transistor also conducts. The effect of T
conducting causes resistor R2 to be connected across the external capacitor. Resistor R2 is
effectively connected to ground through internal transistor T1. The result of that is that the
capacitor now begins to discharge through R2.
As soon as the voltage across the capacitor reaches 1/3 of the supply voltage, the lower

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comparator is triggered. That again causes the control flip-flop to set and the output to go
high. Transistor T cuts off and again the capacitor begin to charge. That cycle continues to
repeat with the capacitor alternately charging and discharging, as the comparators cause the
flip-flop to be repeatedly set and reset. The resulting output is a continuous stream of
rectangular pulses.

The frequency of operation of the astable circuit is dependent upon the values of R1, R2, and
C. The frequency can be calculated with the formula:
f = 1/ (0.693 x C x (R1 + 2 x R2)) Equation 3.8

The Frequency f is in Hz, R1 and R2 are in ohms, and C is in farads. The time duration
between pulses is known as the 'period', and usually designated with a 't'. The pulse is on for
t1 seconds, then off for t2 seconds. The total period (t) is t1 + t2 . That time interval is related
to the frequency by the familiar relationship:

f = 1/t or t = 1/f Equation 3.9

The time intervals for the on and off portions of the output depend upon the values of R1
and R2. The ratio of the time duration when the output pulse is high to the total period is
known as the duty-cycle. The duty-cycle can be calculated with the formula:

D = t1/t = (R1 + R2) / (R1 + 2R2) Equation 3.10

You can calculate t1 and t2 times with the formulas below:

t1 =0.693(R1+R2)C
t2 = 0.693 x R2 x C
t = t1 + t2
t = t 1 + t 2 = 0.7(R 1 + 2R2)C Equation 3.11

For this project, the realization of the required duty cycle, frequency, t1, t2 and thus was
achieved by selection of components of the following ratings
C1= 220 microfarads
R1 = 330KΩ
R2 = 33 KΩ
Refer to Appendix

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With the help of a 555 Design Version 1.1, this was an easy task. The versatility of the
powerful 555 timer was one of the reasons for choice for the traffic lights project.
Notice from system overall circuit diagram that, besides the normal external components R1,
R2, C1 and the optional decoupling capacitor C2 (10nF), there is a feed from the 74LS160
counter connected to pin 7 via a 270Ω resistor and a diode.
The relevance of this feed is to allow for the timer to switching on the Amber light for 10
seconds, a shorter duration than the other colors. The diode is to ensure a unidirectional flow
of positive voltage. If not connected, there would be interruption in the operation of the
timer.
The 270Ω resistor is combined in parallel with the 330Ω besides it to yield a lower effective
resistance.

This can be confirmed by:

Reff =330K||270
= (330000 X 270) / 330270
= 270Ω
We notice that this value is smaller than R1; hence in the calculation of t, t would be smaller
hence achieving a smaller ON time for the Amber light..

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 V1
+V

330K
270

555
1 Gnd Vcc 8
33K 2 Trg Dis 7
3 Out Thr 6
4 Rst Ctl 5

C2
220uF
0.01uF

Figure 14: Feedback from 74LS160 counter

The timer is further appended an extra 470 uF capacitor that is controlled by the priority
circuit signal. A 2N2222 transistor acts as the capacitor switch. When there is a biasing
excitation form the priority logic circuit, the transistor is ON and the 470 uF is now
connected in parallel with the C1 of the astable timer. This forces to increase the effective
capacitance of the parallel network causing an increase in the ON time for the green light.

t = t 1 + t 2 = 0.7(R 1 + 2R2)CParallel

where CParallel is the parallel capacitance of the 220uF and the priority
circuit’s capacitor of 470uF>
Mathematically, the value of t is increased with increase in C, thus the time ON for green is
lengthened.
When there in biasing voltage from the priority logic circuit, the transistor is OFF and thus
open circuits the 470 uF capacitor. The lighting sequence therefore takes the normal set time.

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3.3.3 Counter
For synchronous (Events that have fixed time relationship with each other and generally,
occur at the same time) counters, digital circuit’s clock inputs are all wired together. With all
clock inputs wired together, propagation delay is assumed to be equal. Propagation delay
occurs from the triggering edge of the input clock pulse. Each FF’s Q-outputs toggle
simultaneously. Response time for a synchronous counter is faster than Asynchronous
circuit. [5]

3.3.3.1 4 Bit Synchronous Decade Counter

This counter uses a “AND” gates and “OR” gates to detect Q0, Q1 and Q2 outputs of FF0, FF1
and FF2 as well as truncating to the appropriate count sequence (MOD 10).
This condition is unique because outputs are “High” simultaneously. The “AND” is used to
assure that FF2 and FF3 toggles properly and the “OR” gate for partial decoding the correct
truncate count sequence (1001).
The FFs are positive edge triggered devices. The “AND” and “OR” gates assist in the partial
decoding for truncating the sequence for MOD 10 counting. The Timing Diagram is used to
show the “Decade” counting sequence of the synchronous counter.
Count value is incremented on the positive edge of the input clock signal.

Figure 15: Synchronous BCD decade counter

The 74LS160 chosen for this project is a modulo 10 synchronous counter, high-speed 4-bit
synchronous counters. It’s an edge-triggered, synchronously presettable, and cascadable MSI
building blocks for counting, memory addressing, frequency division and other applications.
It has an asynchronous Master Reset (Clear) input that overrides, and is independent of, the
clock and all other control inputs. [9]
A BCD Decade Counter is packaged in 16 pin DIP. IC is capable of counting from (0000) –
(1001).The counter can be “synchronously” preset to any 4-bit binary from (0000) –(1001)
number by applying the proper levels to the parallel data inputs. By toggling the ‘Load (Not

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Load) input, and the ENP and ENT (Enable pins) set High the 4-bit binary data will be
loaded into the counter and displayed at the appropriate output pins.
To provide additional count values, additional counters can be cascaded. The Enable pins
( ENT & ENP) and the RCO (Ripple Count Output) allow additional 74LS160 ICs to be
cascaded.

Figure 16: The 74LS160 synchronous BCD decade counter. (The qualifying label CTR DIV 10 indicates a
counter with ten states.)

The 74LS160 counter receives clock signals from the output (pin 3) of the cascaded 555
timer. It has four outputs, QA, QB, QC, and QD. For our system, we need a 3-to-8 line decoder
to select what LEDs to switch on. This decoder derives its inputs from the output of the
counter. The counter however has 4 outputs and we only need 3. QA (pin 14), QB,(pin 13)
and QC (pin 12) are used.. QA is fed back to the timer as earlier stated to shorten the time ON
of the Amber light..
QD is ingeniously inverted and used to reset the timer by feeding the inverted output to the
pin 1 of the counter.

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 Figure 17: Timing diagram for the 74LS160 counter

3.3.4 Decoder Unit

The decoder chosen is a 3-to-8 line decoder. It receives inputs from the outputs QA, QB, and
QC of the preceding counter. The purpose of the decoder is to select the output that’s
addressed by the coded inputs. There are 8 output lines whose addresses are used to select
what color of LED to light on each of the four lanes.
The table below shows the realization of this light sequencing.

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 Table 1: Colors Selected on lanes by decoder lines
Decoder Line Lane 4 Lane 3 Lane 2 Lane 1
Line 0 Red Red Red Green
Line 1 Red Red Amber Amber
Line 2 Red Red Green Red
Line 3 Red Amber Amber Red
Line 4 Red Green Red Red
Line 5 Amber Amber Red Red
Line 6 Green Red Red Red
Line 7 Amber Red Red Amber
“Line 8” Red Red Red Green

Notice that the decoder “line 8” is actually identical to line 0 and thus repeats itself as shown
by the arrow. From the outputs given in the decoder table, we can record how each LED
lights up for every decoder line. This is summarized below.
RED1 Lights on decoder lines 2,3,4,5, and 6, where RED1 means RED light on lane 1
Similarly,

Table 2: LED connections on decoder outputs

LED Decoder lines on which it is lit
RED1 2,3,4,5,6
AMBER1 7,1
GREEN1 1
RED2 0, 4, 5.6.7.8
AMBER2 1, 3
GREEN2 2,
RED3 0, 1, 2, 6,7
AMBER3 3, 5
RED4 0, 1, 2, 3, 4
AMBER4 5, 7
GREEN4 6

The above table is crucial for the realization of the desired outputs. This tables allows us
determine the connection of the LEDs to the decoder output lines. The connection is
through a diode which forms a positive input OR gate. A direct connection without the
diodes would short the connections causing the LEDs not to light which is definitely not the
intention.

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3.3.5 Timing Circuit 2
This circuit is vital for the heart of control of the project ‘the priority logic circuit”. It
generates outputs that are referenced by the priority logic to determine times for peak traffic.
The circuitry is composed of an astable 555 timer arrangement set to generate clock pulses
every minute (60 seconds). The external components chosen are therefore by calculation:
R1= 220K
R2 = 91K
C1 = 220 uF
And the decoupling capacitor normally taken to be 10 nF. Its usage is optional.

Two 74LS160 counters are cascaded. The counter is a decade counter which resets
spontaneously after 10 counts. Since we need an hourly count, the two cascaded counters
need to be set in a manner that they achieve a 60 count on hour combined.
This is achieved by allowing the first counter to reset spontaneously (thus -:-10) while the
second is reset after six counts by ANDing two of its outputs, inverting them and then
feeding to the reset pin 1. The inverted output serves as an input to the priority logic
counter.

Figure 18: 74LS160 Pin diagram

The circuit is extended with a user interface to display real time. There are two 7- segment
displays and their corresponding decoders. The outputs from the LSD counter and the MSD
counter are fed to the decoders whose outputs are fed to the displays through 270Ω resistors..
The displays show 0 through to 2 for MSD display and 0 through to 3 for the LSD display.
Combined, the two gives the real time.

3.3.6 Priority Logic

This is the heart of the project. Built on logic gates, the priority circuit depends on the output
of the 24 hour timer to appropriately assign priority to the lanes according to the time.
The operation of the circuit is dependent on the outputs of the counters in the priority
circuit. The 24 hour clock is to count form 0 to 23 after which it resets to 0. The individual

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counters count separately with one counting up to 2 (Most Significant Digit), while the other
counts up to 3, (Least Significant Digit). A combination of the two gives the time.
Below is the realization of the time logic from the outputs of the two counters on table 4
below.
Table 3: Counter Truth tables

Most Significant Digit Least Significant Digit

TIME
Qd Qc Qb Qa Qd Qc Qb Qa
0 0 0 0 0 0 0 0 00
0 0 0 0 0 0 0 1 01
0 0 0 0 0 0 1 0 02
0 0 0 0 0 0 1 1 03
0 0 0 0 0 1 0 0 04
0 0 0 0 0 1 0 1 05
0 0 0 0 0 1 1 0 06
0 0 0 0 0 1 1 1 07
0 0 0 0 1 0 0 0 08
0 0 0 0 1 0 0 1 09
0 0 0 1 0 0 0 0 10
0 0 0 1 0 0 0 1 11
0 0 0 1 0 0 1 0 12
0 0 0 1 0 0 1 1 13
0 0 0 1 0 1 0 0 14
0 0 0 1 0 1 0 1 15
0 0 0 1 0 1 1 0 16
0 0 0 1 0 1 1 1 17
0 0 0 1 1 0 0 0 18
0 0 0 1 1 0 0 1 19
0 0 1 0 0 0 0 0 20
0 0 1 0 0 0 0 1 21
0 0 1 0 0 0 1 0 22
0 0 1 0 0 0 1 1 23
0 0 1 0 0 1 0 0

Noting that the outputs triplet LSD at 07, 08, 09 and 17, 18, 19 are similar, we can utilize this
fact to set priority for the traffic control. These hours also happen to be when the traffic jam
is at its peak. This is how to implement the priority logic:
At 7am to 10am, there’s usually high traffic on roads entering tow. Employing the 7am to
9am time, this time can be used to set priority. The priority is given by tapping the 7 form
the LSD of the least significant counter and passing it through a 3 input AND gate formed by

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two 2-input AND gates. The output from the AND gate is only 1 when the counter output is
7. At 8 and 9, Qd from the least significant counter is 1. The output from the AND gate and
that from the Qd are passed through an OR gate which indicates when the OR gate output is
positive (or 1) there’s a priority.
During the evening time, the traffic gets heavy again but now on roads leaving towns from
5pm to after 7pm. Employing once again the 24 hr clock, the output from the least significant
counter will display 7 to 9 which resembles the morning jam time for roads entering the city.
The OR gate output at 17 to 19 will also be a 1 which gives the priority.
The only difference between the counter and the most significant counter which din the
morning, Qa is zero and in the evening, it’s one.(1) By employing Qa from the most
significant counter, one can determine which ways to give priority. Inverting the output
from Qa and passing it through an AND gate, and the priority clock (output) from the OR
gate, the output from AND gate D is 1 which enables AND gate E.
When any of the roads entering town, green light is enabled and the output is inverted,
attaining a 1 which are passed to an OR gate B giving a 1, hence AND gate E is positive
causing OR gate C to be high (1) which biases the transistor incorporating the 470 uF
capacitor to the system which increases the multivibrator time hence giving the roads more
open time.
In the evening, Qa from the most significant counter is positive. It is inverted to disable AND
gate F. When lane 1 or two is open (Green), the negative output is inverted by the inverters
to give a p0sitive (1) output which cause the AND gate F output also high causing OR gate to
be also high thereby incorporating the 470 uF into the multivibrator to increase open time
for prioritized lanes.

3.3.7 LED Output Array

This is the ultimate output for the project. The circuit behavior is reflected by the display of
the array of diodes. The design emphasized the use of LEDs for lighting. Single diodes are
used for every each of the three colors. This is for demonstration purposes though the design
proposes the use of an array of LEDs.
The output circuitry consists of the 12 color LEDs, diode network that forms a positive OR
gate connected to the links on the decoder output lines and the priority logic circuit.
The LEDs connections to the diode network is to form a positive OR gate, Were we to
connect the links directly, we’d be shorting the connections and the LEDs won’t light.
The connections points are obtained from the decoder truth table, table 2.

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 Figure 19: Output LEDs circuitry

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3.4 Summary Circuit Operation
Alternating 240 voltage is stepped down by the step-down transformer to 6V. The diode
bridge full wave rectifier with the shunt capacitor output a DC 6V that drives the system.
The L7806 IC regulator stabilizes the transformer output to 6V.
The 555 timer’s external component comprising of R1= 330K. R2= 33K and C=220uF are
configured through their values to generate the pulses to the 74LS160 synchronous decade
counter connected to the timer.
Q0, Q1, and Q2 outputs of the counter act as input to the 3 to 8 line decoder that selects the
lanes and the LED to be lit. Q3 output is inverted to reset the counter. Output Q0 is fedback to
the timer through a 270Ω resistor that forms parallel connection to the 330K resistor to give
an effective parallel resistance of 270Ω and a diode that ensures a unidirectional (positive)
current flow. The feedback is to allow lighting of the AMBER light for the shortest priority
logic independent duration of 10s.
The 74LS138 3-to-8 line decoder selects the address given by the counter outputs and lights
the LEDs given by those addresses.
The lower 555 timer circuit comprising of 220K and 91K and 220uF capacitor are configured
to generate clock pulses after every minute(60s). The two cascaded 74LS160 counters give an
hourly count for the 24 hr RTC. One counter reset spontaneously after 10 counts while the
other reset after 6 counts. Combined, the two give a count of 60 at one minute each to give
the hour count.
The LSD counter and the MSD counter are connected to the priority circuit. The two
counters count from 0 to 3 for the LSD counter and from 0 to 2 for the MSD. The two counts
are displayed on two 7-segment displays driven by 74LS47 decoders/drivers one for each.
Depending on the time from the RTC, the priority logic circuit switches on or off the 2N222
switching transistor. When on (during the traffic peak hours), the transistor incorporates the
470uF capacitor that increases the time for green light ON on the busy lane and maintaining
normal lighting for the less busy lanes. A current limiting resistor of 4.7K is connected bias
switching transistor.
The output LEDs are connected to positive OR gates realized by connection of diodes as
shown in the output circuit.

3.5 Systems Circuit Diagram

The overall system diagram is as shown. Some pins on ICs are left unconnected as specified
by the purpose they are to achieve. Others like the GRND and VCC connections for 74LS47
decoder and the 74LS160 counters are not labeled. The assumption is that they are by
default, even without showing.

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 4. VERIFICATION

4.1 Test criteria and methods

The tests were performed with stopwatches monitored by two persons. Despite observing the
lighting simultaneously, hardly did we get similar results for each test. This inconsistence can be
explained by the human error factor. The average of the results was taken and used as the value
to be recorded for results.
The tests were only performed for the green and amber lights only. Tests on Red light were
unnecessary as they were no procedure for that. Also, there were not less than 3 red lights on
simultaneously.
For tests on green light time, the mode time was preferred for mean to avoid large deviation from
the calculated value.

4.2 Performance Testing

Once the system was up and running, the next step was to perform tests to evaluate the
controller’s performance. The main benchmarks would be the efficiency of the system to
sequence the lighting as specified according to the time of the day.

Table 4: Average ON time for green light

24 hr Time Mode Time on (s) Expected/Calculated Variance %
00 34.29 60.81 26.52 43.61
02 34.71 60.81 26.10 42.92
06 35.33 60.81 25.48 41.9
07 105.45 223.146 117.696 52.74
08 106.22 223.146 116.926 52.4
17 111.75 223.146 111.396 49.92
19 111.37 223.146 111.776 50.09

Table 5: Tests on Amber Light

RTC Trial 1 Trial 2 Trial 3 Average Calculated Variance
00 9.10 9.57 9.63 9.43 10.20558 0.78
05 9.68 9.72 9.67 9.69 10.20558 0.52
06 9.93 9.91 9.72 9.71 10.20558 0.50
09 9.63 9.93 9.57 9.71 10.20558 0.50
18 9.67 9.10 9.10 9.29 10.20558 0.92

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 Graph 1: Tests on Amber Light Time ON

4.3 Tests Analysis

From the results above, it is evident that the system was able to implement the priority logic
excellently. The time differences are attributable to the human error, such as inability to
concentrate and poor response time on the pressing of the stopwatch.
The amber light was calculated to last for 10.21s. On performing the test, repeated results
were obtained. The amber light time was the closest to the calculated result. The variation
was quite minimal, less than 1s.
After switching the system, the first three counts were mostly erroneous. This can be
attributed to transience as the system stabilized. Consistent results were obtained at steady
states which were recorded to be as close to the specified as possible.

The times for the green light varied to close to half the theoretical value. This can be
attributed to the tolerance of the timer external components, the resistors and the capacitor

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whose values are ±20% the rated values. Since the resistor values are high rated in kΩ, we
also expect the tolerance to be high than that of the only 270Ω resistor R1 for the amber light
time ON timer calculation.
It was also observed that the time for green light was slightly higher on the evening priority
than the morning (5s on average). This can be explained by the incorporating gates for the
evening priority, each having its own propagation delay which slightly contributes to these
time increases.
From the look of the graph, it is evident that the trial values, the, average value and the
specified value almost all lay in the same position. This is a good performance of the system
for the amber light.
Time verification on RED light was unnecessary as it depended on the that of GREEN.
Further, it wasn’t possible to specify what RED was to be tested as at least 2 REDS were ON
at the same time and never went off simultaneously. Further, the results from the other tests
were sufficient to authenticate the performance of the system.

4.4 Comparison of Project to Specifications:

Similarities:
o The traffic lights were error proofed so as not to have two directions crossing over
the intersection at the same time. This is to avoid accidents and uphold safety.
o The product will still be aesthetically designed to catch the attention of all
motorists and pedestrians. It must be large enough in size and the LED lighting
must be bright enough for visibility.
o Different traffic schedules are programmable into the priority logic circuit to
allow use at different times of the day as well as special events. The adjustable
clock can be switched to obtain an emergency priority such as an ambulance or
fire engine vehicle.
Differences:
o Timing on the lights was shorter than anticipated. The amber light however
offered a very close value.
o There was no LED array for each light given that the system was for
demonstration purposes and for such only a single LED was used for each colour.
o A shield for protection of the traffic light wasn’t developed because this model is
only a prototype and will not actually be advanced into production for actual use.

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 5. COST

5.1 Cost Analysis for Development:

5.1.1 Labor Costs:

Nil: Being an evaluatable individual work, no work was delegated to another person.
However, assistance on such tasks as stopwatch timing was sought from friends

5.1.2 Parts Costs

Table 6: Parts Costs in KES
Item Count Value/ Part No Description @(KES) Total
1 2 0.01uF Decoupling Capacitor 5 10
2 1 1000uF Filter Capacitor 5 5
3 1 220K Timer 2 R1 resistor 5 5
4 1 220uF 555 Timer2 C1 capacitor 5 5
5 1 220uF Timer 1 C1 5 5
6 1 240 -6V,500mA Step Down Transformer 100 100
7 27 270 LED Current Limiting Resistors 5 135
8 1 2N2222 Priority Circuit switching transistor 5 5
9 1 330K Timer 1 R1 resistor 5 5
10 1 33K Timer 1 R2 resistor 5 5
11 1 4.7k Transistor Biasing Resistor 5 5
12 1 470uF Priority Capacitor 5 5
13 2 555 555 Timers 30 60
14 10 74LS04 Inverters 20 200
15 7 74LS08 AND Gates 20 140
16 1 74LS138 3-to-8n Line decoder 30 30
17 5 74LS160A Decade Counters 20 100
18 4 74LS32 OR Gate 20 80
19 2 74LS47 7- Segment Decoder/ Drivers 25 50
20 1 78L06 IC Voltage Regulator 15 15
21 1 91K Timer 2 R2 resistor 5 5
22 1 AMBER1 AMBER LED on Lane 1 5 5
23 1 AMBER2 AMBER LED on lane 2 5 5
24 1 AMBER3 AMBER LED on lane 3 5 5
25 1 AMBER4 AMBER LED on lane 4 5 5
26 4 BRIDGE Diode Bridge Rectifier diodes 5 20
27 1 DIODE Amber Light Time ON Feedback diode 5 5
28 1 GREEN1 GREEN LED on Lane 1 5 5
29 1 GREEN2 GREEN LED on Lane 2 5 5
30 1 GREEN3 GREEN LED on lane 3 5 5
31 1 GREEN4 GREEN LED on lane 4 5 5
32 1 RED1 RED LED on Lane 1 5 5
33 1 RED2 RED LED on Lane 2 5 5
34 1 RED3 RED LED on lane 3 5 5
35 1 RED4 RED LED on Lane 4 5 5
36 2 REDCA 7 Segment Displays 10 20

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5.1.3 Other costs
1. Burn outs replacement: Some parts burnt out during the design and testing had to
be replaced costing extra KES 1000
2. Project Documentation: Include typing, printing and typing costs on the project
paperwork reports. This amounted to KES 500
3. Project research costs: Include internet research costs and transport costs. This
amounted to KES 1000.
Grand total for the project is the sum of parts costs and the other costs given as
Parts cost= KES 1075
Other costs= KES 2500
Total cost= 1075 + 2500 = KES 3575

A comprehensive bill of materials generated by Circuit Maker Pro. can be found on

Appendix A.

5.2 Project Funding

The components for the project were readily available locally thus none was imported. The
materials were affordable and their cost was met by absolutely personal savings. Resistors
and capacitors could also be gotten from broken electronic devices and thus there was no
major challenge on the cost of the project..

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 6. CONCLUSIONS & RECOMMENDATIONS

In conclusion most of the objectives set in the beginning of the project were meet and
satisfied. Although asking for 70% efficiency may have been too much, it was possible to
attain a realistic efficiency for a lights control that consumes less than two watts in power
despite the . At times there were some problems and uncertainties that crept up, but none
that could not be figured out. Each problem was taken as a serious note and reasons to why
they occurred and how they occurred remained the central focus. Overall the project was
fully functional and may be considered a success. The knowledge and experience gained
throughout the entire process will definitely enable me to improve my methods of research
as an engineer.

One recommendation would be to build the circuit on a Printed Circuit Board (PCB). This
would also increase efficiency. The nominal efficiency would be increased. Building the
circuit on a printed board would eliminate any long wires along and the increased losses and
stray inductance associated with them. Without these losses, the efficiency could probably.

An IC design for the priority logic circuit can further increase the test timing to be as near
the theoretical value as possible.
The priority logic circuit concept can be used to control any system whose peak performance
or consumption is dependent on the time of the day. For example, the circuit can be
employed on computer network where it can be used to control and allocate packet traffic
rates by appropriately assigning flow priority to those areas’ workstations that require faster
network access than others depending on the time of the day. For instance in bank, the
cashiers’ desks in the morning can be allocated faster network access when the customer
traffic is high. This can be done by connecting the priority circuit to a router to initiate an
action that allocates faster access to the network facilities.
Similarly, in electricity consumption, more voltage quota can be offered in the industries and
hospitals during the day than at domestic consumption ends. This can be reversed in the
evening when the factories are closed and most people are back home to use electricity for
lighting and cooking.

The major challenges that continue to haunt road user are increased traffic jam and
accidents. With a proper enforcement of the traffic rules, use of modern technology traffic
control and better governance, the menaces can be subdued. However solutions may always
be proposed even better than the one proposed by this project and yet the problem of traffic
accident and jams continue. It is the call of the stakeholders in the regulatory boards to
ensure that traffic rules are followed. Heavy fines should also be charged on those who
violate the traffic lights.

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There’s also the need for motorists to exercise discipline on the road. Issues of overlapping
goes unreported in traffic jams. These are a major cause of accident.

The prioritized busy lane traffic control achieves both efficiency and economical goals, with
it being able to correctly time the traffic jam and decongest it. It is ready for release in the
market. The use of LEDs in place of the incandescent lamps is already being tested in China.
Such a venture would greatly save on energy and keep the lights control running all the
time.

In engineering, there can never be a greater need that that of efficiency and energy
conservation. The system developed achieves this.

There is still room for expansion, modification and customizing the system as it’s a matter of
expanding the logic of the priority circuit. Ideas and suggestions are welcome. Honest
criticisms will help improve the project.

The major challenge with the project was the timing. Greater research was required to
capture the unique qualities and behavior of motorists and alleviate problems associated with
them. All in all, major bridge was crossed with the design of the system.

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 7. REFERENCES

[1] D. A. Steigerwald, J. C. Bhat, D. Collins, R. M. Fletcher, M. O. Holcomb, M. J.

Ludowise, P. S. Martin, S. L. Rudaz, “Illumination With Solid State Lighting”,
IEEE Journal On Selected Topics In Quantum Electronics, vol. 8, pp. 310-320, March-
April 2002

[2] “Benefits of Lumileds Solid State Lighting Solutions vs. Conventional Lighting”,
Lumileds, Application Brief AB117

[3] Krein, P.T. 1998. Elements of Power Electronics. Oxford University Press, Inc., New
York:, US.

[4] Kusko, A. and Peeran, S.M. 1961. Standard handbook for Electrical Engineers. John
Wiley:
London, UK.

[5] Floyd, T, 2008. Digital Fundamentals, 9th Edition. Pearson Education ,Inc: New Jersey,
US.

[5] V.K Mehta. "Principles of Electronics"

[6] Theraja, B.L. 1979. A Text-book of Electrical Technology. S. Chand and Company
jhjhjhjLtd.: New Delhi, India.
[7] Paul B. Smith. "Industrial Electronics"
[8] Sawhney A.K., A Course in Electrical and Measurement and Instrumentation,
Dhanpat Rai & Co (p) Ltd, Revised Edition (2001)

[9] R.P Jain. "Modern Digital Electronics"

[10] Cathey, M.J, 2002. Electronics Circuits and Devices. McGraw Hill Company. Chicago,
jjkjkjkkUS.

Additional References

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 [i] Aduwo, G.O.and Obudho, R.A. 1992 Urban transport system: A case of the Matatu
mode of transport in the city of Nairobi, Kenya. In: African Urban Quarterly, Vo.7
(1) and (2)

[ii] Micrometals, “Transformer Design,” [Online Software], [cited 5 December 2005],

Available HTTP: http://www.micrometals.com/software_index.html

[iii] Odero, W., Khayesi, M. and Heda, P.M. 2003 Road traffic injuries in Kenya:
Magnitude, causes and status. In: Injury Control and Safety Promotion, Vol.10 (1-2)
Daily Nation Newspapers See Issues of 7th November, 2003 and 3rd February,
4th, 6th, 17th, 19th and 20th, 28th and 30th August, 11th 12th and 14th Sept.,
2004 East African Standard Newspaper See Issue of 14th Sept, 2004 The East
African Newspaper Issue of November 24-30, 2003

[iv] Jaycar Electronics, “Counters: A Primer,” [Online Document], [cited 5 December

2005], Available HTTP:
http://www1.jaycar.com.au/images_uploaded/counters.pdf

[v] Texas Instruments, “Low Voltage Feedback in PWM Application,” [Online

Document], [cited 5 December 2005], Available HTTP:
http://focus.ti.com/lit/an/slua286/slua286.pdf

[vi] Power Designers, “Step-Down/Buck Converter: Ideal Circuit,” [Online

Document], [cited 5 December 2005], Available HTTP:
http://www.powerdesigners.com/InfoWeb/resources/pe_html/ch07s1/ch07s1p1.htm

[vii] Fairchild Semiconductor, “1N5811-1N5819 Schottky Barrier Rectifiers,” [Online

Document], [cited 5 December 2005], Available HTTP:
http://www.ee.washington.edu/stores/DataSheets/diodes/1n5819.pdf

[viii] Texas Instruments, “The Bypass Capacitor in Voltage rectification,” [Online

Document], [cited 5 December 2005], Available HTTP:
http://ece-www.colorado.edu/~mcclurel/TI_Bypass_Capacitors_scba007a.pdf

[ix] National Semiconductor, “Voltage Regulators,” [Online Documents], [cited 5

December 2005], Available HTTP:
http://www.national.com/appinfo/power/files/f5.pdf

[x] http://wikipedia.com
[xi] http://www.semiconductors.philips.com

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 [xii] http://allaboutcircuits.com

[xiii] http://www.ecircuitcenter.com/Circuits/555_Timer1/555_timer1.htm

[xiv] Asingo, P.O. : 2004 The institutional and organizational structure of public road
transport in Kenya. IPAR Discussion Paper No.50

[xv] Gachuki, D. 2004 A Brief Commentary on Legal Notice No.161, IPAR, Nairobi

[xvi] Republic of Kenya 2003 and 2004 Legal Notices Nos. 161, 83 and 97

[vvii] Republic of Kenya 2004 Transformation of Road Transport Report, MOTC,

jjjhjjhjhjhjhhNairobi

[xviii] Kapila, S., Manundu, M and Lamba, D. 1986 The Matatu mode of public
transportation in metropolitan Nairobi. Nairobi: Mazingira Institute

[xix] Khayesi, M. 1997 Matatu workers in Nairobi, Thika and Ruiru towns, Kenya:]
Research report, Institute for Development Studies, Nairobi.

[xx] Muyia 1995 The forgotten workers: The case of public service drivers in
Eldoret Town, Kenya, http://www.ossrea.net/ssrr/muyia.htm

[xxi] Nate Berg, 24 September 2007 post: Traffic Costs Nairobi $746,000 Per Day.
Found on http://www.planetizen.com/27264.htm

[xxii] “Kenya's 'City in the Sun' chokes with traffic” Article found on
http://www.planetizen.com/news/redirect_new.php?id=27264-0

[xxiii] “Daily Nation”, 6th August, 2009. “We Must Make Managing Traffic in Nairobi
a Priority “, article by Sylvester Butoyi.

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 8. APPENDIX

8.1 Appendix A
8.1.1 Bill of Materials
Prioritized Busy Lane Digital Traffic Lights Control bill of materials

Item Count Label-Value Description Circuit Simulator

Designation
1 1 74LS08 AND Gate A
2 1 74LS32 OR Gate A
3 1 74LS32 OR Gate B
4 1 74LS08 AND Gate B
5 1 74LS08 OR Gate B
6 1 74LS32 OR Gate C
7 1 1000uF Filter Capacitor C1
8 1 220uF 555 Timer2 C1 C2
9 1 0.01uF Timer 2 Decoupling C3
Capacitor
10 1 220uF Timer 1 C1 C4
11 1 470uF Priority Capacitor C5
12 1 10nF Timer 2 Decoupling C6
Capacitor
13 1 74LS32 OR Gate D
14 1 74LS08 AND Gate D
15 1 BRIDGE Diode Bridge Rectifier D1
16 1 DIODE Amber Light Time ON Feedback D2
diode
17 1 RED1 RED LED on Lane 1 D3
18 1 AMBER1 AMBER LED on Lane 1 D4
19 1 GREEN2 GREEN LED on Lane 2 D5
20 1 GREEN1 GREEN LED on Lane 1 D6
21 1 AMBER2 AMBER LED on lane 2 D7
22 1 RED2 RED LED on Lane 2 D8
23 1 RED4 RED LED on Lane 4 D9
24 1 AMBER4 AMBER LED on lane 4 D10
25 1 GREEN4 GREEN LED on lane 4 D11
26 1 GREEN3 GREEN LED on lane 3 D12
27 1 AMBER3 AMBER LED on lane 3 D13
28 1 RED3 RED LED on lane 3 D14

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29 2 REDCA 7 Segment Displays DISP1,DISP2
30 1 74LS08 AND Gate E
31 1 74LS08 AND Gate F
32 1 2N2222 Priority Circuit Transistor Q1
33 1 220K Timer 2 R1 R1
34 1 91K Timer 2 R2 R2
35 27 270 LED Current Limiting Resistors R3,R4,R5,R6,R7,R8,
R9, R10 ,R11, R12,
R13, R14, R15, R16,
R19, R21, R22, R23,
R24, R25, R26, R27,
R28, R29, R31,R32,R33
36 1 330K Timer 1 R1 R17
37 1 33K Timer 1 R2 R18
38 1 4.7k Transistor Biasing Resistor R20
39 1 240 -6V, Step Down Transformer T1
500mA
40 1 78L06 IC Voltage Regulator U1
41 2 555 555 Timers U2, U3
42 5 74LS160A Decade Counters U4,U5,U8,U9,U10
43 1 74LS08 AND Gate U6
44 10 74LS04 Inverters U7,U14,U15,U16,U17,
U18, 19,U20,U21,U22,
45 2 74LS47 7- Segment Decoder/ Driver U11,U12
46 1 74LS138 3-to-8n Line decoder U13

8.1.2 External Components Calculation Using 555 Timer Design Ver 1.1
Astable mode 555 Timer component value calculation. For a desired HIGH time, tH of 55 s
and 5 s of discharging, the external components are arrived at using the 555 Design Software
Version 1.1 by inputting the frequency and the duty cycle. On clicking calculate button, the
software gives the values.

These are the results according to the calculator:

R1=329.9K
R2=32.99K
C1=220uF
Frequency of operation is 0.165Hz,

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Duty Cycle= 91.66%

Photo 5: Screen capture of Timer components Calculations

8.2 APPENDIX B

List of Acronyms
KCAA: Kenya Civil Aviation Authority
KENHA: Kenya Highways Authority
KRB: Kenya Roads Board
LED: Light Emitting Diode
LSD: Least Significant Digit
MSD: Most Significant Digit
NCC: Nairobi City Council
RRB: Rural Roads Board
RTC: Real Time Clock

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