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Bidirectional Converter With ZVS

This paper presents a family of soft-switching bidirectional converters designed to extend the zero-voltage switching (ZVS) range, ensuring high efficiency across varying duty cycles and load conditions. The proposed converters utilize two supplemental voltage sources in the auxiliary circuit to achieve soft-switching without adding complexity to the control circuit. Experimental results from a 150-W prototype validate the feasibility and effectiveness of the proposed method in maintaining soft-switching across the entire operating range of the converter.

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0% found this document useful (0 votes)
18 views9 pages

Bidirectional Converter With ZVS

This paper presents a family of soft-switching bidirectional converters designed to extend the zero-voltage switching (ZVS) range, ensuring high efficiency across varying duty cycles and load conditions. The proposed converters utilize two supplemental voltage sources in the auxiliary circuit to achieve soft-switching without adding complexity to the control circuit. Experimental results from a 150-W prototype validate the feasibility and effectiveness of the proposed method in maintaining soft-switching across the entire operating range of the converter.

Uploaded by

sudheerkofficial
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
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7000 IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 64, NO.

9, SEPTEMBER 2017

Family of Soft-Switching Bidirectional Converters


With Extended ZVS Range
Mohammad Reza Mohammadi and Hosein Farzanehfard

Abstract—This paper proposes a family of soft-switching for additional diodes and the synchronous rectification is fa-
bidirectional converters. In many applications, the bidirec- cilitated to reduce the diode conduction losses. However, as
tional converters operate over a wide range of duty cy-
compared with the existing fast power diodes, the antiparallel
cle and load variations. In the proposed converters, in or-
der to extend the zero-voltage switching operation range, diodes of the power switches have higher reverse-recovery time.
two supplemental voltage sources utilizing passive compo- This leads to higher switching losses and electromagnetic inter-
nents are implemented in the auxiliary circuit. By using this ference in BDCs [9]. In addition, this drawback restricts the
method, the soft-switching features are ensured for an ex- high-frequency operation of the BDC that is undesirable in at-
tensive range of the converter duty cycles. This is achieved taining high power density [10], [11]. To overcome the identified
independent of the output power value or the converter
operation mode, and so, soft switching is ensured within disadvantages, soft-switching methods are commonly utilized in
the entire converter operating region. In these converters, BDCs, and so, high efficiency with high power density is as-
all semiconductors components are soft switched, and the sured [12]–[29]. In many applications, the load and operating
auxiliary circuit does not contribute to the complexity of state of the BDC are frequently changed from full load to no load
the control circuit. Also, no extra voltage stress exists on and from forward operation to backward operation. Besides, in
the main switches and the voltage stress on the auxiliary
switches is lower than the main switches voltage stress. BDCs, the duty cycles of the forward and backward operations
In this paper, the proposed bidirectional buck/boost con- are complementary. For example, in the forward operation, if
verter is analyzed and to confirm the feasibility of the pro- the duty cycle is equal to 0.7, the duty cycle of the backward
posed method, experimental results of a 150-W prototype operation is equal to 0.3, and vice versa. Hence, an applied soft-
converter are presented. switching method for the BDC should assure high efficiency
Index Terms—Bidirectional dc–dc converter (BDC), pulse within an extensive range of duty cycles and load variations.
width modulation (PWM) dc–dc converters, soft-switching The simplest way to obtain soft commutation in BDCs is to
techniques, zero-voltage switching (ZVS), zero-voltage tran- operate the converter beyond the boundary of the continuous-
sition (ZVT).
conduction mode (CCM) and the discontinuous-conduction
mode, namely the critical current mode (CRM) [12]–[14]. This
I. INTRODUCTION way, the zero-voltage switching (ZVS) condition and diode
reverse-recovery elimination are attained with no additional
ECENTLY, the rising growth of systems with energy stor-
R age elements has extensively increased the interest in
bidirectional dc–dc converters (BDCs). The BDCs are utilized
auxiliary elements. However, CRM operation introduces a large
current ripple which increases the conduction losses [12]. Also,
these conduction losses are practically constant when the load
in many applications, such as hybrid/electric vehicles [1], [2],
condition is changed from heavy to light, and so, the converter
photovoltaic and fuel cell power systems [3], [4], dual-voltage
efficiency is dropped significantly at light loads [14].
automotive systems [5], uninterruptable power supplies [6], and
In [15]–[17], ZVS condition is attained by adding some ex-
battery or supercapacitor balancer systems [7]. In these applica-
tra inactive components. In these converters, the main inductor
tions, the BDCs are responsible for the power flow management
can be made to operate in CCM. Hence, compared with the
and voltage matching among the energy storage elements and
previous converters which operate in CRM, the current ripple
dc bus. In applications where high-voltage gain or isolation is
of the main inductor is reduced. However, these converters still
not necessary, the basic nonisolated BDCs are preferred because
suffer from high circulation current which exists even under no
of their simple structure and operation [1]–[8].
load condition [16], [17]. Hence, the resulting efficiency is low,
Typically, in BDCs, the antiparallel diode of the power switch
particularly at light loads.
is employed as the converter diode. In this way, there is no need
In the converters proposed in [18]–[20], the active-clamping
Manuscript received September 7, 2016; revised December 9, 2016 method is utilized in BDCs to accomplish soft commutation.
and February 13, 2017; accepted March 3, 2017. Date of publication In [18], although the conduction losses of the main converter
March 22, 2017; date of current version August 9, 2017.
The authors are with the Department of Electrical and Computer En-
semiconductor components are minimized, yet the auxiliary cir-
gineering, Isfahan University of Technology, Isfahan 84156-83111, Iran cuit experiences high circulating current. To solve this issue, in
(e-mail: [email protected]; [email protected]). [19] and [20], the conduction time of the auxiliary switch is
Color versions of one or more of the figures in this paper are available
online at http://ieeexplore.ieee.org.
declined, and so, the circulating current of the auxiliary circuit
Digital Object Identifier 10.1109/TIE.2017.2686308 is greatly degraded. However, this scheme leads to undesirable

0278-0046 © 2017 IEEE. Personal use is permitted, but republication/redistribution requires IEEE permission.
See http://www.ieee.org/publications standards/publications/rights/index.html for more information.
MOHAMMADI AND FARZANEHFARD: FAMILY OF SOFT-SWITCHING BIDIRECTIONAL CONVERTERS WITH EXTENDED ZVS RANGE 7001

than the voltage stress of the main switches. The other funda-
mental ZVT auxiliary circuit in [32] is utilized for the BDCs
in [25]. In this converter, as compared with the converters in
[21] and [22], the auxiliary switches are softly turned off. Also,
the auxiliary switches have a lower voltage stress than the main
switches. Despite the mentioned advantages, ZVS condition in
[25] is possible only when the converter operates in duty cycles
above 0.5. Hence, ZVS condition is not attained in one of the
forward or backward operations of BDC. In [26], the impact
of the diode reverse recovery is researched to extend the ZVS
range of the converter [25]. However, since the value of the
diode reverse-recovery current is related to the value of the cur-
rent flowing through the diode, this scheme is applicable to the
heavy load to intermediate load conditions. Otherwise, to ac-
complish soft commutation at light loads and duty cycles under
0.5, power switches with very slow antiparallel diodes need to
be utilized which increases the diode reverse-recovery losses. In
[27], the problem of the converter [25] is solved by utilizing an
additional capacitor. However, in each switching cycle, the aux-
iliary circuit must be applied twice to assure the ampere–second
balance of the auxiliary capacitor. This point causes to increased
conduction losses, and complicates the control circuit. Another
method to extend the ZVS range of [25] is utilizing the scheme
presented in [33]. In the ZVT BDCs proposed in [28] and [29],
by proper controlling of the main and auxiliary switches, the
stored energy of the auxiliary inductor is increased, and so,
the ZVS commutation is assured for the duty cycles under 0.5.
However, this method complicates the auxiliary control circuit
to adapt the proposed scheme. Moreover, in these converters,
the conduction losses of the auxiliary circuit are constant within
wide load variations, which decrease the converter efficiency at
Fig. 1. Structure of the proposed ZVT bidirectional buck/boost light loads.
converter. (a) Proposed converter. (b) Equivalent circuit of the proposed This paper introduces a family of ZVT BDCs. These con-
converter using the coupled inductors model.
verters provide soft-switching features for a wide variation of
duty cycles. For this purpose, two supplemental voltage sources
oscillations of the auxiliary inductors and snubber capacitors. utilizing passive components are implemented in the auxiliary
In addition, when the auxiliary switch is turned on, the charge circuit. The proposed scheme is independent of the output power
remained in the auxiliary capacitor is dissipated in the auxiliary value or the power flow direction. Hence, soft switching is en-
switch causing high turn-on loss. sured within the entire operating region of the converter. More-
In [21]–[29], the zero-voltage transition (ZVT) BDCs are re- over, in each switching cycle, the auxiliary circuit needs to be
searched. In contrast to the already mentioned procedures, the operated only once and the auxiliary circuit does not contribute
ZVT BDCs benefit from low circulating current. The funda- to the complexity of the control circuit. Hence, the conven-
mental ZVT auxiliary circuit introduced in [30] is utilized for tional auxiliary control circuit can be employed to adapt the
the BDCs in [21] and [22]. The severe problem of [21] and [22] proposed method. In these converters, the ZVS condition is en-
is that the auxiliary switches are not softly turned off. Addi- sured for the main switches, and the auxiliary switches turn
tionally, the voltage stresses on the auxiliary and main switches on and off with ZCS condition. Besides, the main switches
are equal. In the ZVT converters, although the ZVS condition benefit from no extra voltage stress, and the voltage stress of
is assured for the main switches, but the auxiliary switches turn the auxiliary switches is lower than the main switches voltage
on with zero-current switching (ZCS) condition [31]. Hence, stress.
for the same condition, the capacitance turn-on losses of the This paper is organized as follows: First, the circuit config-
auxiliary switches in [21] and [22] are the same as those in a uration and operation principles are expressed in Section II.
hard-switching converter. In [23] and [24], the coupled induc- Then, the design considerations of the proposed converter are
tors are utilized in the auxiliary circuit of [21] and [22] to enable discussed in Section III. Section IV shows the experimental
ZCS condition of the auxiliary switches at turn off. Neverthe- results, and the other ZVT bidirectional converters with the pro-
less, by utilizing the coupled inductors in [23] and [24], the posed method are presented in Section V. At last, conclusions
voltage stress across the auxiliary switches increases to more are provided in Section VI.
7002 IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 64, NO. 9, SEPTEMBER 2017

II. CIRCUIT CONFIGURATION AND OPERATION PRINCIPLES Meanwhile, the S2 antiparallel diode current drops linearly
to zero. The period of this stage is derived as follows:
Fig 1(a) illustrates the structure of the proposed converter.
As observed, the auxiliary circuit is comprised of two unidirec- IL M LS
t1 − t0 = . (2)
tional auxiliary switches Sa1 and Sa2 , two auxiliary capacitors VH D + VC 1
C1 and C2 , two auxiliary diodes D1 and D2 , and the inductor
Stage 2 [t1 − t2 ]: At t1 , the S2 antiparallel diode turns off
L2 which is coupled with the converter filter inductor L1 . As
at ZCS condition. Then, LS and CS start a resonance, during
depicted in Fig. 1(a) , the auxiliary circuit can be simplified
which the capacitor CS is charged up to VH , and S1 voltage
by two unidirectional switches, an inductor, and two voltage
declines to zero. In this stage, the voltage of S1 and the current
sources. The implemented auxiliary voltage sources contribute
of Sa1 are expressed as
to assure soft-switching commutation when the converter oper-
ates at D < 0.5. This point is demonstrated in the next section. VS 1 = (VH (1 − D) − VC 1 ) + (VH D + VC 1 ) cos(ω0 (t − t1 ))
To curtail the theoretical analysis, the coupled inductors L1 and
(3)
L2 can be substituted by the conventional model of the coupled  
inductors which includes a leakage inductor (Llk ), a magnetiz- VH D + VC 1
IS a1 = IL M + sin(ω0 (t − t1 )) (4)
ing inductor (LM ), and an ideal transformer which has turns Z0
ratio of n. The value of the Llk is Llk = (1 − k 2 )L2 , where
where
k is the coupling coefficient of the coupled inductors [28]. Fig.
1(b) illustrates the equivalent circuit of the proposed converter 1
ω0 = √ (5)
using the coupled inductor model. In this way, the magnetizing LS CS
inductance LM serves as the main inductor of the converter. and
The buck and boost modes are two operating modes of the 
converter and each mode consists of eight operating stages, LS
Z0 = . (6)
which are illustrated in Figs. 2 and 3, respectively. Moreover, CS
Fig. 4 depicts the relevant waveforms of the proposed converter.
Due to the similar operation of the converter in the buck and At the end of this stage, the current of LS is defined as I0 .
boost modes, the buck mode is solely chosen to be explained. Stage 3 [t2 − t3 ]: At t2 , the S1 antiparallel diode turns on and
Note that the theoretic equations are presented depended on the the current IS1 flows through it. In this condition, S1 turns on
duty cycle D [23], [26], [28]. Consequently, in the presented with ZVS condition. In this stage, the voltage of −(VH − VL −
equations for S1 and Sa1 in buck operation, if VC 1 is replaced VC 1 ) is applied to inductor LS , and Sa1 current linearly ramps
by VC 2 , the related equations of S2 and Sa2 in boost operation down to IL M as follows:
would be achieved. Analysis of the buck mode begins by making VH (1 − D) − VC 1
these assumptions. IS a1 = I0 − (t − t3 ). (7)
LS
1) Steady-state conditions exist and the components are
ideal. Meanwhile, the S1 current falls linearly to zero. The period
2) The magnetizing inductor (LM ) is considered very large of this stage is derived as
and the current of LM (IL M ) is regarded as constant in a (I0 − IL M )LS
switching period. t4 − t 3 = . (8)
VH (1 − D) − VC 1
3) In a switching period, the voltage sources of the con-
verter low-voltage and high-voltage sides (VL and VH ) Stage 4 [t3 − t4 ]: In this stage, Sa1 current keeps on reducing
are regarded as constant. until it reaches zero and S1 current rises till it reaches IL M .
4) The capacitors C1 and C2 are sufficiently large so that After that Sa1 current is prevented from going negative due to
the voltage ripple across them is limited. the unidirectional auxiliary switch. The equation for Sa1 current
is determined as follows:
VH (1 − D) − VC 1
A. Buck Mode of Operation IS a1 = IL M − (t − t4 ). (9)
LS
In the buck operation, S1 and Sa1 are controlled and power The period of this stage is
transfers from VH to VL . Initially, it is supposed that S1 and Sa1
IL M LS
are in OFF state, and the current IL M freewheels through the t4 − t 3 = . (10)
antiparallel diode of S2 . VH (1 − D) − VC 1
Stage 1 [t0 − t1 ]: At the beginning of stage1, Sa1 turns on Stage 5 [t4 − t5 ]: In this stage, the converter resembles the
with ZCS condition owing to the presence of the inductor LS . traditional pulse width modulation (PWM) buck converter in the
Accordingly, the voltage of VL + VC 1 is applied to the inductor on-state. S1 conducts IL M , and LM is enegizied by VH − VL .
LS and Sa1 current rises linearly to IL M as follows: Since no current is conducting through Sa1 , this switch can be
turned off at ZCS condition. As seen in Fig. 2, in the stages
VH D + VC 1 1 to 4, the C1 current is equal to the auxiliary switch current
IS a1 = (t − t0 ). (1) ISa1 . In these stages, ISa1 flows through the negative side of
LS
MOHAMMADI AND FARZANEHFARD: FAMILY OF SOFT-SWITCHING BIDIRECTIONAL CONVERTERS WITH EXTENDED ZVS RANGE 7003

Fig. 2. Topological stages of the proposed converter in buck operation.

the C1 voltage, and so, the capacitor C1 loses some electri- III. DESIGN CONSIDERATIONS
cal charges, and its voltage reduces slightly. During the stage
The main converter is designed as a regular PWM buck/boost
5, the voltages VH (1 − D) and nVH (1 − D) appears across
converter, considering that the magnetizing inductor LM serves
the primary and secondary sides of the transformer, respec-
as the main inductor of the converter. The capacitor CS is the
tively, (VP = VH (1 − D), VS = nVH (1 − D)). In this con-
snubber capacitor, and so, the design of this capacitor is the
dition, C1 and LL k start to resonate and the resonant current
same as those of conventional one [34]. Likewise, the inductor
flows through the positive side of the C1 voltage. Hence, the
LS restricts the rising slope of the auxiliary switch current at
electrical charge of C1 that is missed in the stages 1 to 4 is given
turn-on and the value of LS can be determined as conventional
back to this capacitor.
snubber inductors [34].
Stage 6 [t5 − t6 ]: In this stage, S1 turns off and then, IL M
For ensuring ZVS at turn-on for the main switches, it must
discharges the capacitor CS . Therefore, S1 voltage rises gradu-
be assured that the voltages of the main switches are dropped to
ally and ZVS is ensured. This stage finishes when the capacitor
zero at the end of stage 2. So, in the buck operation and from
Cs is discharged completely.
(3), the ZVS condition is determined as
Stage 7 [t6 − t7 ]: In this stage, the S2 antiparallel diode turns
on and conducts IL M . The converter resembles the traditional (VH (1 − D) − VC 1 ) + (VH D + VC 1 ) cos(ω0 (t − t1 )) = 0.
PWM buck converter in the off-state. S2 antiparallel diode con- (11)
ducts IL M and the stored energy in LM is delivered to VL . In this Similarly, in the boost operation, the ZVS condition can be
stage, the voltages of −DVH and −nDVH are applied to the expressed as
primary and secondary sides of the transformer, respectively,
(VH (1 − D) − VC 2 ) + (VH D + VC 2 ) cos(ω0 (t − t1 )) = 0.
(VP = −DVH , VS = −nDVH ). So, the C1 current falls to
(12)
zero and then, the diode D1 turns off.
Now, it is required to obtain the values of VC 1 and VC 2 . In
Stage 8 [t7 − t0 + T ]: This operating stage is similar to the
both the buck and the boost operations, these values can be
previous stage except that no current is conducting through the
attained from stage 5. In this case, in a switching period, the
windings of the ideal transformer of the model.
values of VC 1 and VC 2 are assumed to be constant. Hence, in
7004 IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 64, NO. 9, SEPTEMBER 2017

Fig. 3. Topological stages of the proposed converter in boost operation.

the buck operation and from stage 5, the value of VC 1 can be The ZVS condition of (17) is mutually valid in the buck
found as and boost operations. The minimum turns ratio n required to
satisfy (17) is defined as nm in . Utilizing (17), the value of nm in
VC 1 = n(VH − VL ). (13) according to the variation of D is depicted in Fig. 5. Hence, if
In the buck operation, recall that VL = VH D, the value of the value of n is selected greater than nm in , ZVS condition is
VC 1 is derived as follows: ensured. So, the following is the soft-switching condition:

VC 1 = n(1 − D)VH . (14) n > nm in . (18)

Similarly, in the boost operation and from stage 5, the value As seen, soft-switching condition does not depend on the
of VC 2 is output power value, and the converter ZVS condition is assured
by proper selection of the coupled inductor turns ratio n. The
VC 2 = nVL . (15) value of nm in should be selected for the worst-case condition of
the converter operation which corresponds to the minimum duty
Since in the boost operation, VL = (1 − D)VH , the value of
cycle. Note that, referring to Fig. 5, when D > 0.5, the value
VC 2 is obtained as follows:
of nm in is zero. Hence, in buck or boost operations, if always
VC 2 = n(1 − D)VH . (16) D > 0.5, there is no need to implement auxiliary voltage source
in series with the auxiliary switch. For example, if the converter
Finally, from (11) and (12), and by substituting for VC 1 and duty cycle in boost operation is always above 0.5 (if always
VC 2 using (14) or (16), the ZVS condition is expressed as VH > 2VL ), the auxiliary circuit is implemented as illustrated
in Fig. 6(a). In this condition, the value of nm in is selected for the
[VH (1 − D)(1 − n)] + [VH (n(1 − D) + D)]
minimum duty cycle in buck operation. Similarly, in the buck
cos(ω0 (t − t1 )) = 0. (17) mode, if the converter duty cycle is always above 0.5 (if always
MOHAMMADI AND FARZANEHFARD: FAMILY OF SOFT-SWITCHING BIDIRECTIONAL CONVERTERS WITH EXTENDED ZVS RANGE 7005

Fig. 4. Theoretical waveforms of the proposed converter.

Fig. 6. Structure of the auxiliary circuit when (a) V H > 2V L . (b) V H <
2V L .
Fig. 5. Values of n m in according to the variation of D.
is approximated as follows:

(IL M )2 LS 1
VH < 2VL ), the auxiliary circuit is implemented as illustrated ΔQ =
2 VH D + nVH (1 − D)
in Fig. 6(b). In this condition, the value of nm in is selected for 
the minimum duty-cycle in boost mode. 1 IL M π
+ +
The values of the capacitors C1 and C2 should be selected VH (1 − D) − nVH (1 − D) ω0
large enough to limit the voltage ripple of these capacitors
+ 2 (VH D + nVH (1 − D)) CS . (21)
(ΔVC 1 and ΔVC 2 ). In the buck operation, the voltage ripple
of the capacitor C1 (ΔVC 1 ) is calculated as follows: To limit the voltage ripple of C1 (ΔVC 1 ) to less than 2% of
its voltage (VC 1 ), and from (19) and (14), the value of C1 is
ΔQ designed as
ΔVC 1 = (19)
C1 ΔQ
C1 > (22)
0.02nVH (1 − D)
where ΔQ is the drawn charge from C1 in the stages 1 to 4.
where ΔQ is obtained from (21). Likewise, the value of C2 can
Since, in the stages 1 to 4, the C1 current is equal to the current
be determined from (21) and (22).
of the auxiliary switch Sa1 , ΔQ can be calculated as follows:
Finally, Fig. 7(a) demonstrates the schematic of the auxiliary
 t4
control circuit. The role of the auxiliary control circuit is to
ΔQ = IS a1 dt (20) match the proposed converter with the main control circuit. As
t0 depicts in Fig. 7(b), the pulse P1 is the output pulse of the
main control circuit, and the pulses P2 and P3 are the generated
Thus, from relations (20), (1), (4), (7), (9), (14) and by esti- pulses for the main and auxiliary switches, respectively. The
mating the period of stage 2 as half of the resonance period, ΔQ signal Vop m o de determines the operation mode of the converter.
7006 IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 64, NO. 9, SEPTEMBER 2017

Fig. 8. Photograph of the prototype.

Fig. 7. Auxiliary control circuit. (a) Schematic of auxiliary control circuit


and (b) relevant pulses.

TABLE I
PARAMETERS OF THE IMPLEMENTED PROTOTYPE CONVERTER

Symbol Parameter Value Fig. 9. Experimental waveforms for V L = 30 V, V H = 100 V, and


P o = 150 W (time scale is 1 μs/div) in (a) buck mode (D = 0.3) and
Po Output power 150 W (b) boost mode (D = 0.7).
VH High-voltage side 100 V
VL Low-voltage side 30–70 V
f Switching frequency 100 kHz of n is selected 0.5. The photograph of the laboratory prototype
is illustrated in Fig. 8.
Fig. 9 illustrates the measured voltage and current wave-
Hence, in buck operation, pulses P2 and P3 are applied to S1 forms of the main and auxiliary switches under the condition
and Sa1 , respectively. Similarly, in boost operation, pulses P2 of VL = 30 V, VH = 100 V, and Po = 150 W. In this condi-
and P3 are applied to S2 and Sa2 , respectively. tion, the converter duty cycle in the buck and boost operations are
0.3 and 0.7, respectively. Also, Fig. 10 illustrates the measured
waveforms under the condition of VL = 70 V, VH = 100 V,
IV. EXPERIMENTAL RESULTS and Po = 150 W where the converter duty cycle in the buck
To confirm the feasibility of the proposed converter, a labo- and boost operations are 0.7 and 0.3, respectively. As observed
ratory prototype is set up under parameters given in Table I. As from the voltage and current waveforms of the main switches
outlined in the prior section, the values of LM , CS , and LS are (S1 in buck operation and S2 in boost operation), before the turn-
designed as 270 μH, 4.7 nF, and 2 μH, respectively. Besides, on instant, the voltage on the main switches reach zero, and so,
the obtained value of Llk is about 2 μH, and the value of the ZVS condition at turn-on is achieved. Besides, at turn-off in-
auxiliary capacitors C1 and C2 is selected as 10 μF. For all stant of the main switches, the voltage on the main switches
the power switches, MOSFET IRF640 is utilized and for the increase slowly to provide ZVS condition at turn-off. Moreover,
auxiliary diodes, BYV32 is applied. Also, BYV32 is inserted in as seen in Figs. 9 and 10, no extra voltage stress appears across
series with the auxiliary switches to attain unidirectional auxil- the main switches, the auxiliary switches turn on and off with
iary switches. According to the input data presented in Table I, ZCS condition, the voltage stress of the auxiliary switches is
in both the buck and boost operations, the range of the operating lower than the main switches voltage stress, and the circulating
duty cycle is 0.3–0.7. Hence, the minimum duty cycle in both current of the auxiliary switches is very low. These features are
the buck and boost operations is 0.3. From Fig. 5, for the duty ensured in both the buck and boost operations and for a wide
cycle of 0.3, the value of nm in is attained about 0.3. The value range of duty-cycle variations.
MOHAMMADI AND FARZANEHFARD: FAMILY OF SOFT-SWITCHING BIDIRECTIONAL CONVERTERS WITH EXTENDED ZVS RANGE 7007

Fig. 10. Experimental waveforms for V L = 70 V, V H = 100 V, and


P o = 150 W (time scale is 1 μs/div) in (a) buck mode (D = 0.7) and
(b) boost mode (D = 0.3).

Fig. 12. Other members of ZVT bidirectional converters with extended


ZVS range. (a) Buck–boost/buck–boost. (b) Cuk/Cuk. (c) SEPIC/Zeta

gion. This is in contrast to ZVT BDC in [25] which the efficiency


is degraded at D < 0.5 owing to the loss of ZVS condition in this
region. Note that, as seen in Fig. 11, the overall efficiency of the
converters under the condition of VL = 30 V, VH = 100 V is
reduced as compared with the operating point of VL = 70 V,
VH = 100 V. The reason is that, when VL = 30 V, the value
Fig. 11. Efficiency versus output power of the proposed converter, of the converter input current is about 2.3 times more than when
ZVT BDC in [25] and its hard-switching counterpart under condition of VL = 70. Hence, the overall conduction losses of the converter
(a) V L = 30 V, V H = 100 V and (b) V L = 70 V and V H = 100 V.
are increased. To reduce the part of these conduction losses
which related to the converter rectifying diodes, when the level
Fig. 11 depicts the measured efficiency comparison at differ- of the converter current is high, a synchronous rectification tech-
ent loads between the proposed converter prototype, ZVT BDC nique can be applied in the BDCs [28].
in [25] and its hard switched counterpart under the same con-
dition. For this purpose, in the compared converters, the main
inductor is selected as 270 μH, and IRF640 is used for their V. OTHER SOFT-SWITCHING BIDIRECTIONAL CONVERTERS
WITH EXTENDED ZVS RANGE
power switches. Besides, in ZVT BDC in [25], the values of the
auxiliary inductor and snubber capacitor are selected as 2 μH Fig. 12 shows the other ZVT bidirectional converters with
and 4.7 nF, respectively. As observed from Fig. 11, the proposed the proposed scheme. The operation of the auxiliary circuit in
converter benefits of high efficiency within a wide operating re- these converters is almost the same with its operation in the
7008 IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 64, NO. 9, SEPTEMBER 2017

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