Computer structure 2

BOUKRA A.
[email protected]
aboukra@usthb
 The memories
• Memory is organized around several levels of memory, creating a hierarchy of
memories
• In this hierarchy, the memories closest to the processor are the fastest, but
also the smallest in capacity. On the other hand, the memories furthest from
the processor are the slowest but have the largest capacity.

• the programme and data are stored in the central memory (RAM) for
execution by the central processor (microprocessor)

When the computer starts up, a program is run that is pre-recorded in a specialized
memory (ROM), which loads the operating system kernel from the magnetic disk
into the main memory.

•To harmonize the speeds of the processor and RAM memory, and thus
improve performance, a faster memory is placed between the processor and
RAM memory: this is the cache memory.
 This means that the information stored in a
computer is not stored in a single place, but is
organized in a hierarchy of memories
The two main classes of
memories
 working memory refers to memory which is
active during the execution of a program.
They include the processor registers, main
memory, cache memory, support memory and
read-only memory. These are electronic
memories;
 storage memories, such as magnetic disks, are
used to store large quantities of information
permanently. The information stored there is
not directly involved in the execution of a
program, but must be loaded into the main
memory to be used by the processor.These
are mass storage devices, and can be magnetic
or optical.
Memory characteristics
memory capacity indicates the amount of information
that a memory can store. In general, this capacity can be
expressed in bits, bytes or, more rarely, words. The
following table summarizes the main expressions of
memory capacity;

latency is the time between the request for data and the
effective start of the operation.
Cycle time: this represents the minimum interval between two
successive read or write requests.
 The memory access time is the time interval between
the read/write request and the availability of the data.
 For an electronic memory, which is a very fast memory
(RAM, ROM, register, etc.), this time is measured in
nanoseconds (one billionth of a second: 10-9 s).
 This speed can also be expressed as a clock frequency
characteristic of the memory, equal to the inverse of the
access time and measured in hertz (Hz). For example, an
access time of 10 nanoseconds corresponds to a
frequency of 100 Mhz (1 Mhz = 106 Hz). For magnetic or
optical memories (mass storage) this time is measured in
milliseconds (thousandths of a second:10-3 s).
memory bandwidth. This criterion is expressed as the
product of the data bus width and the memory frequency.
volatility represents the permanence of information
availability. Magnetic memories are non-volatile: the
information is retained even after the power supply is cut
off. Electronic memories are generally volatile and lose
information as soon as the power supply is cut off: this is
the case with random access memories such as RAM;
space requirements. Physical memories are taking up
less and less space, allowing greater integration. This is a
major factor in the development of computing.
Cost is a very important criterion in IT developments.
Electronic memories have a relatively high storage cost
and therefore their capacities are even lower. Magnetic
memories are much cheaper and therefore have greater
storage capacity..
 Different types of memories Joëlle Delacroix -
[
NFA004]

 RAM (Random Access Memory)

 Read/write memory .
 Internal volatile memory.
 This forms the main memory and the caches.
 DRAM (Dynamic RAM) and SRAM (Static
RAM).
 ROM (Read Only Memory)
 Read-only memory;
 internal non-volatile memory.
 Once the information has been recorded, it
cannot (or only with difficulty) be modified..
 Random access Memory (RAM)
• These are memories on which read and write operations are
possible.
• In RAM (Random Access Memory), the access time is independent of
the place of the information in the memory.
• They are volatile and the risk of losing information is not negligible
(micro power cuts).
• Very low access time (fast memory) and low power consumption.
• They are mainly used as main memory and cache memory.
• There are generally two main categories of random access memory:
1) Dynamic Random Access Modules (DRAMs), which are
inexpensive. They are mainly used for the computer's main memory;
2) Static memories (SRAM, Static Random Access Module),
which are fast and expensive. SRAMs are used in particular for
processor cache memories..
 Mémoire centrale
• It is organized as a set of cells containing information.
• Each cell contains the same number of bits and is
addressable:
• it is identified by a number which enables it to be
referenced in memory read/write operations.
• the cell addresses are always consecutive.
• The memory cell corresponds to the smallest quantity
of addressable memory.
• since a few years ago, manufacturers seem to have
agreed on 8-bit cells (bytes).
• A memory word is made up of a set of bytes
and corresponds to the information manipulated
by machine instructions.
• Words vary in size. For example, a 32-bit
machine has instructions that manipulate 32-bit
words and is therefore built with 32-bit registers.
• The main memory communicates with the
processor to exchange (read/write) information.
 Read/write operation on RAM

M
A Memory
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R

MDR

Sequences of operations for reading and writing

Read:
Transfer the address bits of the selected word to MAR.
Activate the R/W signal
Result: The selected word is available in the MDR.
Write
Transfer word address bits to MAR
Transfer word data bits to MDR
Activate the R/W signal
Result: the word contained in MDR is stored in the memory word specified in MAR.
 M
A Memory
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R

MDR

• The contents of the address bus are input to a

selection circuit (address decoder) which selects
the memory word corresponding to the value
deposited on the address bus.
• The contents of the data bus are placed at the input
of exchange circuits which act as buffers between the
data bus and the selected memory cell.
• The case of a read is easily deduced from that of a
write (deposit an address, command a read, read the
contents of the data bus).
Communication between the main
memory and its environment.
M
A Memory
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R

MDR

The communication between the memory and its environment is established by means of
:

Control lines
Address lines
Data lines

Control lines specify the direction of the input or output transfer

Address lines specify the word involved in the operation
Data lines carry the information
 Internal structure of a bit

IF SELECT=1
THEN the bit is selected
IF R/W=1
THEN the bit stored in the flip-flop will be
available at the output o
ELSE the bit i available at the input will be stored in
the flip-flop
ELSE the bit is not concerned py the opertation
• The internal structure of a RAM with m words of n bits (m x n
memory) is made up of m x n storage bits and logic circuits
which are used to select a word. ).
• Example of a 4 x 3 RAM (We have used 4 words of 03 bits to
simplify the diagram.
In this diagram:
If Validator =0 then all the decoder outputs are zero, so the
memory is not used.
If Validator=1, then an output Di of the decoder is equal to 1, so
word i of the memory is selected for a read or write operation.
 Memory blocks
• To create large-capacity memories, we can use
small-capacity memories and connect them together.

• If we want to increase the number of words, we

connect the memories in parallel and increase the
address bus

• If we want to increase the length of the memory

word, we connect the memories in series, increasing
the data bus.
Increasing the address space

• If you want to increase the address space of a RAM, you need

to connect several RAMs in parallel; to do this, they must have
words of the same length.

• To create a (2m x P) RAM using (2n x P) RAMs, you first need to

define the number of (2n x P) RAMs required.

• Simply, divide the capacity of the RAM required by the capacity

of the RAMs offered: (2m x P) / (2n x P) = 2m-n

• We will use an n-bit address register (MAR), ( m-n)

complementary addresses and a P-bit data register.
Example 1:
m = 10 n = 9 et p = 8
We want to create 1K x 8 RAM from 512 x 8 RAM. The number of RAMs required
is: 210 / 29 = 2 RAMs. We will have a 9-bit MAR and a complementary address
bit, the MDR contains 8 bits.

This circuit is equivalent to the circuit for a 1K x 8 RAM. The complementary address
bit A9 selects the RAM to be activated.
If A9 = 0, the first RAM is activated
if A9 = 1, the second RAM is activated.
Example 2

m = 10 n = 8 and p = 8
We want to create a 1K x 8 RAM from 256 x 8 RAM. The number of RAMs required
is: 210 / 28 = 22 = 4 RAMs
We will have an 8-bit MAR and 2 additional address bits, the MDR contains 8 bits.

This circuit is equivalent to the circuit for a 1K x 8 RAM. It is the additional address bits
A9 and A8 which will select, via a decoder, the RAM which must be activated. If, for
example, A9A8 = 1 0 then CS3 = 1, then the third RAM is activated.
Increasing word length

If you want to increase the length of a memory word, you need to connect
several units in series; to do this, they need to have the same number of
words.

To create a ( 2 n x P ) RAM using ( 2n x Q ) RAMs, you first need to define the

number of ( 2n x Q ) RAMs required. Simply divide P by Q

We will use a single n-bit address register (MAR), a virtual P-bit data register
made up of several Q bit registers (the number of these registers is equal to
P/Q) and the same Chip Select for the 2 RAMs.
Example
n = 10 P = 8 and Q = 4
We want to make a 1K x 8 RAM using 1K x 4 RAM.
The number of RAMs required is: 8 / 4 = 2 RAMs
We will have a 10-bit MAR and the MDR contains 2 x 4 = 8 bits

This circuit is equivalent to a 1K x 8 RAM.

Each word is made up of 2 parts with the same address.
Note: Whatever the number of RAMs connected in series, all you need to do is connect
them to the same Select chip at the same address register, and apply the same read/write
signal to them.
Increasing address space and word length
To create a RAM (2m x P) using RAMs (2n x Q), we first need to define the
total number of RAMs (2n x Q) required.

To do this, divide the number of bits in the RAM you want, by the number of
RAMs available: (2m x P) / (2n x Q) = 2m-n x P/Q
This gives 2m-n RAMs in parallel, each made up of (P/Q) RAMs in series.
Example
m = 10 P = 8 and n = 8 Q = 4
We want to make 1K x 8 RAM from 256 x 4 RAM.
The number of RAMs required is:
(1024 x 8) / (256 x 4) = (1024 / 256) x (8 / 4) = (4 x 2) RAMs.
You need 4 RAMs, each one composed of 2 RAMs in series
Read only memory (ROM)
RAM can be read and written, but is volatile.

Many applications (programmes and data) need to be stored

permanently, even in the absence of a power supply, such as
the computer's boot programme.

These memories, which can only be read, are known as

ROM (Read Only Memory).The various technological
developments in this type of memory are summarised below.
 Different types of ROM

Flash.
is an EEPROM-type
memory that can be
ROM (Read only reprogrammed
Memory) electrically.
PROM
(Programmable EPROM EEPROM
ROM) (Erasable (electrically
allows unique PROM) EPROM)
writing by the Once written, they are
user using a they can be electrically
special machine. erased using an erasable
ultraviolet beam
which forces all
the bits to the
same value.
Example of a read-only memory
We want to implement the Boolean functions AND, OR and
XOR using ROM. We use the function arguments as ROM
addresses. The results of the functions will be stored in ROM.