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Day 4_Introduction to logic gates

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Day 4_Introduction to logic gates

Uploaded by

sushilkhandare91
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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CMOS LOGIC DESIGN

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OBJECTIVE
 Introduction to basic logic gates: AND, OR, NAND, NOR
 Combinational logic design using CMOS technology
 Designing complex logic functions using CMOS logic gates

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LOGIC GATES
 A gate can be defined as a digital circuit which can allow a signal(electric current) to pass or
stop.
 Logic gates are an important concept if you are studying electronics. These are important
digital devices that are mainly based on the Boolean function.
 Logic gates are used to carry out logical operations on single or multiple binary inputs and
give one binary output.

3
TYPES OF LOGIC GATE
There are several basic logic gates used in performing operations in digital systems. The common ones are
• OR Gate
• AND Gate
• NOT Gate
• XOR Gate
Additionally, these gates can also be found in a combination of one or two.
Therefore, we get other gates, such as NAND Gate, NOR Gate, XOR Gate and XNOR Gate.

4
OR GATE
In an OR gate, the output of an OR gate attains state 1 if one or more inputs attain state 1.

The Boolean expression of the The truth table of a two-input OR basic


OR gate is gate is given as
Y = A + B,
read as Y equals A ‘OR’ B.

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AND Gate
In the AND gate, the output of an AND gate attains state 1 if and only if all the inputs are in state 1.

The Boolean expression of AND gate is Y = A.B The truth table of a two-input AND basic gate

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NOT Gate
In a NOT gate, the output of a NOT gate attains state 1 if and only if the input does not attain state 1.

The Boolean expression is The truth table of NOT gate


A=𝑌
It is read as Y equals NOT A.

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NAND Gate
This basic logic gate is the combination of AND and NOT gates.

The Boolean expression of the NAND gate is


Y=𝐀. 𝐁
The truth table of a NAND gate is given as

8
NOR Gate
This gate is the combination of OR and NOT gates.

The Boolean expression of the NOR gate is


Y=𝑨 + 𝑩
The truth table of a NOR gate is as follows

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Exclusive-OR gate (XOR Gate)
In an XOR gate, the output of a two-input XOR gate attains state 1 if one adds only input and attains state 1.

The Boolean expression of the XOR gate Y=A⊕B

The truth table of an XOR gate is

10
Exclusive-NOR Gate (XNOR Gate)
In the XNOR gate, the output is in state 1 when both inputs are the same, that is, both 0 or both 1

The Boolean expression of the XNOR gate Y=𝑨 ⊕ 𝑩


The truth table of an XOR gate is

11
Boolean postulates and laws
Laws of complementation (NOT Laws)
AND Laws OR Laws

Commutative Laws
The commutative laws allow the change in position of an AND or OR variable
Associative Laws
The associative laws allow the grouping of variables.

Distributive Laws
The distributive laws allow the factoring or multiplying out of expressions.
De Morgan’s Theorem
The first theorem – It states that the NAND gate is equivalent to a bubbled OR gate.

𝑨. 𝑩=𝑨+𝑩

16
The second theorem – It states that the NOR gate is equivalent to a bubbled AND gate.

𝑨 + 𝑩=𝑨. 𝑩

17
DeMorgan’s theorems
De Morgan contributed a lot for the Boolean algebra.
It allows transformation from a sum-of-products form to a products-of-sums form.
De Morgan‟s theorems are also useful in simplifying Boolean equations.

First theorem Statement:


The complement of a sum of variables is equal to the product of their complements.
Equation
Proof:
We have to show the left side equals the right side for all possible values of A and B.
The following table proves the De Morgan‟s first theorem.
Second theorem Statement:
The complement of a product of variables is equal to the sum of their complements.
Equation:

Logic diagram :
Proof:
We have to show the left side equals the right side for all possible values of A and B.
The following table proves the De Morgan‟s second theorem.
CMOS Logic Gates

Inverter schematic NOR schematic NAND Schematic

CMOS inverts functions

 parallel for OR
 series for AND
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CMOS Combinational Logic
 Use DeMorgan relations to reduce functions
 Remove all NAND/NOR operations
 Implement nMOS network
 Create pMOS by complementing operations

23
XOR/XNOR using structured logic
XOR using structured logic

a  b = 𝑎b + a 𝑏

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XNOR using structured logic

𝑎 ⊕ 𝑏= a b + 𝑎 𝑏

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Example 1 of a complex CMOS gate

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Example 2 of a complex CMOS gate

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TASK4

28
Design a full adder using CMOS gate

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