Computer Architecture

and Organization
BECSE-IV
PIN CONFIGURATION 8086

Lecture notes: Dr Mumtaz Ali Kaloi CSE Deptt. 2

 PIN CONFIGURATION 8086
• 8086 microprocessors works on voltage level 5 V DC power supply.
• It comes in a 40-Lead Cerdip(CERamic Dual In-line Package) and Plastic
Package, with 20 on each side.

Lecture notes: Dr Mumtaz Ali Kaloi CSE Deptt. 3

 PIN CONFIGURATION 8086
• PIN 1 & 20 are GND Pins which should be connected to low potential of
the power supply or to the ground of the whole system.
• PIN 2-16 & 39 : AD15-AD0, These are ADDRESS DATA BUS.
• These lines are used for I/O function with time multiplexed memory.
• These are active high and 3-state during interrupt acknowledge.

Lecture notes: Dr Mumtaz Ali Kaloi CSE Deptt. 4

 PIN CONFIGURATION 8086
• PIN 17 : NMI, NON-MASKABLE INTERRUPT. This pin is for creating a type 2
interrupts, which occurs due to a triggered input.
• This cannot be done internally with software as you have to make it happen physically from
LOW to HIGH, but the interrupt is internally synchronized.
• PIN 18 : INTR, INTERRUPT REQUEST.
• This is a level triggered input (active HIGH) which usually occurs at the last clock cycle of
each instruction to check whether or not the processor into interrupt acknowledge
operation mode.
• This can be set internally with the help of software by resetting the interrupt enable bit, also
the interrupt is synchronized internally.

Lecture notes: Dr Mumtaz Ali Kaloi CSE Deptt. 5

 PIN CONFIGURATION 8086
• PIN 19 : CLK, CLOCK. This pin provides the clock signal for the processor
and bus control. It is asymmetric with 33% duty cycle to provide optimized
internal timing.

Lecture notes: Dr Mumtaz Ali Kaloi CSE Deptt. 6

 PIN CONFIGURATION 8086
• PIN 21 : RESET. This pin is used to reset the processor from whatever state it is
in. The signal should be active high for at least 4 clock cycles.
• When the pin is pulled low, it restarts execution from the beginning as in the code
or program, all this is internally synchronized.
• PIN 22 : READY. This pin reads the ready signal that indicated that the addressed
memory or I/O has completed the data transfer. the signal is synchronized by the
8284A Clock Generator along with the address bus to from READY.
• The signal is active HIGH, but it is not synchronized also it may malfunction if
signal timings are not correctly matched.
Lecture notes: Dr Mumtaz Ali Kaloi CSE Deptt. 7
 PIN CONFIGURATION 8086
• PIN 23 : TEST. This input is detected by a “WAIT” instruction in 8086
microprocessor. If the input is LOW execution of the program continues, else the
processor will wait or delay the task until the signal is LOW.
• The input is synchronized internally during each clock cycle at the leading edge
(start or LOW to HIGH) of CLK signal.
• PIN 24, 25 : QS1, QS0; QUEUE STATUS. These two pins are used to determine
the queue status. This signal is valid during the CLK cycle after which the queue
operation is performed.
• These are usually used for external visualization of tasks performed by the
processor. These pin functions only in maximum mode.
Lecture notes: Dr Mumtaz Ali Kaloi CSE Deptt. 8
 PIN CONFIGURATION 8086
• PIN 26-28 : S2—S0. These pins give output which floats to 3-state OFF in
hold acknowledge. These have a truth table for all type of combinations,
which you van refer to datasheet attached below on pg4. These pin also
functions only in maximum mode.
• PIN 29 : LOCK. This pin output indicated the supremacy of bus control
over other system bus masters. The signal is active low and remains low until
completion of the next instruction.

Lecture notes: Dr Mumtaz Ali Kaloi CSE Deptt. 9

 PIN CONFIGURATION 8086
• PIN 30,31 : RQ/GT, REQUEST/GRANT.
• These pins are bidirectional and used by other bus master to request the
control over bus at the end of the current bus cycle also they have internal
pull-up resistor.
• PIN 32 : RD, READ. This output pin indicated that the processor is
performing a memory size of 8086 microprocessor or I/O cycle, which
totally depends on the state of S2 pin.
• This pin is used to read devices, which resides on the 8086 local bus.
Lecture notes: Dr Mumtaz Ali Kaloi CSE Deptt. 10
 PIN CONFIGURATION 8086
• PIN 33 : MN/MX, MINIMUM/MAXIMUM. This is used to set the
processor in either MINIMUM or MAXIMUM mode. And pins function
accordingly.
• PIN 34 : BHE/S7, BUS HIGH ENABLE/STATUS. This pin provides a
signal to enable the data on the most significant half of the data bus (D15-
D8).

Lecture notes: Dr Mumtaz Ali Kaloi CSE Deptt. 11

 PIN CONFIGURATION 8086
• PIN 35-38 : A19/S6-A16/S3, ADDRESS/STATUS. These pins are the most
significant line for memory operations during t1. During I/O operation,
these pins are LOW.
• PIN 40 : VCC. This is the power pin which should be connected to high
potential of the system. The working voltage level of the IC s 5V, and it
should not exceed that.

Lecture notes: Dr Mumtaz Ali Kaloi CSE Deptt. 12

 Thanks…

Lecture notes: Dr Mumtaz Ali Kaloi CSE Deptt. 13