vl53l1 7
vl53l1 7
Applications
Laser assisted auto-focus (AF): enhances the
camera AF system speed and robustness,
especially in difficult scenes (low light and low
contrast). Ideal companion for PDAF sensors
Features Video focus tracking assistance at 60 Hz
Fully integrated miniature module Scene understanding with multiobject
– Emitter: 940 nm invisible laser (VCSEL) detection: “choose the focus point”
and its analog driver Dual camera stereoscopy and 3D depth
– Receiving array with integrated lens assistance thanks to multizone measurements
– Low-power microcontroller running Presence detection (autonomous timed mode),
advanced digital firmware typically to lock/unlock and power on/off
– Size: 4.9 x 2.5 x 1.56 mm devices like notebooks, tablets or white goods
Fast, accurate distance ranging, with
– Up to 800 cm ranging Description
– A comprehensive application note The VL53L1 is a laser ranging ToF (Time-of-
(AN5573) providing detailed technical Flight) sensor. It covers applications requiring
guidance long distance ranging up to 800 cm (ranging
– 60 Hz ranging capability up to 300 cm mode), multizone ranging (scanning mode), and
– Immunity to cover window crosstalk and low-power (autonomous mode). A comprehensive
fingerprint smudge, at long distances with application note (AN5573) provides technical
patented algorithms (direct Time-of-Flight) details on the programming interface including its
– Multiobject detection capability bare driver. The API (application programming
– Multizone scanning and selectable array interface) enables the device to be controlled and
(2x2, 3x3, 4x4, or defined by the user managed in these three modes, to meet the
through software) requirements of all applications.
Contents
1 Product overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
1.1 Technical specification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
1.2 System block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
1.3 Device pinout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
1.4 Application schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
2 Functional description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
2.1 System functional description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
2.2 Firmware state machine description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
2.3 Customer manufacturing calibration flow . . . . . . . . . . . . . . . . . . . . . . . . . 10
2.4 Device programming and control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
2.5 Description of operating “preset” modes . . . . . . . . . . . . . . . . . . . . . . . . . 10
2.6 Digital processing and reading the results . . . . . . . . . . . . . . . . . . . . . . . . .11
2.7 Reading of the results . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11
2.8 Power sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
2.8.1 Power-up and boot sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
2.9 Ranging sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
2.10 Handshake management . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
3 Control interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
3.1 I2C interface - timing characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
3.2 I2C interface - reference registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
4 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
4.1 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
4.2 Recommended operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
4.3 ESD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
4.4 Current consumption . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
4.5 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
5 Ranging performances . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
5.1 Measurement conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
6 Outline drawing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
7 Laser safety . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
9 Ordering information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
11 ECOPACK . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
12 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
1 Product overview
Rserial
Rserial
Note: Capacitors on external supply AVDD should be placed as close as possible to the
AVDDVCSEL and AVSSVCSEL module pins.
Note: External pull-up resistor values can be found in I2C-bus specification. Pull-ups are typically
fitted only once per bus, near the host. For suggested values see Table 3 and Table 4.
Note: XSHUT pin must always be driven to avoid leakage current. A pull-up is needed if the host
state is not known.
XSHUT is needed to use HW standby mode (no I2C communication).
Table 3 and Table 4 show recommended values for pull-up and series resistors for an AVDD
of 1.8 V to 2.8 V in I2C Fast mode (up to 400 kHz) and Fast mode plus (up to 1 MHz).
Table 3. Suggested pull-up and series resistors for I2C Fast mode
I2C load capacitance (CL) (1) Pull-up resistor (Ohms) Series resistor (Ohms)
CL ≤ 90 pF 3.6 k 0
90 pF < CL ≤ 140 pF 2.4 k 0
140 pF < CL ≤ 270 pF 1.2 k 0
270 pF < CL ≤ 400 pF 0.8 k 0
1. For each bus line, CL is measured in application PCB by customer.
Table 4. Suggested pull-up and series resistors for I2C Fast mode plus
I2C load capacitance (CL)(1) Pull-up resistor (Ohms) Series resistor (Ohms)
CL ≤ 90 pF 1.5 k 100
90 pF < CL ≤ 140 pF 1k 50
140 pF < CL ≤ 270 pF 0.5 k 50
270 pF < CL ≤ 400 pF 0.3 k 50
1. For each bus line, CL is measured in application PCB by customer.
2 Functional description
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Note: Ranging, multizone scanning and lite ranging modes require a handshake between the host
and the VL53L1, at each ranging operation. This handshake is mandatory to ensure the
right result is read by the host to continue the ranging operation.
Please refer to section Section 2.10: Handshake management for further details.
Option 2: the XSHUT pin is not controlled by the host, it is tied to AVDD through the pull-up
resistor.
When the XSHUT pin is not controlled, the power-up sequence is presented in Figure 7. In
this case, the device goes automatically to SW STANDBY after FW BOOT, without entering
HW STANDBY.
Note: In all cases, XSHUT has to be raised only when AVDD is tied on.
3 Control interface
This section specifies the control interface. The I2C interface uses two signals: serial data
line (SDA) and serial clock line (SCL). Each device connected to the bus uses a unique
address and a simple master / slave relationships exists.
Both SDA and SCL lines are connected to a positive supply voltage using pull-up resistors
located on the host. Lines are only actively driven low. A high condition occurs when lines
are floating and the pull-up resistors pull lines up. When no data is transmitted both lines are
high.
Clock signal (SCL) generation is performed by the master device. The master device
initiates data transfer. The I2C bus on the VL53L1 has a maximum speed of 1 Mbits/s and
uses a device address of 0x52.
SDA
MSB LSB
SCL
S 1 2 3 4 5 6 7 8 P
Ac/Am
Address or data byte
Stop condition
Information is packed in 8-bit packets (bytes) always followed by an acknowledge bit, Ac for
VL53L1 acknowledge and Am for master acknowledge (host bus master). The internal data
is produced by sampling SDA at a rising edge of SCL. The external data must be stable
during the high period of SCL. The exceptions to this are start (S) or stop (P) conditions
when SDA falls or rises respectively, while SCL is high.
A message contains a series of bytes preceded by a start condition and followed by either a
stop or repeated start (another start condition but without a preceding stop condition)
followed by another message. The first byte contains the device address (0x52) and also
specifies the data direction. If the least significant bit is low (that is, 0x52) the message is a
master-write-to-the-slave. If the lsb is set (that is, 0x53) then the message is a master-read-
from-the-slave.
MSBit LSBit
0 1 0 1 0 0 1 R/W
All serial interface communications with the Time-of-Flight sensor must begin with a start
condition. The VL53L1 module acknowledges the receipt of a valid address by driving the
SDA wire low. The state of the read/write bit (lsb of the address byte) is stored and the next
byte of data, sampled from SDA, can be interpreted. During a write sequence, the second
byte received provides a 16-bit index which points to one of the internal 8-bit registers.
As data are received by the slave, they are written bit by bit to a serial/parallel register. After
each data byte has been received by the slave, an acknowledge is generated, the data are
then stored in the internal register addressed by the current index.
During a read message, the contents of the register addressed by the current index is read
out in the byte following the device address byte. The contents of this register are parallel
loaded into the serial/parallel register and clocked out of the device by the falling edge of
SCL.
0x52 (write)
S ADDRESS[7:0] As INDEX[15:8] As INDEX[7:0] As P
0x53 (read)
S ADDRESS[7:0] As DATA[7:0] Am P
At the end of each byte, in both read and write message sequences, an acknowledge is
issued by the receiving device (that is, the VL53L1 for a write and the host for a read).
A message can only be terminated by the bus master, either by issuing a stop condition or
by a negative acknowledge (that is, not pulling the SDA line low) after reading a complete
byte during a read operation.
The interface also supports auto-increment indexing. After the first data byte has been
transferred, the index is automatically incremented by 1. The master can therefore send
data bytes continuously to the slave until the slave fails to provide an acknowledge or the
master terminates the write communication with a stop condition. If the auto-increment
feature is used the master does not have to send address indexes to accompany the data
bytes.
0x52 (write)
S ADDRESS[7:0] As INDEX[15:8] As INDEX[7:0] As P
0x53 (read)
S ADDRESS[7:0] As DATA[7:0] Am DATA[7:0] Am
Table 5. I2C interface - timing characteristics for Fast mode plus (1 MHz)
Symbol Parameter Minimum Typical Maximum Unit
Table 6. I2C interface - timing characteristics for Fast mode (400 kHz)
Symbol Parameter Minimum Typical Maximum Unit
VIH
SDA ... VIL
VIH
SCL
VIL
...
Note: The I2C read/writes can be 8,16 or 32-bit. Multi-byte reads/writes are always addressed in
ascending order with MSB first as shown in Table 8.
The customer must use the VL53L1 software driver for easy and efficient ranging operations
to match performance and accuracy criteria. Hence full register details are not exposed. The
customer should refer to the VL53L1 user manual (UM2133).
Table 8. 32-bit register example
Register address Byte
Address MSB
Address + 1 ..
Address + 2 ..
Address + 3 LSB
4 Electrical characteristics
Note: Stresses above those listed in Table 9. may cause permanent damage to the device. This is
a stress rating only and functional operation of the device at these or any other conditions
above those indicated in the operational sections of the specification is not implied.
Exposure to absolute maximum rating conditions for extended periods may affect device
reliability.
4.3 ESD
The VL53L1 is compliant with ESD values presented in Table 11
HW STANDBY 3 5 7
(2)
SW STANDBY (2V8 mode) 4 6 9 uA
Timed ranging Inter measurement 20
Active Ranging average consumption (including
16 18 mA
VCSEL) (3) (4)
Average power consumption at 10 Hz
20 mW
with 33 ms ranging sequence
1. All current consumption values include silicon process variations. Temperature and voltage are nominal
conditions (23°C and 2v8).
All values include AVDD and AVDDVCSEL.
2. In standard mode (1v8), pull-ups have to be modified, then SW STANDBY consumption is increased by
+0.6 µA.
3. Active ranging is an average value, measured using default driver settings. Ranging mode with default
settings @ 16 ms timing budget.
4. Peak current (including VCSEL) can reach 40mA.
5 Ranging performances
Target Performances
Min. Typ. Max Min. Typ. Max
color full FoV
Xo offset -2 0 2
SPAD
Yo offset -2 0 2
Table 16. Ranging and Scanning modes: performance with partial FoV
Applicable to:
8x8 SPADs ROI array 4x4 SPADs ROI array
Ranging and Scanning modes
Max distance Typ. = 250 cm Typ. = 250 cm Typ. = 110cm Typ. = 170 cm
detection Min. = 190 cm Min. = 250 cm Min. = 50cm Min. =150 cm
White
Target Accuracy 2% 2% 3% 3%
Ranging offset ±25 mm ±25 mm ±25 mm ±25 mm
15 Hz (default, recommended)
Target color Performance
Min. Typ. Max.
76 ms timing budget
Target color Performance
Min Typ. Max
The accuracy of the ranging thresholds programmed by user in autonomous mode are compliant with the
values described in Table 18.
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VL53L1 Outline drawing
7 Laser safety
This product contains a laser emitter and corresponding drive circuitry. The laser output is
designed to meet Class 1 laser safety limits under all reasonably foreseeable conditions
including single faults in compliance with IEC 60825-1:2014.
Do not increase the laser output power by any means. Do not use any optics to focus the
laser beam.
Caution: Use of controls or adjustments, or performance of procedures other than those specified
herein may result in hazardous radiation exposure.
8.3 Packing
At customer/subcontractor level, it is recommended to mount the VL53L1 in a clean
environment to avoid foreign material deposition.
To help avoid any foreign material contamination at phone assembly level the modules will
be shipped in a tape and reel format with a protective liner, starting from production version
(cut1.1).
The packaging will be vacuum-sealed and include a desiccant.
The liner is compliant with reflow at 260°C. It must be removed during assembly of the
customer device, just before mounting the cover glass.
Note: Temperature mentioned in Table 19 is measured at the top of the VL53L1 package.
Note: The component should be limited to a maximum of three passes through this solder profile.
Note: As the VL53L1 package is not sealed, only a dry reflow process should be used (such as
convection reflow). Vapor phase reflow is not suitable for the VL53L1 because it is an optical
component. Consequently, the VL53L1 should be treated carefully. This would typically
include using a ‘no-wash’ assembly process.
9 Ordering information
11 ECOPACK
12 Revision history
STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications, and
improvements to ST products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on
ST products before placing orders. ST products are sold pursuant to ST’s terms and conditions of sale in place at the time of order
acknowledgment.
Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or
the design of purchasers’ products.
Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product.
ST and the ST logo are trademarks of ST. For additional information about ST trademarks, refer to www.st.com/trademarks. All other product
or service names are the property of their respective owners.
Information in this document supersedes and replaces information previously supplied in any prior versions of this document.