EEL102:

ENGINEERING PRACTICE
LECTURE NOTES

Mohd Nadzri Mamat

Nor Muzlifah Mahyuddin

Copy No:
Chapter 1: Electrical Hazard and Safety Practices

1.1 Electrical Hazard Chart

Referring to definition in Collins English Dictionary, electricity is defined as a form of energy that can be
carried by wires and is used for heating and lighting and to provide power for machines. Electricity can be
very dangerous and could lead to fatality when you do not understand and follow the safety rules of
handling electrical equipments. Every year, there are many cases where people died due to the fatal shock
when they failed to follow and practice the simple rules of safety practices.
Based on Ohm’s Law, three parameters that determine the severity level and fatality when an electrical
accident happens are amount of shock current, potential voltage imposed and your body resistance. From
these three parameters, the amount of shock current passes through the body is the main variable that
determines the damage level. This current is of course dependent upon the voltage and the resistance of
the path it follows through the body. One difficulty in establishing the conditions for electrical safety is
that a voltage which produces only a mild tingling sensation under one circumstance can be lethal shock
hazard under other circumstances. Figure 1.1 shows the electrical hazard chart depicted the
physiologically effects of electric currents during an electrical shock incident.

Figure 1.1 Electrical Hazard Chart

Using the minimum value of current from the ‘death’ range (100mA), you can easily determine the
potential hazardous voltage that can cause fatality during a shock incident to your body. Using multimeter,

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you need to measure the resistance of your body and then calculate the potential voltage using Ohm’s
Law. Table 1.1 shows the table that you can use to determine the hazardous voltage.

Table 1.1 Shock Parameter Measurements

Shock Body Resistance, Hazardous Voltage,
Condition BR (Ω) 0.1*BR (V)
From right to left Contact between two
hand hands
Dry
From hand to Contact between one
foot hand and foot
From right to left Contact between two
hand hands
Wet
From hand to Contact between one
foot hand and foot

1.2 Rules and Safety Practices

Generally, there are three kinds of accident frequently happen during electrical works which are:
 Electric shock
 Burns
 Mechanical injuries
In order to avoid these accidents, you need to always follow the simple safety rules and practices while
doing the electrical works.

Electric Shock
There are nine rules that you need to follow covering personal, equipment and ambience aspects in order
to avoid the electrical shock. Table 1.2 summarizes the rules and safety practices.

Table 1.2 Rules to Avoid Electrical Shock

Aspect Rules
Personal 1. Be sure of the dangers present before working with electrical circuit. Always
use the testing tools first if unsure about the state of an electrical circuit.
2. Always move slowly around electrical circuit to avoid accidental short circuit or
shock.
3. Focus and limit talk during working to avoid distraction during electrical works.
4. Work with one hand behind or in your pocket to minimize the impact of the
shocking current to your heart. Working with two hands allows shocking
current to directly cross your heart and can be lethal during accident.
5. Try not to work alone as it provides someone to shut off power, perform
resuscitation and to call ambulance during mishap.
Equipment 6. Never solely rely on fuse, switch, relay, interlock systems and contactor to
protect you as they may fail when most needed.
7. Never remove the grounding point of three wire equipment which eliminates
the grounding feature.
Ambience 8. Work in organized and systemized ambience to avoid short circuit.
9. Never work on wet floor as your contact resistance to the ground is
substantially reduced.
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Burns
This kind of accident is usually not fatal but it is painfully serious and should be avoided. There are four
rules for safety practices that you need to follow as tabled in Table 1.3.

Table 1.3 Rules to Avoid Burns

Element Rules
Resistor 1. High wattage resistor can get very hot when high current flowing through it.
Always wait until it cooled off to avoid it from burning you skin off.
Capacitor 2. Capacitor is a storage element and it can retain charges if it is not properly
discharge. Always fully discharge the capacitor to avoid dangerous and fatal
shock. Check the rated voltage and polarity of a capacitor to avoid burst and
hot condition especially for underrated voltage and reverse polarity.
Soldering 3. Always be very careful with the hot soldering iron/gun as it can burn your skin
Iron if accidently touch. Do not store the soldering iron while it is still hot.
Hot Solder 4. Do not shake hot solder off during de-soldering works as it can be painful to
the contacted area.

Mechanical Injuries
This class of safety rules applies to personal working with electrical tool and machinery. There are five
rules for safety practices that you need to follow as tabled in Table 1.4.

Table 1.4 Rules to Avoid Mechanical Injuries

Element Rules
Chassis 1. Always file sharp edges and corners smoothly to avoid cut and scratch to your
body parts.
Tool 2. Always use proper tool for intended job to avoid damage to the equipment and
personal injury.
Eye Gear 3. Use proper eye protection when grinding, chipping, cutting, milling or when
working with hot metal to avoid splatter.
Gloves and 4. Use protective gears to protect your hands and clothes when working with
Apron corrosive chemicals.
SOP 5. Always read and follow the standard operating procedures (SOP) before using
any machine. Always ask the person in charge if in doubt.

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1.3 Basic First Aid

DRABC procedure is a standard First Aid routine to use in case of suspected serious injury especially when
the casualty is unconscious. In unconscious condition especially when without breathing or pulse, you
need to promptly perform the cardiopulmonary resuscitation (CPR) to resuscitate the victim. Figure 1.2
shows the figure of DRABC and its description.

Figure 1.2 DRABC First Aid Standard Routine

For an individual working with electrical equipments, it is an essential knowledge to learn and know
how to perform cardiopulmonary resuscitation (CPR). CPR is very important because it can save life
during a cardiac or breathing emergency. Table 1.5 shows the simple step-by-step guide on how to
perform the CPR and administering them correctly. The guide is cited from the American Red Cross
Training Services.

1.4 Safety Precautions of Handling PCB Chemical Materials

During PCB fabrication processes, a lot of hazardous, toxic and corrosive chemical materials are used in
the process such as Ferric Chloride, Sodium Carbonate Monohydrate, Potassium Carbonate, Catalyst, Salt
Remover and Stripper Solution. There are many potential hazards when working with it but with
appropriate precautions, all of the hazards can be avoided. The safety precautions that need to be
followed are as follows:
1. Always wear rubber shoes, safety goggles, gloves and apron while handling the materials.
2. Always read the label or material safety datasheet of the materials to know the potential hazard
before handling it.
3. Wash with a lot of water if the materials splashed to your skin or into your eyes. Seek immediate
medical assistance if necessary.
4. For chemicals that can be washed down the drain, be sure to wash it away perfectly to avoid any
accidental leftover reaction.
5. Always keep the chemical in its specific container. Do not seamlessly mix unknown chemicals
together to avoid any unknown reaction.
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Table 1.5 American Red Cross CPR Steps
Before Giving CPR
Step
1 Check the scene and the person.
Make sure the scene is safe, then tap the person on the shoulder and shout "Are you OK?"
to ensure that the person needs help.
2 Call 999 for assistance.
If it's evident that the person needs help, call (or ask a bystander to call) 999, then send
someone to get an automated external defibrillator (AED).
(If an AED is unavailable, or a there is no bystander to access it, stay with the victim, call 999
and begin administering assistance.)
3 Open the airway.
With the person lying on his or her back, tilt the head back slightly to lift the chin.
4 Check for breathing.
Listen carefully, for no more than 10 seconds, for sounds of breathing. (Occasional gasping
sounds do not equate to breathing.)
If there is no breathing, begin CPR.

Red Cross CPR Steps

Step
1 Push hard, push fast.
Place your hands, one on top of the other, in the middle of the chest. Use your body weight
to help you administer compressions that are at least 2 inches deep and delivered at a rate
of at least 100 compressions per minute.
2 Deliver rescue breaths.
With the person's head tilted back slightly and the chin lifted, pinch the nose shut and place
your mouth over the person's mouth to make a complete seal. Blow into the person's mouth
to make the chest rise. Deliver two rescue breaths, and then continue compressions.
Note: If the chest does not rise with the initial rescue breath, re-tilt the head before
delivering the second breath. If the chest doesn't rise with the second breath, the person
may be choking. After each subsequent set of 30 chest compressions, and before attempting
breaths, look for an object and, if seen, remove it.
3 Continue CPR steps.
Keep performing cycles of chest compressions and breathing until the person exhibits signs
of life such as breathing, an AED becomes available, or a trained medical responder arrives
on scene.
Note: End the cycles if the scene becomes unsafe or you cannot continue performing CPR
due to exhaustion.

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Chapter 2: Simulation Design Using OrCAD Capture

2.1 Introduction to PSpice

SPICE is a very powerful simulator that is used to validate circuit designs and to predict circuit behaviour.
It is an acronym that stands for ‘Simulation Program with Integrated Circuit Emphasis’. PSpice is a
derivative of the original SPICE added with graphical user interface and enhanced plotting capability. SPICE
was originally developed at the University of California at Berkeley in 1975 written by L. Nagel in his thesis
entitled ‘SPICE: A Computer Program to Simulate Semiconductor Circuits’.
PSpice can perform several different types of circuit analyses. Amongst the most important are:
 DC analysis: calculate the DC transfer curve
 Transient analysis: calculate the outputs as a function of time when a large signal input is applied
 AC analysis: calculates the output as a function of frequency
 Fourier analysis: calculates and plots the frequency spectrum of the response
 Noise analysis
 Sensitivity analysis
 Monte Carlo analysis
The design process can be described by the flowchart in Figure 2.1. PSpice can expedite the design process
by performing the repeated analysis task.

Figure 2.1 Flowchart for the typical PSpice design cycle

2.2 Basic Environment of OrCAD Capture

Before going any further, it is very important to know the basic environment and file path and hierarchy
that will be navigated during the analysis process. Furthermore, procedures that PSpice software can
understand are also needed to be mastered perfectly especially when dealing with components and
connections. PSpice uses a file called ‘netlist file’ as the input to be analyzed and simulated. It consists of
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a set of single text lines that contain information about the component type, the nodes to which the
component connected, the size of the component, the value of the component and other relevant values.
Netlist can be written using word editor. In this OrCAD Capture, circuit description will be inputted in
graphics form and have them subsequently converter to netlist for analysis with PSpice.
Throughout this module, the following terms will be used to represent actions to be performed by the
mouse and keyboard:
 CLICKL : click the left button once to select an item
 CLICKR : click the right button once to open submenu or to abort a mode
 DCLICKL : double click the left button to edit a selection or end mode
 DCLICKR : double click the right button to repeat an action
 CLCIKLH : click the left button, hold down and move the mouse to drag a selected item.
Release the left button after the item has been placed.
 DRAG : drag the mouse (without clicking) to move an item

The File Hierarchy

After a complete and successful installation of OrCAD, the file path is shown as in Figure 2.2. The default
installation path is ‘C: > Program Files > Orcad’ but it depends on your operating system and root directory.

Figure 2.2 OrCAD products destination path

From the parent directory, subfolders for Capture, Layout Plus and PSpice can be explored thoroughly.
Figure 2.3 shows the valid library path to be filtered for the PSpice simulation purpose which is ‘C: >
Program Files > Orcad > Capture > Library > PSpice’. In this folder, all libraries have the associated symbols
and PSpice templates. Always remember to include only libraries from the PSpice subfolder for the
simulation based project.

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 Figure 2.3 Directory path for PSpice Library

OrCAD Capture Environment

In order to use all menus and icons systematically, Figure 2.4 shows the menus and icons that will be used
throughout this module.
 1 – Project Manager: to display complete design resources and outputs
 2 – Workspace/Schematic Page: specified page to illustrate the simulation or schematic circuit
 3 – Top Menu: main menu and submenu to execute different tasks during work
 4 – Icon: specific icon for specific task
 5 – Tools Palette: a set of specific icons for a specific task

Figure 2.4 OrCAD Capture Environment

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2.3 Creating a New PSpice Project
Circuit diagram can be drawn using Capture or Capture CIS. CIS stands for ‘Component Information
System’ which allows you to place component from a database instead of a library.
To start the Capture program, you may navigate to ‘… > Orcad > Capture’ and click the ‘capture.exe’ to
execute the program. Typically, from the start menu you can also navigate to the Orcad submenu and run
the program.

Before the circuit diagram is drawn, the

project type and corresponded library need
to be set up. From the top menu, click ‘File
> New > Project’ to create a new project.
New design created in Capture will
automatically create a project file (*.opj)
which contains schematic, libraries and
output files. Figure 2.5 shows how to create
a new project.

Figure 2.5 Creating a New Project

In the ‘New Project’ window as shown in Figure 2.6, you need to choose the project type, name the project
and set the location path for your project. There are four choices that can be choosed for your design.
 Analog or Mixed A/D – used for
PSpice Simulation
 PC Board Wizard – used for
schematic to PCB project
 Programmable Logic Wizard –
used for CPLD and FPGA design
 Schematic – used for schematic
and wiring diagram

For PSpice purpose, you need to always

choose ‘Analog or Mixed A/D’ to start
your project. This also will automatically
activate a new ‘PSpice’ menu in the top
menu.
You are also strongly advised to create an
individual folder for each new project in
this OrCAD Capture to avoid any
difficulties later.
Figure 2.6 New Project Window

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The next window to appear is ‘Create PSpice Project’ which sets up the project for PSpice simulation as
shown in Figure 2.7.

There are two choices in this window

but if you starts from scratch, you need
to choose ‘Create a blank project’.
After you click OK, you will see
interface with schematic page,
complete icons, tool palettes and also
top menu with PSpice menu activated.

Figure 2.7 Create PSpice Project Window

Generally, after the first interface is successfully created, the next steps are to place components, connect
components, label wires and run the circuit to perform PSpice analysis.
To simplify all the general steps, a simple DC series circuit as shown in Figure 2.8 will be used as an
example. In this example, you are needed to determine the voltage potential at Node A and the total
current for this circuit.
Using Ohm’s Law, clearly we can get VA=50V and IT =0.5A. Instead of using the theoretical calculation, you
will use PSpice to determine and validate the calculated values.

Figure 2.8 A Simple DC Series Circuit

Placing Components
The first step that you need to perform is placing all the components in the workspace. These are the
points that you need to be very careful when placing the components:
1. Always use part/symbol from the PSpice library
2. Always search and select the correct symbol for your component
3. Always set the correct value and gain for your component
4. Always observe the polarity of your component
5. Always include ‘0 Ground’ for your reference point

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In Figure 2.8, the part name is VDC for the DC voltage supply and R for the resistor.
To place the component, you can click ‘Place >
Part’ from the top menu or click the ‘Place Part’
icon as shown in Figure 2.9. Hover over the icon
to see the brief description of that icon.
Alternatively, you can press P from your keyboard
for the shortcut.

Figure 2.9 Placing Part

Next, you need to add the PSpice libraries to the ‘Place Part’ window before you can start selecting and
placing your components. Figure 2.10 shows the ‘Place Part’ window. It serves as to add and remove
library and also to perform the part search.

To add library, click the ‘Add Library’ and add only

libraries from PSpice subfolder. You can use Ctrl+A
to select all libraries.
To remove library, click the ‘Remove Library’ and
select your desired library to be removed.
To search for component, click ‘Part Search’. In the
window, set the library path to ‘C:\Program
Files\Orcad\Capture\Library\PSpice’. Use asterisk
(*) as the wild character.

Figure 2.10 Place Part Window

After finished adding libraries, you can start drawing your circuit by placing all the needed components in
the workspace. Type and input VDC (you can use lower case or upper case) in the ‘Part’ box and make
sure all libraries are highlighted in the libraries box as shown in Figure 2.11.

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Under the CIS box, you can see a small icon depicted the PSpice which means the component is allowable
for the simulation purpose.
Although the CIS symbol for the DC voltage source is different from Figure 2.8 but it is actually the correct
symbol for the intended source. Sometimes in two similar circuits, they use different symbols to represent
the same component.
After you click OK, move the component to
your desired initial point and CLICKL to
place the component. CLICKR and ‘End
Mode’ to finish placing the component or
you may also hit ESC to end the mode.
Repeat with the part name R.
Always remember to include the ‘0 Ground’
for PSpice circuit. Click ‘Place > Ground’ or
click ‘Place Ground’ icon to place the ‘0
Ground’. The default library for the ‘0
Ground’ is ‘SOURCE’.
You can also use any other ground part as
long as you change its name to 0.

Figure 2.11 Inputting the Part Name

Some shortcuts that can be used to speed up the design process are as follows:
 P – to place component
 I – to zoom in
 O – to zoom out
 C – to centre the page
 R – to rotate component
 W – to wire component
 G – to place ground
 F – to place power
All these shortcuts are also shown in the ‘Place’ top menu.
After finished placing all components, you need to assign the correct value for each component.

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Assigning Component Value
Any valid printing character may be placed in the value field. It can contain decimal point, integer
exponent or symbolic exponent with positive or negative sign. Table 2.1 summarizes the PSpice scale
factor. PSpice is not case sensitive, so a suffix may be either a capital or lower case letter.

Table 2.1 PSpice Scale Factor

Symbolix Suffix Mnemonic Exponential Form Value
T Tera 1E12 1012
G Giga 1E9 109
MEG Mega 1E6 106
K Kilo 1E3 103
M mili 1E-3 10-3
U micro 1E-6 10-6
N nano 1E-9 10-9
P pico 1E-12 10-12
F femto 1E-15 10-15

DCLICKL at the original value to pop-up the ‘Display

Properties’ window. Change the value to 100 for VDC
and 100 for all resistors. You may omit the unit for all
components when using Capture. Figure 2.12 shows the
final outcome.
After all components are completely labeled, the next
step is connecting components using wire.

Figure 2.12 Final Placing

Connecting Components
The circuit that needs to be analyzed must be in closed loop. You can connect all components using ‘Place
Wire’ icon or ‘Place > Wire’ from the top menu. Click the icon and start wiring exactly at the
centre of the positive terminal grey square box of V1. CLICKL and wire to the centre of the adjacent grey
square box of R1. If you wire perfectly, the original square boxes will be vanished. Complete the wiring
process as in Figure 2.8.
Use the keyboard shortcut W to toggle wiring on/off. To draw a diagonal wire, hold Shift +CLICKLH. Figure
2.13 shows the complete circuit.

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 Note at a junction, a node is automatically
created to show two or more wires are
connected together. If you accidently
connected two wires together, you can
toggle off by clicking the ‘Place Junction’
icon .

Figure 2.13 Circuit of Figure 2.8 as drawn in OrCAD Capture

Typically, in PSpice circuit, all components are connected using wire. However, there are more methods
that can be used to connect and simplify connections and it will be explained in details in Chapter 3.
Simplification methods that can be used are:
 Assigning Bus
 Assigning Net alias
 Placing Off page connecter
 Placing VCC and GND

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Net Aliasing Components
One of the most important steps that ease the troubleshooting process during error and warning is
assigning the net alias to the circuit branches.

By default, Capture will assign random

name for all connections in the PSpice
circuit which make it harder to isolate the
error connection if you have a large number
of branches. By using the net alias means
you tag or label each branch with your own
branch name. Figure 2.14 shows the circuit
with net alias.

Figure 2.14 Circuit with Net Alias

Click ‘Place > Net Alias’ from the top menu or click ‘Place Net Alias’ icon to assign individual branch
net alias. After you click the icon, input your own alias in the ‘Place Net Alias’ window. You may also change
the font type, style and size from the window. Click OK and CLICKL the net alias exactly at the top or
bottom of the targeted net. Now, instead of using random net name assigned by Capture, you have three
predefined nets labeled +VDC, Net1 and GND.

Placing Probe Marker

The final step before you simulate your circuit is to place the probe marker to the node which you want
to analyze. In Figure 2.8 you need to determine the voltage at Node A and the total current for the circuit.
To place the marker, click ‘PSpice > Markers >…’ or the marker tools palette and click the
desired probe to be attached in the drawn circuit. There are four different markers that can be selected
which are:
1. Voltage/level – to analyze chosen node with respect to the ground. This marker needs to be
placed at any point from the targeted branch.
2. Voltage differential markers – to analyze potential difference across a component. This marker
needs to be placed between component’s terminals.
3. Current marker – to analyze the branch current. This marker needs to be placed exactly at the
original component’s grey square box terminal.
4. Power dissipation marker – to analyze the power absorbed or delivered by a component. This
marker needs to be placed at the center of the component.

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 Figure 2.15 shows the complete final
circuit with markers for voltage and
current at node A.

Figure 2.15 Circuit with Probe Markers

Simulating PSpice Circuit

After the circuit is completely drawn and saved, the specifications for the analysis need to be given in
order to simulate it. These specifications control the simulation and the display of output variables. A
simulation profile needs to be created first before all the specifications can be inputted. To set a new
simulation profile, click ‘PSpice > New Simulation Profile’ or click new simulation profile icon from
the tool palette.
Type ‘DC Series’ as the profile name in the ‘New simulation’ window and click ‘Create’. The next window
to appear is ‘Simulation Settings’ and here you can set the specifications needed for your analysis.
Figure 2.16 shows the setting using time domain analysis, run to time (RTT) of 1000ns with option of
general settings. This is the best analysis that you can choose to analyze this DC simple series circuit.
Typically, the RTT is set at three full cycles to display full waveform behaviour.

There are four analysis types to be selected:

1. Time Domain (Transient)
2. DC Sweep
3. AC Sweep/ Noise
4. Bias Point

In this example, you will use time domain

analysis as your analysis type.
The rest of the analyses will be explained in
details in the next section.

Figure 2.16 Time Domain Analysis Setting

Click OK to save the setting. The next step is to run the PSpice analysis. Click ‘PSpice > Run’ or click run
icon . Alternatively, you may hit F11 for the shortcut.

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The next window to appear is the ‘Probe Window’ displaying the simulated waveforms as shown in Figure
2.17. The output file will be automatically named with the profile name which is ‘DC Series.dat’. A lot of
customizations and fine tunes can be done in this probe window to display the best final results.

Figure 2.17 Probe Window Displaying Voltage and Current at Node A

Archiving Project
After the project is successfully simulated and saved, you can archive all Capture’s project files, library
files and output files into a portable device. Minimize your workspace and click the Project Manager. To
archive your desired files, click ‘File > Archive Project’ from the top menu and save the files to your target
destination.

2.4 Displaying and Customizing Output Results

The probe window is a window to display the output waveforms from the simulated PSpice circuit. It also
can be customized and fine-tuned to enhance the presentation of the output results. Some of the
functions that can be customized in the probe window are:
1. Add/Delete trace
2. Perform analog operation and functions
3. Axis settings
4. Trace properties
5. Display and label cursor position
6. Add plot to window
7. Add Y Axis
8. View simulation output file

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Add/Delete Trace
The common method to display the output results in the probe window is using the probe marker.
Another method that is very useful to use is using the add trace menu. Click ‘Trace > Add Trace’ from the
top menu or hit Insert to display the ‘Add Traces’ window. From the ‘Simulation Output Variables’ box,
you can choose more traces to be displayed in the probe window. The chosen variable will be displayed
in the ’trace expression’ box. After you click OK, the probe window will display all traces in a single plot.
To delete individual trace in the probe window, simply highlight the trace name and hit Delete. To delete
all traces at once, you can click ‘Trace >Delete All Traces’ or use shortcut Ctrl+Delete.

Perform Analog Operation and Functions

Another useful function in the ‘Add Traces’ window is to perform function using analog operators. For
example to get the equivalent resistance, RT of the circuit in Figure 2.8, in the ‘Trace Expression’ box you
can select V(V1:+) followed by operator / and again
select I(R1) to form V(V1:+)/I(R1). Figure 2.18 shows
the ‘Add Traces’ window with operator function.
After you click OK, the probe window will display a
trace with RT=200.
Now, you will have three traces in the probe window
namely V(NET1), I(R2) and V(V1:+)/I(R1).
For the next customizations, only one trace which is
I(R2) will be used in the probe window. Highlight
V(NET1) and hit Delete. Repeat with V(V1:+)/I(R1) to
show only I(R2) in the probe window.

Figure 2.18 Add Traces Window

Table 2.2 shows the complete permissible functions for a valid trace expression.

Table 2.2 Valid Functions for Trace Expression

Function Description Example
+ Addition of current or voltage V(1) + V(2,1) + V(3)
− Subtraction of current or voltage I(VS1) − I(VM2)
* Multiplication of current or voltage V(1)* V(2)
/ Division of current or voltage V(3)/V(4)
ABS(X) |X|, Absolute value of X, ABS(V(1))
SGN(X) + 1 if X > 0; 0 if X = 0; −1 if X < 0 SGN(V(1))
SQRT(X) X1/2 , square root of X SQRT(I(VM1))
EXP(X) eX EXP(V(5,4))
LOG(X) Ln(X), log base e of X LOG(V(1))
LOG10(X) Log10(X), log base 10 of X LOG10(V(2))
DB(X) 20 * log10(X), magnitude in decibels DB(V(3))
PWR(X,Y) |X|Y, X to the power Y PWR(V(2),5)
SIN(X) sin(X), X in radians SIN(4.2 * V(2))
COS(X) cos(X), X in radians COS(4.2 * V(2))
TAN(X) tan(X), X in radians TAN(4.2 * V(2))
ARCTAN(X) tan−1(X), X in radians ARCTAN(4.2 * V(2))
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 ATAN tan−1(X), results in radians ATAN(V(1)/V(2))
d(X) Derivative of X with respect to X-axis variable D(V(1))
S(X) Integral of X over the X-axis variable S(V(1))
AVG(X) Running average of X over the range of X-axis AVG(V1,3))
variable
AVGX(XO,XF) Running average of X from X-axis value, XO, AVG V(1,4)(1e-3,2e-3)
to the x-axis value, XF.
RMS(x) Running RMS average of X over the range of RMS(VS1)
the X-axis variable
MIN(X) Minimum of real part of X MIN(VM1)
MAX(X) Maximum of real part of X MAX(VM1)
M(X) Magnitude of X M(V(1))
P(X) Phase of X, result in degrees P(V(1))
R(X) Real part of X R(V(1))
IMG(X) Imaginary part of X IMG(V(1))
G(X) Group delay of X, results in seconds G(V(1))

Axis Settings
By default, the probe window is equipped with major and minor grids. Sometimes, it is necessary to hide
the grids to show only the trace waveform during analysis. To change the axis and grid settings, click ‘Plot
> Axis Settings’. You can also CLICKR anywhere in the probe window to pop up the ‘Axis Settings’ window.
Figure 2.19 shows the ‘Axis Settings’ window. All axis and grids preferences can be customized here.
In this example, all grids will be removed from the probe window.
Click ‘X Grid’ tab and set major and minor grids to ‘None’. Repeat with ‘Y Grid’ tab.
Click ‘Y Axis’ tab and name the ‘Axis Title’ to DC Current. Click OK.
The probe window will display only I(R2) without any grids.
You can also set the user define ‘Data Range’ for X and Y axis.

Figure 2.19 Axis Settings Window

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Trace Properties
In order to show a clear and sharp trace, customization is needed to intensify the default shape of the
trace. Click at I(R2) trace to highlight it. CLICKR and click ‘Properties’ to open ‘Trace Properties’ window.

Usually, the width will be adjusted to level

2 or 3 to increase the width of the original
trace.
Other customizations can also be
performed here to change the colour,
pattern and symbol for the targeted trace.
Figure 2.20 shows the ‘Trace Properties’
window.
In this example, increase the width to level
3 and keep the other options unchanged.
Click OK.
The probe window will show a thicker trace
waveform.

Figure 2.20 Trace Properties Window

Display and Label Cursor Position

This step is very important and crucial when the data need to be analyzed and displayed at a specific point.
For example, you need to determine and display the exact I(R2) in Figure 2.8 at 0.2µs in your probe
window.

Click ‘Trace > Cursor > Display’ from the

top menu or ‘Toggle Cursor’ icon to

activate the ‘Probe Cursor’ box. Move the
cursor to 0.2 µs using the right arrow from
your keyboard. The probe cursor box will
display the value 200.000n, 500.000m
which means the current position for the
(X,Y) coordinate.
Next, click ‘Plot > Label > Mark’ from the

top menu or ‘Mark Label’ icon to

label the current coordinate in the probe
window. Figure 2.21 shows the final trace
with increased width and completely
labeled.

Figure 2.21 Final I(R2) Trace

20
If you have more than one trace, simply highlight the other symbol’s trace and perform the steps earlier
to label it.
To edit or delete the label, toggle off the ‘Toggle Cursor’ icon. Move your mouse exactly at the label and
DCLICKL to edit or CLICKL + Delete to delete the label.

Add Plot to Window

Probe window also can display more than one plot with similar X axis range. This is very important
especially when you need to compare data with different dimension such as voltage and current. Click
‘Plot > Add Plot to Window’ from the top menu to add another plot window. To remove the created plot
window, highlight it and click ‘Plot > Delete Plot’.

Add Y Axis
Besides add other plot to the probe window, you can also add other Y Axis to differentiate your data such
as voltage and current. Click ‘Plot > Add Y Axis’ to add more Y axis to the similar plot window.
Customization for each Y axis can be done using ‘Axis Settings’ menu explained earlier.

View Simulation Output File

Simulation output file is a file containing the bias point calculation of your circuit. This output file is very
useful especially when frequency domain analysis is selected for the PSpice profile. Click ‘View > Output
File’ from the top menu or ‘View Simulation Output File’ icon from the ‘View toolbar’ to display the output
file. For this example, the name for the output file is ‘DC series.out’.

21
2.5 Components and Parts
There are many circuit parts or components contain in the default PSpice library. Some of them are
independent sources, dependent/controlled sources, passive elements, discrete elements, power
semiconductors, magnetic elements, transmission lines and vendor-supplied elements.
With rapid changes in semiconductor technologies, a lot of manufacturer also developed their own PSPice
model library that can be downloaded from the Internet to be used in Capture.
In this section, you will learn how to use and apply analog and stimulus sources in PSpice Capture. Typically
for sources, they can be categorized into four main categories which are:
1. General Usage Independent Sources
2. Special Purpose Independent Sources
3. Special Purpose Dependent/ Controlled Sources
4. Special Purpose Independent Transient Sources

General Usage Independent Sources

Two sources that belong to this category are General Voltage Source and General Current Source. Figure
2.22 shows both sources with part name VSRC and ISRC.
You can set any or all properties using
PSpice netlist syntax.
DC: DC value
AC: AC magnitude value
TRAN: Varying-time part parameter

Figure 2.22 General Usage Independent Sources

Special Purpose Independent Sources

Four sources that belong to this category are DC Voltage Source, AC Voltage Source, DC Current Source
and AC Current Source. Figure 2.23 shows the special purpose independent sources.

Figure 2.23 Special Purpose Independent Sources

22
You can DCLICKL value to change the DC or AC value.
For all sources in Figure 2.22 and Figure 2.23, its positive terminal needs to be wired to the positive of
connecting element to set a positive current path.
Exclusive for IDC and ISRC only, its negative terminal needs to be wired to the positive of connecting
element to set a positive current path.

Special Purpose Dependent/ Controlled Sources

Four sources that belong to this category are Voltage Controlled Voltage Source, Voltage Controlled
Current Source, Current Controlled Voltage Source, and Current Controlled Current Source. In the
common electronic symbol, they only have two terminals. In PSpice they have four terminals, two
terminals for the source nodes and the other two terminals for the control nodes. Figure 2.24 shows the
controlled sources.
The two terminals with the source symbol need be connected to the dependent source’s nodes.
The other two terminals without the circle sign need to be connected to the controlled nodes.
You can click ‘Place Wire’ icon to wire all the terminals as explained before.
For the control nodes, you need to make sure that the voltage must be always connected in parallel while
for the current; it must be always connected in series.
Some modifications are needed when transforming the common electronic circuit into PSpice circuit
especially when you deal with current path. Make sure there is no short circuit in your circuit when you
perform the modification.

Figure 2.24 Special Purpose Dependent/ Controlled Sources

The uniqueness in all of the dependent sources is that they always have gain in the control part. For
example, you have an F part with gain of 1.5. To input the gain value, you can use
either ‘Edit Properties’ menu or ‘Edit Part’ menu. Figure 2.25 shows the steps to
input the gain value using ‘Edit Properties’ menu.

23
 CLICKL your targeted controlled
source.
Next, CLICKR and click ‘Edit
Properties’ to open ‘Property Editor’
window.
Follow the steps in Figure 2.25 to set
the 1.5 gain value.
Finally, close the ‘Property Editor’ to
go back to the schematic page.

Figure 2.25 Property Editor Window

The other method that can be used to input the gain value is using ‘Edit part’ menu. Actually in PSpice,
this menu is very useful not only to input the gain value of a controlled source but also to set new internal
properties of a component. Besides, you can also alter the graphical symbol of a component using that
menu. Figure 2.26 shows the ‘Part Editor’ window.

CLICKL your targeted controlled

source.
Next, CLICKR and click ‘Edit Part’ to
open ‘Part Editor’ window.
DCLICKL anywhere inside the
editor to pop up the ‘User
Properties’ window.
Input the 1.5 gain value and close
the editor to go back to the
schematic page.
Choose either ‘Update All’ or
‘Update Current’ based on your
schematic circuit.

Figure 2.26 Part Editor Window

24
Special Purpose Independent Transient Sources
Modern day practical circuits have a lot of time varying sources in their circuit. In simple case, time varying
source is modeled using simple switch. However, in complex case, a model for time varying source that
follows certain mathematical behaviour is needed in the schematic. This model usually used in transient
analysis. The special transient sources are:
 VSIN, ISIN – damped sinusoidal voltage or current source, eg: v(t)=25e-4tsin(50t-30o)V
 VPULSE, IPULSE – voltage or current pulse
 VEXP, IEXP – voltage or current exponential source, eg: i(t)= 5[1-exp(-0.2t)]A
 VPWL, IPWL – piecewise linear voltage or current function, which can be used to create an
arbitrary waveform

Damped Sinusoidal Source, VSIN and ISIN

Figure 2.27 shows the damped sinusoidal voltage and current source. To assign the source parameters,
select and DCLICKL source to open the ‘Property Editor’. ‘Edit Property’ menu also can be used to assign
the new property value. Figure 2.28 shows the characteristics of a damped sinusoidal voltage source.
Consider a VSIN with this function: v(t) = Vo +Vme-α(t-td)sin[2πf(t-td)+θ]

Figure 2.27 Damped Sinusoidal Voltage and Current Source

Figure 2.28 Waveform Characteristics

25
Table 2.3 shows the property description for the part name’s property.

Table 2.3 VSIN, ISIN Property

Part Name Property Property Description
VSIN, ISIN VOFF Offset voltage, V0
VAMPL Amplitude, Vm
TD Time delay in seconds, td
FREQ Frequency in Hz, f
DF Damping factor, α
PHASE Phase in degrees, θ

Pulse Source, VPULSE and IPULSE

Figure 2.29 shows the pulse voltage source and pulse current source. Figure 2.30 shows the characteristics
of a pulse voltage source.

Figure 2.29 Pulse Voltage Source and Pulse Current Source

Figure 2.30 Waveform Characteristics

26
Table 2.4 shows the property description for the part name’s property.

Table 2.4 VPULSE, IPULSE Property

Part Name Property Property Description
VPULSE, IPULSE V1 Low voltage
V2 High voltage
TD Initial time delay in seconds
TR Rise time in seconds
TF Fall time in seconds
PW Pulse width in seconds
PER Period in seconds

Exponential Source, VEXP and IEXP

Figure 2.31 shows the exponential voltage source and exponential current source. Figure 2.32 shows the
characteristics of an exponential voltage source.

Figure 2.31 Exponential Voltage Source and Exponential Current Source

Figure 2.32 Waveform Characteristics

27
Table 2.5 shows the property description for the part name’s property.

Table 2.5 VEXP, IEXP Property

Part Name Property Property Description
VEXP, IEXP V1 Initial voltage
V2 Final voltage
TD1 Rise delay in seconds
TC1 Rise time constant in seconds
TD2 Fall delay in seconds
TC2 Fall time in seconds

Piecewise Linear Source, VPWL and IPWL

Figure 2.33 shows the piecewise linear voltage source and piecewise linear current source. Figure 2.34
shows the characteristics of a piecewise linear voltage source. Voltages or currents transition linearly with
respect to time from initial point to final point, eg: (T1,V1) to (T2,V2) to (T3,V3), etc. PSpice allows for
eight pairs of end points for the waveform.

Figure 2.33 Piecewise Linear Voltage Source And Current Source

Figure 2.34 Characteristics of a Piecewise Linear Voltage Source

28
Stimulus Source, VSTIM and ISTIM
Another method that can be used to generate the transient time varying waveform is using the stimulus
source. Figure 2.35 shows the stimulus voltage source and stimulus current source.

Figure 2.35 Stimulus Voltage Source And Current Source

To set the internal property of VSTIM or ISTIM, select the targeted part. Next, CLICKR and click ‘Edit PSpice
Stimulus’ to open the ‘Stimulus Editor’. In the “New Stimulus’ window, choose and set the internal
property of the desired stimulus source as explained before.
You can also select the targeted part and click ‘Edit > PSpice Stimulus’ from the top menu to open the
editor. Figure 2.36 shows the ‘Stimulus Editor’.

Figure 2.36 Stimulus Editor

29
2.6 DC Circuit Analysis
Circuit in Figure 2.8 shows you how to analyze a DC circuit using general time domain analysis setting.
PSpice is also capable of performing more complex analyses to develop circuit tolerant of variations in
expected operating conditions and component values. Other types of analyses that can be set are:
 Parametric Sweep
 DC Primary Sweep
 DC Nested Sweep

Parametric Sweep
Consider a circuit as shown in Figure 2.35. You need to add curl braces to the sweeping component. Search
for ‘Param’ to place the ‘Parameters:’.

Figure 2.35 Parametric Sweep Circuit

To run parametric analysis, set the

‘Simulation Settings’ window as shown in
Figure 2.36.
Firstly in ‘General Settings’ option, set the
RTT to 8ms.
Next, check the ‘Parametric Sweep’ option
and set the variable settings as depicted.
Finally, Run PSpice and add V(R1:1) to
generate the output waveforms at R1 as
shown in Figure 2.37.

V(R1:1 plot, the :1 and :2 is the terminal of the

components. If the pins are rotated, then you will be
able to plot at the terminal given. The plot here shows
the resistor is connected and measured at :1. You
might need to measure at :2 to get the same
Figure 2.36 Parametric Sweep Settings waveform if your component is reversed in terminal.

30
 Figure 2.37 Sweeping Output Waveforms at R1

DC Primary Sweep
Consider a circuit as shown in Figure 2.38. In this circuit you need to observe the relation between VDC
and the voltage across R2 using a linear sweeping.

Figure 2.38 DC Primary Sweep Circuit

In the ‘Simulation Settings’ window, change the ‘Analysis Type’ to ‘DC Sweep’. Make sure the ‘Primary
Sweep’ option is checked. Set the variable settings as shown in Figure 2.39.

31
 0
50

Figure 2.39 DC Sweep Settings

Next, Run PSpice to generate plot as shown in Figure 2.40. Clearly from the plot you can see the
relationship between VDC and R2 when VDC changes. Use ‘Mark Label’ to precisely label the data
coordinate.

Figure 2.40 Sweeping Output Waveform Across R2

32
DC Nested Sweep
Consider a circuit as shown in Figure 2.41. In this circuit you need to plot the I-V characteristic of 2N3944
BJT. You will sweep collector-emitter voltage, VCE and base current, I1. The parameter that you need to
analyze is the collector current, IC(Q1).

Figure 2.41 DC Nested Sweep Circuit

In the ‘Simulation Settings’ window, change the ‘Analysis Type’ to ‘DC Sweep’. Make sure the ‘Primary
Sweep’ is checked and set the variable settings as shown in Figure 2.42. Then, check the ‘Secondary
Sweep’ and set the variables as shown in Figure 2.43.

Figure 2.42 Primary Sweep Variables

33
 Figure 2.43 Secondary Sweep Variables

Next, Run PSpice to generate plot as shown in Figure 2.44. The probe window shows the exact theoretical
I-V characteristic of Q2N3944 BJT. Use ‘Mark Label’ to precisely label the data coordinate.

Figure 2.44 Sweeping Output Collector Current

34
2.7 AC Circuit Analysis
PSpice can perform AC sweep analysis for a single frequency or multiple frequencies that vary linearly, by
decade or by octave. AC sweep is used for phasor and frequency response analysis and it will output the
Bode gain and phase plot. In this AC analysis, PSpice also can simulate for both time domain and frequency
domain. The components that usually used for the frequency domain analysis are VAC and IAC as shown
in Figure 2.45. For the time domain analysis, VSIN and ISIN are used to represent the source. Besides
displaying the output traces in the probe window, another alternative is using pseudo components to
send results to the output file. Figure 2.46 shows the pseudo components that are used to print and plot
the output traces in the output file. This method is usually used in the frequency domain analysis.

Figure 2.45 VAC and IAC

Figure 2.46 Pseudo components

Table 2.6 summarizes the general usage of the pseudo components. These components will command
PSpice to show all the desired outputs in the output file.

Table 2.6 Print and Plot pseudo components

Symbol Description
IPLOT Plot showing branch current; symbol must be placed in series
IPRINT Table showing branch current; symbol must be placed in series
VPLOT1 Plot showing voltage at the node to which the symbol is connected
VPLOT2 Plot showing voltage potential across a component to which the symbol is connected
VPRINT1 Table showing voltage at the node to which the symbol is connected
VPRINT2 Table showing voltage potential across a component to which the symbol is
connected

The internal properties for all of them are AC, DC, DB, TRAN, REAL, IMAG, MAG and PHASE.
To print or plot the property in the output file, simply set the preferred value using ‘Yes’ or ‘OK’.
To disable the property, just leave blank to ignore the value.
The procedures for using PSpice for AC analysis are quite similar to that required for DC analysis.
Now, you will try to draw and simulate circuit for both:
 Time domain analysis
 Frequency domain analysis

35
Time Domain Analysis
Consider an AC circuit as shown in Figure 2.47. Use VSIN for the AC source to simulate in the time
domain analysis.
In the ‘Simulation Settings’, choose ‘Time Domain’ analysis and set the RTT to 60ms for a complete three
full cycles. Figure 2.48 shows the real-time waveform output of the AC source.

Figure 2.47 AC Circuit in Time Domain Analysis

Figure 2.48 Real-time AC Waveform

36
Frequency Domain Analysis
Consider an AC circuit as shown in Figure 2.49 and the redrawn PSpice Capture schematic as shown in
Figure 2.50. Use VAC for the AC source to simulate the circuit in the frequency domain analysis.

Figure 2.49 AC Circuit

Figure 2.50 PSpice Capture Schematic Circuit

Firstly, you need to convert the VAC sine function to cosine function and determine the circuit
frequency.
 20sin2t V = 20 cos(2t-90o) V
 f = ω/2π = 0.31831Hz

37
Next, input the magnitude and phase of VAC, L and C.
Always remember the unit for inductor is ‘Henry’ and the unit for capacitor is ‘Farad’.
Input also the gain value for F using ‘Edit Property’.
Observe the polarity of IPRINT.

Set the internal properties for IPRINT as follows:

AC, MAG, PHASE ---- > yes
REAL, IMAG, DC, DB, TRAN ----- > leave blank

In the ‘Simulation Settings’, choose ‘AC Sweep/Noise’ for the analysis type and set the variables as shown
in Figure 2.51.

Run PSpice and it will pop up a blank probe

window with ‘Frequency’ at the X-axis.
Click to show the output file.
Scroll to the end of the output file and you
can see information as depicted in Figure
2.52. The results shown are the current
magnitude and phase current previously
enabled and set in IPRINT.

Figure 2.51 AC Sweep Simulation Setting

Figure 2.52 Simulation Output File for Figure 2.50

Finally, from the output file, you obtain the current, i value:
i = 6.243cos(2t +46.91o) A or i = 6.243↙46.91o A.
38
2.8 Miscellaneous
PSpice is very reliable and useful software to predict the behaviour of a circuit or to inspect waveforms at
your desired node. However, there are some limitations that need to be configured properly while
drawing the circuit in PSpice Capture. This is to avoid from getting error messages upon running PSpice.
Some of them are:
1. Always have the zero reference ground in your circuit.
Node 0 is the default node for circuit ground and it is the reference point for all voltages and
currents at any particular locations.
2. Avoid open circuit in your design.
PSpice cannot handle open circuit and will refuse to perform an analysis if it occurred. Be careful
when you use net alias in your design.
3. Avoid component loops.
PSpice cannot handle certain uninterrupted loops of components in a circuit, namely voltage
sources and inductors in DC analysis. This is because PSpice will treat inductor as a short circuit
and capacitor as an open circuit during steady state condition. Figure 2.53 shows the correct
configuration when using inductor in a DC circuit under steady state analysis. Simply add a very
small resistance value in series with the inductor to break the short circuit loop. 1pΩ is added to
each branch so as to not substantially impact the circuit operation.

Figure 2.53 Corrected Component Loops

Figure 2.54 shows the correct configuration when using series capacitors in a DC circuit under
steady state analysis. Simply add a very large resistance value in parallel with the capacitor to
allow a DC current path to each capacitor for analysis. 1TΩ is added in parallel with one of the
capacitors to allow the DC current path.

Figure 2.54 Corrected Series Capacitors

39
 Figure 2.55 shows the correct configuration for 3Φ delta connected AC supplies when drawn in
PSpice Capture. A very small bogus resistance is added in series with the VAC and a very large
resistance is tied to the reference ground for each branch.

Figure 2.55 Corrected 3Φ Delta Connected AC Supplies

4. Always check the component’s pins for correct current polarity.

In PSpice library, all pins are labeled using integer. For example, resistor with two terminals will
have one pin labeled with 1 and the other terminal labeled with 2. Pin1 is the default positive
terminal and Pin2 is the default negative terminal. Make sure you place the current marker at the
Pin1 to probe the correct positive current direction. This procedure is necessary when you rotate
a component in your circuit.

40
Example 2.1

Find Vo in the circuit of Figure 2.56.

Figure 2.56 for Example 2.1

Solution:
• Place and wire all components correctly.
• Add ‘0 GND’ to the reference point of the circuit.
• Place Voltage Marker at Vo.
• Choose ‘Time Domain’ analysis for the simulation settings (you may use any suitable value).
• Probe window should show Vo = 3.23V.

41
Example 2.2

Find the equivalent resistance of the circuit in Figure 2.57.

Figure 2.57 for Example 2.2

Solution:
• Connect a VDC source to the circuit (you may use any suitable value).
• Choose ‘Time Domain’ analysis for the simulation settings (you may use any suitable value).
• Run PSpice and hit ‘Insert’ to add the correct trace expression.

42
• Input V(V1:+)/ I(R7) in the ‘Trace Expression’ box (refer to the schematic circuit).
• Probe window should show Req = 6Ω.

43
Example 2.3

Find Ix in the circuit of Figure 2.58.

Figure 2.58 for Example 2.3

Solution:
• Connect all terminals for CCCS correctly. Check the source terminals and node terminals.
• Input the gain value of 2. Observe the CCCS polarity.
• Probe window should show Ix = 1.111A

44
Example 2.4

Find voltage potential across C1 at t = 0.7s for the circuit in Figure 2.59.

Figure 2.59 for Example 2.4

Solution:
• Place ‘Sw_tOpen’ and set the open time at t=0.6s.
• Choose ‘Time domain’ analysis and set the RTT value to 1s.
• Mark and label the cursor at t=0.7s.
• Probe window should show V(t)=1.7824V.

45
46
Example 2.5

Construct a circuit using one ‘Stimulus Voltage’ and one 500Ω resistor to generate a pulse voltage as
shown in Figure 2.60.

Figure 2.60 for Example 2.5

Solution:
• Place and connect one VSTIM and one 500Ω resistor in series.
• Set the internal property of VSTIM as shown in the solution.
• Set RTT to 1us using time domain analysis.

47
Example 2.6

Probe the current waveform passing L1 using time domain analysis for the circuit in Figure 2.61.

Figure 2.61 for Example 2.6

Solution:
• For the time domain analysis, use VSIN. Input 20 for the magnitude and 60 for the frequency.
• Set RTT to 40ms in the simulation settings.

48
Example 2.7

Obtain Vo for the circuit in Figure 2.62.

Figure 2.62 for Example 2.7

Solution:
• Frequency domain analysis is the best analysis to be used. Choose AC SWEEP for analysis type in
simulation settings.
• Place VAC and input the magnitude and phase.
• Place VCVS and set the gain to 2. Observe its polarity.
• Calculate the single frequency value, 400/2π = 63.66Hz.
• Place VPRINT1 across R3 and set AC, MAG and PHASE to ‘yes’.
• Run PSpice and view the Simulation Output File. It should show VM = 26.77V and VP = -74.47o.
• Vo = 26.77cos (400t – 74.47) Volt.

49
Example 2.8

Find V1 and V2 for the circuit in Figure 2.63. Assume ω = 1rad/s.

Figure 2.63 for Example 2.8

Solution:
• Frequency domain analysis is the best analysis to be used. Choose AC SWEEP for analysis type in
simulation settings.
• Place IAC and input the magnitude and phase. Observe the polarity of the current source (negative
terminal needs to be connected to the positive terminal of R2).
• Place VAC and input the magnitude and phase.

50
• Calculate the single frequency value, 1/2π = 0.1592Hz.
• Place VPRINT1 at V1 and V2 respectively and set AC, MAG and PHASE to ‘yes’.
• Run PSpice and view the Simulation Output File.
• V1 = 113.6↙5.32o Volt, V2 = 80.19↙12.8o Volt.

51
Example 2.9

Plot the current waveform passing through L1 in the circuit of Figure 2.64. Assume L1 has an initial current
value of 10mA.

Figure 2.64 for Example 2.9

Solution:
• Place and wire all components correctly.
• Using ‘Edit Part’ menu for L1, DCLICKL to open the user properties box. Input 10m at IC column.
• Using time domain analysis, set RTT to 70us.

52
Example 2.10

Determine the frequency response of the filter circuit in Figure 2.65 from 1Hz to 1kHz. Plot and compare
both magnitude and phase for the voltage across C2 in a single probe window. V1 is a sinusoidal signal
generator having 1V magnitude and zero phase angle.

Figure 2.65 for Example 2.10

Solution:
• Frequency domain analysis is the best analysis to be used. Choose AC SWEEP for analysis type in
simulation settings.
• Set ‘AC Sweep Type’ to Linear, Start frequency = 1, End frequency = 1000 and Total points = 200.
• Place voltage marker at C2.
• Run Pspice to display the voltage across C2.
• To compare both magnitude and phase in a single probe window, use ‘Add Plot to Window’ menu.
• To display the phase angle for C2, input VP(C2:1) in the Trace Expression box.

53
2.9 Additional Reading
These are some additional textbooks for your references:
1. Joseph G. Tront, PSPICE for Basic Circuit Analysis, McGraw Hill, 2005.
2. Alexander & Sadiku, Fundamentals of Electric Circuits 6th Edition, McGraw Hill, 2017.
3. Paul Tobin, PSpice for Circuit Theory and Electronic Devices, Morgan & Claypool Publisher, 2007.
4. Dennis Fitzpatrick, Analog Design and Simulation Using OrCad Capture and PSpice, Newnes, 2012.
5. PSpice resources, https://www.pspice.com/resources.

54
Test Your Skills:

Find i? [Ans: 1.6A]

Determine equivalent resistance of the circuit. [Ans: 3kΩ]

55
Determine V1 and V2. [Ans: 0V, 12V]

Find voltage potential across 5Ω resistor? [Ans: -8.33V]

56
Find the ammeter and voltmeter reading. Assume ω=1rad/s.
[Ans: IM=7.354A, IP=-11.32o, VM=73.53V, VP=-48.18o]

Design a circuit to generate the pulse waveform shown.

57
Chapter 3: Schematic Design Using OrCAD Capture

3.1 Introduction to Schematic Diagram

There are many methods used to represent the circuit properties of a system such as by using schematic
diagram, single line diagram, pictorial diagram, block diagram and many more. Among these diagrams,
schematic and single line are the most commonly used to describe an electronic or electric circuit. Both
diagrams show enough graphical information to depict the components, connections and behaviour of a
circuit. Figure 3.1 shows the diagrams for schematic and single line.

Figure 3.1 (a) Schematic Diagram (b) Single Line Diagram

Table 3.1 shows the characteristic differences for these diagrams. Typically, schematic is used widely in
electronic circuit while single line diagram is mainly used in electrical circuit or system. Single line diagram
is also known as one-line diagram.

Table 3.1 Schematic and Single Line Diagram Characteristic

Schematic Diagram Single Line Diagram
 A representation of a circuit/system using  A blueprint for electrical system analysis
abstract, graphic symbols rather than and a simplified notation to represent a
realistic pictures. circuit/system.
 Commonly use in electronic design.  Commonly use in three phase electrical
 A map to designing, building, and system.
troubleshooting circuits.  A first step in preparing a critical response
 It shows connections in a circuit in a way plan, thus familiarising user with the
that is clear and standardized. electrical distribution system layout and
 It shows connections, component names design.
and values and all essential information of  It shows how the main components of the
the circuit/system. electrical system are connected, including
redundant equipment and available
spares in a simpler way compared to
schematic. It shows a correct power
distribution path from the incoming
power source to each downstream load.
58
3.2 Creating a New Schematic Project
The main difference between creating a schematic project and a PSpice project is; in schematic design you
do not have any intention to simulate or forecast the behaviour of your circuit. The intention is solely to
draw and show the completeness of a circuit including all components involved, connections and related
internal parameters. In other word, creating a new schematic project is relatively a simple and joyous task
to show a circuit and it is less complex compared to the PSpice project.
In this schematic project, the main objective is to generate a correct and working ‘Layout netlist file’
(*.mnl) to be used later in designing printed circuit board (PCB) artwork.
In this section you will use a lot of similar steps in Chapter 2 such as adding libraries, placing component,
connecting components, net aliasing and inputting part’s properties in order to create a new schematic
project.
Figure 3.2 will be used as your example circuit to be redrawn in OrCAD Capture schematic circuit.

Figure 3.2 5V Regulator Circuit

From the top menu, click ‘File > New > Project’ to
create a new project.
Remember to choose ‘Schematic’ option because
this project is intended to draw schematic and
wiring diagram of Figure 3.2 only.
Figure 3.3 shows the ‘New Project’ window. Name
the new project to ‘5V Regulator Circuit’.
Click OK to display the schematic page.
Next, use all steps as explained in Chapter 2 to add
libraries, connect components and inputting
component’s value.
For Capture Schematic, you have the freedom to
add any libraries that you prefer from the
‘.../Orcad/Capture/ Library’ and it is not limited to
‘PSpice’ subfolder only.

Figure 3.2 New Project Window

59
The components that you need to place are BATTERY, LM7805, R and LED. Figure 3.3 shows the complete
schematic circuit of Figure 3.2. Note that by default, LM7805 will only have two terminals.
In the next section you will learn how to make visible the hidden pins of a component using ‘Edit part’
menu. Label also the nets as shown in Figure 3.3 using ‘Place Net Alias’.

Figure 3.3 Schematic Circuit of Figure 3.3 as drawn in OrCAD Capture

3.3 Edit Part Menu

Typically, by default the terminals for power and ground pin for integrated circuit (IC) are hidden in the
graphical symbol. Sometimes the pin needs to be visible in order to show the complete connection of a
circuit especially when the circuit is complex and integrated with different power and ground types.

Now you will make visible the third pin of LM7805

using ‘Edit Part’ menu. The pin name is GND.
Select LM7805, CLICKR and click ‘Edit Part’ to open
the ‘Part Editor’.
DCLICKL the ‘+’ sign to open the ‘Pin Property’
window. Set the ‘Shape’ to ‘Line’ and check the ‘Pin
Visible’ checkbox.
Figure 3.4 shows the settings for ‘Part Editor’ for
LM7805.

Figure 3.4 LM7805 Part Editor

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Click OK and you will have a three pins LM7805 in your editor. Close the editor and update the part to go
back to the schematic page. Next, connect the new visible pin to GND as shown in Figure 3.5.
Notice that in schematic, placing a ground symbol is not mandatory as in PSpice.

Figure 3.5 Schematic Circuit of Figure 3.2 with all Pins Visible

Beside from making visible the hidden pin, this menu is also used to alter a lot of the physical symbol of a
component. Some of them are:
 To alter the pin arrangement – CLICKLH a pin to move the targeted pin to a new location.
 To hide/unhide pin names and numbers – DCLICKL anywhere on the editor page to open the ‘User
Properties’ window in order to alter the component internal properties.
 To place IEEE symbol – Click to place any desired IEEE symbols in the editor.
 To place pin – Click to place new pin to the selected symbol.

The final step before you can archive your project is to generate the Layout netlist file. This file is needed
in Layout session in order to create the initial environment of that circuit artwork.

3.4 Layout Netlist Generation

Before you can generate a Layout netlist file, some steps required are to annotate the design and to
perform the electrical and physical rules check to the circuit. This task can be performed using ‘Tools’
toolbar or using ‘Tools’ top menu.
In order to activate the hidden menu, you need to restore down the schematic page.
Next, highlight the project design in the Project Manager to activate the ‘Tools’ toolbar
or the ‘Tools’ top menu. Three icons that you need to click and configure are
‘Annotate’, ‘Design Rules Check (DRC)’ and ‘Create Netlist’. The steps required are shown in Figure 3.6.

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 Figure 3.6 Layout Netlist File Generation

Step 1: Highlight design name to activate the ‘Tools’ toolbar and ‘Tools’ top menu.
Step 2: Click ‘Annotate’ icon and in the settings, leave everything intact.
Step 3: Click ‘Design Rules Check’ (DRC) icon to open the ‘Design Rules Check’ window. Set your
preferred settings and make sure the report file path is correct with the *.drc file.
Step 4: Click ‘Create Netlist’ icon to open the ‘Create Netlist’ window. Choose the ‘Layout’ tab and set
the settings as shown in Figure 3.7. Make sure the netlist file path is correct with the *.mnl file.

You can set the ‘Options’ for user

properties either in inches or in
millimeters. This option will
determine what you will choose for
the technology or board template in
the Layout session later.
If you choose inches, the
technology file that you need to
choose is DEFAULT.TCH whereas for
millimeters, you need to choose
METRIC.TCH.
After you click OK, you should see
two output files in the Project
Manager namely *.drc and *.mnl.
If you configured everything
correctly, the session log will show:
Processing complete with no errors,
Done.
To display the session log, click the
‘Window > Session Log’ from the
top menu.
Figure 3.7 Create Netlist Settings

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3.5 Connection Simplification
Usually for a simple circuit, you will use wire a lot to connect between components. However, when the
complexity of a circuit is increased, different connecting methods need to be introduced in the circuit.
This is to simplify the connections and to make the schematic page looks less dense. Aside from the normal
wire connection, these are five methods that you may use to simplify circuit connections:
1. Assigning Net Alias
2. Placing Off-page Connector
3. Placing Alternative Power Symbol
4. Placing Alternative Ground Symbol
5. Assigning Bus Connection
Figure 3.8 shows the connection simplification using these five methods to connect components together.

header 5

Figure 3.8 Connection Simplification in OrCAD Capture

Assigning Net Alias

Create a short wire at all terminals that need to be connected together. Click ‘Place Net Alias’ icon
and assign similar net alias at all connected terminals.

Placing Off-page Connector

Create a short wire at all terminals that need to be connected together. Click ‘Place Off-page Connector’
icon and connect the off-page connector to the short wire. You can choose either OFFPAGELEFT-L or
OFFPAGELEFT-R for your simplification. Typically, OFFPAGELEFT-L is use for incoming connection (input)
while OFFPAGELEFT-R is use for outgoing connection (output). Assign similar off-page connector name at
all selected terminals. The library for this connector is ‘CAPSYM’.

Placing Alternative Power Symbol

Create a short wire at all terminals that need to be connected together. Click ‘Place Power’ icon and
choose your desired ‘VCC power symbol’ to be connected at the created short wire. You may use similar
or different symbols as long as the symbols have same name. The library for this connector is ‘CAPSYM’.

63
Placing Alternative Ground Symbol
Create a short wire at all terminals that need to be connected together. Click ‘Place Ground’ icon and
choose your desired ‘GND symbol’ to be connected at the created short wire. You may use similar or
different symbols as long as the symbols have same name. The library for this connector is ‘CAPSYM’.

Assigning Bus Connection

The bus connection is a connector or set of wires that provides certain data transportation. Typically, bus
is used to represent the data connection for input, output and address in microprocessor and
microcontroller IC where a lot of wires need to be stranded together. In order to use the bus function
correctly, you need to apply these three steps for bus configuration in OrCAD Capture:
1. Create a short wire at all intended terminals and assign unique net alias.
2. Click ‘Place Bus Entry’ icon to place the bus entry at the short wire created earlier.
3. Click ‘Place Bus’ icon to connect all intended wires to the bus.
4. Assign ‘Bus Alias’ with correct format using . Bus names and aliases have the form of X[m..n].
X represents the ‘basename’ while [m..n] represents the range of signals carried by the bus. Note
that ‘m’ may be less than or greater than ‘n’. Both A[0..3] and A[3..0] are valid bus aliases. You
can use two periods (..), a colon (:), or a dash (-) to separate ‘m’ and ‘n’. Figure 3.9 shows an
example of a complete bus connection.

Figure 3.9 Complete Bus Connection Schematic

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3.6 Inputting the Component’s Footprint
One of the important information that contains in the Layout netlist file is the actual physical dimension
and specifications of a component. This physical information is called ‘footprint’. Footprint is the physical
description of a component and it consists of three elements which are padstacks(thrucodes), obstacles,
and text.
There are two methods that can be utilized to input the footprint name:
1. Method one - using ‘Edit Properties’ menu in OrCAD Capture where you will type the complete
footprint names for all components.
2. Method two - using ‘AutoECO’ dialog box in the Layout software to link the missing footprint
name. This method will be explained in details in Chapter 4.
Sometimes for a circuit with plenty of components, you will need to combine both methods to produce a
correct and working PCB artwork file.
Referring to Figure 3.5, you will use method one to input all component’s footprint using ‘Edit Properties’
menu. The component footprint’s names are as follows:
1. Battery (BT1) - BLKCON.100/VH/TM1SQS/W.100/2
2. LM7805 (U1) - TO225AB
3. 100Ω R (R1) - AX/.325X.100/.031
4. LED (D1) - DAX2/DO204AR
Select all components or press Ctrl+A to highlight all components. CLICKR and click ‘Edit Properties’ menu
to open the ‘Property Editor’. Follow steps as shown in Figure 3.10 to input the component’s footprint
name.

Step 1: Choose ‘Parts’ lower tab.

Step 2: Filter selection by ‘Orcad-
Capture’.
Step 3: Input all footprints in the
PCB Footprint column.
Step 4: Click apply to save the
values and then close the editor.

Finally, generate a new Layout

netlist file with all footprints
compiled together. The steps are
similar as explained in section
3.4.

Figure 3.10 ‘Edit Properties’ menu for footprint inputting

65
Test Your Skills:

Draw the schematic circuit using OrCAD Capture. Generate the netlist file.

Draw the schematic circuit using OrCAD Capture. Generate the netlist file.

66
Chapter 4: Artwork Creation Using OrCAD Layout

4.1 Introduction to OrCAD Layout

A typical printed circuit board design has five key phases namely circuit schematic, component placement,
board routing, post processing and intertool communication. You have completed the schematic design
level using OrCAD Capture as explained in Chapter 3 and able to generate a working Layout netlist file
(*.MNL) using the DRC toolbox. The next step is to optimize and enhance the board design level using
OrCAD Layout.
Remember the Layout netlist file describes the interconnections of a schematic design using the names
of the signals, components, and pins. A netlist file (*.MNL) contains the following information:
 Footprint names
 Electrical packaging
 Component names
 Net names
 The component pin for each net
 Net, pin, and component properties
Figure 4.1 shows the board design flow to illustrate the complete processes to fabricate a PCB using OrCAD
software package.

Figure 4.1 Flowchart of a Typical Board Design

From the flowchart, typical board design tasks are as follows:

 Creating the board. Using Capture, you create a netlist from your schematic that may include your
design rules to guide logical placement and routing, and then load the netlist into Layout.
 Specifying board parameters. You specify global settings for the board, including units of
measurement, grids, and spacing. In addition, you create a board outline and define the layer
stack, padstacks, and vias.
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  Placing components and checking the placement. You use the component tool to manually place
components on the board individually or in groups. You then check the placement using
placement information from a variety of sources.
 Routing the board and checking the routing. You route the board, and can take advantage of push-
and-shove (a routing technology), which moves tracks to make room for the track you are
currently routing. You then check the routing using routing information from a variety of sources.
 Finishing the board. Layout supplies an ordered progression of commands on the Auto menu for
finishing your design. These commands include Design Rule Check, Cleanup Design, Rename
Components, Back Annotate, Run Post Processor, and Create Reports.

It is very important to know some of the important terminologies used in Layout. Figure 4.2 shows an
example of a double-sided PCB artwork produced using Layout showing all terminologies used.

Figure 4.2 Terminologies in Layout’s Artwork

The terminologies are:

 Obstacle - An area to restrict where components and tracks can be placed on a board.
 Padstack - A numbered list of component pin or via stack descriptions. Each description contains
a pad or via definition, including layer, style, drill diameter, size, offset and solder mask guard
width.
 Net - A logical construct that originates in a schematic and is transferred to a board to describe
required electrical connections. The connections may be completed using vias, tracks, or zones.
 Via - An electrical connection between layers in a physical electronic circuit that goes through the
plane of one or more adjacent layers. It is also known as vertical interconnect access and has three
common types namely thru-hole, buried and blind via.
 Layer - One in a series of levels in a board on which tracks are arranged to connect components.
Vias connect tracks and zones between layers.
 Footprint - The physical description of a component. It consists of three elements;
padstacks(thrucodes), obstacles, and text.
 Datum - The initial (0,0) coordinate of a board.
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In general, there are three common methods to create printed circuit board which are:
 create a board from scratch using technology template (*.TCH)
 create a board using a board template (*.TPL)
 import a 3rd party board to Layout using translator
Each method has its own purpose and benefit depends on how you plan to design your board.

Layout has a unique feature called

Automatic Engineering Change
Order (AutoECO). AutoECO
combines a board or technology
template and a schematic netlist
(*.MNL) to produce a Layout board
file (*.MAX) that contains all of the
board’s physical and electrical
information. Figure 4.3(a) shows
the flowchart to create a new
board design in Layout and Figure
4.3(b) shows the AutoECO role in
board creation.

Figure 4.3 (a) Creating a New Board Design Flowchart

(b) AutoECO Role in Board Creation

The first step that you need to do before you place the components in your Layout workspace is to set up
the board. There are many steps involved in the setup process but not all of them are necessary for every
board. Some of the steps are as follows:
 Load board template  Define vias
 Set the units of measurement  Optimize component properties
 Set system grids  Set net properties
 Measure board dimension  Add mounting hole
 Create board outline obstacle  Set global spacing
 Define the layer stacks
 Define padstacks

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4.2 Creating a New Printed Circuit Board Design
In this example you will create a PCB artwork using the Layout netlist file (*.MNL) of Figure 3.5 generated
earlier. You will create a board from scratch and use only the basic technology file. There are two common
basic technology files namely DEFAULT.TCH for conventional unit and METRIC.TCH for metric unit. Based
on your preferred ‘Option’ as in Figure 3.7, you need to choose either DEFAULT.TCH or METRIC.TCH
technology file as your template file. Assume you select ‘User Properties are in millimeters’ for your
option, therefore you need to load METRIC.TCH as your template file.
From the start menu, choose the ‘Layout Plus’ to open OrCAD Layout. Once you open the Layout, from
the top menu click ‘File > New’ to load your suitable technology file. The default directory path for these
templates is ‘.../Orcad/Layout_Plus/Data’. Browse for METRIC.TCH and click OK.
Next, load the netlist source (*.MNL) of Figure 3.5 which is ‘5V REGULATOR CIRCUIT.MNL’ from your
stored directory and click Open. Finally, save your new board file with ‘5V REGULATOR CIRCUIT.MAX’
before continuing with more advanced parameters settings. Actually, all these steps taken are
demonstrated as in Figure 4.3(b).

Obviously if you use ‘Method one’ and

input all footprints correctly as
described in section 3.6, you will get
an initial Layout environment as
shown in Figure 4.4.

Figure 4.4 Initial Layout Environment Using Method One

If you use ‘Method two’ or inputting

wrong footprint for a component, an
‘AutoECO’ dialog box will pop up for
you to rectify the problem as shown in
Figure 4.5. You may choose any option
that you prefer to continue with the
board setup.
Some of the common error that will
automatically pop up the ‘AutoECO’
box is missing footprint, discrepancy in
footprint pin number and discrepancy
in footprint pin name.

Figure 4.5 AutoECO Dialog Box Using Method Two

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Table 4.1 shows the full lists of technology template that you can choose and load to create your new
board from scratch.

Table 4.1 Technology template files

Technology file Description

1BET_ANY.TCH Based on Level A as described above, a standard DIP IC pin has 62-mil pads
and 38-mil drills. Routing and via grids are 25 mils, the placement grid is 100
mils, and route spacing is 12 mils.

2BET_SMT.TCH Based on Level B as described above, it is used for surface mount or mixed-
technology boards. A standard DIP IC pin has 54-mil pads and 34 mil-drills.
Routing and via grids are 81/3 mils, the placement grid is 50 mils, and route
spacing is 8 mils.

386LIB.TCH Used to translate files from OrCAD PCB386+.

3BET_ANY.TCH Based on Level C as described above, a standard DIP IC pin has 50-mil pads
and 34-mil drills. Routing and via grids are 121/2 mils, the placement grid is
50 mils, and route spacing is 6 mils.

CADSTAR.TCH Used to translate files from CadStar.

CERAMIC.TCH Used to set up ceramic chip modules.

DEFAULT.TCH Default technology template for typical boards. Based on Level A, a standard
DIP IC pin has 62-mil pads and 38-mil drills. Routing and via grids are 25 mils,
the placement grid is 100 mils, and route spacing is 12 mils.

HYBRID.TCH Used for hybrid chips

JUMP5535.TCH Used for single-layer boards with 55-mil vias and 35-mil drills.

JUMP6035.TCH Used for single-layer boards with 60-mil vias and 35-mil drills.

JUMP6238.TCH Used for single-layer boards with 62-mil vias and 38-mil drills.

MCM.TCH Used for setting up multichip modules.

METRIC.TCH Used for metric boards. If you are designing a board that is using metric units,
you should start with the METRIC.TCH technology template to achieve the
best precision.

PADS.TCH Used to translate files from PADS.

PCAD.TCH Used to translate files from P-CAD.

71
 PROTEL.TCH Used to translate files from Protel.

TANGO.TCH Used to translate files from Tango.

TUTOR.TCH Used with Layout’s online tutorial.

For a design with known board specification, board templates (*.TPL) can be used as a foundation to build
your board. Layout has approximately 70 board outlines that you can choose and all these templates use
the same design rules as described for DEFAULT.TCH in Table 4.1.
The most common unit used to design a board is ‘mil’ which is actually one thousands of an inch.

Figure 4.6 PCB Unit Conversions

4.3 Specifying Board Parameters

The second stage after you created the board file (*.MAX) is to specify all parameters related with your
board. This is the most important stage in Layout where you will set paramount parameters for unit
measurement, outline obstacle, layer, padstack, net, via and many more.
In this example, you will use only specifications in Box 4.1 for your PCB artwork in order to limit the
complexity of your board design.

Box 4.1 PCB Specifications

- Schematic circuit of Figure 3.5
- Board measurement of 5cm x 5cm
- Double layer PCB
- 20mil (0.051cm)net size
- Through hole device (THD) footprint

72
 Disable online DC first

Setting Unit Measurement

From the Top Menu, click ‘Options > System Settings’ to open the system settings window as shown in
Figure 4.7. Here you can change the display unit, grids position and page size.
After you select the correct template file
to create your design, you can freely
change the unit here as needed but it is
strongly recommended that you stick
with the decided unit measurement in
the netlist file (*.MNL).
Change the unit to ‘Centimeters’ to follow
the board specifications in Box 4.1 and
click OK.

Figure 4.7 System Settings Window

Toggle off the online DRC icon at the top toolbar to deactivate the online DRC.
Next, you need to measure and display the board dimension of 5cm x 5cm before a board outline can be
placed in the workspace.
From the Top Menu, click ‘Tool > Dimension > New’. You should see a small cross in the workspace
indicating an active state. CLICKR and click ‘Properties’ to open ‘Autodimension Options’ as shown in
Figure 4.8. Decide your best options then measure and display the board dimension as in Figure 4.9.

Figure 4.8 Autodimension Options Figure 4.9 Board Dimension in Centimeters

73
Creating a Board Outline (Obstacle)
Layout requires one compulsory board outline on the global layer for a board creation. This board outline
is called obstacle. Before you proceed with the outline creation, you need to place the Datum to provide
a starting grid for component placement.
From the Top Menu, click ‘Tool > Dimension > Move Datum’ and move the datum to lower left corner of
your measured board dimension. This will give you a new initial (0,0) coordinate of your design. You can
always check the coordinates of elements at the status bar located at the bottom of the design window.

Next, you need to create a global layer board outline

obstacle to restrict where components and tracks
can be placed on a board. From the Top Menu, click
‘Tool > Obstacle > New’ or you can simply click the
Obstacle icon from the toolbar, CLICKR and click
‘New’. The big cross cursor will change to a small
cross indicating an active state. CLICKR and click
‘Properties’ to open the ‘Edit Obstacle’ window as
shown in Figure 4.10. You can rename the obstacle
and set a new width for the board outline obstacle.
Click OK.
Move the cursor to the datum position (0,0) then
CLICKL to insert the first corner. Continue clicking
the left button to insert corners. After the last
corner, CLICKR and choose ‘Finish’ to complete the
board outline. Figure 4.11 shows the complete
global layer board outline design.
Figure 4.10 Edit Obstacle Window
Besides using an angle obstacle, you can
also create a circular obstacle. Click the
Obstacle icon, CLICKR and click ‘Arc’. Drag
the cursor to create a circle and CLICKL to
stop drawing.
To delete an obstacle, press and hold the
‘Ctrl’ key and select an obstacle. The
chosen obstacle will change to white
colour. Hit ‘Delete’ key or CLICKR and
choose ‘Delete’ to delete the entire
obstacle.
Press and hold the ‘Ctrl’ key and select an
obstacle also can be used to perform
additional tasks such as copy, rotate,
mirror and move.
To refresh the screen, hit the ‘Home’ key.

Figure 4.11 Complete Global Layer Board Outline Design

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After you created the global layer border outline obstacle in your artwork, you can add additional
obstacles into the design. The most common types of obstacles are copper pour, insertion outlines and
place outlines. Table 4.2 simplifies the full obstacle types and its description.

Table 4.2 Obstacle Types

Obstacle Type Description

Anti-copper A copper-free area within a copper pour zone.

Board outline A line that defines the board edge for routing and placement. There can be
only one board outline per board, and it must be on all layers (Global layer).

Comp group keepin An area you define to contain all components of a certain group.

Comp group keepout An area you define to exclude all components of a certain group.

Comp height keepin An area you define to contain all components of a certain height or greater.

Comp height keepout An area you define to exclude all components of a certain height or greater.

Copper area A copper-filled zone on the board that can be used for noise suppression, to
draw heat away from components that tend to get hot, or as a routing barrier.
It can be assigned to a net or attached to a component pin. It doesn’t affect
placement. It can be filled with hatched lines or it can be solid.

Copper pour A copper-filled zone on the board that features automatic voiding where there
are tracks or pads. Tracks can pass through it. Copper pour can be used for
noise suppression, shielding, to draw heat away from components that tend
to get hot, or to isolate signals. It can be assigned to a net or attached to a
component pin. It doesn’t affect placement. It can be filled with hatched lines
or it can be solid. It repours when you choose the refresh all toolbar button.

Detail A line not used in placing or routing used for silkscreens, drill information, and
assembly drawings, which can be attached to footprints.

Free track A line or track that can be assigned to a net or attached to a component pin.
A free track obstacle may appear on the artwork and act as a routing barrier
unless the track belongs to a net. A free track obstacle doesn’t affect
placement.

Insertion outline An insertion outline defines the size and shape of a component, to allow for
the insertion machine’s head dimensions without hitting another component.
It is usually defined in the footprint library as a part of the footprint.

Place outline A place outline defines the outline of the component, plus clearance, and is
used to maintain spacing between parts. Both interactive placement and
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 autoplacement routines need this information. A place outline can exist on
the top or bottom layer for surface-mount parts, or on all layers for through-
hole parts.

Route keepout An area you define that excludes routes.

Route/via keepout An area you define that excludes routes and vias.

Via keepout An area you define that excludes vias.

To insert other obstacle types in the design, simply repeat the procedure on how to create the global layer
board outline except in the ‘Obstacle Type’ drop-down list, choose your preferred obstacle to be created
in the design. Figure 4.12 shows PCB samples of mixed obstacles in one board design.

Figure 4.12 PCB artwork with mixed obstacles

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Defining the Layer
Layer is a level in a board on which tracks are arranged to connect components. To connect from one layer
to other layers, vias are used accordingly. There are three types of manufactured PCB commonly known
as single-sided PCB, double-sided PCB and multi-sided PCB. From these three main categories, they then
will be divided into more specific specifications based on industrial standards.
Single-sided PCB is a board with only one side with copper or conductive material to arrange the nets. It
is the easiest board to design and can be manufactured quickly. It is also very suitable for low density and
low components count design and very cost effective. Double-sided PCB is a board with both sides clad
with copper or conductive material to place nets. Vias will connect tracks from one layer to another layer
and a process called through-hole plating need to be used to deposit conductive material through the
through-hole padstacks connecting both layers. Multi-sided PCB is the most complex board to
manufacture and a lot of optimizations are needed to create this board design. This board is an excellent
choice for a super dense and high speed design. The size of a board also can be reduced significantly using
this type and it has the highest production cost compared to the other two types. These three board types
can accommodate and suitable to use with through hole devices (THD) and surface mount devices (SMD).
A lot of time, THD and SMD are combined together in a board design and manufactured using through-
hole technology and surface mount technology (SMT).
To define layers in Layout, you need to use the spreadsheet. Using the spreadsheet, you can define the
number of layers that will be used in your board design. Based on Box 4.1, you will need to design a
double-sided PCB which means the ‘Top’ and ‘Bottom’ layers need to be enabled.

From the Top Menu, click ‘Tool > Layer > Select From Spreadsheet’ or click the ‘View Spreadsheet’ icon
and choose ‘Layers’ from the toolbar. A ‘Layers’ spreadsheet window will appear as shown in Figure
4.13. From the spreadsheet, DCLICKL ‘TOP’ layer to open the ‘Edit Layer’ window. Change the ‘Layer Type’
to ‘Routing Layer’ and then click OK. Repeat with the ‘BOTTOM’ layer. Alternatively, you may also highlight
your desired layer name,
CLICKR and click ‘Properties’ to
open the ‘Edit Layer’ window.
If you changed a routing layer
to a plane layer, change the
‘LibName’ to ‘PLANE’.
Plane is simply a coppered clad
layer with no tracks and usually
used for power and ground
signals and generally located on
the inner layers.
You can check the enabled
routing layer name using the
layer drop-down list.

Figure 4.13 Layers Spreadsheet

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Table 4.3 shows the layer name and its description and Figure 4.14 shows the default layer colour for
obstacle, text and net.

Table 4.3 Layer Name

Layer Name Description
TOP Top side copper
(usually routing)
BOTTOM Bottom side copper
(usually routing)
GND Ground layer (a plane layer)
POWER Power layer (a plane layer)
INNER1 Inner layer 1 (routing or
plane)
INNER2 Inner layer 2 (routing or
plane)
INNERx Inner layer x (routing or
plane)
SMTOP Top side soldermask
SMBOT Bottom side soldermask
SPTOP Top side solder paste
(for SMD only)
SPBOT Bottom side solder paste
(for SMD only)
SSTOP Top side silk screen
SSBOT Bottom side silk screen
ASYTOP Top side assembly
ASYBOT Bottom side assembly
DRLDWG Drill information
DRILL Drill information
FABDWG Drill information
NOTES Board outline info
Figure 4.14 Default Layer Colour

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Defining the Padstacks and Vias
Padstacks is a numbered list of component pin or via stack descriptions. Each description contains a pad
or via definition, including layer, style, drill diameter, size, offset and solder mask guard width. In a simpler
word, padstacks define the pads of the footprint. In Layout footprint library, there are seven standard
padstacks types namely T1 through T7. Table 4.4 simplifies the definition used in each padstack.

Table 4.4 Padstack Definiton

Type Definition
T1 Round IC pads
T2 Square IC pads
T3 Round discrete pads
T4 Square discrete pads
T5 Round connector pads
T6 Square connector pads
T7 Via SMT stringer pads

To define padstacks, click ‘Tool > Padstack > Select from Spreadsheet’ or click ‘View Spreadsheet’ icon
and choose ‘Padstacks’ from the toolbar. A ‘Padstacks’ spreadsheet window will appear as shown in Figure
4.15.
Select and highlight a padstack that is
similar to the one that you want to
create. CLICKR and then choose ‘New’
from the pop-up menu. A new
padstack is added at the bottom of the
spreadsheet. Select the new padstack
and choose Properties from the pop-
up menu and change the desired
values accordingly.

Figure 4.15 Padstacks Spreadsheet

79
 The easiest way to define it is by
targeting each footprint individually.
Click the ‘Component Tool’ icon
and select any footprint that you want
to modify. Assume you select
BATTERY, BT1. Hit ‘Esc’ key and open
the ‘Padstacks’ spreadsheet. The
spreadsheet will automatically
highlight the footprint that you
selected earlier as shown in Figure
4.16. You may change the pad values
accordingly.
For both cases, to add a drill hole to the
padstack, define a round padstack on
the drill layer. Copper clearance
around the drill hole is created by a
round padstack on each plane layer
that is larger than the drill size.
Figure 4.16 Targeted Padstacks Spreadsheet

For double-sided and multi-sided board, Layout automatically assigns vias to the design. You can define
the types of vias that you want to use when routing your board, either vias or free vias (denoted by the
letters FV). Layout regards free vias as stand-alone components, therefore you can shove them, place
them in isolation (free of tracks), or connect them to multiple tracks on the same net.

4.4 Placing Components and Editing Nets

After specifying all board parameters, you need to place, organize and arrange all components in Figure
4.11 within the global layer border outline obstacle you created earlier. This is the boundary area that
limits the overall board placement. You will also need to set the net properties for routing.

Placing Components
There are two methods to place the components which are by using:
 automatic placement strategy
 manual component placement
In automatic placement strategy, you need to load a strategy file to set up your components placement
in order to display the appropriate elements such as place outlines, electrical connections and reference
designators. There are two types of strategy files in Layout namely placement strategy files and routing
strategy files. Table 4.5 simplifies the strategy files that you can choose for your automatic placement.
The common placement strategy file used is called standard placement file (PLSTD.SF). To load the
strategy file, click ‘File > Load’ and choose PLSTD.SF from the ‘Data’ subfolder.

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Table 4.5 Automatic Placement Strategy Files
Strategy File Description Strategy File Description
2__SMD_H.SF Used for a two-layer, single- 2__SMD_V.SF Used for a two-layer, single-
sided or double-sided, surface- sided or double-sided,
mount or mixed-technology surface-mount or mixed-
board, with layer one technology board, with layer
horizontal. one vertical.
2__THR_H.SF Used for a two-layer, through- 2__THR_V.SF Used for a two-layer, through-
hole board, with layer one hole board, with layer one
horizontal. vertical.
4__SM1_V.SF Used for a four-layer, single 4__SM1_H.SF Used for a four-layer, single-
sided, surface-mount or mixed- sided, surface-mount or
technology board, with layer mixed-technology board, with
one vertical. layer one horizontal.
4__SM2_V.SF Used for a four-layer, double- 4__SM2_H.SF Used for a four-layer, double-
sided, surface-mount mixed- sided, surface-mount or
technology board, with layer mixed-technology board, with
one vertical. layer one horizontal.
4__THR_H.SF Used for a four-layer, through- 4__THR_V.SF Used for a four-layer,
hole board, with layer one through-hole board, with
horizontal. layer one vertical.
FAST_H.SF Used for quickly checking on a FAST_V.SF Used for quickly checking on a
particular placement, with layer particular placement, with
one horizontal. layer one vertical.
JUMPER_H.SF Used for boards with jumper JUMPER_V.SF Used for boards with jumper
layers, with layer one layers, with layer one vertical.
horizontal.
REROUT_H.SF Used for rerouting boards, with REROUT_V.SF Used for rerouting boards,
layer one horizontal. with layer one vertical.
VIARED_H.SF Used for a via-reduce sweep on VIARED_V.SF Used for a via-reduce sweep
a completely routed board, on a completely routed board,
with layer one horizontal. with layer one vertical.
STD.SF Used for the default routing 386LIB.SF Used for libraries translated
strategy. It is automatically from OrCAD PCB386+.
loaded into each board if the
board is translated into Layout’s
binary format. You can also use
this strategy file with boards
that are not translated.

In manual component placement, you have the choices either to place the component individually or to
place the components by groups. Basically for both choices, the idea is to place the components which
execute similar task in one matrix area where it is easier to locate errors during the troubleshooting
process. In a simpler word, you design a board with block-by-block placement according to their function
and task. Figure 4.17 shows an example of a board design with block-by-block placement.

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 Figure 4.17 PCB with Block-by-Block Placement Figure 4.18 Final Components Placement

To place the component manually, click the ‘Component Tool’ icon . CLICKL the targeted component
and move it to your desired location or your block location.
CLICKR to perform optional task such as rotate, opposite, swap and lock. Repeat with all components to
place them as depicted in Figure 4.18.
You can also modify the original footprint assigned to each component using the ‘Component Tool’ icon.
CLICKL to select your preferred component then CLICKR and click ‘Properties’ to open the ‘Edit
Component’ window. You can choose different footprint by clicking the ‘Footprint’ button.
Back annotate is used to automatically save all changes made in Layout seamlessly into OrCAD Capture
Schematic and will be explained in details in Section 4.6.

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Editing Nets
Net properties are extremely important for routing because it will set the behaviour of the ratsnests in
the board design during manual routing, autorouting and autoplacement. A ratsnest represents the
unrouted connections that need to be routed to form tracks in a layer.
To open the Nets spreadsheet, click the the ‘View Spreadsheet’ icon and choose ‘Nets’ from the
toolbar to open the ‘Nets’ window as shown in Figure 4.19. Based on the net specification given in Box
4.1, DCLICKL the ‘+VE B’ net name to change the connection width to 0.051cm as shown in Figure 4.20.
Repeat and apply to the other net names.

Figure 4.19 Nets spreadsheet

Figure 4.20 Edit Net Window

Based on the IPC-2221 standard, the formula to calculate the allowable current through a net can be
determined using equation below:

𝐼𝐼 = 𝑘𝑘∆𝑇𝑇 0.44 𝐴𝐴0.725

Can use online calculator

where;
I is the net current
k is the constant; k=0.024 for internal layer and k=0.048 for external layer
∆𝑇𝑇 is the temperature rise
A is cross sectional area of the trace
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Temperature rise is the difference between the maximum safe operating temperature of your PCB
material and the typical operating temperature of your board. Typically, in a board design, 10 degrees is
a safe rule of thumb for most applications.
Table 4.6 summarizes the minimum net width value that you can set in relation with your current
consumption for nominal 3mil copper thickness PCB.

Table 4.6 PCB Net Width versus Maximum Current

Net Width Size Max Current for Net Width Size Max Current for
(mil/mm) Temperature Rise (mil/mm) Temperature Rise
(+10/50oC) (+10/50oC)
6/0.15 0.6A/1.2A 20/0.50 1.5A/3.0A
8/0.20 0.8A/1.5A 24/0.60 1.7A/3.4A
10/0.25 0.9A/1.8A 28/0.70 1.9A/3.8A
12/0.30 1.0A/2.0A 30/0.76 2.0A/4.0A
14/0.35 1.1A/2.3A 32/0.80 2.1A/4.1A
16/0.40 1.2A/2.5A 40/1.00 2.4A/4.9A
18/0.45 1.4A/2.8A

Adding Mounting Hole

This is an optional step that you can perform to enhance the appearance of your board design and very
useful to set the lock position during fabrication process for multi-sided PCB. To add mounting hole to
your design, click the ‘Component Tool’ icon . CLICKR and click ‘New’ to open the ‘Add Component’
window. From the window, click the ‘Footprint’ button and search for MTHOLE1, MTHOLE2 or MTHOLE3
and place the mounting hole to your preferred location. After adding the mounting hole to the board,
define it as non-electric to make sure it will not be removed during autoECO process. A non-electric
component is a component that does not display on the schematic but only visible in Layout.

4.5 Routing the Board

In Layout, you can perform the routing task manually using the routing tools or you can
use the autorouter to automatically route the board and then use the manual routing tools to optimize
the routing. In this exercise you will combine both techniques to perform, enhance and optimize the
routing of the ratsnests in Figure 4.18.
Before you perform the automatic route, make sure you toggle off the ‘Online DRC’ icon. Click ‘Auto >
Autoroute > Board’ to automatically route the entire board. Obviously, you can see two sets of net colour
routed in the board design namely cyan (TOP) and red (BOTTOM) because you only set the routing layers
to top and bottom (double-sided PCB) only earlier.
To toggle the visibility of a layer, you can press ‘-‘ key or you can choose the targeted layer from the layer
drop-down list and click ‘View > Visible <>Invisible’. In this exercise, you will set the top side assembly
(AST) to invisible and generate an artwork as shown in Figure 4.21. Locate also all the padstacks and vias
formed in the artwork.

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Always remember, autoroute is just an initial routing process to expedite the routing process. Next, you
need to optimize the autorouted nets using ‘Edit Segment Mode’ or ‘Add/Edit Route Mode’ tools.
In ‘Edit Segment Mode’, you select an existing track and change its position while Layout automatically
adjusts the angle and sizes of adjacent segments to maintain connectivity. In ‘Add/Edit Route Mode’, you
route existing track manually without using the shove algorithm. Relatively, both modes are quite similar
as they allow manual adjustment to the autorouted nets.
Click or to activate the manual routing mode. Click your targeted track to alter and CLICKR to pop
up the optional menu. From the menu, you can change the connection width and vertex angle, add via
and free via, lock and unlock net and also route and unroute segment.
Using these manual modes also allow you to easily route between layers by pressing the layer hotkey
which is ‘0 to 9’ and ‘Ctrl+0 to Ctrl+9’ as shown in column ‘Layer Hotkey’ in Figure 4.13 while routing the
targeted segment. Figure 4.22 shows the routed board design using autoroute and manual modes.

Figure 4.21 Autorouted Board Figure 4.22 Autorouted and Manual Modes Board

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 The ‘Text Tool’ can be used to move the
silk screen text or add text to your board
design. Click the icon to activate the text
tool. CLICKR and click ‘New’ to add text
strings to your artwork.
To move the silk screen text, click the
targeted text and move it to a new position.
Figure 4.23 shows the finalized board with
combination of border outline and free track
obstacles, text string and optional mounting
holes.

Figure 4.23 Finalized 5V Regulator Circuit Board Design

4.6 Finishing the Board

This is the final stage before an artwork can be sending out to be fabricated physically. This final stage is
needed to ensure the board is free from errors and can be successfully fabricated. Some of the steps in
finishing the board are as follows:
 checking design rules
 investigating errors
 removing violations
 cleaning up design
 renaming your components
 back annotating the board information to the schematic
 running post processor
 creating reports

Ensuring Manufacturability
To check the integrity of your board design, you need to run the Design Rules Check. Click ‘Auto > Design
Rules Check’ from the Top Menu to perform the DRC. Uncheck any rules that you want to omit and click
OK to verify your board. Rectify any errors found from the DRC.
In case you have errors in your design, the errors are marked on the board with circles. To investigate it,
click ‘Query’ icon to display the query window. Next, click the ‘Error Tool’ icon and choose the
error circle and the description of that error will be displayed in the query window.
To allow you to reroute again the problem area, you need to remove the violations. Click ‘Auto > Remove
Violations > Board’ to remove the violations.
Lastly after you rectify all the errors, you can clean up your design by clicking ‘Auto > Cleanup Design’. You
should always run the DRC after running Cleanup Design.
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Back Annotating
To automatically update the schematic that corresponds to your board with any changes you made during
the board design (such as changing footprint, component name etc.), you need to perform the back
annotation. The Back Annotate creates a back annotation file (*.SWP) that you can use to update the
schematic.

In Layout, click ‘Auto > Back Annotate’ and save

again the synchronized board file.
Next, in OrCAD Capture Schematic, activate the
DRC toolbar and click the ‘Back Annotate’ icon
to pop up the ‘Back Annotate’ window as shown in
Figure 4.24. Supply the correct SWP file and click
OK to automatically save the new changes you
made earlier in Layout.

Figure 4.24 Back Annotate Window

Post Processing
In this step, you need to set the post processing and gerber settings to enable Layout to generate required
output files (known as gerber files) for PCB manufacturing. Gerber is a standard industry file format to
communicate design information for PCB manufacturing used by fabrication machines. It is an open 2D
binary vector image format to represent the artwork images for all layers in a board design. There are two
standards gerber namely the ‘Extended Gerber (RS-274X)’ and ‘Standard Gerber (RS-274D)’. The extended
gerber (X) is the current file format used nowadays but in Layout you have some choices to choose for the
suitable machine output format.
In addition, you also need to preview each layer to ensure all elements are present and visible before
submitting them for manufacturing.
To set the gerber output format, click ‘Options > Post Process Settings’ from the Top Menu to open the
‘Post Process’ window as shown in Figure 4.25. In this example you will use extended gerber (RS-274X) as
your output gerber file format. However, if you prefer to change it to a different format, DCLICKL the
targeted layer to open the ‘Post Process Settings’ window as shown in Figure 4.26 and change it
accordingly.

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 Figure 4.25 Post Process Window Figure 4.26 Post Process Settings Window

Always check ‘Create Drill Files’ option in the ‘Post Process Settings’ window to allow Layout to produce a
drill tape file (*.TAP) during run post process command. During the manufacturing process, the drilling
machine reads this file to determine the size and location of the drill holes on your board. For though-
hole components, Layout outputs a file named THRUHOLE.TAP. In addition, Layout automatically
generates drill tape files for each layer pair that shares a blind or buried via and names them accordingly.
For example, a file with the name 1_4.TAP includes data related to layers 1, 4, and all layers in between.
To preview a layer of the board in Figure 4.23, click ‘Options > Post Process Settings’ from the Top Menu
to open the ‘Post Process’ window. Click ‘Window > Tile’ to display both design window and the post
process window. Select any layer that you want to preview, CLICKR and click ‘Preview’. You can click the
‘Refresh All’ icon to end the preview. Finally, click ‘Window > Reset All’ to return the design window
to its previous size. Figure 4.27 and Figure 4.28 shows the top and bottom layer preview image.

Figure 4.27 Top Layer Preview Figure 4.28 Bottom Layer Preview

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Running Post Processor
This command creates files for the layers that batch enabled in the ‘Post Process’ spreadsheet called
gerber design file (*.GTD), drill tape file (*.TAP), and output error and activity list file (*.LIS).
To run post processor, click ‘Auto > Run Post Processor’ from the Top Menu to generate these three files.

Creating Reports
To generate the output reports of the board, click ‘Auto > Create Reports’ from the Top Menu to open the
‘Generate Reports’ window. Select the reports that you want to be reported and choose either to view or
save the reports. Click OK.

4.7 Additional Reading

These are some additional textbooks for your references:
1. Kraig Mitzner, Complete PCB Design Using OrCAD Capture and Layout, Newnes, 2007.
2. OrCAD Layout User’s Guide, https://www.orcad.com/.

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Test Your Skills:

Using the circuit below, build an optimized PCB layout/artwork with these specifications:
a) Board outline obstacle of 10cm x 10cm (show the dimension)
b) Best components placement with suitable THD footprint.
c) Double- sided PCB
d) Net size ≥ 12mils
e) Utilize copper pour and free track obstacles.

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Chapter 5: Printed Circuit Board Fabrication

5.1 Introduction to Industry Standards

The final stage after an artwork was post processed is to fabricate. PCB fabrication is an assembly method
to manufacture circuit board for electrical and electronic systems. In order to make sure the board is fully
functioning, there are three criteria that you need to consider before it can be successfully manufactured
which are as follows:
 The board has to be manufactural means it follows industry standard regulations.
 The board has to operate properly means it passes the signal integrity and quality check.
 The board has to be reliable means it can fitly function for a given time span.

There are several standards imposed to the PCB design. The purposes for the standards are to set rules
for board certification and to obey laws imposed by governance. Some of the popular standards
organizations are as follows:
 Institute for Printed Circuits (IPC-Association Connecting Electronics Industries)
 Electronic Industries Alliance (EIA)
 Joint Electron Device Engineering Council (JEDEC)
 International Engineering Consortium (IEC)
 Military Standards
 American National Standards Institute (ANSI)
 Institute of Electrical and Electronics Engineers (IEEE)
 Consumer Electronics Association (CEA)
 Internet Security Alliance (ISA)
A manufactured PCB can be classified based on the standards mentioned earlier. Table 5.1 shows an
example of a PCB classifications based on IPC-CM-770E (Guidelines for Printed Board Component
Mounting) standards. The classification includes performance class, producibility level, fabrication type
and assembly subclasses.

Table 5.1 PCB Classification Based on IPC-CM-770E

Performance Class Class 1 - General Electronic Products, includes general consumer products
like televisions, electronic games, and personal computers that are not
expected to have extended service lives and are not likely to be subjected
to extensive test or repairability requirements.
Class 2 - Dedicated-Service Electronic Products, includes commercial and
military products that have specific functions such as communications,
instrumentation, and sensor systems, from which high performance is
expected over a longer period of time. Since these items usually have a
higher cost they are usually repairable and must meet stricter testing
requirements.
Class 3 - High-Reliability Electronic Products, includes commercial and
military equipment that has to be highly reliable under a wide range of
environmental conditions. Examples include critical medical equipment and
weapons systems. They typically have more stringent test specifications
and possess greater environmental robustness and reworkability.
Producibility Level Level A (general design) - referred complexity
Level B (moderate design) - standard complexity
Level C (high design) - reduced producibility complexity

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 Fabrication Type Type 1 - single-sided printed board
Type 2 - double-sided printed board
Type 3 - multilayer printed board without blind or buried vias
Type 4 - multilayer printed board with blind and/or buried vias
Type 5 - multilayer metal-core printed board without blind or buried vias
Type 6 - multilayer metal-core printed board with blind and/or buried vias
Assembly Subclasess Subclass A - through-hole devices (THD) only
Subclass B - surface-mounted devices (SMD) only
Subclass C - mixed THD and SMD (simple)
Subclass X - complex THD/SMD, fine pitch, BGA packages
Subclass Y - complex THD/SMD, ultrafine pitch, chip-scale packaging
Subclass Z - complex THD/SMD, fine pitch, flip-chip packaging

5.2 Introduction to PCB Assembly and Soldering Processes

After a board is successfully manufactured, it will then be queued for assembly and soldering process.
There are two major types for assembly process which are:
 Manual assembly
 Automated assembly
Both methods are suitable for through hole technology (THT) and surface mount technology (SMT).
Manual assembly is usually used for low dense design and it is very suitable for prototype work.
Automated assembly is using pick and place technique where automated machines are programmed to
precisely pick and place components on the PCB. It is highly used for moderate to complex design and
very practical for commercial production.

Generally, there are three soldering methods popularly used which are:
 Manual soldering (hot-air pencil, soldering iron, induction coil)
 Mass soldering (wave, oven reflow, vapour phase reflow and conduction reflow)
 Directed energy (hot gas, hot bar, laser, iron and pinpoint torch)
Manual soldering technique is widely used for many applications from simple PCB assembly to simple
repair works.

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5.2 PCB Fabrication Processes
There are many steps involved in the fabrication stage. The complexity to manufacture it is highly
depending on the complexity level of the board design. Single-sided PCB is the easiest board to fabricate
and uses the least physical processes compared to double-sided and multi-sided PCB. Figure 5.1 shows
the typical flow chart for a general PCB design during fabrication stage.
Typical processes are shown as depicted in Figure 5.2 to Figure 5.11.
Figure 5.12 shows an example of standard and custom PCB specification manufactured by a company
called Advanced Circuits.

Figure 5.1 Typical PCB Fabrication Processes

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 Preparing the Phototools

GerbTool software is used for film

preparation. You need to print the layout
using laser printer in a temperature and
humidity-controlled room to make the
film for the PCB. Laser film is used as the
film paper. Laser spray is used to darken
the printed laser film.

Figure 5.2 Preparing the Phototools

Drilling the PCB

CNC machine is used to accurately drill the

board. Typically, an industry standard
0.059" thick FR-4 laminate copper clad on
two sides is used to fabricate the PCB.
Through holes required for the PCB design
are drilled from gerber files submitted,
using NC drill machines and carbide drill
bits.

Figure 5.3 Drilling the PCB

Through Hole Plating

This process is especially used in double-

sided and multi-sided board fabrication.
In order for the through holes to
electrically connect to different layers of
the PCB, a thin layer of copper is
chemically deposited into the through
holes. This copper will later be thickened
through electrolytic copper plating.

Figure 5.4 Through Hole Plating

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 Laminating

To transfer the layout onto the board, a

photosensitive photo-resist film is
applied to the entire board area. You
need to be very careful while handling
the film in order to avoid any debris, air
bubbles or water trap beneath the
photo-resist film during the laminate
process. Set the laminator temperature
to 100 – 110C.

Figure 5.5 Laminating

Exposing

Printed layout film is pasted over the

laminated FR4 board. A high intensity
UV light will be exposed to the positive
side of the photo-resist. You need to set
the expose machine to operate in 20
seconds.

Figure 5.6 Exposing

Developing

In this process, the unexposed photo-

resist will be removed from the board
and only exposed photo-resist film over
the padstacks and nets left.
Acidic chemical is used to develop the
board. The standard developer is a 1%
solution of either Sodium Carbonate
Monohydrate (Na2CO3.H2O) or
Potassium Carbonate (K2CO3).

Figure 5.7 Developing

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 Etching

The purpose of this process is to

remove unnecessary copper from the
board and leave only padstacks and
nets coated with exposed photo-resist
film. Typically, ferric chloride is used as
the etch chemical.

Figure 5.8 Etching

Stripping

The purpose of this process is to

remove the photo-resist film coated
over the nets and padstacks and
reveal the copper circuitry. The board
will be dipped into ‘stripper solution’
for about two minutes.

Figure 5.9 Stripping

Solder Masking

The stripped board then needs to be

covered using soldermask film. You
need to repeat all the procedures to
laminate, expose and develop using
this soldermask film.
The purpose of the soldermask is to
protect the majority of the copper
circuitry from oxidation, damage and
corrosion as well as maintain
isolation of the circuits during
assembly.

Figure 5.10 Solder Masking

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 Tin Plating, Washing, Drying and
Cutting

The solder masked board is then

immersed in a chemical solution to
finish the final surface. The
common types of the solution used
are immersed tin, lead solder or
immersion silver. The purpose of
this process is to protect the copper
(solderable surfaces) from
oxidation.

Figure 5.11 Tin Plating, Washing, Drying and Cutting

Figure 5.12 Standard and Custom PCB Specification Manufactured by Advanced Circuits.

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Chapter 6: Single Phase Domestic Wiring System in Malaysia

6.1 Introduction to Malaysian Standards

In Malaysia, the statutory body responsible for regulating the energy sector, specifically the electricity and
piped gas supply industries in Peninsular Malaysia and Sabah is called Suruhanjaya Tenaga (ST) or Energy
Commission and it was established under the Energy Commission Act 2001. The roles of the Energy
Commission are divided into three major roles namely Economic Regulation, Technical Regulation and
Safety Regulation and the main focus of the commission is to provide reliable electricity and gas supply at
reasonable costs with high safety standard.
In order to set an electrical installation standard for Malaysia practice, electrical wiring guideline for
residential home was legislated by ST based on the Akta Bekalan Elektrik 1990, Peraturan-Peraturan
Elektrik 1994, Standard MS IEC 60364:2003 ‘Electrical Installations of Building’, Standard MS 1936:2006
‘Electrical Installations of Building - Guide to MS IEC 60364’ and Standard MS 1979:2007 ‘Electrical
Installation of Building - Code of Practice’. These guidelines need to be followed by all practitioners that
work with domestic electrical wiring system especially electrical contractors and wiremen. The purpose
of it is to set codes of conduct in order to provide a safe and reliable single phase and three phase wiring
electrical installation for residential homes in Malaysia.
Basically, there are two types of electrical installation system namely single phase wiring system (for
residential area) and three phase wiring system (for commercial and industrial area). These systems are
derived based on the standard MS IEC 60038 with these general specifications:
1. Single phase nominal voltage of 230V, +10%, -6%
2. Three phase nominal voltage of 400V AU, +10%, -6%;
3. Frequency of 50Hz ± 1%;
4. Earthing/Grounding type (TT System)
Before commencement of a new or additional wiring system can be performed by competent
practitioners, they need to adhere some regulations and prepare an action plan for the installation works.
Firstly, they need to apply for the approval for commencement of wiring works following the regulation
based on Electricity Regulations, Regulation 11(1) Akta Bekalan Elektrik 1990 which stated that:

“No wiring or rewiring of an installation or extension to an existing installation shall be carried out by an
Electrical Contractor or a Private Wiring Unit without first obtaining the approval in writing from a licensee
or supply authority, as the case may be: Provided that no approval is necessary for an extension to an
existing wiring of a domestic installation where the total current consumed at any one time by the said
installation, as a result of the extension, does not exceed the maximum current demand as agreed upon in
the supply contract between the owner and the licensee or supply authority.”

Secondly, they need to prepare the electrical work plan to be approved by the supply authority (SA). The
steps for the planning works are as follows:
1. Site visit and inspection
2. Investigate and determine the load demand
3. Calculating the maximum load demand
4. Submit plans, drawings and specifications
Figure 6.1 shows the planning flowchart to be followed by competent practitioners for single phase and
three phase system for commencement in electrical wiring installation.

98
Figure 6.1 Electrical Works Planning Flowchart

99
6.2 Single Phase Domestic Wiring System
Electricity is generated from synchronous alternator (usually powered by coal, oil or hydro) when
interaction of flux in the field and stator windings resulted in the generation of AC voltage. It then will be
stepped up to certain high voltage values to be transmitted using transmission lines and finally stepped
down again and distributed to the consumers for residential and commercial use. Figure 6.2 shows the
general flow on how the electricity is generated, transmitted and delivered to the consumer.

Figure 6.2 National Grid Electricity System

For single phase residential consumers, the root mean square (rms) voltage is typically rated at 240V,
50Hz. In order to utilize this rated voltage safely, you need to always check the appliances tag before
connecting them to the system. Make sure the appliances are designed for 240V, 50Hz system before
connecting them to the socket outlet.

100
Single phase wiring system consists of fuse cutout and neutral link, kilowatt-hour meter, main switch,
circuit breakers, grounding (including lightning arrestor), and receptacle points and can be simplified using
single line diagram as shown in Figure 6.3.

Figure 6.3 Single Line Diagram of Single Phase Wiring System

The first two items namely cutout and neutral link and kWh meter are provided by Tenaga Nasional
Malaysia (TNB). Main switch, residual current device (RCD) or earth leakage circuit breaker (ELCB), and
miniature circuit breaker (MCB) are the items that are installed in the distribution board (DB) of a
consumer unit. Figure 6.4 shows the typical distribution board of a single phase domestic wiring system.
The housing of the DB can be made of plastic or metal with different dimensions depend on the total
consumer’s load demand.

Figure 6.4 Distribution Board

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In the DB, the protective devices are arranged in a manner to provide isolation and different zones of
protection primarily from overcurrent, earth fault and leakage and also from the lighting strike. The
arrangement is set with main switch positioned at first position followed by RCD/ELCB and finally by MCBs.
The placement can be from right-to-left or left-to-right order. From the MCBs, the electricity is then
distributed to the receptacle points or usually known as final circuits.
The receptacle circuit can be divided into two main categories namely lighting circuit and power circuit.
Lighting circuit is the circuit that accommodates lighting and fan points. Power circuit is the circuit that
provides electricity to the socket outlets and can be configured using radial circuit or ring circuit. Figure
6.5 shows the general arrangement and connections of a complete single phase domestic wiring. Table
6.1 shows the permitted MCB specifications for power circuit based on IEE regulation.

Figure 6.5 Complete Single Phase Domestic Wiring Circuit

Table 6.1 Minimum Specifications for Circuit Wiring

Type MCB Rating, Minimum Conductor Size Maximum Floor Area,
(A) (Rubber/PVC), (mm2) (m2)
Power Circuit (Ring) 30/32 2.5 100
Power Circuit (Radial) 30/32 4.0 50
Power Circuit (Radial) 20 2.5 20
Lighting Circuit 6 1.5 -

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Methods of Wiring
Generally, there are three methods for the wiring installation which are:
1. Surface/ clipped direct wiring
2. Embedded wiring
3. Conduit wiring
Each method is designed for specific condition and need to be configured based on the standards set by
the legislators. Table 6.2 shows the comparison for the wiring methods and its description. Figure 6.6
shows the picture of all wiring methods.

Table 6.2 Comparison for Wiring Method

Method Description Advantages and
Disadvantages
Surface/ clipped direct Insulated cables or conductors on PVC or Cheap and easy to install.
wiring wooden casing are installed directly to the Easy to repair.
wall surface without any extra protection. Easily affected by hot
The clip can be made of aluminium or temperature and humidity.
plumbum. Unsafe from mechanical wear
and tear.
Suitable for 240V and below.
Embedded wiring Insulated cables or conductors are installed Cheap and easy to install.
inside the concrete wall where only the Hard to repair.
end of the conductors is exposed. Great for mechanical and
It is usually installed before the plastering weather protection.
work starts.
Cables need to be free from mechanical
wear and tear before they can be safely
embedded.
Conduit wiring There are three types of enclosure namely Expensive due to additional
conduit, trunk and tray. added components such as
Using conduit, the cables can be installed conduit, elbows, way boxes
using either surface conduit wiring or etc.
enclosed conduit wiring. If the conduits are Hard to install and very
installed directly to the wall or roof, it is complicated to add extra wiring
known as surface conduit wiring. If the in the future.
conduits are installed inside the wall, it is The safest method and
known as enclosed conduit wiring. The provides excellent protection
conduit can be made of plastic or metallic from weather and mechanical
with different sizes ranging from 0.5” to 2” wear and tear.
in diameter. This method is the most
Trunk and tray are usually made from popular, tidiest, stronger and
metal. Array of cables are placed inside the commonly used nowadays.
trunk or tray for the wiring installation.

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 Figure 6.6 (a) Surface Wiring (b) Embedded Wiring Before Plastering Work
(c) Conduit Wiring Using PVC Pipe (d) Conduit Wiring Using Trunk (e) Conduit Wiring Using Tray

Earthing/Grounding
Earthing or grounding is a mechanism to remove earth fault condition such as fault current and leakage
current from damaging the wiring system or electrical equipment instantly. The grounding/earthing
system for single phase and three phase domestic wiring is configured using the ‘TT System’ which is
actually a ‘no earth provided supplies’ system. This system is typically found when the installation is fed
from overhead cables. The supply authorities (SA) do not provide an earth terminal to the residential area
from the overhead cables thus the consumer needs to provide its own earthing mechanism by means of
using earth electrode or rod usually made of steel clad with copper. Usually the electrode or rod is driven
into the ground to serve as a zero voltage reference point. The consumer needs to connect all circuit
protective conductors (CPCs) to earth using the earth electrode.
In TT system, it consists of two types of grounding namely system grounding and equipment grounding.
The first T indicates the state of the system grounding while the second T indicates the state of the
equipment grounding. System grounding means the connection of earth ground to the neutral points of
current carrying conductors such as the neutral point of a circuit, a transformer, rotating machinery, or
a system, either solidly or with a current-limiting device (IEEE Standard 142-2007 1.2). Equipment
grounding means the connection of earth ground to non-current carrying conductive materials such as
conduit, cable trays, junction boxes, enclosures, and motor frames.
There are six grounding techniques which are by using:
1. Earth electrode/rod or pipe
2. Tapes or wires
3. Plates
4. Underground structural metalwork embedded in foundation
5. Welded metal reinforcement of concrete (not pre-stressed)
6. Lead or metallic covering of cables

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For single phase wiring system, earth electrode is usually used for the grounding purpose. The earth rod
is driven into ground and it is placed in an earth chamber made of concrete or PVC. Table 6.3 shows the
maximum earth rod resistance allowable for domestic wiring.

Table 6.3 Maximum Earth Rod Resistance

Type Resistance (Ω)
Earth rod protected by 100mA ELCB 10
Lightning arrestor earth rod 10

Figure 6.7 shows the grounding system configured using TT system installed in a three phase and single
phase domestic wiring. Figure 6.8 shows the earth rod, earth chamber and the finished grounding
installation.

Figure 6.7 TT Grounding System Figure 6.8 (a)Earth Rod and Clip (b)PVC Earth
Chamber Cover (c)Rod Driven into Ground

Distribution Board
There are four main components inside the distribution board that act as isolator, fault protectors,
mounting rail and bus bar connectors as shown in Figure 6.9. They are main switch, ELCB and MCBs, bus
bar and DIN rail.
Main switch acts as an isolator to isolate the mains supply from entering the circuit. ELCB and MCBs act
as the circuit breakers that provide protection to the wiring system during current and earth fault
condition while neutral and earth bus bar act as the common connection point for neutral and earth
conductor respectively. DIN rail is a standard type metal rail used to mount all breakers inside the
distribution board. Table 6.3 simplifies the description of all protective devices installed in the distribution
board. Figure 6.10 shows the wiring connections of live and neutral conductors in distribution board.

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 Figure 6.9 Components Inside Distribution Board

Table 6.3 Protective Devices in Distribution Board

Component Description
Main Switch It acts as an isolator to isolate the electricity supply from mains (TNB).
It has two compartments for live and neutral connection.
It comes with different current protection rating typically rated at 32A,
63A and 100A depends on the consumer’s load demand.
It has a built in cartridge fuse to protect the system from current fault
condition.
It needs to be turned off/on manually. Turning the lever position to off
will isolate the live and neutral connections from the mains.
Earth Leakage Circuit Breaker It acts as an earth fault breaker to remove the earth fault condition.
It has two compartments for live and neutral connection.
It comes with different current protection rating typically rated at 40A,
63A and 100A.
During earth fault condition, it operates very quickly which is less than
0.4A for all final circuits not exceeding 32A.
It comes with three standard leakage ratings (sensitivity) which are
usually rated at 100mA, 30mA and 10mA. 100mA rating is for general
leakage protection, 30mA rating is for socket outlets circuit and 10mA
for heater circuit and final circuit in wet area (toilet, wet kitchen).
It will automatically trip during earth fault condition and after the fault
is removed, it needs to be manually on to restore the connection.
Manufacturers recommend to testing it monthly by pushing the ‘Test’
button on the ELCB.

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Miniature Circuit Breaker It acts as a fault current breaker to remove the overcurrent fault
condition.
It provides protection for live connection only.
It comes with different current protection rating typically rated at 6A,
20A and 32A to protect the final circuit.
It will automatically trip during current fault condition and after the
fault is removed, it needs to be manually on to restore the connection.
It has three types of mechanism namely thermal, electromagnetic and
hydraulic-magnetic.
Two or more MCBs can be connected together using bus bar which is
specifically design to operate at 40A, 63A or 100A.

Figure 6.10 Wiring Connections in Distribution Board

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Cable and Conductor
One of the most important parameters that influence the healthy of a wiring system is the cable or wire
selection. The selection of the cable is decided based on lot of factors such as insulation type, operating
temperature, wiring method, and circuit type. Table 6.4 simplifies the typical choices of copper cable in a
single phase domestic wiring system with its specific application.

Table 6.4 Cable Selection

Cross Sectional Area (mm2) Material Application
1.5 Copper Lighting circuit
16A radial power circuit
2.5 Copper 32A ring final circuit (13A Outlet socket)
20A radial circuit
4.0 Copper 32A radial circuit
General power circuit (cooker, heater, motor, pump etc.)
6.0/10 Copper Small sub mains
Radial circuit for showers, high power cookers and other
high power appliances
16.0/25.0 Copper Sub mains circuit

There are two types of cable used in domestic wiring namely fixed cable and flexible cable (flex). Fixed
cable is the cable that is used to install the final circuits permanently. Due to its inflexible characteristic, it
serves as a great conductor either in surface or concealed wiring method.
Flexible cable less than 4mm2 is typically used to connect the electrical accessories to the final circuits. It
cannot be used as the permanent conductor and shall be used in application where the connection is less
than 3 meters. Table 6.5 simplifies the complete cable colour codes in a single and three phase domestic
wiring system.

Table 6.5 Cable Colour Codes

Type Phase Conductor Colour Code
Live Red
Fixed Single Neutral Black
Earth Green / Green-Yellow
Live Brown
Flexible
Single Neutral Blue
(1, 2 or 3 strands)
Earth Green / Green-Yellow
Live Brown / Black
Flexible
Single Neutral Blue
(4 or 5 strands)
Earth Green / Green-Yellow
Live – Red phase Red
Live – Yellow phase Yellow
Three phase supply
Fixed Live – Blue phase Blue
single phase circuit
Neutral Black
Earth Green / Green-Yellow
Live (R – Y – B) Red - Yellow - Blue
Three phase supply
Fixed Neutral Black
three phase circuit
Earth Green / Green-Yellow

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For the moment, Malaysia is still not using the IEE Amendment No. 2 to BS 7671: 2001 which specified
new cable colour codes for all fixed wiring in UK electrical installations. Based on the new standard, the
colour codes for single-phase system are brown for live conductor, blue for neutral conductor and green-
yellow for earth conductor (just like flexible cable) whereas for three-phase system are brown, black and
grey for live conductors, blue for neutral conductor and green-yellow for earth conductor.
Figure 6.11 shows the terminal connections in a wall socket using fixed cables and the terminal
connections in a three pin plug using flexible cables.

Figure 6.11 (a) Fixed Cable Connections to 13A Socket Outlet

(b) Flexible Cable Connections to 13A Plug

Another important factor to consider during electrical installation is the ageing effect of conductor. A lot
of factors are influencing the deterioration and it is hard to determine precisely the exact life cycle of a
conductor. Estimating the life of a cable can only be approximate because of the obvious difficulties in
gathering data. Based on IEE wiring regulations BS 7671:2001 standard, there is general understanding
that PVC cables with continuous conductor operating temperature of 70oC have a life of 20 years. Figure
6.12 shows the ageing expectancy plotted by Malaysian Cable Manufacturers Association (MCMA) from
initiation to retirement stage. Obviously from the study, a lot of cable failure cases occurred after 40 years
of its service. Table 6.6 shows the general approximation of cable life cycle based on Figure 6.12.

Figure 6.12 Cable Life Cycle

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Table 6.6 Approximation Cable Life Cycle
Years <1 1-38 38-42 >42
Phase Initiation stage The golden years Retirement age Retired
Failure Frequency Diminishing Erratic - low Erratic - high Increasing
exponentially
Failure Factor Installation Physical damage Imperfection Unknown
(workmanship) (external) (internal)
Action to Rectify Repair and beautify Cut and joint Replace cable Replace cable
length length

Table 6.7 shows the complete electrical standards for electrical installation in Malaysia based on IEC, MS
and BS Standards.

Table 6.7 Electrical Standard for Electrical Installation

EQUIPMENT STANDARD
Consumer Unit IEC 61439–3:2012
Final distribution board IEC 61439–3:2012
Miniature Circuit Breaker (MCB) MS IEC 60898–1:2007 (confirmed 2011)
MS IEC 60898–2:2007 (confirmed 2011)
Circuit breaker MS IEC 60947–2:2010
Residual current device (RCD) MS IEC 61008–1:2012
MS IEC 61008–2:2003 (confirmed 2011)
MS IEC 61009–1:2012
MS IEC 61009–2:2003 (confirmed 2011)
Wire and cable for fixed wiring: MS 2112–3:2009/ MS 2112–4:2009
450/750V PVC insulated cable MS 2100:2007/ MS 2101:2007/
(non-sheathed) MS 2102:2007/ MS 2103:2007
600/1000V PVC insulated cable
(non-armoured)
Cable trunking and ducting conduit MS 1777:2006
MS IEC 61386:2010
Double pole switch (Up to 63A) MS IEC 60669:2012 (Non – Electronic)
Flexible wire and cable MS 2112–5:2009
Connector MS IEC 60998-1:2005 (confirmed 2015)
MS IEC 60998-2-2:2005 (confirmed 2015)
MS IEC 60998-2-3:2005 (confirmed 2015)
MS IEC 60998-2-4:2005 (confirmed 2015)
MS1873:2005
MS1873-22:2006
IEC 60670-22:2003+AMD1:2015
Connection unit (joint box), junction box, MS 1540:2015
terminal blocks, cable lug MS1838:2015
MS1873:2005
BS 1363-4:1995+A4:2012

Table 6.8 shows the current-carrying capacity for single core PVC insulated fixed cable based on BS6004,
BS6231, and BS6346 standards used in domestic wiring system.
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Table 6.8 Current-Carrying Capacity for Single Core Fixed Cable

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Electrical Testing
The electrical contractor is charged with a responsibility to carry out a number of tests on an electrical
installation and electrical equipment. The reasons for testing the installation are to ensure that the
installation complies with the Malaysian standards and regulations, the installation meets the
specification and also to ensure that the installation is safe to use. There are five tests that need to be
performed before an electrical installation can be approved by the supply authority (SA). The electrical
contractor also needs to submit Form G and Form H to the SA in order to verify all tests performed.
The tests are:
 Continuity test
 Insulation resistance test
 Polarity test
 Earth electrode resistance test
 Residual current device (RCD) test

Some of the equipment used in the testing are multimeter, Ohmmeter, tong tester (clamp meter),
continuity meter, voltage indicator, RCD tester, earth resistance tester and insulation resistance tester.

The tests mentioned earlier need to be

performed by a competent practitioner.
However, for a non-competent consumer, he
or she can also perform some basic testing to
the final circuits such as to test for continuity,
voltage and current detection and voltage
measurement safely. Three basic testers used
are digital and analog multimeter, non-contact
voltage detector pen and test pen. Figure 6.13
shows the three basic testers that are
commonly used to perform the basic testing in
the final circuits.

Figure 6.13 (a)Digital Multimeter (b)Analog Multimeter

(c)Non-Contact Voltage Detector Pen (d)Test Pen

Analog or digital multimeter can be set to resistance and AC voltage range to test for continuity and
voltage presence. Using both multimeter, you need to set the scale to ‘X1 Ω’ range to test for continuity
whereas for AC voltage presence, you need to set the scale to ‘250ACV’ range to measure the potential
voltage.
Non-contact voltage detector pen is used to detect the presence of AC voltage in hidden place especially
in enclosed wiring system without touching the conductor material. Usually it can detect voltage from
90VAC to 1000VAC. You need to hover over the tester near the cable to detect the presence of voltage.
The tester usually emits beeping sound and flashing light to indicate the presence of the AC voltage.
Test pen is used to detect the presence of electricity in a cable. Typically, it is used to check the presence
of live connection in single and three phase wiring system where the maximum voltage is below 500V.

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You need to touch the tip of the test pen to the terminal connection to test for live connectivity. The neon
will glow when it detects the presence of live connection.

6.3 Additional Reading

1. Garis Panduan Pendawaian Elektrik di Bangunan Kediaman, Suruhanjaya Tenaga Malaysia, 2008.
2. Trevor Linsley, Basic Electrical Installation Work 6th Ed., Newnes, 2011.
3. Black + Decker, The Complete Guide to Wiring 6th Ed., Cool Springs Press, 2014.

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Test Your Skills:

Can you identify all parts used in the domestic wiring in the figure below?

[Ans: From top left side - 2-way box, single way box, inspection elbow, bayonet lamp holder, Edison lamp
holder, angle box, 3-way box, ceiling rose, straight Batten lamp holder, nut box, female adapter, bar
saddle, clip saddle, socket connector, conceal nut box.

Can you match the terminal conductors with the correct cable colour code?

[Ans: Red – L, Black – N, Green – Earth]

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In your assigned group, install the single phase wiring system onto the wiring trainer board using the
diagram below.

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