Unit 4

Chapter 9
Memory System
Memory Hierarchy

In the Computer System Design, Memory Hierarchy is an enhancement to organize the memory
such that it can minimize the access time. The Memory Hierarchy was developed based on a
program behavior known as locality of references.

Types of Memory Hierarchy

External Memory or Secondary Memory: Comprising of Magnetic Disk, Optical Disk, and
Magnetic Tape i.e. peripheral storage devices which are accessible by the processor via an
I/O Module.
Internal Memory or Primary Memory: Comprising of Main Memory, Cache Memory & CPU
registers. This is directly accessible by the processor.
Memory Hierarchy Design
Characteristics of Memory Hierarchy

Capacity: It is the global volume of information the memory can store. As we move from top to

bottom in the Hierarchy, the capacity increases.

Access Time: It is the time interval between the read/write request and the availability of the

data. As we move from top to bottom in the Hierarchy, the access time increases.

Performance: . One of the most significant ways to increase system performance is minimizing

how far down the memory hierarchy one has to go to manipulate data.

Cost Per Bit: As we move from bottom to top in the Hierarchy, the cost per bit increases i.e.

Internal Memory is costlier than External Memory.

Explanation

Auxiliary memory is known as the lowest-cost, highest-capacity and slowest-access storage in a

computer system.The most common examples of auxiliary memories are magnetic tapes and
magnetic disks.

The main memory in a computer system is often referred to as Random Access Memory (RAM).
This memory unit communicates directly with the CPU and with auxiliary memory devices through
an I/O processor.

The primary function of an I/O Processor is to manage the data transfers between auxiliary
memories and the main memory.

The data or contents of the main memory that are used frequently by CPU are stored in the cache
memory so that the processor can easily access that data in a shorter time
Semiconductor Memories

A type of electronic memory known as semiconductor memory stores digital data by making use
of semiconductor materials, most commonly silicon. Data is stored in binary format in this
memory, with “1s” and “0s” representing electrical charges.

Magnetic and optical are the two electronic data stotage medium

Magnetic Storage

Stores data in magnetic form.

Has high storage capacity.
Affected by magnetic fields.
Doesn’t use laser to read/write data.
Optical Storage

Stores data optically, uses laser to read/write.

Not affected by magnetic fields.
Has less storage than Hard Disk
Data accessing is high, compared to floppy disk

There are two types of semi conductor memory

1. Random Access Memory(RAM)
2. Read-Only Memory(ROM)
Classification of Semiconductor memory
Random Access Memory(RAM)

Random Access Memory (RAM) is a type of volatile memory that provides fast read and
write access to a storage medium used by a computer's CPU and other components

Types of RAM

Static RAM (SRAM)

Structure: Uses bistable latching circuitry (flip-flops) to store each bit.

Speed: Faster than DRAM because it doesn’t require refreshing.
Power Consumption: Higher than DRAM because it uses multiple transistors per bit.
Cost: More expensive due to complex construction.
Usage: Cache memory in CPUs, high-speed registers, and small memory banks
requiring high speed.
Static RAM (SRAM)
Dynamic RAM (DRAM)

Structure: Stores each bit in a small capacitor and a transistor.

Speed: Slower than SRAM because it needs periodic refreshing.
Power Consumption: Lower than SRAM.
Cost: Less expensive due to simpler construction.
Usage: Main memory (system RAM) in computers and other devices.
Difference between SRAM and DRAM
Read-Only Memory(ROM)

ROM stands for Read-Only Memory. It is a non-volatile memory that is used to store important
information which is used to operate the system. As its name refers to read-only memory, we can
only read the programs and data stored on it.

Types of Read-Only Memory (ROM)

MROM (Masked read-only memory): We know that ROM is as old as semiconductor

technology. MROM was the very first ROM that consists of a grid of word lines and bit lines
joined together transistor switches.
This type of ROM data is physically encoded in the circuit and only be programmed during
fabrication.
It was not so expensive.
PROM (Programmable read-only memory):
PROM is a form of digital memory.
In this type of ROM, each bit is locked by a fuse or anti-fuse.
The data stored in it are permanently stored and can not be changed or erasable.
It is used in low-level programs such as firmware or microcode.

EPROM (Erasable programmable read-only memory):

EPROM also called EROM, is a type of PROM but it can be reprogrammed.
The data stored in EPROM can be erased and reprogrammed again by ultraviolet light.
Reprogrammed of it is limited.
Before the era of EEPROM and flash memory, EPROM was used in microcontrollers.
EEPROM (Electrically erasable programmable read-only memory):
As its name refers, it can be programmed and erased electrically.
The data and program of this ROM can be erased and programmed about ten
thousand times.
The duration of erasing and programming of the EEPROM is near about 4ms to 10ms.
It is used in microcontrollers and remote keyless systems.
RAM Chip

he RAM integrated circuit chips are further classified into two possible operating modes, static
and dynamic.

The primary compositions of a static RAM are flip-flops that store the binary information.
The nature of the stored information is volatile, i.e. it remains valid as long as power is applied
to the system.
The static RAM is easy to use and takes less time performing read and write operations as
compared to dynamic RAM.
The dynamic RAM exhibits the binary information in the form of electric charges that are
applied to capacitors.
The capacitors are integrated inside the chip by MOS transistors.
The dynamic RAM consumes less power and provides large storage capacity in a single
memory chip.
A 128 * 8 RAM chip has a memory capacity of 128 words of eight bits (one byte) per word.
This requires a 7-bit address and an 8-bit bidirectional data bus.
The 8-bit bidirectional data bus allows the transfer of data either from memory to CPU
during a read operation or from CPU to memory during a write operation.
The read and write inputs specify the memory operation, and the two chip select (CS)
control inputs are for enabling the chip only when the microprocessor selects it.
The bidirectional data bus is constructed using three-state buffers.
The output generated by three-state buffers can be placed in one of the three possible
states which include a signal equivalent to logic 1, a signal equal to logic 0, or a high-
impedance state.
ROM Chip

Memory Cells: Consist of transistors that are either permanently on or off, representing
bits of data (0 or 1).
Address Lines: Used to access specific memory locations.
Data Lines: Carry data to and from the memory cells.
Control Lines: Manage read operations.
Memory Address map

The addressing of memory can establish by means of a table that specifies the
memory address assigned to each chip.
The table, called a memory address map, is a pictorial representation of assigned
address space for each chip in the system, shown in the table.
To demonstrate with a particular example, assume that a computer system needs
512 bytes of RAM and 512 bytes of ROM.
Explanation

The component column specifies whether a RAM or a ROM chip used.

Moreover, The hexadecimal address column assigns a range of hexadecimal equivalent
addresses for each chip.
The address bus lines listed in the third column.
Although there 16 lines in the address bus, the table shows only 10 lines because the other 6
not used in this example and assumed to be zero.
The small x‟s under the address bus lines designate those lines that must connect to the
address inputs in each chip.
Moreover, The RAM chips have 128 bytes and need seven address lines. The ROM chip has
512 bytes and needs 9 address lines.
Memory Connection to CPU
Explanation

RAM and ROM are connected to CPU through data and address buses.
The low order address lines select the byte within the chips.
The other line chips select a particular chip.
Each RAM receives the 7 low order bits of the address bus to select one of 128
possible bytes.
The RD(Read) and WR(Write) o/p from the CPU are applied to the i/p of each RAM to
be selected or ROM to be selected.
Address lines 1 to 9 are applied to i/p address.
When 00, RAM 1 is selected.
When 01, RAM 2 is selected.
When 10, RAM 3 is selected.
When 11, RAM 4 is selected.
Cache memory

Cache memory is a small, high-speed memory located inside or very close to the CPU,
designed to temporarily store frequently accessed data and instructions to speed up
processing.
Characteristics of Cache Memory
Cache memory is an extremely fast memory type that acts as a buffer
between RAM and the CPU.
Cache Memory holds frequently requested data and instructions so that they
are immediately available to the CPU when needed.
Cache memory is costlier than main memory or disk memory but more
economical than CPU registers.
Cache Memory is used to speed up and synchronize with a high-speed CPU.
Cache Hit and Cache Miss:

Cache Hit: Occurs when the CPU requests data that is already stored in the cache. This
results in a quick retrieval of the data.

Cache Line or Block:

The smallest unit of data transferred between the cache and main memory. A cache line
typically consists of multiple bytes.

Cache Mapping:
The method used to map data from the main memory to the cache.
Performance

Cache performance is a crucial factor in the overall performance of a computer

system, as it determines how effectively the cache memory can speed up data
access for the CPU.
Key Metrics

Hit Rate:
Definition: The percentage of memory accesses that result in a cache hit.

Miss Rate:
Definition: The percentage of memory accesses that result in a cache miss.
Latency:
Definition: The time it takes to access data from the cache.
Process Mapping
A process map is a visual representation of a task, process, or workflow. Process maps
are a powerful planning and management tool that help you improve and streamline a
process's workflow.

Process maps provide a visual guide for a process, helping you see all required
steps in sequential order.
The mapping techniques can be classified as :

1. Direct Mapping
2. Associative
3. Set Associative Mapping

Direct Mapping:
Each block from main memory has only one possible place in the cache organization in
this technique.
How Direct Mapping Works

Memory Address Division:

The memory address is divided into three parts: the tag, the index, and the block offset.
Tag: Identifies which block is currently stored in the cache line.
Index: Determines the specific cache line where the block is stored.
Block Offset: Specifies the exact byte within the block.

Mapping Process:
When a memory block needs to be placed in the cache, its index part determines the specific
cache line.
The tag part of the address is stored in the tag field of the cache line.
The block is then placed in the cache line starting at the offset specified by the block offset.
Associative Mapping

Associative mapping, also known as fully associative mapping, is a cache mapping technique
where any block of main memory can be placed in any cache line. This flexibility reduces the
possibility of conflict misses that are common in direct-mapped caches
Memory Address Division:
The memory address is divided into two parts: the tag and the block offset.
Tag: Identifies which block is currently stored in the cache line.
Block Offset: Specifies the exact byte within the block.

Mapping Process:
When a memory block needs to be placed in the cache, it can be placed in any available
cache line.
The tag part of the address is stored in the tag field of the cache line.
The block is then placed in the cache line starting at the offset specified by the block
offset.
Set Associative Mapping

Set associative mapping is a compromise between direct mapping and fully associative
mapping. In set associative mapping, the cache is divided into several sets, and each set
contains multiple cache lines.
How Set Associative Mapping Works

Memory Address Division:

The memory address is divided into three parts: the tag, the set index, and the block offset.
Tag: Identifies which block is currently stored in the cache line.
Set Index: Determines the specific set where the block can be placed.
Block Offset: Specifies the exact byte within the block.

Mapping Process:
When a memory block needs to be placed in the cache, its set index determines the specific set.
The block can be placed in any cache line within the set.
The tag part of the address is stored in the tag field of the cache line within the set.
The block is then placed in the cache line starting at the offset specified by the block offset.
Set Associative Mapping
 Writing into Cache

Writing into cache involves managing how data modifications are handled both in the cache and
in the main memory

1. Write-Through
Description: In a write-through cache, every write to the cache is immediately written to the main
memory as well.
Advantages:
Ensures data consistency between cache and main memory.
Simpler to implement.
Disadvantages:
Higher write latency since each write operation requires access to the slower main memory.
Increased memory traffic.
2. Write-Back
Description: In a write-back cache, writes are made only to the cache. The modified cache line is
written back to the main memory only when it is evicted from the cache.
Advantages:
Lower write latency since writes are initially made only to the cache.
Reduced memory traffic as multiple writes to the same location result in a single write to the main
memory.
Disadvantages:
More complex to implement due to the need to track modified cache lines (dirty bits).
Potential data inconsistency if the system crashes before dirty lines are written back to memory.
Cache initialization

Cache initialization refers to the process of preparing the cache memory for operation
when a computer system starts up

Enabling or disabling the cache.

Setting the cache size and associativity.
All cache lines are invalidated to ensure no stale data is present. This involves
setting the valid bits of all cache lines to zero and clearing the tags.
Virtual Memory

Virtual memory is a memory management technique that allows a computer to

compensate for physical memory shortages by temporarily transferring data from
random access memory (RAM) to disk storage. This technique provides the illusion
of a very large memory space for applications, even if the physical memory is
limited.
virtual address and physical address

Virtual Address
Definition: A virtual address is an address used by a program to access memory. The
program sees a large, contiguous address space, which is an abstraction provided by the
operating system.
Characteristics:
Isolation: Each process has its own virtual address space, providing isolation from other
processes.
Flexibility: Virtual addresses allow programs to use more memory than physically
available by leveraging techniques like paging and swapping.
Convenience: Simplifies programming as the program does not need to manage physical
memory directly.
Physical Address
Definition: A physical address is an actual address in the computer's physical memory
(RAM).
Characteristics:
Direct Access: Physical addresses are used by the hardware to access the actual memory
cells.
Limitations: Limited by the size of the physical memory installed in the system.
Memory table for Mapping a Virtual Address
 Explanation

Separate Memory : If mapping table is stored in separate memory one additional

memory and one extra memory access time is required.

Main Memory : If it is stored in main memory two access to memory are required. So
program will run at half speed.

Associative Memory : In this the physical memory is broken down into groups of
equal size called blocks, which may range from 64 to 4096 words.
Address Mapping Using Pages

If the data in the address space and the memory space are separately separated into
groups of fixed size, the table implementation of the address mapping is made
simpler.
The physical memory is divided into units called blocks that are equal in size and can
contain anywhere between 64 and 4096 words.
Groups of identically sized address space are referred to as pages. The address space
is divided into 1024 pages, and main memory is divided into 32 blocks, for instance, if a
page or block has 1K words.
Memory Table in Paged System
Program segments are transferred in pages-sized records from auxiliary memory to main
memory. A block is frequently referred to as a "page frame."

The highorder three bits of a virtual address will designate one of the eight pages, and
the low-order 10 bits will provide the line address inside the page, as each page contains
210 = 1024 words.

The memory table buffer register reads the word from the memory page table at the
page number location.
if the presence bit in the word read from the page table is set to 0, which is the default
value.
The needed page must then be retrieved from auxiliary memory and transferred to main
memory before the computation can resume. This is done by making a call to the
operating system.
Associative Memory Page Table
An associative memory can be considered as a memory unit whose stored data can be identified
for access by the content of the data itself rather than by an address or memory location.

The functional registers like the argument register A and key register K each have n bits, one
for each bit of a word.
The match register M consists of m bits, one for each memory word.
The key register (K) provides a mask for choosing a particular field or key in the argument
word.
If the key register contains a binary value of all 1's, then the entire argument is compared
with each memory word. Otherwise, only those bits in the argument that have 1's in their
corresponding position of the key register are compared.
Virtual Memory System
A virtual memory sysytem is a combination of h/w and s/w techniques. It consists of
* Memory management S/W
* Memory management H/W

The memory management S/W system handles all the S/W operations or the
efficient utilization of memory space.
The H/W mapping mechanism and the memory management s/w together
constitutes the aechitecture of a virtual memory.
Page Replacement

Page replacement is a crucial aspect of a virtual memory system. When a process requires a
page that is not in physical memory (resulting in a page fault), the operating system must bring
the required page into RAM. If the RAM is full, it needs to decide which page to remove to make
space for the new page. The decision-making process is governed by page replacement
algorithms.
Two commonly used page replacement algorithms

1. First-In, First-Out (FIFO):

Concept: Evicts the oldest page in memory (the first one that was loaded).
Advantages:
Simple to implement.
Disadvantages:
Does not consider page usage patterns, which can lead to suboptimal performance.
2. Least Recently Used (LRU):

Concept: Evicts the page that has not been used for the longest time.
Advantages:
Intuitively, it works well because pages that haven't been used recently are less likely to be used
soon.
Disadvantages:
Requires keeping track of the order of accesses, which can be costly in terms of time and space.
Secondary Storage

Types of Secondary storage

Fixed Storage
Removable Storage
Fixed Storage
Fixed storage, also known as non-volatile or permanent storage, refers to storage devices
that retain data even when powered off.

Characteristics:
Large storage capacities (from hundreds of gigabytes to several terabytes).
Relatively low cost per gigabyte.
Slower access times compared to solid-state drives (SSDs).

Ex : Hard disk drives (HDD),SSD (solid-state disk),Internal flash memory

.
Removable Storage

Removable storage refers to storage devices that can be easily connected to and
disconnected from a computer or other digital device.

Characteristics:
Capacities range from a few gigabytes to several terabytes.
Plug-and-play functionality via USB ports.
Durable and reliable with no moving parts.

Ex : CD,DVD, Memory cards

Classification of Secondary Storage Devices
Sequential Access storage device

Magnetic Tape is a prime example of a sequential access storage device. It has been
used for decades in computing for data storage and backup purposes

Unlike random access memory (RAM) or hard drives, magnetic tape reads and
writes data sequentially.
This means data must be accessed in a linear order, which can lead to slower
data retrieval times for non-sequential data.
Magnetic tape can store large amounts of data, with modern tapes capable of
holding several terabytes of information on a single cartridge
 Direct Access Storage Devices (DASDs)

Direct Access Storage Devices (DASDs) refer to storage devices that allow data to be read or
written in any order, without having to follow a sequence. This capability provides faster and
more flexible data access compared to sequential access storage devices like magnetic tape

Types of DASDs
1.Hard Disk Drives (HDDs)
Description:
HDDs use spinning magnetic disks (platters) to read and write data.
Characteristics:
Capacity: Typically ranges from 500 GB to 18 TB or more.
Speed: Data access speed is slower compared to SSDs, with typical read/write speeds
ranging from 100 to 200 MB/s.
Durability: More prone to physical damage due to moving parts.
2.Solid-State Drives (SSDs)
Description:

SSDs use flash memory to store data, with no moving parts.

Characteristics:

Capacity: Typically ranges from 120 GB to several TB.

Speed: Much faster than HDDs, with read speeds up to 7,000 MB/s and write speeds up to 5,000
MB/s for NVMe SSDs.
Durability: More resistant to physical shock and have longer lifespan due to the absence of
moving parts.
3.Optical Discs
Description:
Optical discs use laser technology to read and write data on a reflective surface

Characteristics:
Speed: Slower data access compared to HDDs and SSDs.
Durability: Good for long-term storage if kept properly

4. Flash Memory Devices

Description:
Flash memory devices include USB flash drives and memory cards (SD, microSD, CompactFlash).
Characteristics:
Capacity: Ranges from a few GB to several TB.
Speed: Varies widely; USB 3.0/3.1 drives and high-speed SD cards offer faster read/write speeds.
Portability: Highly portable and convenient for data transfer.
RAID (Redundant Array of Independent Disks)

RAID is a technology used to improve the performance and/or reliability of data storage by
combining multiple physical disk drives into a single logical unit. The various RAID levels offer
different balances of performance, data redundancy, and storage capacity.

Key Concepts of RAID

Data Redundancy:
Ensures data is duplicated across multiple disks, providing protection against data loss due to
hardware failure.
Performance:
Some RAID configurations can significantly improve read and/or write speeds by distributing data
across multiple disks.
Capacity:
Depending on the RAID level, the total available storage capacity can be a combination of multiple
disks, with some configurations reserving space for redundancy.
Common RAID Levels / working of RAID
RAID 0 (Striping):
Description: Data is split into blocks and written across all disks in the array.

RAID 1 (Mirroring):
Description: Data is duplicated (mirrored) across two or more disks.
RAID 5 (Striping with Paity):
Description: Data and parity (error-checking information) are striped across three or more disks.

RAID 6 (Striping with Double Parity):

Description: Similar to RAID 5 but with two parity blocks distributed across the disks.

RAID 10 (1+0, or Mirroring and Striping):

Description: Combines RAID 1 and RAID 0 by striping data across mirrored pairs.
THANK YOU