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 APPLICATION NOTE

H8/38602
I2C and SSU Code Example for LCD Display

Introduction

The purpose of this application note is to provide information on the utilisation of two
communication peripherals of the H8/38602 device. These peripherals are the Serial Synchronous
Unit and the I2C peripheral which will be used to communicate with an LCD. The LCD will display
a clock value provided by the real time clock peripheral of the H8/38602 device.

The demonstration uses an MCU board with H8/38602 device (MB-H838602) and some bespoke
interfacing circuitry. The board is powered using a 3V3 power supply. All code was designed using
Renesas' High Performance Embedded Workshop configured to use the Renesas C/C++ compiler
version 6.0.2 and debugged using an E7.

Contents

INTRODUCTION .......................................................................................................................................... 1

CONTENTS .................................................................................................................................................. 1

H8/38602 OVERVIEW AND FEATURES .................................................................................................... 3

THE I2C PERIPHERAL ................................................................................................................................ 4

ICCR1: I2C BUS CONTROL REGISTER 1 H'F078 ....................................................................................... 5

ICCR2: I2C BUS CONTROL REGISTER 2 H'F079 ....................................................................................... 7

ICMR: I2C BUS MODE REGISTER 2 H'F07A ........................................................................................... 8

I2C BUS FORMAT AND TIMING .......................................................................................................... 10

THE SYNCHRONOUS SERIAL UNIT PERIPHERAL ............................................................................... 11

SSCRH – SS CONTROL REGISTER H H'F0E0 .......................................................................................... 11

SSCRH – SS CONTROL REGISTER H H'F0E0 .......................................................................................... 12

SSCRL – SS CONTROL REGISTER L H'F0E1 .......................................................................................... 14

SSMR – SS MODE REGISTER H'F0E2 ......................................................................................... 15

REAL TIME CLOCK PERIPHERAL .......................................................................................................... 17

RTCCR1&2: RTC CONTROL REGISTERS H’F06C & H’F06D .................................................................. 18

THE LCD MODULE.................................................................................................................................... 20

HARDWARE SETUP USING I2C COMMUNICATION .............................................................................. 22

SOFTWARE FOR COMMUNICATION WITH LCD VIA I2C ...................................................................... 26

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 H8/38602
I2C and SSU Code Example for LCD Display
SOFTWARE FOR COMMUNICATION WITH LCD VIA SSU.................................................................... 32

SOFTWARE FOR COMMUNICATION WITH LCD VIA SSU.................................................................... 32

CONCLUSION............................................................................................................................................ 38

WEBSITE AND SUPPORT ........................................................................................................................ 38

REG05B0005-0100/Rev.1.00 October 2008 Page 2 of 39

 H8/38602
I2C and SSU Code Example for LCD Display

H8/38602 Overview and Features

High-speed H8/300H central processing unit with an internal 16-bit architecture
• Upward-compatible with H8/300 CPU on an object level
• Sixteen 16-bit general registers
• 62 basic instructions
• Various peripheral functions
• RTC (can be used as a free-running counter)
• Asynchronous event counter (AEC)
• Timer B1
• Timer W
• Watchdog timer
• SCI (asynchronous or clocked synchronous serial communication interface)
• SSU (synchronous serial communication unit)*
• I2C bus interface (conforms to the I2C bus format advocated by Philips Electronics)* (option)
• 10-bit A/D converter
• Comparators

Note: * SSU and I2C are shared.

Figure 1: H8/38602 Block Diagram

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 H8/38602
I2C and SSU Code Example for LCD Display

The I2C peripheral

• Selection of I2C format or clocked synchronous serial format

• Continuous transmission/reception
• Since the shift register, transmit data register, and receive data register are independent from
each other, the continuous transmission/reception can be performed.
• Use of module standby mode enables this module to be placed in standby mode independently
when not used.
A block diagram of the peripheral is shown in the following figure, figure 2.

Figure 2: Block diagram of the I2C peripheral on H8/38602.

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 H8/38602
I2C and SSU Code Example for LCD Display

ICCR1: I2C Bus Control Register 1 H'F078

7 6 5 4 3 2 1 0

ICE RCVD MST TRS CKS3 CKS2 CKS1 CKS0

Initial Value: 0 0 0 0 0 0 0 0
Read/Write: R/W R/W R/W R/W R/W R/W R/W R/W

The two 8-bit I2C Control read/write registers configure the I2C behaviours. A description of each
of the bits in register ICCR1 is given below:
Bit 7: ICE – I2C Bus Interface Enable
0: Halts the I2C module.
1: Enables the I2C module for transfer operations.
Bit 6: RCVD – Reception Disable
This bit enables or disables the next operation when TRS is 0 and ICDRR is read.
0: Enables next reception.
1: Disables next reception.
Bit 5: MST – Master / Slave Select
This bit is used in combination with the TRS bit below. When this bit is equal to 1 and the clocked
synchronous serial format is selected the clock is output.
Bit 4: TRS – Transmit / Receive Select
The TRS and MST bits are reset when arbitration is lost in the following condition: where the I2C
peripheral operates in the I2C format (as opposed to the clocked synchronous serial format) and the
peripheral is set to master mode. When the TRS and MST bits are reset, a transition to slave receive
mode occurs. If an overrun error occurs when the device is set to master and clock synchronous
mode, MST is cleared to 0. Slave receive mode is then entered.
A change of value of the TRS bit should only be performed between transfer frames.
TRS is automatically set to 1 when the I2C peripheral is set to slave mode and the first seven bits of
a slave address sent on the I2C interface matches that in SAR with the eighth bit equal to 1.
The combination of TRS and MST bits which provide specific I2C configurations are given below:
00: Slave Receive Mode
01: Slave Transmit Mode
10: Master Receive Mode
11: Master Transmit Mode

CKS[3:0]: Transfer clock select 3:0

These bits set the clock transfer rate when the I2C peripheral is set to master mode. The relationship
between the transfer rate and the setting of these bits is shown in the following table:

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I2C and SSU Code Example for LCD Display

CKS bits Clock Transfer Rate

Bit3 Bit 2 Bit 1 Bit 0 Clock φ = 2MHz φ = 5MHz φ = 10MHz

0 0 0 0 φ/28 71.4 kHz 179 kHz 357 kHz
0 0 0 1 φ/40 50.0 kHz 125 kHz 250 kHz
0 0 1 0 φ/48 41.7 kHz 104 kHz 208 kHz
0 0 1 1 φ/64 31.3 kHz 78.1 kHz 156 kHz
0 1 0 0 φ/80 25.0 kHz 62.5 kHz 125 kHz
0 1 0 1 φ/100 20.0 kHz 50.0 kHz 100 kHz
0 1 1 0 φ/112 17.9 kHz 44.6 kHz 89.3 kHz
0 1 1 1 φ/128 15.6 kHz 39.1 kHz 78.1 kHz
1 0 0 0 φ/56 35.7 kHz 89.3 kHz 179 kHz
1 0 0 1 φ/80 25.0 kHz 62.5 kHz 125 kHz
1 0 1 0 φ/96 20.8 kHz 52.1 kHz 104 kHz
1 0 1 1 φ/128 15.6 kHz 39.1 kHz 78.1 kHz
1 1 0 0 φ/160 12.5 kHz 31.3 kHz 62.5 kHz
1 1 0 1 φ/200 10.0 kHz 25.0 kHz 50.0 kHz
1 1 1 0 φ/224 8.9 kHz 22.3 kHz 44.6 kHz
1 1 1 1 φ/256 7.8 kHz 19.5 kHz 39.1 kHz
Table 1: CKS[3:0] settings with respect to clock rate for serial synchronous transfers.

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 H8/38602
I2C and SSU Code Example for LCD Display

ICCR2: I2C Bus Control Register 2 H'F079

7 6 5 4 3 2 1 0

BBSY SCP SDA0 SDAOP SCLO - IICRST -

Initial Value: 0 1 1 1 1 1 0 1
Read/Write: R/W W R/W R/W R - R/W -

Bit 7: BBSY – I2C Bus Interface Enable

This bit confirms whether or not the I2C bus is busy or released. This bit is also used
to issue start or stop conditions on the I2C bus when the I2C peripheral is set to master mode.
See the description given below for more information. This bit has no meaning when it is set
to the clocked synchronous serial format. The BBSY bit is set to 1 when SDA changes from
High to Low whilst SCL is high, as it is assumed this is a start condition. The BBSY bit is
cleared to 0 when SDA makes a transition from low to high whilst SL is high as it is
assumed this is a stop condition.

Bit 6: SCP – Start/Stop issue Condition Disable

This bit controls the issue of start / stop conditions when the I2C peripheral is set to
master mode. This bit is always read as 1. If a 1 is written then this data is not stored.
Start/Stop Condition note: To issue a start condition a 1 should be written to this bit and a 0 to SCP.
This procedure should also be used when retransmitting a start condition. To issue a stop condition
a 0 should be written to both BBSY and SCP using a MOV instruction.

Bit 5: SDA0 – SDA Output Value Control

This bit is used to modify the output level of SDA. It should be used in conjunction with the
SDAOP bit as this protects the SDA0 bit from alteration. This bit should not be manipulated during
transfer.
0: When reading, SDA pin outputs low. When writing, SDA pin is changed to output low.
1: When reading, SDA pin outputs high. When writing, SDA pin is changed to output Hi-Z
(outputs high by external pull-up resistance).

Bit 4: SDAOP – SDAO Write Protect

This bit allows the SDAO bit value above to be altered. To change the output level of the SDA pin,
clear SDAO and SDAOP to 0 using the MOV instruction. This bit is always read as 1.

Bit 3: SCLO – SCL output Value Control

This bit monitors the output level of SCL. When SCL outputs a high, SCL0 is 1, when SCL outputs
a low then SCLO is. When SCL is low SCLO is 0.

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 H8/38602
I2C and SSU Code Example for LCD Display
Bit 2: Reserved
This bit is reserved and is always read as 1.

Bit 1: I2CRST – I2C Control Part Reset

This bit resets the control part of the I2C peripheral except for the I2C registers. When a hang up
occurs during I2C operation, this bit may be set to 1 resetting the I2C control part without setting
ports and initialising registers.

Bit 0: Reserved
This bit is always read as 1 and cannot be modified.

ICMR: I2C Bus Mode Register 2 H'F07A

7 6 5 4 3 2 1 0

MLS WAIT - - BCWP BC2 BC1 BC0

Initial Value: 0 0 1 1 1 0 0 0
Read/Write: R/W R/W - - R/W R/W R/W R/W

Bit 7: MLS – First/LSB-First Select

0: MSB First
1: LSB First
This bit should be set to 0 when the I2C format is used.

Bit 6: Wait – Wait Insertion Bit

When the I2C peripheral is set to master mode with the I2C format selected, this bit selects whether
to insert a wait after the data transfer (not including the acknowledge bit). When WAIT is set to 1,
after the fall of the clock for the final data bit, the low period is extended for two transfer clocks. If
WAIT is cleared to 0, the data and acknowledge bits are transferred consecutively with no WAIT
inserted.

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 H8/38602
I2C and SSU Code Example for LCD Display
Bit 5, 4: Reserved

Bit 3: BCWP – BC Write Protect

This bit protects the BC settings shown below. To modify the BC bit values, clear this bit to 0 using
the MOV instruction. In clock synchronous serial mode, BC should not be modified.
0: Values of BC2 to BC0 are set.
1: Changes to the values of BC2 to BC0 are invalid.

Bit [2:0]: BC[2:0 ] Bit Counter 2 to 0

These bits specify the number of bits that are to be transmitted next. They hold the remaining
number of bits that are to be transferred. When the I2C format is selected, the ninth bit holds the
acknowledge bit. Changes to the value of the BC bits should be made between frame transfers. If
the value entered to the BC bits is not equal to zero, they should be entered while the SCL is low.
At the end of a transfer the value in these bits is 000 (including the acknowledge bit). These bits
should not be modified when the peripheral is set to synchronous serial format.

BC2 BC1 BC0 Bits to be transferred in Bits to be transferred in Clock

I2C Bus Format Synchronous Format
0 0 0 9 bits 8 bits
0 0 1 2 bits 1 bits
0 1 0 3 bits 2 bits
0 1 1 4 bits 3 bits
1 0 0 5 bits 4 bits
1 0 1 6 bits 5 bits
1 1 0 7 bits 6 bits
1 1 1 8 bits 7 bits

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 H8/38602
I2C and SSU Code Example for LCD Display

I2C Bus Format and Timing

Figure 3 below shows the I2C format for data transfer. The first format shows continuous transfer.
In this instance the slave address is written onto the bus followed by a Read/Write value. The slave
device is then expected to issue an acknowledge. After the time it takes for the slave device to issue
an acknowledge, up to 8 bits of data may be placed on the bus either by the slave or master device
depending on the R/W value. Once all the data is transmitted, a stop bit is issued. The second
format shows how data is retransmitted.

Figure 3: I2C Bus communication format

Figure 4 shows the timing of the I2C bus.

Figure 4: I2C Timing

S: Start Condition
SLA: Slave Address
R/Wn: Direction of data transfer. For a read from the slave device, this will be 1. For a write
to the slave address this will be 0.
A: Acknowledge. The receiving device pulls SDA low during the 9th SCL clock pulse.
DATA: Transfer Data
P: Stop bit. This is issued by the master which pulls SDA high while SCL is also high.

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 H8/38602
I2C and SSU Code Example for LCD Display

The Synchronous Serial Unit Peripheral

• This is an SPI serial peripheral interface compatible peripheral which can be operated in clocked
synchronous communication mode or four-line bus communication mode (including bi-
directional communication mode)
• Can be operated as a master or a slave device
• Choice of eight internal clocks (φ/256, φ/128, φ/64, φ/32, φ/16, φ/8, φ/4, and φSUB/2) and an
external clock as a clock source
• Clock polarity and phase of SSCK can be selected
• Choice of data transfer direction (MSB-first or LSB-first)
• Receive error detection: overrun error, Multi-master error detection: conflict error
• Five interrupt sources: transmit-end, transmit-data-empty, receive-data-full, overrun error, and
conflict error
• Continuous transmission and reception of serial data are enabled since both transmitter and
receiver have buffer structure
• Use of module standby mode enables this module to be placed in standby mode independently
when not used.

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 H8/38602
I2C and SSU Code Example for LCD Display

SSCRH – SS Control Register H H'F0E0

7 6 5 4 3 2 1 0

MSS BIDE SOOS SOL SOLP SCKS CSS1 CSSO

Initial Value: 0 0 0 0 1 0 0 0
Read/Write: R/W R/W R/W R/W R/W R/W R/W R/W

Bit 7: MSS – Master/Slave Device Select

Selects whether this module is used as a master device or a slave device. When this module is used
as a master device, transfer clock is output from the SSCK pin. When the CE bit in SSSR is set, this
bit is automatically cleared.
0: Operates as a slave device
1: Operates as a master device

Bit 6: BIDE – Bidirectional Mode Enable

Selects whether the serial data input pin and the output pin are both used or only one pin is used.
When the SSUMS bit in SSCRL is 0, this setting is invalid.
0: Normal mode. Communication is performed using two pins.
1: Bidirectional mode. Communication is performed using only one pin.

Bit 5: SOOS - Serial Data Open-Drain Output Select

Selects whether the serial data output pin is CMOS output or NMOS open-drain output. The serial
data output pin is changed according to the register setting value.
0: CMOS output
1: NMOS open-drain output

Bit 4: SOL - Serial Data Output Level Setting

Although the value in the last bit of transmit data is retained in the serial data output after the end of
transmission, the output level of serial data can be changed by manipulating this bit before or after
transmission. When the output level is changed, the SOLP bit should be cleared to 0 and the MOV
instruction should be used. If this bit is written during data transfer, erroneous operation may occur.
Therefore this bit must not be manipulated during transmission.
0: Shows serial data output level to low in reading. Changes serial data output
level to low in writing
1: Shows serial data output level to high in reading. Changes serial data output
level to high in writing

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 H8/38602
I2C and SSU Code Example for LCD Display
Bit 3: SOLP - SOL Write Protect
When a change in the output level of the serial data lines is required, the MOV instruction should be
used to clear this bit to 0 and then either set or clear the SOL bit.
0: In writing, output level can be changed according to the value of the SOL bit.
1: In reading, this bit is always read as 1. In writing, it cannot be modified output
level.

Bit 2: SCKS - SSCK Pin Select

Selects whether the SSCK pin functions as a port or a serial clock pin.
0: Functions as a port
1: Functions as a serial clock pin

Bit [1:0]: CSS[1:0] - SCSn Pin Select

Selects whether the SCS pin functions as a port, an SCS input, or SCS output. When the SSUMS bit
in SSCRL is 0, the SCS pin functions as a port regardless of the setting of this bit.
00: Functions as a port
01: Functions as an SCS input
1x: Functions as an SCS output (however, functions as an SCS input before
starting transfer)

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 H8/38602
I2C and SSU Code Example for LCD Display

SSCRL – SS Control Register L H'F0E1

7 6 5 4 3 2 1 0

- SSUMS SRES SCKOS CSOS - - -

Initial Value: 0 0 0 0 1 0 0 0
Read/Write: - R/W R/W R/W R/W - - -

Bit 7: Reserved

Bit 6: SSUMS - SSU Mode Select

Selects which combination of the serial data input pin and serial data output pin is used.
0: Clocked synchronous communication mode Data input:
SSI pin, Data output: SSO pin
1: Four-line bus communication mode
When MSS = 1 and BIDE = 0 in SSCRH:
Data input: SSI pin, Data output: SSO pin
When MSS = 1 and BIDE = 0 in SSCRH:
Data input: SSO pin, Data output: SSI pin
When BIDE = 1 in SSCRH:
Data input and output: SSO pin

Bit 5: SRES – Software Reset

When this bit is set to 1, the SSU internal sequencer is forcibly reset. Then this bit is automatically
cleared. The register value in the SSU is retained.

Bit 4: SCKOS - SSCK Pin Open-Drain Output Select

Selects whether the SSCK pin functions as CMOS output or NMOS open-drain output.
0: CMOS output
1: NMOS open-drain output

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 H8/38602
I2C and SSU Code Example for LCD Display
Bit 3: CSOS - SCS Pin Open-Drain Output Select
Selects whether the SCS pin functions as CMOS output or NMOS open-drain output.
0: CMOS output
1: NMOS open-drain output

Bit[2:0]: Reserved

SSMR – SS Mode Register H'F0E2

7 6 5 4 3 2 1 0

MLS CPOS CPHS - - - - -

Initial Value: 0 0 0 0 0 0 0 0
Read/Write: R/W R/W R/W - - - - -

Bit 7: MLS - MSB-First/LSB-First Select

Selects whether data transfer is performed in MSB-first or LSB-first.
0: LSB-first
1: MSB-first

Bit 6: CPOS – Clock Polarity Select

Selects the clock polarity of SSCK.
0: Idle state = high
1: Idle state = low

Bit 5: CPHS - Clock Phase Select

Selects the clock phase of SSCK.
0: Data change at first edge
1: Data latch at first edge

Bit [4:3]: Reserved

Bit [2:0]: CKS[2:0] - Transfer Clock Rate Select

Sets transfer clock rate (prescaler division ratio) when the internal clock is selected.
The system clock (φ) is halted in subactive mode or subsleep mode. Select φSUB/2 in these modes.

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 H8/38602
I2C and SSU Code Example for LCD Display
Bit 2 Bit 1 Bit 0
0 0 0 φ/256
0 0 1 φ/128
0 1 0 φ/64
0 1 1 φ/32
1 0 0 φ/16
1 0 1 φ/8
1 1 0 φ/4
1 1 1 φSUB/2

Please note: There are other registers associated with the SSU peripheral. For details please see the
Synchronous Serial Communication Unit (SSU) section in the H8/38602 hardware manual

REG05B0005-0100/Rev.1.00 October 2008 Page 16 of 39

 H8/38602
I2C and SSU Code Example for LCD Display

Real Time Clock Peripheral

• The RTC may be started or stopped as required

• The RTC may be Reset
• An 8-bit register is used to hold each of the seconds, minutes, hours and day of the week values.
These registers may be read or written to.
• The counter may be used as an 8-bit free running counter.
• The clock source is selectable from φ/8, φ/32, φ/128, φ/256, φ/512, φ/2048, φ/4096, φ/8192 and
the 32.768 KHz subclock.
• The RTC module may be placed in module standby mode

A block diagram of the Real time clock is shown below in figure 5

Figure 5: RTC Block Diagram

The RSECDR stores the current values of seconds, the RMINDR holds current value of minutes,
the RHRDR holds the value of hours, and the RWKDR stores the day of the week. These are
connected to the internal bus so that they may be read or written to. The RTCCSR selects the
required clock source. The RTCCR1 determines the operation of the RTC peripheral and RTCCR2
enables or disables the RTC interrupts. RTCFLG holds the status of the RTC interrupts.

REG05B0005-0100/Rev.1.00 October 2008 Page 17 of 39

 H8/38602
I2C and SSU Code Example for LCD Display

RTCCR1&2: RTC Control Registers H’F06C & H’F06D

RTCCCR1:
7 6 5 4 3 2 1 0

RUN 12/24 PM RST - - - -

Initial Value: - - - 0 0 0 0 0

Read/Write: R/W R/W R/W R/W - - - -

RTCCR2:
7 6 5 4 3 2 1 0

FOIE WKIE DYIE HRIE MNIE 1SEIE 05SEIE 025SEIE

Initial Value: - - - - - - - -

Read/Write: R/W R/W R/W R/W R/W R/W R/W R/W

The two 8-bit RTC Control read/write registers configure the RTC behaviours. A description of
each of the bits in register RTCCR1 is given below:
Bit 7: RUN – halts or starts RTC operation
0: Stops / Halts RTC operation.
1: Starts RTC operation.
Bit 6: 12/24 – sets 12 or 24 hour time measurement
0: The RTC will count in 12 hour time.
The PM bit in this register indicates whether the time is a morning or afternoon value.
The values in the hour data register will be in the range 0 to 11.
1: The RTC will count in 24 hour time.
The values in the hour data register will be in the range 0 to 23.
Bit 5: PM – indicates morning or afternoon time
0: The time given by the RTC peripheral is AM
1: The time given by the RTC peripheral is PM
Bit 4: RST – RTC Reset
0: The RTC operates normally (i.e. no reset of the RTC is initiated)
1: All RTC registers apart from RTCCSR and this bit are reset. The bit must be
manually put to 0 after the reset is initiated. All control circuits within the RTC are
also reset.
Bit 3 to 0: Reserved
The RTCCR2 register enables / disables any of the RTC interrupts. The RTC has 8 interrupt sources.
A description of all the bits in RTCCR2 is given below:

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I2C and SSU Code Example for LCD Display
Bit 7: FOIE – Free Running Counter Interrupt Enable
0: Disables the Free running counter overflow interrupt.
1: Enables the Free running counter overflow interrupt.
Bit 6: WKIE – Week Periodic Interrupt Enable
0: Disables a week periodic interrupt.
1: Enables a week periodic interrupt. (This will occur once every week).
Bit 5: DYIE – Day Periodic Interrupt Enable
0: Disables a day periodic interrupt.
1: Enables a day periodic interrupt. (This will occur once every day).
Bit 4: HRIE – Hour Periodic Interrupt Enable
0: Disables an hour periodic interrupt.
1: Enables an hour periodic interrupt. (This will occur once every hour).
Bit 3: MNIE – Minute Periodic Interrupt Enable
0: Disables a minute periodic interrupt.
1: Enables a minute periodic interrupt. (This will occur once every minute).
Bit 2: 1SEIE – 1 Second Periodic Interrupt Enable
0: Disables a second periodic interrupt.
1: Enables a second periodic interrupt. (This will occur once every second).
Bit 1: 05SEIE – 0.5 Second Periodic Interrupt Enable
0: Disables a 0.5 second periodic interrupt.
1: Enables a 0.5 second periodic interrupt. (This will occur once every half
second).
Bit 0: 025SEIE – 0.25 Second Periodic Interrupt Enable
0: Disables a 0.25 second periodic interrupt.
1: Enables a 0.25 second periodic interrupt. (This will occur once quarter of a
second).

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 H8/38602
I2C and SSU Code Example for LCD Display

The LCD Module

The LCD used for this application was a LCD216S made by Mindsensors, a picture of the LCD is
shown in figure 6. It has a 16 column by 2-line text display and a backlight which can be turned
ON/OFF via software. It is possible to communicate with the LCD module via RS232, serial
peripheral interface (SPI) or I2C.
Figure 6: LCD Pin Connection
The pins are as follows

Pin 1: +5V supply voltage for Module

Pin 2: Serial clock for I2C and SPI and Rx for RS232
Pin 3: GND connection for Module and reference for data communication
Pin 4: No connect
Pin 5: Serial Data in for I2C and SPI
Pin 6: No connect
Pin 7: CS\ for SPI and RS232
When the LCD is first powered from a 5V power supply, it is configured for I2C communications
with the slave address 0xE0. A setup switch is provided on the LCD module for selection and
configuration of communication interface. To enter the setup interface on the LCD module, the
setup switch should be pressed whilst the power is cycled until “Setup” appears on the display.
When the switch is released, the LCD will display the current communication interface settings.
The desired interface may then be selected by pressing the set up switch repeatedly if required.
When the correct communication settings are displayed, the module should be powered down. The
module will then power up in the new communication settings.
Once the LCD is appropriately set up for communication, characters may be displayed on the LCD
by sending the characters' ASCII value to the LCD. Table 2 below shows the relationship of the
value sent to the LCD and the character displayed on the LCD.
The LCD also has a number of commands which may be used to move the cursor, show the cursor,
clear the screen, turn the backlight On/OFF, etc. All the commands start 0xFE (this is blank in the
character table) which is then immediately followed by the command number.

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I2C and SSU Code Example for LCD Display
Table 2: Relationship between the data value sent to LCD and the character displayed.

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 H8/38602
I2C and SSU Code Example for LCD Display

Hardware Setup Using I2C Communication

The H8/38602 device is operable from the 3V3 supply; however the LCD requires 5V CMOS levels
at its I2C pins. Some hardware interface is therefore required to perform the voltage translation
between the LCD and H8/38602 device. The following figure 7 shows this hardware interface.

Figure 7: Hardware interface for I2C Communication between LCD and H8/38602 device.

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 H8/38602
I2C and SSU Code Example for LCD Display
The device used for performing the level shifting is a P82B96. This is designed for I2C
communications up to 400 KHz. For this purpose it is possible to connect the Rx and Tx lines
together and connect this to one of the I2C communication lines. Other I2C applications may require
that they be kept separate. The P82B96 requires that one side of the I2C lines operates from 5V. The
other side may operate from any voltage between 2 and 15V. For this application we require the
LCD I2C communications to be at a 5V level and the H8/38602 I2C communications to be at a 3V3
level. Therefore the VCC level of the P82B96 is set to 3V3 volts.
The SDA and SCL lines on the microcontroller side are pulled to the 3V3 power supply via 4K7
resistors. This is a requirement of I2C communications, as the devices pulls the line low when
required. Similarly, therefore, the SDA and SCL lines on the LCD side also have 4K7 resistors
which pull these lines to 5V. Figure 8 is a picture of the board used as the I2C interface

Figure 8: I2C Interface Board

5V I/P Line 3V3 I/P Line LCD Connector

GND Line

P82B96

LCD Support

Pull Up Resistors

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 H8/38602
I2C and SSU Code Example for LCD Display

Hardware Setup Using SSU Communication

The H8/38602 is a 3V3 device, but the LCD requires 5V at its SPI pins. The hardware configuration
used to perform the voltage translation between the LCD and the H8/38602 is shown in figure 9
below:

Figure 9: Hardware interface between LCD and H8/38602 for SSU communications

In this case a 74HCT244 device was used. This has two sets of four inputs and four outputs. Pulling
the output enable line low enables the output. For this application only three lines are required
therefore the second set of outputs are not enabled (2OEn is pulled high). All unused inputs are
pulled low. Each input has been given the notation SAN where S is the set number and N is the
number in that set. The A shows it is an input. The outputs are denoted SYN where S is the set and
N is the number in that set. The Y shows this pin is an output. The output attributed to a particular
input can be seen where the S and N numbers are equal. For example the input 1A0 has the
associated output 1Y0.

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 H8/38602
I2C and SSU Code Example for LCD Display
In this application the serial communication is not bidirectional. This is not the case in all SPI
applications. Here only three lines are required: SSCK for the serial clock, SDO as the output from
the H8/38602 to the LCD providing the data line for communication and SCSn which notifies the
LCD when the master wants to communicate with it.
Figure 10 shows a picture of the interface board used

LCD Module

MBH838602

E7 Connector
Cable

74HCT24 Grounded Inputs

Figure 10: SSU interface board with MBH838602 and LCD devices.

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 H8/38602
I2C and SSU Code Example for LCD Display

Software for communication with LCD via I2C

Figure 11 shows the program flow diagram for I2C communication between the H8/38602 and the
LCD.

Figure 11: Initialisation Procedure for I2C interface

Firstly the I2C is initialised in order that this interface can be used to clear the LCD and transmit
instruction / characters to the LCD. The LCD is then initialised so that it may be cleared ready for a
time value to be written to it. Lastly, the RTC is initialised. This starts the RTC counting. It is now
possible to grab the RTC values and write them to the LCD. An infinite loop is set up which takes
the RTC register values and writes them to the LCD display. The following code shows the function
Main.

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I2C and SSU Code Example for LCD Display

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 H8/38602
I2C and SSU Code Example for LCD Display

Firstly the function declares a set of temporary variables which are used to hold the current time
value from each of the RTC registers. The I2C peripheral is then initialised, followed by the LCD
device and finally the RTC module.
The code then enters an infinite loop as shown in figure 11. Here the code resets the LCD cursor
back to the home position, ready to write a new time value over the old. The RTC registers are then
read when appropriate, and their values stored in the temporary variables declared at the beginning
of the function. These values may then be transmitted to the LCD in an ASCII format. Two ":"'s are
used to separate the hours, minutes and seconds values.
The following code shows the Init_LCD function.

This code turns off the blinking cursor on the LCD, sends the cursor to home so that the next
character to be written to the display is displayed at the top left corner and clears the display of all
text.
The code for the Init_RTC function is shown in the following text

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 H8/38602
I2C and SSU Code Example for LCD Display

This is the same function as shown in section “Software for Communication with LCD via SSU”.
For details of this code please refer to this section.
Three functions are used to communicate with the LCD via the I2C interface. These are Init_IIC
which initialises the I2C peripheral of the H8/38602, the Write_bytes function which writes two
bytes on the I2C bus to the LCD and the Transmit_data_End function which transmits the last byte
of data to the LCD. The following code shows the Init_IIC function

This function turns on the I2C module by setting the IICKSTP bit in the clock stop register. The ICE
bit in ICCR1 (the I2C Control Register 1) is then set to 1 enabling the I2C interface. The I2C Mode
register is then configured for 9 bit LSB first transmission with no wait bit. The I2C interrupts are
then all disabled and their flags cleared. The ICCR2 register is then set up to make the SDA output
high. The code then waits for the bus to be free.
The Write_bytes function is shown in the code above

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 H8/38602
I2C and SSU Code Example for LCD Display

The status of the I2C bus was determined in Init_IIC so it is now possible to set the peripheral as a
transmit master, and then issue a start condition. The start condition is issued by writing a '1' to the
BSY bit and a '0' to SCP bit in the I2C control register 2 ICCR2. One a start condition is issued, the
code waits to ensure the Transmit Data register is empty before putting data in the Transmit data
register. The first byte to be transmitted should be the LCD I2C slave address followed by the Write
value (0x00). Before transmitting the next byte of data, the device should wait until the transmit end
flag is set. Again the device should wait until the transmit data register empty flag is set and that
another acknowledge was received before transmitting another byte of data. The last byte of data is
then passed to the Write_data_End function, the code for which follows.

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 H8/38602
I2C and SSU Code Example for LCD Display

The last byte of data may be placed in the data transmit register as the TDRE flag was checked
before entering this function. The device should then wait until both the TDRE and TEND flags are
set. The TEND flag is then cleared (ready for a byte of data to be transmitted in the future). A Stop
condition is then given by clearing both the BBSY and SCP bit in IICR2. The device should then
wait until the STOP flag is set. Now the TDRE flag can be cleared ready for future transmissions.

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 H8/38602
I2C and SSU Code Example for LCD Display

Software for communication with LCD via SSU

Figure 12 shows the software flow for the SSU interface

Figure 12: SSU interface software flow diagram

Firstly the SSU is initialised in order that this interface can be used to clear the LCD and transmit
instruction / characters to the LCD. The LCD is then initialised so that it may be cleared ready for a
time value to be written to it. Lastly, the RTC is initialised. This starts the RTC counting. It is now
possible to grab the RTC values and write them to the LCD. An infinite loop is set up which takes
the RTC register values and writes them to the LCD display. The following code shows the function
Main.

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I2C and SSU Code Example for LCD Display

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 H8/38602
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The variables declared at the top of the function are used to hold the temporary current time value
from each part of the second, minute and hour RTC time registers. The Synchronous Serial
Communication Unit is then initialised and configured to communicate with the LCD. The LCD
may then be initialised. This clears the display and allows the next character transmitted to the LCD
will be displayed in the top left corner of the LCD. The RTC is then started. Starting it at this stage
prevents the first second from being missed in the display of the current time. The code then goes
into an infinite loop, moving the LCD cursor home, grabbing the current time value from the RTC
registers whilst these are not busy, and displaying the time value on the LCD.
The Init_SSU function is shown in the following code.

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 H8/38602
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Firstly the SSU peripheral is switched on in the clock stop register. The following figure (figure 13)
shows the flow diagram used to initialise the SSU peripheral.

Figure 13: SSU Initialisation

The Init_SSU function then follows the flow diagram in figure 13. The TE and RE bits are cleared
to 0. The SSUMS bit is then set to 1 (instead of 0), as this application requires four line
communication mode. The LCD needs the SPI to communicate in mode 1, 1 and so the CPOS and
CPHS bits are set to 1 and 0 respectively. MLS is set to MSB first and the clock bits are set to the
slowest setting of φ/256. The SSCRH register is then set up to configure the peripheral as a master
with serial clock pins and chip select pins enabled. The BIDE bit is also cleared for two pin
communication and the SOOS bit cleared for CMOS output. The status flags may then all be
cleared and the transmit enable bit set. The SSU is now ready to transmit to the LCD.

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 H8/38602
I2C and SSU Code Example for LCD Display
The LCD displays the character whose ASCII representation is sent to it. Instructions to the LCD
itself start 0xFE; the byte following this indicates the instruction. The initialisation code for the
LCD is shown below

This function clears the LCD display, turns off the visibility of the blinking cursor, moving it to the
top left of the LCD display. The LCD is now ready for the time to be displayed on it.
The last initialisation function to be called is Init_RTC. The code for this is shown in the following
program code.

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 H8/38602
I2C and SSU Code Example for LCD Display
Firstly, as with the SSU peripheral, the RTC peripheral is switched on via the clock stop register.
Figure 14 shows the initialisation process required for the RTC peripheral

Firstly the BSY flag should be checked until it is 0. The RTC peripheral should then be stopped by
putting the Run bit to 0. The RST bit should then be toggled to initiate an internal reset of the RTC
registers and clock controller. This value is then entered into the RTC registers. Finally the RUN bit
is set to 1 again to start the peripheral. The Init_RTC code performs this initialisation with a couple
of differences. The RTC interrupt is enabled in the RTC control register 1, and the RTC is set to 24
hour mode. Further the RTC second interrupt is enabled in the interrupt enable register and the RTC
control register 2. It is not necessary to initialise the minute and hour RTC registers as these should
be at 0 already.
Once all the peripherals have been initialised it is now possible to write data to the LCD. The
Write_one_char function shown in the following coding writes one byte of data to the LCD via the
SSU bus.

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 H8/38602
I2C and SSU Code Example for LCD Display
This function enables the transmit data so that the peripheral may transmit data on the bus. Next the
device should wait to check that the transmit data register is empty before placing data in this
register. Once this check is complete, a character of data (one byte) may be written into the transmit
register. The device should then wait until this byte has been transmitted by checking the Transmit
End flag. The TEND flag may then be cleared and transmission disabled to complete the
transmission.

Conclusion
The MBH838602 board was successfully used with an LCD display and some interfacing circuitry.
Communication to the LCD from the H8/38602 was achieved using both the SSU and I2C
peripheral of the device.

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 H8/38602
I2C and SSU Code Example for LCD Display

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REG05B0005-0100/Rev.1.00 October 2008 Page 39 of 39