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UNIT NO 2-Microprocessors and Microcontrollers
8085-ADDRESSING MODES
❏ Immediate Addressing
❏ Register Addressing
III VI ❏ Direct Addressing
❏ Indirect Addressing
20MEPC603 ❏ Implied Addressing
❏ 8085 Interrupts
MECHATRONICS
20MEPC603
MECHATRONICS
8085 Addressing Modes
These are the instructions used to transfer the data from one
register to another register, from the memory to the register,
and from the register to the memory without any alteration
in the content.
Addressing modes in 8085 is classified into 5 groups
20MEPC603
MECHATRONICS
8085 Addressing Modes
● Immediate addressing mode
In this mode, the 8/16-bit data is specified in the instruction
itself as one of its operand. For example: MVI B, 20F:
means 20F is copied into register B.
● Register addressing mode
In this mode, the data is copied from one register to
another. For example: MOV C, B: means data in register B
is copied to register C.
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MECHATRONICS
8085 Addressing Modes
● Direct addressing mode
In this mode, the data is directly copied from the given
address to the register. For example: LDA 5000K: means
the data at address 5000K is copied to register A.
● Indirect addressing mode
In this mode, the data is transferred from one register to
another by using the address pointed by the register. For
example: MOV B, M: means data is transferred from the
memory address pointed by the register to the register B.
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MECHATRONICS
8085 Addressing Modes
● Implied addressing mode
This mode doesn’t require any operand; the data is specified
by the opcode itself. For example: CMP.
This instruction automatically complement the contents of
Accumulator.
20MEPC603
MECHATRONICS
Interrupts in 8085
● Interrupts are the signals generated by the external devices
to request the microprocessor to perform a task. There are 5
interrupt signals, i.e. TRAP, RST 7.5, RST 6.5, RST 5.5,
and INTR.
● Interrupt are classified into following groups based on their
parameter −
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MECHATRONICS
Interrupts in 8085
● Vector interrupt − In this type of interrupt, the interrupt
address is known to the processor. For example: RST7.5,
RST6.5, RST5.5, TRAP.
● Non-Vector interrupt − In this type of interrupt, the
interrupt address is not known to the processor so, the
interrupt address needs to be sent externally by the device to
perform interrupts. For example: INTR.
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8085 Addressing Modes
● Maskable interrupt − In this type of interrupt, we can
disable the interrupt by writing some instructions into the
program. For example: RST7.5, RST6.5, RST5.5.
● Non- Maskable interrupt − In this type of interrupt, we
cannot disable the interrupt by writing some instructions
into the program. For example: TRAP.
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8085 Addressing Modes
● Software interrupt − In this type of interrupt, the
programmer has to add the instructions into the program to
execute the interrupt. There are 8 software interrupts in
8085, i.e. RST0, RST1, RST2, RST3, RST4, RST5, RST6,
and RST7.
● Hardware interrupt − There are 5 interrupt pins in 8085
used as hardware interrupts, i.e. TRAP, RST7.5, RST6.5,
RST5.5, INTA.
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MECHATRONICS
8085 Addressing Modes
Note − NTA is not an interrupt, it is used by the
microprocessor for sending acknowledgement. TRAP has
the highest priority, then RST7.5 and so on.
● Interrupt Service Routine (ISR)
A small program or a routine that when executed, services
the corresponding interrupting source is called an ISR
● TRAP
It is a non- maskable interrupt, having the highest priority
among all interrupts. By default, it is enabled until it gets
acknowledged. In case of failure, it executes as ISR and
sends the data to backup memory. This interrupt transfers
the control to the location 0024H.
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8085 Addressing Modes
● RST7.5
It is a maskable interrupt, having the second highest priority
among all interrupts. When this interrupt is executed, the
processor saves the content of the PC register into the stack
and branches to 003CH address.
● RST 6.5
It is a maskable interrupt, having the third highest priority
among all interrupts. When this interrupt is executed, the
processor saves the content of the PC register into the stack
and branches to 0034H address.
● RST 5.5
It is a maskable interrupt. When this interrupt is executed, the
processor saves the content of the PC register into the stack
and branches to 002CH address.
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8085 Addressing Modes
INTR
● It is a maskable interrupt, having the lowest priority among all
interrupts. It can be disabled by resetting the microprocessor.
● When INTR signal goes high, the following events can occur
● The microprocessor checks the status of INTR signal during
the execution of each instruction.
● When the INTR signal is high, then the microprocessor
completes its current instruction and sends active low interrupt
acknowledge signal.
● When instructions are received, then the microprocessor saves
the address of the next instruction on stack and executes the
received instruction.
