Electronic Circuits I

Lecture 14: BJT Amp

Junwon Jeong
 Review of Last Lecture

- How to measure input/output impedances?

- What are impedances of BJT?
- Small-signal analysis procedures
- Why biasing important?

2
Measurement of I/O Impedances

Fig. 5.2 Measurement of (a) input and (b) output impedances.

• Method
– 1. Applying voltage source to the two nodes
– 2. Measuring the resulting current
– 3. Defining vx/ix as the impedance

• Measuring the input impedance

– The output remains open: Not connected to any external sources.
• Measuring the output impedance
– The input remains short: All independent sources must be set to 0.

3
Summary of BJT Impedances

Check the ground !

Fig. 5.7 Summary of impedances seen at terminals of a transistor.

• Looking into the base, rπ if the emitter is grounded.

• Looking into the collector, ro if the emitter is grounded.
• Looking into the emitter, 1/gm if the base is grounded.
(the Early effect is neglected.)

4
Input/Output Impedance of Amplifier

AV

5
Why We Learn Biasing?
• Recall from Chapter 4 (Specifically, 4.4)
gm = I C
VT

rπ = 
gm

ro  VA
IC

Fig. 4.18 Illustration of transconductance.

• A bipolar transistor operates as an amplifying device if it is biased in the active

mode.
• The device must ensure that the base-emitter and base-collector junctions are
forward- and reverse-biased, respectively.
• Amplification properties of the transistor such as gm, rπ and ro depend on the DC
(bias) collector current (explained in section 4.4).
• Thus, the surrounding circuitry must also set the device bias currents properly.

6
Bias Point

Bias Points (Q1, Q2)

• Proper biasing leads to better performance

• Biasing: should be strong with PVT
7
 Goal of BJT Biasing
<IC-VBE variation> <β variation>
BJT #2
IC
BJT #1 [A]
[A]

BJT #3 IC

× 1/β1=1/100 × 1/β2=1/120

IB_ B JT #1
IB_ B JT #2

VBE [V] VCE [V]

o
27 C
IC o
-45
[A]
<R variation>
70oC

10kΩ 10.2kΩ 9.7kΩ

R #1 R #2 R #3

VBE [V]

• Decide IC with tolerance for PVT variations (on β, IC-VBE curve, R

values in this chapter)

8
Intermediate Summary

Resistive Divider Emitter Degeneration

Simple biasing
Biasing Biasing

VBE , β uncertainty Reduce β dependency Reduce VBE, β dependency

PVT variations-tolerant biasing

9
 This Lecture

- How to bias BJT?

10
 Chapter 5.
Bipolar Amplifier
5.1 General Considerations
5.2 Operating Point Analysis and Design
5.3 Bipolar Amplifier Topologies

11
Course Objectives

Lumped Abstraction Amp & Analog

• Diode transistor • R+C+Diode → Rectifier
• Bipolar transistor • R+Diode+Battery →
• MOS transistor Limiter
• Amplifiers: bias circuits
• Operational amplifier
• Current mirror

• Large/small signal analysis

12
Biasing Methodologies

#2 Resistive #3 Emitter
#1 Simple biasing
Divider Biasing Degeneration Biasing

VBE , β uncertainty Reduce β dependency Reduce VBE, β dependency

PVT variations-tolerant biasing

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#1 Simple Biasing (5.2.1)
• How to analyze
– 1. Replacing Q1 with large-signal model and
apply KVL and KCL.
• Nonlinear equation → little intuition
– 2. In most cases, VBE falls in the range of 700
to 800mV and relatively constant.

VCC − VBE
Fig. 5.13 Use of base resistance RB I B + VBE = VCC IB = 
for base current path.
RB
VCC − VBE
IC =   VCE = VCC − RC I C
(To avoid saturation completely) RB
VCC − VBE V −V
VCC −  RC  VBE  = VCC −  CC BE RC 
RB RB

• Define IB → Define IC
• Is this assumption of constant VBE in the range of 700 to 800mV true ?
→ Verify through iteration in Example 5.7

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Example 5.7
• Verify that Q1 operates in the forward active region.

• Since Is is relatively small, we surmise that the base-

emitter voltage required to carry typical current level is
relatively large. → VBE = 800mV
VBE IB IC
V − VBE
I B = CC  17  A
RB
I C = 17mA
 V − I B RB 
IC I s exp CC  =  • I B
Fig. 5.14 Simple biased stage.
VBE = VT ln = 852mV  VT 
IS
Assumption : β= 100, Is= 10-17 A
VCC − VBE
IB = = 165 A
RB Nearly equal → Boundary
between active and
saturation mode
I C = 165mA

VCE = VCC − RC I C = 085V

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Problem of Simple Biasing

Problem !!
- Don’t know VBE
- β dependency
- Large RB

Fig. 5.13 Use of base resistance

for base current path.

• VD,on variation → VBE variation → Hard to define IB with fixed RB

(especially @ low VCC)
• β variation → Hard to define IC even though we can fix IB
• IB should be small → RB should be large
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#2 Resistive Divider Biasing (5.2.2)
 R2 V 
I C = I S exp   CC 
 R1 + R2 VT 
IB is small &
R2
negligible ! VX = VCC
R1 + R2

Fig. 5.15 Use of resistive divider to define VBE.

• Define VBE → Define IC

• IC is independent of β

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Example 5.8
• Determine the collector current of Q1.

• Neglecting the base current of Q1,

R2
VX = VCC = 800mV
R1 + R2
VBE
IC = I S exp = 231 A
VT
I B = 231 A

• Provided by the resistive divider, IB must be negligible with

Fig. 5.16 Example of biased stage. respect to the current flowing through R1 and R2:

Assumption : β= 100, Is= 10-17 A

VCC  ( R1 + R2 ) = 100  A  43I B

? VCC
I B  Negligible
R1 + R2

VCE = 1345V Active region

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What if IB is not Negligible?
R2
VThev = VCC 
R1 + R2

RThev = R1  R2 

VX = VThev − I B RThev

VThev − I B RThev
IC = I S exp 
VT
Fig. 5.17 Use of Thevenin equivalent to calculate bias.  I  1
I B =  VThev − VT ln C 
 IS  RThev
• Use Iteration
VBE
Begin with VBE = VT ln( I C I S )

VBE → I B → I C → VBE → → Same to what we did in simple

biasing calculation (Example 5.7)

• If IB is not negligible – Use Thevenin equivalent

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Problem of Resistive Divider Biasing
 R2 V 
I C = I S exp   CC 
 R1 + R2 VT 
R2
VX = VCC
R1 + R2

Fig. 5.15 Use of resistive divider to define VBE.

• Exponential dependence of IC upon VX → Substantial bias variations

• For example, R2 varies only 1% → 36% error in IC

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#3 Biasing with Emitter Degeneration (5.2.3)

• Biasing with emitter degeneration

– To alleviate the problem of sensitivity to β and VBE
– RE exhibits a linear I-V relationship.
– An error (variation) in VX is partly absorbed.
• Neglecting the base current

VX = VCC R2  ( R1 + R2 ), VP = VX − VBE

VP 1  R2 

IE = = V − V   I (If β ≫1)
+
 CC BE 
Fig. 5.19 Addition of degeneration RE R R R C
E  1 2 
resistor to stabilize bias point.

Lowering the sensitivity of VBE !

• Put emitter resistor RE → Reduce VBE sensitivity

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Example 5.10
• Calculate the bias current in the circuit of Fig. 5.20.
• How much does the collector current change if R2 is 1% higher than its
nominal value?
R2
• Neglecting the base VX = VCC = 900mV
current, R1 + R2

Using VBE=800mV as an initial guess,

VP = VX − VBE = 100mV
I E  I C  1mA
IC = 796mV
VBE = VT ln
IS
VY = VCC − I C RC = 15V Active region

Fig. 5.20 Example of biased stage.

• If R2 is 1% higher than its nominal value,
– Vx rises to 909mV
Assumption : β= 100, Is= 5×10-17 A – Emitter current is raised by 9mV/100Ω=90µA
→ changed only 9%

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Design Rules and Procedures

1) I1 >> IB to lower sensitivity to β

2) VRE must be large enough
(100mV to several hundred mili-volts)

Fig. 5.21 Summary of robust bias conditions.

• Design procedure
– 1. Decide on a collector bias current to yield proper small-signal parameters.
– 2. Choose a value for VRE≒ICRE.
– 3. Calculate VX=VBE+ICRE with VBE=VTln(IC/IS)
– 4. Choose R1 and R2

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Example 5.11
• Design the circuit of Fig. 5.21 so as to provide a transconductance of (1/52Ω) for Q1.
• What is the maximum tolerable value of RC?

• gm of 1/52Ω: IC=0.5mA, VBE=778mV.

• Assuming REIC=200mV, RE=400 Ω.
• To establish VX=VBE+REIC=978mV,

R2
VCC = VBE + RE IC 
R1 + R2
by factor of 10
VCC
 I B R1 + R2 = 50kΩ
R1 + R2
Fig. 5.21 Summary of robust R1 = 3045k
bias conditions.
R2 = 1955k
VCC − RC I C  VX 
RC I C  1522V
Assumption : VCC=2.5V, β= 100, Is= 5×10-17 A
RC  3044k

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Intermediate Summary

Resistive Divider Emitter Degeneration

Simple biasing
Biasing Biasing

VBE , β uncertainty Reduce β dependency Reduce VBE, β dependency

PVT variations-tolerant biasing

25