June 2022 QP - Paper 2 AQA Computer Science AS-level
June 2022 QP - Paper 2 AQA Computer Science AS-level
Surname
Forename(s)
Candidate signature
I declare this is my own work.
AS
COMPUTER SCIENCE
Paper 2
Time allowed: 1 hour 30 minutes
Materials
For this paper you must have: For Examiner’s Use
• a calculator.
Question Mark
Instructions 1
• Use black ink or black ball-point pen. 2
• Fill in the boxes at the top of this page. 3
• Answer all questions.
4
• You must answer the questions in the spaces provided. Do not write outside
the box around each page or on blank pages. 5
• If you need extra space for your answer(s), use the lined pages at the end of 6
this book. Write the question number against your answer(s).
7
• Do all rough work in this book. Cross through any work you do not want to
be marked. 8
9
Information 10
• The marks for questions are shown in brackets.
11
• The maximum mark for this paper is 75.
TOTAL
Advice
• In some questions you are required to indicate your answer by completely
shading a lozenge alongside the appropriate answer as shown.
• If you want to change your answer you must cross out your original answer as
shown.
• If you wish to return to an answer previously crossed out, ring the answer you
now wish to select as shown.
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Answer all questions in the spaces provided. box
In your answer, give one example of a number that is an integer but not a natural
number.
[2 marks]
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0 1 . 3 Shade one lozenge in the Counting column to indicate which set of numbers is most box
suitable for counting and one lozenge in the Measuring column to indicate which set
of numbers is most suitable for measuring real-world quantities.
[2 marks]
Counting Measuring
A Integer
B Natural
C Rational
D Real 6
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0 3 . 1 State, in decimal, the lowest and highest values that could be represented in box
Lowest
Highest
0 3 . 2 Figure 1 and Figure 2 show the bit patterns of two unsigned binary integers.
Figure 1
0 0 0 1 0 1 0 1
Figure 2
0 0 0 0 0 1 1 1
4
Answer
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0 4 . 1 ASCII is one character coding system. box
Turn over ►
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Figure 3 shows a 7-bit ASCII character code. The character code is to be sent box
Figure 3
0 0 1 0 1 1 1
0 4 . 3 Describe how the parity bit would be generated for the character code in Figure 3
using even parity.
[2 marks]
0 4 . 4 Write the parity bit below to complete the byte that will be sent using even parity.
[1 mark]
0 0 1 0 1 1 1
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0 4 . 5 The bit pattern 1000001 represents the character ‘A’ in 7-bit ASCII. Other characters box
follow on from this in sequence. For example, the bit pattern 1000100 represents the
character ‘D’.
The bit pattern 1000100 1000001 1000010 represents ‘DAB’ in 7-bit ASCII.
What bit pattern results from encrypting the string ‘DAB’ using a Vernam cipher with
the key ‘EGG’?
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0 5 . 1 Describe the difference between analogue and digital data. box
[2 marks]
0 5 . 2 Describe the steps that an analogue to digital converter (ADC) carries out when
converting a sound signal.
[3 marks]
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0 6 . 2 Translators are one type of system software. box
Type 1
Type 2
0 6 . 3 Some compilers translate source code into an intermediate language rather than
producing an executable file. Bytecode is one example of an intermediate language.
Explain how intermediate language code is used after it has been generated.
[2 marks]
0 6 . 4 Give one reason why some compilers produce their final output in an intermediate
language instead of machine code.
[1 mark]
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0 7 . 1 State which logic gate has the truth table shown in Figure 4. box
[1 mark]
Figure 4
A B Q
0 0 1
0 1 0
1 0 0
1 1 0
Answer
0 7 . 2 State the logic gate that is represented by the symbol shown in Figure 5.
[1 mark]
Figure 5
Answer
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0 7 . 3 Draw the logic circuit for the following Boolean expression. box
Q = A B +C
[2 marks]
A B B A+B A+B B
0 0
0 1
1 0
1 1
( A + B) B
[3 marks]
Answer
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0 7 . 5 Using the rules and identities of Boolean algebra, simplify the following box
Boolean expression.
( A + B) ( A + B)
[4 marks]
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Answer
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0 8 . 1 The fetch-execute cycle involves the Current Instruction Register (CIR), Control Unit, box
Memory Address Register (MAR), Memory Buffer Register (MBR) and Program
Counter (PC).
Figure 6 lists four events that can take place during one cycle of the fetch-execute
cycle. The events are labelled A to D.
Some events that take place during the fetch-execute cycle are not listed.
Put these events in the order they would occur in the fetch-execute cycle when an
ADD instruction is executed.
Write the numbers 1 to 4 beside each description in Figure 6 to indicate the order in
which the events occur. The number 1 should be used to indicate the event that
would happen first.
[3 marks]
Figure 6
Order
Description
(1 to 4)
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0 8 . 3 State the name of the processor component that is responsible for performing box
0 8 . 4 Explain why increasing the data bus width can lead to improvements in
processor performance.
[1 mark]
0 8 . 5 Identify the bus that would need to be changed and state the change needed so that
the maximum amount of memory addressable by the processor would be doubled.
[2 marks]
Bus to change
Change needed
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Turn over for the next question box
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Table 1 shows the standard AQA assembly language instruction set that box
LDR Rd, <memory ref> Load the value stored in the memory location specified by
<memory ref> into register d.
STR Rd, <memory ref> Store the value that is in register d into the memory location
specified by <memory ref>.
ADD Rd, Rn, <operand2> Add the value specified in <operand2> to the value in
register n and store the result in register d.
SUB Rd, Rn, <operand2> Subtract the value specified by <operand2> from the value
in register n and store the result in register d.
MOV Rd, <operand2> Copy the value specified by <operand2> into register d.
CMP Rn, <operand2> Compare the value stored in register n with the value
specified by <operand2>.
B <label> Always branch to the instruction at position <label> in the
program.
B<condition> <label> Branch to the instruction at position <label> if the last
comparison met the criterion specified by <condition>.
Possible values for <condition> and their meanings are:
EQ: equal to NE: not equal to
GT: greater than LT: less than
AND Rd, Rn, <operand2> Perform a bitwise logical AND operation between the value
in register n and the value specified by <operand2> and
store the result in register d.
ORR Rd, Rn, <operand2> Perform a bitwise logical OR operation between the value in
register n and the value specified by <operand2> and
store the result in register d.
EOR Rd, Rn, <operand2> Perform a bitwise logical XOR (exclusive or) operation
between the value in register n and the value specified by
<operand2> and store the result in register d.
MVN Rd, <operand2> Perform a bitwise logical NOT operation on the value
specified by <operand2> and store the result in register d.
LSL Rd, Rn, <operand2> Logically shift left the value stored in register n by the
number of bits specified by <operand2> and store the
result in register d.
LSR Rd, Rn, <operand2> Logically shift right the value stored in register n by the
number of bits specified by <operand2> and store the
result in register d.
HALT Stops the execution of the program.
Labels: A label is placed in the code by writing an identifier followed by a colon (:). To refer to a
label the identifier of the label is placed after the branch instruction.
Interpretation of <operand2>
<operand2> can be interpreted in two different ways, depending on whether the first character
is a # or an R:
• # – use the decimal value specified after the #, eg #25 means use the decimal value 25
• Rm – use the value stored in register m, eg R6 means use the value stored in register 6
The available general purpose registers that the programmer can use are numbered 0–12
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0 9 . 1 Shade one lozenge to show which of the assembly instructions in Figure 7 uses box
immediate addressing.
[1 mark]
Figure 7
Immediate
Instruction
Addressing
A LDR R3, 42
0 9 . 2 A computer program is required that will multiply the value stored in X by 2 if it is less
than 50 and leave it unchanged if it is 50 or more.
IF X < 50 THEN
X X * 2
ENDIF
Write an assembly language program using the AQA assembly language instruction
set shown in Table 1 to carry out this task.
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1 0 . 1 Describe the purpose of start and stop bits in asynchronous data transfer. box
[2 marks]
1 0 . 4 Explain how a physical star topology can behave logically as a bus network.
[2 marks]
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Turn over for the next question box
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1 1 An international technology company produces a smart speaker for use in homes.
The smart speaker can be controlled by a user providing voice commands, which
means the device must always be listening for audio input. The company stores
audio recordings of each user to analyse when improving its voice recognition
algorithms. The audio recordings are compressed using lossy compression and then
sent over the Internet to be stored at the company’s headquarters.
Discuss a range of ethical, legal and cultural issues that are raised by the company
storing the audio captured by its smart speakers and justify why the company might
use lossy compression.
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END OF QUESTIONS
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Question Additional page, if required.
number Write the question numbers in the left-hand margin.
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Question Additional page, if required.
number Write the question numbers in the left-hand margin.
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is published after each live examination series and is available for free download from www.aqa.org.uk.
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