A Visible Light Communication System

Demonstration Based on 16-level Pulse Amplitude

Modulation of an LED Array

Chenguang Xi, Ali Mirvakili, Valencia Joyner Koomson

Department of Electrical Engineering
Tufts University
Medford, MA, USA
[email protected], [email protected] , [email protected]

Abstract — Visible light communication (VLC) technology schemes, such as MIMO_OFDM [6] and discrete multitone
enabling data transmission by modulating solid-state light- modulation (DMT), are proposed to compensate for the low
emitting diode (LED) devices has attracted much attention modulation bandwidth of conventional LEDs, but at the
recently. However, the transmission rate of VLC remains low due expense of increased transceiver complexity [7]. The objective
to the low bandwidth performance of LEDs. We present a VLC of this work is to implement a high data rate VLC system based
transmitter consisting of an LED array to enable implementation on a simple baseband modulation techniques. Such techniques
of a 16-level pulse amplitude modulation scheme, which result in a lower energy-per-bit for data transmission, simple
theoretically increases the transmission rate from 10Mbps to transceiver design, and are directly compatible with pulse
40Mbps. In addition, the LED array provides sufficient
width modulation (PWM) dimming control schemes
brightness for illumination of office-sized locations. This paper
implemented in lighting systems to control illumination levels.
reports an experimental demonstration of a video transmission
system based on VLC using a 4x4 LED array. In this paper, we propose a 16-level pulse amplitude
modulation (PAM) scheme and apply a 4x4 LED array instead
Keywords-light-emitting diode(LED) array; pulse amplitude of a single LED to maintain appropriate brightness levels and a
modulation; visible light communication (VLC); data transmission rate suitable for office-sized rooms. The LED
array can provide appropriate luminous flux levels compared
with a single LED that is either ON or OFF. This characteristic
I. INTRODUCTION
enables pulse amplitude modulation, theoretically increasing
Over the last decade, light-emitting diodes (LED) have the transmission rate from 10Mbps to 40Mbps. An
surged in performance with higher output flux and conversion experimental demonstration of a video transmission system
efficiency, and coverage of the entire color spectrum including based on VLC using the LED array is reported.
green and blue [1]. Industry analysts predict that by 2025,
semiconductor (LED) white lighting efficiencies will reach an II. VLC SYSTEM DESCRIPTION
astounding 200-lumens/W following a “Moore’s Law”-type
trend. Soon conventional incandescent and fluorescent lamps A. Overivew
will be replaced by this new light source, the LED. According
to recent reports published by the Department of Energy, this The video transmission system based on VLC using a 4x4
breakthrough in lighting technology will result in US electricity LED array is depicted in Figure 1, consisting of a transmitter
savings of 190 TWh/yr annually by 2030 and cumulative and receiver subsystem. Both the transmitter and receiver are
savings of 1,488 TWh/yr between 2010 and 2030 [2]. comprised of three blocks, as shown in this figure. At the
transmission side, the FPGA (Stream Capture & Process Block)
The emergence of the white LED presents an opportunity to receives the real-time video stream captured by the camera and
extend the reach of optical signals in free-space wireless sends it to the LCD (Stream Display Block), which is the
communication [3]. VLC has many attractive features, such as original video stream. Meanwhile, it modulates and processes
worldwide availability and its unlicensed bandwidth, the the data stream, and sends it to the LED driver (Stream
potential for spatial reuse of operating frequencies in adjacent Transmit Block). The modulated visible light stream is then
communication cells, and no electromagnetic interference transmitted through free-space and received by the commercial
enabling compatibility with certain sensitive environments, Photodiode (PD) in series with a high-speed analog-to-digital
such as hospitals, airports, power plants, and national security converter (ADC) (Stream Receive Block). The ADC will pass
infrastructure [4-5]. the converted digital data stream to the FPGA (Stream process
One of the main challenges of visible light transmission Block). The data stream will be demodulated and sent back to
using white LED devices is limited modulation bandwidth, the LCD (Stream Display Block), which is the restored video
typically in the low MHz range. Various complex modulation stream.

978-1-4577-0911-1/12/$31.00 ©2012 IEEE

 represent LEDs that are OFF. For example, the 4 bit code
“0101” requires five LEDs that are ON and the rest are OFF.

C. Stream Capture & Process Block

Figure 3 presents the Stream Capture and Process block
diagram in the Transmitter. This block is responsible for
capturing the video stream as well as performing digital signal
processing. The whole block is implemented on a DE-2 FPGA
board. A D5M camera block, which is a daughter board of the
DE-2 FPGA board, is used to capture the video stream in real-
time. The data acquired by the camera is in RG1G2B mode. To
transfer the RG1G2B mode to RGB mode for further
processing, a matrix calculation is required in the data2RGB
block. When receiving the video stream, the data2RGB block
converts the original pixel data to an 8-bit RGB pixel data code.
Figure 1.VLC system block diagram. For displaying the original data, the RGB data are sent to a
FIFO and eventually displayed on the LCD. A FIFO is used
A comparison was done between the restored video stream here as a buffer to solve a clock frequency difference problem
at the Receiver and the original video stream at the Transmitter between the camera clock and the LCD clock.
to verify system operation. The transmission rate was
bandwidth-limited at the Transmitter due to the LED device. Meanwhile, the eight2four block splits the 8-bit RGB data
This challenge was overcome by implementing an LED array to two 4-bit codes for further modulation. This is done because
with pulse amplitude modulation instead of a single LED using the pulse amplitude modulation we used is based on a 4x4 LED
simple ON/OFF keying modulation. array, which means a maximum of four bits can be transmitted
in one clock period instead of one bit. Also, the eight2four
B. Modulation block adds extra data bits to the 4-bit RGB code for further
error detection and synchronization at the Receiver. A
For simple ON/OFF keying modulation, one bit is modulation block is followed after the eight2four block to
transmitted during a single clock period. A digital one is convert the pixel data to the appropriate amplitude
represented when the LED is ON while a digital zero is corresponding to the 16 LEDs as depicted in Figure 2. The
represented when the LED is OFF. With pulse amplitude level of each 4-bits data determines how many LEDs are on
modulation (PAM) using the 4x4 LED array, four bits are among the 4x4 LED array. The FIFO following the modulation
transmitted in one clock period. This is shown in Figure 2. block operates the same as the previous FIFO. The modulated
signal is an input to the FIFO and the FIFO output drives the
LED driver circuit directly. Thus, the transmission rate can be
set by simply changing the output data frequency of the FIFO.
The clock management block is designed to synchronize
the pixel data between Transmitter and Receiver subsystems. A
global clock and a reset signal are included in the clock
management block.

Figure 2.ON/OFF keying modulation versus pulse amplitude modulation

While transmitting 4 bits “0101” in 4 clock periods using

the on/off keying method, pulse amplitude modulation enables Figure 3.Block diagram of the Stream Capture & Process block in the
the data to be transmitted in one clock period as level 5. In the Transmitter subsystem.
same manner, codes “1011”, “0111”, and “0011” correspond to
level 11, level 7 and level 3, respectively. In Figure 2, the 4x4
grid below the waveform illustrates the 4x4 LED array. A dark
square represents LEDs that are ON and white squares
 Figure 4.Block diagram of the Stream Process block in the Receiver
subsystem.

The output of Figure 3 drives the LED driver circuit and

will be connected to each of the 16 LEDs to enable individual
addressability. In the Receiver, the photodiode receiver
receives the incoming light and generates an output voltage
proportional to the received optical power. The ADC module Figure 5.Stream Transmit printed circuit board in the Transmitter subsystem
generates the equivalent digital data code. Finally this digitized with 4x4 LED array.
data goes into the Stream Process block in the Receiver. As
presented in Figure 4, the Stream Process block mainly consists
of five blocks. The demodulation block decodes the incoming E. Stream Receive Block
data which is present at the output of the ADC. Basically, the The Receiver subsystem consists of a concentrator lens
incoming data will be treated in the same way as in the (ACL2520-A), a commercial photodiode receiver (APD110A2)
transmitter, but in the reverse order. The data then passes and a high-speed ADC. A concentrator lens is used to focus the
through the four2eight module and every two 4-bit data codes incoming light to the photodiode active area. A blue filter is
is combined to form one 8-bit data code. Here the four2eight also integrated at the front-end to suppress the phosphorescent
block also detects the extra error detection bits generated by the component, which severely limits the modulation bandwidth. A
eight2four block in the Transmitter. The corrected pixel data commercial photodiode is used in the Receiver because of its
are sent to the FIFO and eventually displayed as the received high gain, which eliminates the need for additional voltage
video stream. A clock management block is also used in the amplification after the photodiode. The analog signal received
Receiver subsystem to synchronize the signal. by the photodiode is digitized by a high-speed ADC (Analog
Devices AD9248). This digital signal is then sent to FPGA for
D. Stream Transmit Block further processing and data recovery.
The Stream Transmit block is composed of LED driver
circuits and a 16-element LED array, as shown in Figure 5. A III. EXPERIMENTAL RESULTS
heat sink is integrated on the printed circuit board for heat Figure 6 shows a picture of the proposed video transmission
removal. The LED driver which acts as a transmitter in this demo. On the left side, the Transmitter subsystem captures the
system drives the LEDs based on the incoming signal from the video stream and sends it to the FPGA for modulation; the
FPGA. Each LED (Osram LUW CN5M) is driven by a single modulated signal in the format of PAM is sent to the LED
identical driving circuit which keeps its low complexity. The driver. On the right side, the incoming signal after passing
16 LEDs are mounted as close as possible to generate a linear through the lens and blue filter enters the photodetector. The
light output. The light emitted from each LED is controlled by lens is aimed to concentrate the light to the reception point of
a MOSFET (2N7002) driver; the driving circuit for each LED the photodetector. Then, the receiver amplifies the data signal
is a common source structure with a zener diode to protect the and drives the second FPGA for the demodulation process.
LED from overdriving. Each LED is in series with one Finally the restored video stream goes to the LCD.
MOSFET, a limiting resistor and power supply. Appropriate
MOSFETs are chosen to match the electrical characteristics of
the LED. It is also necessary to choose wide bandwidth
MOSFETs such that there is no limitation on bit rate
performance of the driver in this regard. All the 16 LEDs are
divided into two groups and each group is controlled
separately based on its power supply. Additionally, all the 16
LEDs are individually controlled. This will allow us to turn on
just 8 LEDs or all 16 LEDs. The incoming signal from FPGA
drives the gate of each MOSFET and generates a current
proportional to the level of incoming voltage.

Figure 6.The VLC video transmission demo.

 By testing the system using ON/OFF keying, a clear IV. CONCLUSION
restored video stream without noise and with a transmission In this paper, we report a video transmission system based
rate of 10Mbps is captured. It is worth mentioning that this data on visible light communication. The system utilizes pulse
rate without using the blue filter is 6Mbps. The link range is amplitude modulation with a 4x4 LED array. The 16-level
about 1m with the commercial photodetector (APD110A2). PAM modulation scheme increases the data transmission rate
With pulse amplitude modulation using our 4x4 LED array, the from 10Mbps to 40Mbps. Background noise is detected and
transmission rate increase to 40Mbps. Overcoming the mitigated in this system by implementation of a software
background noise is achieved by adding a software processing processing procedure at the Receiver.
procedure after the ADC at the Receiver. Both the original
restored waveform and modified restored data after software
processing are compared and shown in Figure 7 to illustrate the REFERENCES
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(a) 100Kbps raw restored data after PD (b) 100Kbps modified restored data

(c) 6Mbps raw restored data after PD (d) 6Mbps modified restored data

Figure 7.Raw restored data after PD versus modified restored data after
software processing procedure.