University of Canterbury

Mid-Year Examinations 2024

Prescription Number(s): ENCE 361

Paper Title: Embedded Systems 1

Time allowed: 120 Minutes

Number of pages: 25

Only APPROVED calculators are permitted.

ALL Questions ARE COMPULSORY.

(There are 5 questions in total.
The number of marks varies from question to question.
The maximum total score is 100 marks.)

Family name (in block letters): ..........................................................................

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Student number: .................................................................................................

Mid-year Examinations, 2024 ENCE 361

Questions Start on Page 5

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ARM Assembly Language Instructions

Opcode Mnemonic Meaning Effect
[24:21]
0000 AND Logical bit-wise AND Rd ← Rn AND Op2
0001 EOR Logical bit-wise exclusive OR Rd ← Rn EOR Op2
0010 SUB Subtract Rd ← Rn - Op2
0011 RSB Reverse subtract Rd ← Op2 - Rn
0100 ADD Add Rd ← Rn + Op2
0101 ADC Add with carry Rd ← Rn + Op2 + C
0110 SBC Subtract with carry Rd ← Rn - Op2 + C - 1
0111 RSC Reverse subtract with carry Rd ← Op2 - Rn + C - 1
1000 TST Test Scc on Rn AND Op2
1001 TEQ Test equivalence Scc on Rn EOR Op2
1010 CMP Compare Scc on Rn - Op2
1011 CMN Compare negated Scc on Rn + Op2
1100 ORR Logical bit-wise OR Rd ← Rn OR Op2
1101 MOV Move Rd ← Op2

More on conditional Execution

1110
1111
BIC
MVN
Bit clear
Move negated
Rd ← Rn AND NOT Op2
Rd ← Not Op2

Op c o de Mn e mo n i c In t e rp re t at i o n S t at us f l ag s t at e f o r
[3 1 :2 8 ] ex tens i o n e x e c ut i o n
0000 EQ Equal / equals zero Z set
0001 NE Not equal Z clear
0010 CS/HS Carry set / unsigned higher or same C set
0011 CC/LO Carry clear / unsigned lower C clear
0100 MI Minus / negative N set
0101 PL Plus / positive or zero N clear
0110 VS Overflow V set
0111 VC No overflow V clear
1000 HI Unsigned higher C set and Z clear
1001 LS Unsigned lower or same C clear or Z set
1010 GE Signed greater than or equal N equals V
1011 LT Signed less than N is not equal to V
1100 GT Signed greater than Z clear and N equals V
1101 LE Signed less than or equal Z set or N is not equal to V
1110 AL Always any
1111 NV Never (do not use!) none

!19 Embedded Systems 1

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 Branch Conditions
Mid-year Examinations, 2024 ENCE 361

B ran c h In t e rp re t at i o n No rmal us e s
B Unconditional Always take this branch
BAL Always Always take this branch
BEQ Equal Comparison equal or zero result
BNE Not equal Comparison not equal or non-zero result
BPL Plus Result positive or zero
BMI Minus Result minus or negative
BCC Carry clear Arithmetic operation did not give carry-out
BLO Lower Unsigned comparison gave lower
BCS Carry set Arithmetic operation gave carry-out
BHS Higher or same Unsigned comparison gave higher or same
BVC Overflow clear Signed integer operation; no overflow occurred
BVS Overflow set Signed integer operation; overflow occurred
BGT Greater than Signed integer comparison gave greater than
BGE Greater or equal Signed integer comparison gave greater or equal
BLT Less than Signed integer comparison gave less than
BLE Less or equal Signed integer comparison gave less than or equal
BHI Higher Unsigned comparison gave higher
BLS Lower or same Unsigned comparison gave lower or same

!11 Embedded Systems 1

Mnemonic Instrruction Effect

LSL Logical shift left Rd[31:Op2] := Rn[31-Op2:0],

Rd[Op2-1:0] := 0

LSR Logical shift right Rd[31-Op2:0] := Rn[31:Op2],

Rd[31:31-Op2+1] := 0

ASR Arithmetic shift right Rd[31-Op2:0] := Rn[31:Op2],

Rd[31:31-Op2+1] := Rn[31]

ROR Rotate register Rd[31-Op2:0] := Rn[31:Op2],

Rd[31:31-Op2+1] := Rn[Op2-1:0]

RRX Shift register right 1 bit with carry Rd[30:0] := Rn[31:1],

Rd[31] := C,
C := Rn[0]

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Q1. (a) [4 marks]

A 4-bit analogue-to-digital converter (ADC) employs a successive approximation
quantiser. The ADC has an input range -2V to 2V. Find the output bits of the
quantiser when the input voltage is 0.9V.

Show all your working in the answer box below.

(b) A Universal Asynchronous Receiver Transmitter (UART) channel is configured to

have a baud rate of 9600 (i.e., a transmission rate of 9600 bits/second), even parity,
6 data bits, 1 start bit and 2 stop bits.

(i) [4 marks]
Compute the number of data bytes that can be transmitted in 2 seconds.

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Mid-year Examinations, 2024 ENCE 361

(ii) [3 marks]
Which of the following strings are received without detectable error? Explain
your answer.

0101101111

0010011101

0111001011

(c) State which of the three buffer types: circular, double or FIFO (first-in-
first-out), is the best for the following three applications. Justify your answer.
(i) [2 marks]
We want to perform the classification of the received signal every 2 seconds.

(ii) [2 marks]
We want to attenuate the noise in the received signal using digital low-pass
filtering.

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(iii) [2 marks]
We want to transmit strings to a host machine through a serial port.

(d) [3 marks]
Explain how the preempt priority level and sub-priority level are used to determine
which interrupt should be serviced?

End of Question 1

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Q2. (a) A microcontroller has a 16-bit count-down timer with a prescaler whose value is
specified by an 8-bit unsigned integer. The CPU clock frequency is 10 MHz.

(i) [3 marks]
Can we use the timer to measure an interval of 150 ms, if the prescaler takes
a value of 20?

Show all your working below.

(ii) [6 marks]
We use the input capture function of this timer to measure the period of a
pulse width modulation (PWM) signal. The PWM signal is noise-free and its
true period is 100 ms.

What is the smallest possible period measurement error and what value does
the prescaler need to take to achieve that?

Show all your working below.

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(b) A microcontroller (MCU) has a 40 MHz CPU clock and responds to two inter-
rupts, A and B, both of which do not occur frequently. The corresponding interrupt
service routines (ISRs) are ISR_A and ISR_B.

The machine instructions of the MCU take from 2 to 20 clock cycles to execute.
Each ISR takes 12 clock cycles to store the context in their prologues.

The worst case execution time for the ISRs (prologue and epilogue included) is 2 µs
(ISR_A) and 3.5 µs (ISR_B).

The main program has a critical section that needs 40 clock cycles to complete.

(i) [4 marks]
Assuming no tail chaining, calculate the worst case interrupt response time
in terms of clock cycles for servicing interrupt A.

Show all your working below.

(ii) [2 marks]
What is difference between an interrupt service routine (ISR) and a normal C
function?

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(c) [5 marks]
The following code segment realizes some circular buffer-based data processing,
using mailbox-based inter-thread communication.

Please read the code segment and explain, with justifications, its function.

1 v o l a t i l e u i n t 3 2 _ t newestValue , o l d e s t V a l u e ;
2 v o l a t i l e tBoolean flag ;
3
4 v o i d ADCIntHandler ( v o i d )
5 {
6 uint32_t ulValue ;
7 / / Get a s a m p l e f r o m s e q u e n c e r 3 o f ADC0 .
8 ADCSequenceDataGet ( ADC0_BASE , 3 , &u l V a l u e ) ;
9
10 flag = 1;
11 newestValue = ulValue ;
12
13 / / Place i t in the c i r c u l a r b u f f e r .
14 w r i t e C i r c B u f (& g _ i n B u f f e r , u l V a l u e ) ;
15
16 / / C l e a n up , c l e a r i n g t h e i n t e r r u p t
17 A D C I n t C l e a r ( ADC0_BASE , 3 ) ;
18 }
19
20 void w r i t e C i r c B u f ( c i r c B u f _ t * buffer , u i n t 3 2 _ t e n t r y )
21 {
22 o l d e s t V a l u e = b u f f e r −> d a t a [ b u f f e r −> windex ] ;
23
24 / / O v e r w r i t e t h e o l d e s t s a m p l e w i t h t h e n e w e s t one .
25 b u f f e r −> d a t a [ b u f f e r −> windex ] = e n t r y ;
26
27 / / Advance t h e w i n d e x .
28 b u f f e r −> windex ++;
29
30 / / Reset t h e windex to t h e s t a r t of t h e b u f f e r .
31 i f ( b u f f e r −> windex >= b u f f e r −> s i z e )
32 b u f f e r −> windex = 0 ;
33 }
34
35 v o i d main ( v o i d )
36 {
37 i n t 3 2 _ t sum = 0 ;
38 while ( 1 )
39 {
40 i f ( f l a g == 1 )
41 {
42 sum = sum + ( n e w e s t V a l u e − o l d e s t V a l u e ) ;
43 flag = 0;
44 }
45 .
46 .
47 .
48 }
49 }

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End of Question 2

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Q3. (a) Consider the data shown in Table 1 which represents the assignment of tasks for a
real-time autopilot system. Approximate timing data is given for each task.

Task Execution Time Frequency Priority

SysTickIntHandler 0.1 ms 250 Hz
GyroIntHandler 0.1 ms 250 Hz
calculateAltitude 2 ms 15 Hz
calculateAirspeed 2 ms 15 Hz
calculateHeading 2 ms 15 Hz
sampleGyro 0.2 ms 100 Hz
readADC 0.1 ms 150 Hz
updateButtons 5 ms 25 Hz
updateDisplay 50 ms 10 Hz

Table 1: Timing data for the tasks that make up an embedded autopilot.

(i) [2 marks]
Show that the total load on the autopilot CPU is 0.8.

(ii) [2 marks]
The data in Table 1 was captured for a CPU clock frequency of 500 kHz.
Calculate the minimum clock frequency required for the autopilot program
to be scheduleable using rate monotonic priorities.

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(iii) [4 marks]
Assuming the autopilot program can be scheduled using rate monotonic pri-
orities, enter appropriate priority numbers, starting at 1 for highest priority,
in the Priority column of Table 1.

(iv) [2 marks]
Name and explain a technical feature of the ARM Cortex M4 architecture
that facilitates the implementation of rate monotic scheduling schemes.

(v) [2 marks]
Calculate the maximum scheduleable load for a program involving five inde-
pendent tasks if a rate monotonic scheduling scheme is used.

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(b) The sampleGyro task required by the autopilot software is implemented as a func-
tion using the code shown below:

1 void sampleGyro ( void )

2 {
3 f o r ( i n t i = 0 ; i < NUM_AXES; i ++)
4 {
5 i f ( Gyro [ i ] . r e a d y ) {
6 u8_ValueH [ i ] = * Gyro [ i ] . MSB;
7 u8_ValueL [ i ] = * Gyro [ i ] . LSB ;
8 Gyro [ i ] . r e a d y = f a l s e ;
9 }
10 }
11 }

(i) [2 marks]
Identify any lines that contain critical sections of code in the sampleGyro()
function.

(ii) [2 marks]
Explain the code modifications that should be taken to ensure sampleGyro()
returns correct data.

(iii) [2 marks]
Explain the purpose of the volatile keyword in C and why it is important
when programming embedded systems.

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(c) [2 marks]
An implementation of the updateButtons task is shown below. Unfortunately, this
implementation proves to be unreliable in practice: pilots report that they are unable
to set the autopilot system to the exact altitude and airspeed that they desire.

1 void updateButtons ( void )

2 {
3 / / Read t h e p i n s ; t r u e means HIGH , f a l s e means LOW
4 b u t _ v a l u e [ UP ] = ( GPIOPinRead ( U_BUT_PORT_BASE , U_BUT_PIN )
5 == U_BUT_PIN ) ;
6 b u t _ v a l u e [DOWN] = ( GPIOPinRead ( D_BUT_PORT_BASE , D_BUT_PIN )
7 == D_BUT_PIN ) ;
8 b u t _ v a l u e [ LEFT ] = ( GPIOPinRead ( L_BUT_PORT_BASE , L_BUT_PIN )
9 == L_BUT_PIN ) ;
10 b u t _ v a l u e [ RIGHT ] = ( GPIOPinRead ( R_BUT_PORT_BASE , R_BUT_PIN )
11 == R_BUT_PIN ) ;
12
13 i f ( b u t _ v a l u e [ UP ] ) {
14 a l t i t u d e _ s e t p o i n t ++;
15 }
16 i f ( b u t _ v a l u e [DOWN] ) {
17 a l t i t u d e _ s e t p o i n t − −;
18 }
19 i f ( b u t _ v a l u e [ LEFT ] ) {
20 a i r s p e e d _ s e t p o i n t − −;
21 }
22 i f ( b u t _ v a l u e [ RIGHT ] ) {
23 a i r s p e e d _ s e t p o i n t ++;
24 }
25 }

Explain why pilots are unable to reliably set altitude and airspeed setpoints using
the updateButtons () code shown above.

End of Question 3

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Q4. (a) Consider the circuit diagram shown in Figure 1, where ‘CONTROL’ is connected
to one of the GPIO pins on a microcontroller.

Figure 1: Circuit diagram.

(i) [2 marks]
Explain why component Q1 is included in the circuit.

(ii) [2 marks]
Explain why component R2 is included in the circuit.

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(b) [2 marks]
Explain how the H-bridge motor controller shown in Figure 2 enables both clock-
wise and counter-clockwise rotation for a DC motor.

Figure 2: Motor controller.

(c) [2 marks]
Explain what a tristate buffer is and give an example of where it is used in an
embedded system.

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(d) [4 marks]
Annotate Figure 3 to show how multiple 1K⇥8 SRAM memories can be combined
to give a single 2K⇥8 memory.

Figure 3: Memory circuit diagram.

(e) [2 marks]
Explain two advantages of direct memory access controllers in embedded systems.

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(f) [2 marks]
Explain why modern microcontrollers typically include both SRAM and flash mem-
ory.

(g) [4 marks]
Explain the difference between the stack and heap space in an embedded system’s
memory map. Given an example of data typically stored in each.

End of Question 4

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Q5. (a) [2 marks]

Explain why the ARM Cortex M4 architecture contains two stack pointer registers.

(b) [6 marks]
Give examples of data stored in each of the three program status registers (PSRs)
in an ARM Cortex M4 microcontroller.

(c) [2 marks]
Explain what Register 0 (r0) is used for in an ARM microcontroller.

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(d) [2 marks]
Explain what the PC register is used for in an ARM microcontroller.

(e) [2 marks]
Write an RTL expression to add the contents of register 2 to the contents of register
3 and store the result in register 4.

(f) [4 marks]
Write ARM assembly code to subtract the contents of register 5 from a number
stored at the memory address pointed to by the contents of register 6. Your code
should store the result in register 7 and update the CPU status flags based on the
calculated result.

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(g) [2 marks]
A key part of the Arduino ecosystem is the Arduino Bootloader. Explain the pur-
pose of a bootloader and state an advantage that the Arduino Bootloader affords
Arduino-based microcontrollers.

End of Questions

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END OF EXAMINATION