Fr.
Conceicao Rodrigues College of
Engineering Department of Computer Engineering
Academic Year 2024-25
Experiment No: 1 Name:Anjali Rawat SE: II Sem
Date of Performance:09/02/2025 Roll No:10632
Aim: To verify different logic gates and implement basic gates using universal gates.
Rubrics for assessment of Experiment:
Sr. No Parameters Exceed Meet Below
Expectations (EE) Expectations
Expectations
(ME) (BE)
1 Timeline (2) Early or on One session More than one
time (2) late (1) session late (0)
2 Preparedness (2) Knows the Managed to Not aware of the
basic theory explain the theory to the
related to the theory related point. (1)
experiment to the
very well. (2) experiment.
(1)
3 Effort (3) Done expt on Done expt Just managed.
their own. (3) with help (1)
from other.
(2)
4 Documentation Lab experiment Documented Experiments not
(2) is documented in proper written in
in format proper format
proper format but some (0.5)
and maintained formatting
neatly. (2) guidelines are
missed. (1)
5 Result (1) Specific Partially Not specific at
conclusion. (1) specific all. (0)
conclusion.
(0.5)
Assessment Marks:
Timeline (2) Preparedness (2) Effort (3) Documentation Result (1) Total (10)
(2)
Teacher’s Sign:
Fr. Conceicao Rodrigues College of
Engineering Department of Computer Engineering
Academic Year 2024-25
SE:IInd SEM Roll No.: 10632 Batch:B3
Experiment No: 1 Date of implementation:09/02/2025
Aim: To identify and verify the truth table of all the logic gates.
Objective: 1. To verify the truth tables of AND, OR, NOT, NAND, NOR, XOR and XNOR
gates 2. To implement basic gates AND, OR and NOT using any one universal gate
Components: Power supply, Connecting wires, logic gates
Theory:
Logic gates are fundamental components of digital electronics. They are electronic devices that perform
basic logical functions and are the building blocks of digital circuits. Each logic gate implements a
Boolean function, which performs logical operations on one or more binary inputs to produce a single
binary output. The primary purpose of logic gates is to manipulate binary data (0s and 1s), which is the
basis of all digital systems.
These logic gates perform the basic Boolean functions, such as AND, OR, NAND, NOR, Inversion,
Exclusive-OR, Exclusive- NOR. Figure below shows the circuit symbol, Boolean function, and truth. It
is seen from the Figure that each gate has one or two binary inputs, A and B, and one binary output, C.
The small circle on the output of the circuit symbols designates the logic complement. The AND, OR,
NAND, and NOR gates can be extended to have more than two inputs. A gate can be extended to have
multiple inputs if the binary operation it represents is commutative and associative.
These basic logic gates are implemented as small-scale integrated circuits (SSICs) or as part of more
complex medium scale (MSI)or very large-scale (VLSI) integrated circuits. Digital IC gates are
classified not only by their logic operation, but also the specific logic circuit family to which they belong.
Each logic family has its own basic electronic circuit upon which more complex digital circuits and
functions are developed. The following logic families are the most frequently used. TTL (Transistor
transistor logic) ECL (Emitter-coupled logic) MOS (Metal-oxide semiconductor) CMOS
(Complementary metal-oxide semiconductor) r TTL and ECL are based upon bipolar transistors. TTL
has a popularity among logic families. ECL is used only in systems requiring high-speed operation. MOS
and CMOS, are based on field effect transistors. They are widely used in large scale integrated circuits
because of their high component density and relatively low power consumption. MOS logic consumes
far less power than MOS logic. There are various commercial integrated circuit chips available. TTL
ICs are usually distinguished by numerical designation as the 5400 and 7400 series.
Fr. Conceicao Rodrigues College of
Engineering Department of Computer Engineering
Academic Year 2024-25
Part 1: Verify the truth tables of basic logic gates
Part 2: Implement basic gates using NAND and NOR (Universal gates)
Fr. Conceicao Rodrigues College of
Engineering Department of Computer Engineering
Academic Year 2024-25
Procedure:
1. Connect the appropriate IC.
2. Make the connections according to the circuit diagram.
3. Observe the output on the LED for different combinations of the input.
Observations
Record the LED's state (ON or OFF) for each combination of input logic levels for all three gates.
Compare the observed results with the expected truth tables of the NOT, AND, and OR gates
Conclusion:
After constructing the NOT, AND, and OR gates using NAND gates and verifying their functionality,
conclude that the NAND gate is indeed a universal gate capable of implementing all basic logic
functions. This experiment helps in understanding the versatility and importance of NAND gates in
digital circuit design.
Fr. Conceicao Rodrigues College of
Engineering Department of Computer Engineering
Academic Year 2024-25
Post lab questionnaire
1. What is the basic function of a logic gate?
A) To amplify electrical signals
B) To perform arithmetic calculations
C) To control the flow of data in a computer
D) To process Boolean logic operations
ANS: D) To process Boolean logic operations
2. Which of the following is NOT a basic logic gate?
A) AND gate
B) NOT gate
C) XOR gate
D) ADD gate
ANS: D) ADD gate
3. What is the output of an AND gate if both inputs are true?
A) True
B) False
C) Depends on the gate
D) None of the above
ANS: A) True
4. Which logic gate has an output of true (1) only if exactly one of its inputs is true?
A) OR gate
B) AND gate
C) XOR gate
D) NOT gate
ANS: C) XOR gate
5. What is the output of a NAND gate if both inputs are true?
A) True
B) False
C) Depends on the gate
D) None of the above
ANS: B) False
6. Which logic gate inverts the input?
A) OR gate
B) AND gate
C) XOR gate
D) NOT gate
ANS: D) NOT gate
7. How many inputs can a NOT gate have?
A) One
B) Two
C) Three
D) Any number
ANS: A) One
8. Which logic gate outputs true (1) if at least one input is true?
A) AND gate
B) OR gate
C) XOR gate
D) NOT gate
ANS: B) OR gate
9. How many NOT gates are required to construct an XOR gate?
A) 1
B) 2
C) 3
D) 4
ANS: D) 4
