MODULE-6

Flynn’s Classification:-
M.J. Flynn proposed a classification for the organization of a computer system by the number
of instructions and data items that are manipulated simultaneously.

The sequence of instructions read from memory constitutes an instruction stream.

The operations performed on the data in the processor constitute a data stream.

Note: The term 'Stream' refers to the flow of instructions or data.

Flynn's classification divides computers into four major groups that are:

1. Single instruction stream, single data stream (SISD)

2. Single instruction stream, multiple data stream (SIMD)
3. Multiple instruction stream, single data stream (MISD)
4. Multiple instruction stream, multiple data stream (MIMD)

What is SISD architecture?

Full form of SISD is Single Instruction stream-Single Data stream.

It is one of the type of flynn's classification of computer.

In SISD computer architecture, instructions are executed sequentially but may be

overlapped in their execution stages. In other words pipelining technique can be used in
CPU.
Modern day SISD uniprocessor systems are mostly pipelined. An SISD computer may have
more than one functional unit in them, but all are under supervision of one control unit. SISD
architecture computers can process only scalar type instructions.
Most serial computers available today follow in SISD architecture.

Given below is the sisd architecture diagram.

Important points about SISD architecture

Above diagram of SISD architecture shows that:
 SISD architecture has single processor and thus it can execute only one instruction at
a time.
 We can see that there is only one instruction stream that is getting processed.
 We can see that there is only data stream as well which indicates that each instruction
operates on a single data set in sequential manner.
 Most importantly, we can also see that instruction execution is sequential in nature.
SISD architecture is used in applications:
 that doesn't involve parallel processing.
 that requires sequential execution of tasks.

Features of SISD architecture

Given below are important features of SISD architecture:
 SISD architecture is simple in nature that involves the usage of one processor which
needs to manage just a single instruction at a time.
 SISD architecture offers deterministic execution where order of instruction execution
can be predictable.

Examples of SISD computers

Given below are examples of SISD architecture example based on type of functional unit.

SISD computer using one functional units:

 IBM 701
 IBM 1620
 IBM 7090
SISD computer using multiple functional units:
 IBM 360/91
 CDC Star-100
 TI-ASC
What is SIMD architecture?
SIMD full form is Single Instruction stream-Multiple Data stream.
SIMD computer is one among the four Flynn's classification of computer. Other three are
SISD, MISD, MIMD computer.

In SIMD computer, we can see from the below diagram there are multiple processing
elements supervised by the common control unit.

Important points about SIMD architecture

 All the processing elements, which are ALUs, receive the same instruction broadcast
from the control unit
 but operate on different data sets from distinct data streams.
 As seen in the diagram, control unit sends common instruction stream to each
processor element.
 The shared memory sub-system containing multiple modules is very essential.

SIMD architecture is used in applications

 that requires multimedia operations like image, audio or video processing where same
operation like filtering needs to be applied on large set of data pixels.
 that needs matrix multiplication or simulations.
Given below is SIMD architecture diagram:

Features of SIMD architecture

Given below are important features of SIMD architecture:
 SIMD architecture introduces concept of parallelism which can execute multiple data
sets based on single instruction.
 SIMD computer is used to process vector type data.
 SIMD architecture is suitable in tasks like multimedia processing (video, audio, image
processing), cryptographic algorithm, matrix multiplications, etc.
Array processor falls into SIMD computer.

Example of SIMD computer

Give below are example of SIMD computer:
 Illiac-IV
  PEPE
 BSP
What is MISD architecture?
MISD full form is Multiple Instruction stream-Single Data stream. It indicates that
multiple instructions are applied to the same set of data.

MISD architecture is also known as systolic arrays.

MISD is one among the four machine that falls under the Flynn's classification of computer.
Other three are SISD, SIMD and MIMD computers.

In MISD computer architecture:

 there are n processor elements.
 Each processor elements receives distinct instructions to execute on the same data
stream and its derivatives.
 Here the output of one processor element becomes the input of the next processor
element in the series.
MISD architecture is a theoretical architecture and rarely applied in practical systems.
Given below is the diagram of MISD architecture:

MISD architecture is not that popular though some fault tolerance machines can be used in
this class.

Examples of MISD computer

No practical machine of MISD class exists. As it is difficult or complex to implement the
MISD architecture so its not used in commercial computers.
What is mimd architecture?
MIMD full form is Multiple Instruction stream-Multiple Data stream.

MIMD computer is one among four of the Flynn's classification of computer. Other three
are SIMD, SISD, MISD computer.

MIMD computer category covers multiple computer system and multiprocessor systems.
MIMD architecture involves multiple processors that execute different instructions on
different data sets thus exhibiting parallel computing. Thus we can also say that MIMD
belongs to class of parallel computing architecture.

MIMD architecture provides great scalability and high performance as well.

MIMD architecture is used in:

 multi-core processors
 supercomputers
 distributed systems
MIMD computer is of two types:
 tightly coupled or Uniform Memory Access (UMA),
 loosely coupled or Non-Uniform Memory Access (NUMA)

What is Uniform Memory Access?

MIMD computer is called tightly coupled or Uniform Memory Access (UMA) if the degree
of interaction among the processor is high.

What is Non-Uniform Memory Access?

MIMD computer is called loosely coupled or Non-Uniform Memory Access (NUMA) if the
degree of interaction among processors is low.

Given below is the MIMD computer architecture diagram:

Advantages of MIMD architecture

Given below are major advantages of mimd architecture:
 MIMD due to its architecture can take care of multiple tasks parallely as result
generating high performance.
 MIMD architecture can be used in wide range of applications due to its ability
perform concurrent tasks.
  MIMD architecture is scalable in nature. It means we can install more processor if
need arises.

Disadvantages of MIMD architecture

Given below are major disadvantages of mimd architecture:
 The implementation of mimd can be complex in nature both architecture wise as well
as programming wise.
 More processor installation will incur more cost thus making overall system costly.
However, cost can be overlooked as the performance it offers is great.

Lets now look at few mimd architecture example.

Example of MIMD computer

MIMD loosely coupled examples
 IBM 370/168 MP,
 Univac 1100/80
MIMD tightly coupled examples
 C.mmp,
 Cray-3, S-1,
 Cray-X MP
PIPELINE:- What is pipeline in computer architecture?
Pipelining in computer architecture is a method in which a sequential task is decomposed
into the subtasks and then each of the subtask is executed in a specialized dedicated
stage while operating concurrently with all other stages.

Every stage performs partial processing of the task that it is supposed to do. And then the
result obtained is passed to the next stage in pipeline. Once the instruction has passed through
all the stages, the final result is obtained.

All the stages in pipelining are synchronized by a common clock.

Each of the stages can be understood as a combinational circuit that keeps performing
arithmetic or logic operations over the data stream flowing through the pipelining stages.
Each stage is seperated by high-speed interface latches (collection of registers).

Given below is a sample pipelining in computer architecture diagram:

A pipeline in computer architecture concept involves two important concepts:

 pipeline stages, and
 pipeline depth
What is pipeline stages?

Pipeline stages are the number of steps the instruction has to pass through in the pipeline.

What is pipeline depth?

Pipeline depth indicates the number of stages involved in the pipeline. As the pipeline depth
increases the number of stage increases and thus increases the overall performance of the
system.

Performance of pipeline processor

Performance of pipeline processor is measured with help of following parameters:
 Efficiency→ The efficiency of a linear pipeline is measured by the percentage of
busy time-space spans over the total time-space span, which equal the sum of all busy
and idle time-space spans.
 Throughput→ The number of tasks that can be completed by a pipeline per unit time
is known as throughput.
 Speed-up→ speed-up = (time to execute n tasks in k-stage non-
pipeline processor)/(time to execute n tasks in k-stage pipeline processor)

Advantages of pipeline architecture

Given below are major advantages of pipeline architecture:
 Pipelining in computer architecture helps to improve the instruction throughput. It
means that number of instructions that the pipeline can execute per unit time increases
with this architecture.
 Pipelining in computer architecture makes efficient utilization of available CPU
resources.
 Pipelining in computer architecture speeds up the rate of task completion.
Disadvantages of pipeline in computer architecture
Given below are major disadvantages of pipeline in computer architecture:
 Pipeline architecture design can be a complex task.
 Pipeline architecture many times suffer from several kinds of hazards like data
hazard, control hazard or structural hazards.
 Synchronizing all the stages in the pipeline to work together smoothly can be
challenging in nature.
What is pipeline hazards in computer architecture?
Though using pipeline processors help improve the efficiency of operations but there are
times when this architecture faces challenges. Those challenges are referred to as pipeline
hazards in computer architecture.

Pipeine hazards is encountered in computer architecture in some specific situations

that prevents the next instruction in the instruction stream to be fetched during its designated
clock cycle.
The instruction that is prevented from being fetched is said to be stalled.

What happens during stalled state?

Given below are important scenarios that occurs during stalled state in pipeline:
 When an instruction is prevented from being fetched, all the instructions that are to be
fetched later in the pipeline than the stalled one are also stalled.
 Instructions that has already got executed before the stall occured can continue. But
new instructions are not fetched during the stall situation.
 Depending on the situation that causes stall state, there are different types of pipeline
hazards.

Types of pipeline hazards in computer architecture

Given below are types of pipeline hazards:
1. Control hazards
2. Structural hazards
3. Data hazards
We will study about each one of the types of pipeline hazards as we proceed.

Lets start with control hazards in computer architecture.

Control hazards in pipelining

Among the three main pipeline hazards in computer architecture, one of them is control
hazard.

Control hazards in pipelining occurs due to need to make decisions based on the outcome
of previous instructions.

There are generally below four types of instructions in a computer program:

1. Arithmetic type [approx 60% presence in a program]
2. Store type [approx 15% presence in a program]
3. Conditional branch type [approx 20% presence in program]
4. Branch type [approx 5% presence in program]
The last two type of instructions [Conditional branch type + branch type] majorly becomes
the reason for control hazards to occur as they potentially have ability to change the
program counter's content making it to jump to execute some other instruction rather than
the actual instruction that it should have executed. Thus we can say that branch type
instruction can impact the performance of pipeline.
For example, In branch type instructions next instruction depends on result of previous
instructions and that is why there is possibility that it might cause delays or incorrect
execution of subsequent instructions. This raises the concern for control hazards in
pipelining.

Structural hazards in pipelining

Structural hazards in pipelining is the result of incapability of hardware resources to
support all the concurrent execution. These hardware resources can be anything like memory
unit or functional unit like Arithmetic Logic Unit or others. When multiple instructions
requests for the access to same resource at same time then structural hazard can take place.

For example, consider a scenario in which two instructions require to make use of same
hardware resource (say memory unit) at the same time. This scenario will lead to structural
hazards in computer architecture.

Duplicate resorces as solution to structural hazards

The issue of structural hazards in pipelining where same resources are requested by multiple
instructions can be solved by providing dupicated resources.
 Functional units like Arithmetic Logic Unit can be pipelined in order to cater to the
needs of supporting multiple instructions at same time.
 Seperate memory units can be provided to take care of several data and instruction
supply at same time.
Similarly, other resources can be duplicated and arranged in pipeline to handle concurrent
request without any issue of hazards.

Data hazards in pipelining

We have already studied about structural hazards and control hazards so far. Lets study about
data hazards.

Data hazards in pipelining is the result of having dependency on the outcome of previous
instructions result which is yet to finish. In other words, it can be said that the inter-
instruction dependencies situation in pipeline is known as data hazards.

Example of data hazards situation

Suppose, there are two instructions in pipeline: INSTRUCTION-A & INSTRUCTION-B

Now it is a known fact that in pipeline both instructions can be executed concurrently.
Here, INSTRUCTION-B has dependency on result of INSTRUCTION-A. But execution
of INSTRUCTION-B starts before INSTRUCTION-A has completed its execution thus result
is not yet produced. So the INSTRUCTION-B doesn't get the required data (result) and this
leads to the scenario of data hazards in pipelining.

Three type of data hazards that may occur are:

1. Read After Write [RAW]
2. Write After Read [WAR]
3. Write After Write [WAW]