Jan Verspecht bvba

Mechelstraat 17
B-1745 Opwijk
Belgium

email: [email protected]
web: http://www.janverspecht.com

Introduction to Measurements for

Power Transistor Characterization

Fabien De Groote, Jean-Pierre Teyssier, Tony Gasseling, Olivier Jardel, Jan Verspecht

IEEE Microwave Magazine, Vol. 9, Issue 3, June 2008, pp. 70-85

© 2008 IEEE. Personal use of this material is permitted. However, permission to

reprint/republish this material for advertising or promotional purposes or for creating new
collective works for resale or redistribution to servers or lists, or to reuse any copyrighted
component of this work in other works must be obtained from the IEEE.
 © PHOTODISC

I
n this article, we will introduce you to measurements for power
transistor characterization: why they matter, why they are such a
complicated, highly specialized field, and where we think the tech-
nology of power transistor characterization is headed. To accom-
Fabien De Groote, plish this goal, we will use simple examples and explanations, at
the risk of oversimplifying the matter. For those individuals who want to
Jean-Pierre Teyssier, dive deeper into the subject, we provide plenty of references. Note that
the list of references is far from complete, but we are convinced that it is
Tony Gasseling, a good starting point. If you are already an expert in the field, there may
Olivier Jardel, be little chance that you will learn new things; nevertheless, we hope that
you can still enjoy the reading. Please note that we restrict ourselves as
and Jan Verspecht much as possible to the characterization aspects, and only refer to model-
ing aspects if they are useful in the context of transistor characterization.

Why Power Transistor

Characterization Matters
The microwave power amplifier is the workhorse of the wireless com-
munications industry. It converts simple dc power into complex radio

Fabien De Groote is with Verspecht-Teyssier-DeGroote, Brive-la-Gaillarde,

France. Jean-Pierre Teyssier and Olivier Jardel are with
XLIM, Limoges, France. Tony Gasseling is with AMCAD Engineering, Limoges,
France. Jan Verspecht is with Jan Verspecht b.v.b.a., Opwijk, Belgium.

Digital Object Identifier 10.1109/MMM.2008.919928

70 1527-3342/08/$25.00©2008 IEEE June 2008

waves that travel through space to enable wireless com- get a raise. The above clearly illustrates the value of a
munication. Designing power amplifiers is a daunting good transistor model as it greatly influences the time
task [1]. One reason is that many strict regulations to market of any power amplifier design.
apply—for example, limitations on the creation of So what does it take to get a good model? The tran-
undesired spectral components [often quantified by sistor modeler starts by gathering knowledge about the
adjacent-channel power ratio (ACPR)] and limitations physical parameters of the transistor: doping profiles,
on the maximum allowable distortion of the informa- physical dimensions, number of fingers, etc. This infor-
tion carried by the radio waves [often quantified by mation is sufficient to get a rough idea about the oper-
error vector magnitude (EVM)]. These regulations ating region of the transistor—for example, maximum
make a lot of sense since the spectrum gets increasing- voltage or current, maximum power dissipation, or
ly crowded and there is a need to prevent interference breakdown voltage. The physical information is also
caused by undesired spectral components generated by sufficient to get an idea of the mathematical structure of
your neighbor’s power amplifier, while at the same the relationship between the voltage and current wave-
time making sure that the information that you get forms. For example, knowing that the transistor is a
while talking to your partner is undistorted. As it turns field-effect transistor (FET) is sufficient information to
out, you don’t need a lot of distortion to turn “I do” into know that the drain current is mainly a function of the
“I don’t,” with potentially disastrous consequences. But gate voltage, whereas knowing that the transistor is a
there is another reason why the design of power ampli- bipolar junction transistor (BJT) is sufficient informa-
fiers is daunting. Whereas the power amplifier is the tion to know that that the collector current is mainly a
workhorse of the wireless communications industry, function of the base current.
the power transistor inside the power amplifier is its Next, the transistor modeler applies a variety of sig-
problem child. In other words, power transistors often nals to the transistor terminals and measures quantities
don’t behave the way the designer expects. It is the that are related to the voltage and current waveforms.
responsibility of the power amplifier designer to make The quantities that are measured can be the instanta-
sure that he or she can integrate the problem child tran- neous values of the voltages and currents themselves,
sistor into a well-behaved power amplifier that obeys but can also be other derived quantities like S-parame-
strict regulations. If you are a parent (or a problem ters, or the time averaged values of the voltages and cur-
child) yourself, you will certainly understand the issue. rents. The trick is to apply a minimum number of excita-
Fortunately, the designer is not alone since he or she tion signals that allows the modeler to determine all
can get help from the transistor modeler. A transistor unknown parameters of the model. This is called the
modeler is someone who interacts with the transistor problem of experiment design. Once the modeler has
through a multitude of experiments and who extracts a determined all the parameters of the model, he or she
mathematical model from the measured data. This will try to find a mathematical relationship between the
model describes how the transistor behaves under a voltage waveforms and current waveforms that is consis-
wide range of excitation signals and operating condi- tent with the measured quantities. If the assumed mathe-
tions. This mathematical model is nothing more than a matical structure of the model is complete, the model will
description of the relationship between the voltage be capable of predicting the relationship between the volt-
waveforms and the current waveforms as they appear age waveforms and current waveforms under a range of
at the transistor terminals. The transistor model is then excitation signals that is much wider than the range of
used by the designer in a simulator to predict the per- excitation signals used during the model extraction.
formance of any amplifier circuit containing the mod- If in doubt, the modeler will verify assumptions on
eled transistor, even before the amplifier is actually the mathematical structure of the model by performing
built. The designer can quickly optimize the parameters model validation experiments. The idea of model valida-
of his or her design in the simulator to make sure that tion is to provide excitation signals that are as close as
the design will meet the desired specifications. Only possible to the signals that will be seen by the transistor
then will a prototype of the amplifier be built and test- in a final application, and to verify whether the model
ed. If the model is a good one, the prototype amplifier can predict the measured results. If the model succeeds
will meet the specs and the designer can proudly in the validation test, the modeler is ready to transfer the
inform his or her manager that the design project is model to the designer. Note that the signals that are used
completed! If the designer is lucky, he or she may even for model extraction are usually much different from the
get a raise. If the model is not a good one, however, the signals that the transistor will see in a final application.
prototype amplifier will not meet the specs. But that is The process of designing the experiments and per-
not all. If the model is bad, the designer may have no forming the transistor measurements, for the purpose
clue at all about what to do to improve the design and of model extraction as well as model validation, is
the only alternative is often an inefficient trial-and-error what we call “transistor characterization.” It is clear
design approach. Needless to say, under these circum- from the above discussion that good power transistor
stances, the designer needs to be really, really lucky to characterization is an indispensable tool for building

June 2008 71
 good transistor models. To summarize, power transis- fact, light travels less than a foot during the time it takes
tor characterization matters because it is vital for build- for these signals to go up and down once. So, how is
ing good transistor models, which are necessary for this related to the fact that the microwave transistor
designing good amplifiers capable of ensuring clear modeler is not satisfied if we provide him/her with the
conversations with our partners on our mobile phones. same measurements as before? Why can’t he or she just
tell the designer to use the simulator to apply such
Why Microwave Power Transistor rapidly varying electrical voltage signals V G (t) and
Characterization People Arrive Late at Parties V D (t) to the simple extracted FET model of (3) and (4)
One may wonder why microwave power transistor to predict the corresponding currents ID (t) and IG (t)?
characterization is so difficult. Many engineers proba-
bly remember characterizing simple BJTs in the student IG (t) = FG (V G (t),V D (t)) ? (5)
lab. It is really easy. One injects a current IB into the ID (t) = FD (V G (t),V D (t)) ? (6)
base of the junction transistor, applies a voltage V CE
across the collector and emitter, and simply measures The answer is that the microwave voltage signal
the corresponding collector current IC and the corre- varies so fast that even a relatively small capacitor,
sponding base-emitter voltage V BE . This measurement inevitably present in any FET device, will start drawing
is then repeated for a whole range of base currents and a significant capacitive current that will partly show up
collector voltages. If performed with enough resolu- at the terminals. In a similar manner, any relatively
tion, this process results in two measured, two-dimen- small inductance, inevitably present in any transistor
sional (2-D) functions FBE (., .) and FC (., .) that describe layout, will start generating a significant inductive volt-
V BE and IC as a function of V CE and IB age that will partly show up at the transistor terminals.
This implies that any model, in order to accurately pre-
V BE = FBE (V CE , IB ) (1) dict the terminal currents, will need to contain capaci-
IC = FC (V CE , IB ) . (2) tive as well as inductive elements. Assume for a
moment that our modeler adds capacitive currents to
If we are dealing with an FET, we do a similar set of the model as illustrated by (3) and (4). The result, which
measurements whereby we apply gate voltages (V G ) and is actually the fundamental idea of the well-known
drain voltages (V D ), and we measure the corresponding Root modeling approach [3], is
gate current (IG ) and drain current (ID ). This results in
dQG (V G (t),V D (t))
two measured, 2-D functions FG (., .) and FD (., .) that IG (t) = FG (V G (t),V D (t)) + , (7)
describe IG and ID as a function of V G and V D dt

dQD (V G (t),V D (t))

IG = FG (V G ,V D ) (3) ID (t) = FD (V G (t),V D (t)) + . (8)
dt
ID = FD (V G ,V D ) . (4)
Note that this is certainly not the only way that a
And we are done—the transistor is characterized and modeler would add capacitive currents, but we restrict
we can go party. We only need to send the measured data ourselves to this case because it is great for educational
to the transistor modeler, who constructs an equivalent purposes while at the same time actually being regular-
electrical network that behaves according to (1) and (2). ly used in industry. The functions QG (.) and QD (.) rep-
This equivalent electrical network is the actual transistor resent the charge storage that occurs in parallel with the
model. It runs in the simulator and can be used by the FET transistor terminals. Note that the actual Root
designer to optimize his design. Note that, since this arti- model is somewhat more sophisticated, and that we are
cle is about transistor characterization, we will not fur- using a simplified version for the sake of illustrating the
ther elaborate on the modeling process itself. transistor characterization issues rather than diving
So, why wouldn’t that kind of data be sufficient to into modeling issues.
model a microwave power transistor? In other words, The modeler will now tell you that the dc data that
why is it that people who characterize microwave you provided is sufficient to model the FG (.) and FD (.)
power transistors are often still measuring at a time parts, but contains no information at all on the charge
when many others are partying? The answer is actually storage functions QG (.) and QD (.), since we have only
pretty simple: this is first of all because of the measured at constant V G and V D . In other words, dur-
“microwave,” and secondly because of the “power.” ing our measurements, the capacitive current is always
equal to zero. Note that a similar conclusion not only
The Microwave Aspect applies to the Root model, but in general to all models
We will first elaborate on the “microwave” aspect. If we containing capacitive and inductive elements: one can
were to explain to a layperson what microwave signals simply not extract any information on inductors and
are [2], we could probably get away with saying that capacitors from dc measurements. The question then
these are electrical signals that vary incredibly fast. In becomes the following: What kind of characterization

72 June 2008
measurements can be performed to enable the modeler Note that each of the partial derivates in the above
to characterize these capacitors and the inductors in the equation is constant during each S-parameter measure-
model? It is clear that to extract that information we ment and is evaluated in (V G0 ,V DO ). Next one converts
actually need to apply microwave signals to the tran- (11) and (12) to the frequency domain. The result is
sistor terminals and measure the relationship between
 
the voltage and current waveforms. ∂ FG ∂QG
If we operate in the microwave domain, S-parameter Ig(ω) = + jω V g(ω)
∂V g ∂V g
measurements are obviously the measurement tech-  
nique of choice. The idea is then to apply a dc gate volt- ∂ FG ∂QG
+ + jω V d(ω) , (13)
age V G0 and a dc drain voltage V D0 and to measure the ∂V d ∂V d
corresponding gate current IG0 , drain current ID0, and  
∂ FD ∂QD
the corresponding S-parameters. This is then repeated Id(ω) = + jω V g(ω)
∂V g ∂V g
across the entire (V G ,V D ) operating range of the tran-
 
sistor. Needless to say that this process results in a lot of ∂ FD ∂QD
data: two 2-D functions FG (., .) and FD (., .) and four + + jω V d(ω) . (14)
∂V d ∂V d
bias-dependent S-parameter functions S11 (., .), S12 (., .),
S22 (., .) and S21 (., .). It is then the task of the modeler to Equations (13) and (14) reveal that there is a simple
identify all of the inductors and capacitors in the model relationship between the partial derivatives of the
by analyzing the additional S-parameter data. The fact charge storage functions and the imaginary part of
that the S-parameter measurements contain sufficient the Y-parameters. Assuming that port 1 is connected
data to extract the inductive and capacitive elements of to the gate of our transistor and port 2 is connected to
the model can be demonstrated by looking at the sim- the drain, one finds that
plified Root model as described by (7) and (8). Consider
that one applies a gate voltage of V G0 and a drain volt- ∂QG
age of V DO to the FET. During the S-parameter mea- ImY11 (ω) = ω, (15)
∂V g
surement, a small microwave signal will excite the
device, resulting in fast voltage and current variations. ∂QG
ImY12 (ω) = ω, (16)
Let us denote these variations by vg(t) for the gate volt- ∂V d
age variation, vd(t) for the drain voltage variation, ig(t)
∂QD
for the gate current variation, and id(t) for the drain ImY21 (ω) = ω, (17)
∂V g
voltage variation. We can then write
∂QD
ImY22 (ω) = ω. (18)
IG0 + ig(t) = FG (V G0 + vg(t),V D0 + vd(t)) ∂V d

The idea is then to measure bias-dependent S-para-

dQG (V G0 + vg(t),V D0 + vd(t))
+ , meters and convert the S-parameters into Y-parame-
dt ters. As shown by (15)–(18), the bias-dependent Y-
(9)
parameters contain information on the partial deriva-
ID0 + id(t) = FD (V G0 + vg(t),V D0 + vd(t)) tives of the charge storage functions. The modeler inte-
grates the measured Y-parameters and can reconstruct
dQD (V G0 + vg(t),V D0 + vd(t)) the unknown charge storage functions. It is not hard to
+ .
dt imagine that a similar approach will also give you
(10) information on the inductive effects, rather than the
capacitive effects. The essential conclusion is that bias-
Since the time-varying deviations are small, the dependent S-parameters are necessary for determining
above equations reduce to the capacitive and inductive elements of the transistor.
This principle does not only apply to the Root model,
∂ FG ∂ FG ∂QG dvg(t) but in general applies to all modeling techniques.
ig(t) = vg(t) + vd(t) +
∂V g ∂V d ∂V g dt
The Power Aspect: Many
∂QG dvd(t) Amplifiers Are as Much Electrical
+ . (11)
∂V d dt Heater as They Are Signal Amplifier
So we have performed a lot of measurements and we
∂ FD ∂ FD ∂QD dvg(t)
id(t) = vg(t) + vd(t) + have succeeded in gathering a lot of data: two 2-D func-
∂V g ∂V d ∂V g dt
tions FG (., .) and FD (., .) and four bias-dependent S-
∂QD dvd(t) parameter functions S11 (., .), S12 (., .), S22 (., .) and
+ . (12) S21 (., .). As stated before, this data should be sufficient
∂V d dt

June 2008 73
 to identify the static voltage and current parts of the At the beginning of our experiment, the transistor
transistor model, as well as all of the inductive and temperature will be equal to the room temperature T0 .
capacitive parts. In short, we can state that such a set of It will then start to rise because of the power dissipated
measurements should be sufficient to characterize all of in the transistor. In order to model the time-varying
the pure electronic effects that are happening inside the temperature, we need to write down the thermody-
transistor. So why isn’t the modeler happy with this namic equations of our system. We further assume that
data? The answer is that the power transistor behavior our system can be represented by a heat capacity C th
is not just described by pure electronics. As stated earli- and a thermal conductance G th . The thermodynamic
er, the power transistor is the component that converts equation of our system becomes
a lot of dc power into a lot of microwave power.
Unfortunately, the power transistor does not only con- d(C th T(t))
vert dc power into microwave power, it inevitably also = P(t) − G th (T(t) − T0 ) . (21)
dt
converts a significant portion of the dc power into heat.
In many practical applications, only about half of the dc This classic equation simply expresses that, at any
power is converted into microwave power; the other moment, the power dissipated in the transistor (P)
half is converted into heat. In fact, one can state that minus the power that is conducted out of the transis-
many state-of-the-art microwave power amplifiers are tor by the conduction of heat (proportional to the tem-
as much signal amplifier as they are electric heater; perature difference with the environment T − T0 and
some of them are actually even more electrical heater proportional to the thermal conductance G th ) is equal
than signal amplifier! The consequence of this is that to the rate of change of the total heat stored in the tran-
the transistor may see a wide range of temperatures sistor (C th T). The introduction of the thermodynamic
during the characterization measurements as well as equations has direct consequences for the power tran-
during its operation. sistor characterization. Let us solve the combined set
As it happens, some of the electronic elements of the of (20) and (21) to calculate IC (t). For the sake of sim-
transistor are very sensitive to temperature. To illus- plicity, we will start by linearizing (20). We also
trate what the consequences are on the transistor approximate the dissipated power P by the product of
characterization process, let us revisit the simple BJT V CE and IC
example described by (1) and (2). We once again apply
a constant base current IB0 and a constant collector- P(t) = V CE IC (t) . (22)
emitter voltage V CE0 to a power transistor, and we take
a look at the digital multimeters measuring the corre- The set of equations then becomes the following:
sponding base-emitter voltage V BE and the correspond-
ing collector current IC . If the transistor is biased in its ∂ FC
active region, we will note that IC slowly changes over IC (t) = FC (V CE , IB , T0 ) + (T(t) − T0 ) ,
∂T
time, to finally settle to a steady-state value. Note that (23)
such an effect, because of the time scale involved, can- d(C th T(t))
not be explained by tiny inductors and capacitors since = V CE IC (t) − G th (T(t) − T0 ) . (24)
dt
we are not applying any microwave frequency signal.
The modeler may describe such a phenomenon by
introducing the temperature (T) as an explicit parame- The above “textbook” set of two coupled linear dif-
ter in the model equations (or in the equivalent circuit, ferential equations can easily be solved with as initial
which we consider as just another way to represent the condition T(0) = T0 . The solution for the temperature
model equations). The fact that the values of V BE and IC T(t) is given by a simple first-order relaxation, as
change versus time can then easily be explained by the shown below:
fact that the temperature of the transistor starts chang-
ing due to self-heating as soon as we start our experi- T(t) = T0 + T∞ (1 − e−t/τ ) , (25)
ment. This can be expressed as
where T∞ is the steady-state temperature difference
V BE (t) = FBE (V CE , IB , T(t)) , (19) with room temperature and τ is the relaxation time con-
IC (t) = FC (V CE , IB , T(t)) . (20) stant. The values of these parameters are given below:
V CE FC (V CE , IB , T0 )
It is clear that a model can only be useful if it can T∞ = (26)
accurately describe the effect of the time-varying tem- G th −V CE ∂∂T
FC

perature. To do so, the modeler needs to introduce con- and

cepts from thermodynamics, like thermal conductance
C th
(G th ) and heat capacity (C th ). To illustrate this fact, let τ= . (27)
us perform an approximate calculation of T(t). G th −V CE ∂∂T
FC

74 June 2008
 The solution for the collector current is similar: transistor across its entire operating span without
blowing it up. From the above example, we can con-
IC (t) = FC (V CE , IB , T0 ) + I∞ (1 − e−t/τ ) , (28) clude that it is hard to build one measurement setup
that allows you to characterize all possible transistor
with technologies. One can imagine, for example, that an
engineer is using the potentially unstable measure-
∂ FC
I∞ = T∞ . (29) ment setup during many years without blowing up
∂T
any device due to thermal runaway simply because he
The above results reveal an interesting property of is never measuring germanium transistors. One day,
the coupled electrical and thermodynamic equations his manager gives him the task of characterizing a ger-
(the so-called electro-thermal equations). From (26) and manium transistor and, lo and behold, the “reliable”
(27), we can conclude that the transistor, from the ther- measurement system fails over and over again. Unless
mal point of view, behaves as a system with a heat the engineer knows about thermal runaway, he will
capacity that is equal to C th , but which has an apparent have a hard time facing his manager.
thermal conductance that is equal to the difference Consider now a microwave power transistor. If we
between the actual thermal conductance G th and the apply a particular bias, the temperature of the transis-
product of V CE and the partial derivative of Fc (.) versus tor will slowly change with a relaxation time constant
temperature T. We can conclude that if there is signifi- that can be anywhere from 200 ns to 1 ms, or even
cant power dissipation in the transistor, we always longer. At the same time, we can apply a microwave
observe a combination of thermal and electrical effects. signal. If we look at a particular performance parame-
This can lead to interesting behavior. Suppose that ter of the transistor, like S-parameters or power gain,
we characterize a germanium bipolar transistor. Such we will see that these parameters will also slowly drift
transistors have a current gain that increases with tem- as the amplifier moves to a new equilibrium tempera-
perature. The hotter the device, the more gain it has. ture. Such an effect is called a “long-term memory”
This is mathematically expressed by effect. In contrast, the dynamic effects caused by the
inductors and capacitors described are sometimes
∂ FC
> 0. (30) called “short-term memory” effects. The precise charac-
∂T
terization and modeling of the long-term memory
Consider now the right-hand side of (27). For some effects is actually one of the toughest challenges faced
biasing conditions, especially at a high V CE , the denom- by today’s power transistor experts.
inator can become negative. This occurs when It is important at this point to state that long-term
effects are not exclusively caused by a time-varying tem-
∂ FC
V CE > G th . (31) perature. Other physical effects inside the transistor,
∂T
called trapping effects, can cause similar behavior. The
Under those conditions, we see that the relaxation trapping effect is a long-term memory effect related to the
time constant also becomes a negative number. And fact that the charge distribution in an FET is influenced by
that means trouble! Putting the negative τ in (25) and charges that somehow get stuck in a trap and are only
(28), we come to the conclusion that the current as well released after a relatively long time. These traps typically
as the temperature will exponentially increase, never occur on the surface of the transistor, although they can
to reach a steady-state value. This unstable positive sometimes also be found in the bulk. The amount of
feedback phenomenon is called “thermal runaway.” trapped charge is not a constant but depends on the
The term is not only used in electronic engineering but region where the transistor operates. Since the operating
also in chemical engineering, where it is more com- region may vary significantly during transistor operation,
monly known as a “big explosion.” Fortunately for the trapping state will also vary, but only at a slow rate
electronic engineers, the consequences of a thermal that depends on how long it takes for the charge to be
runaway are less severe and usually only result in a released by the trap after it has been captured.
damaged transistor (a little bit of smoke may still be Another important remark concerns the heat trans-
generated). Okay, so we have blown up one transistor fer (24). Equation (24) assumes that the thermal state of
and we go get another one. But how are we going to the transistor can be described by one temperature T(t).
characterize the new device without also blowing it If we have a big power transistor, one can imagine that
up? One way of breaking up the positive electro- the temperature is not constant across the transistor, but
thermal feedback cycle is to introduce a big enough is a function of the location. In other words, the tem-
resistor in series with the V CE voltage source. The idea perature is described as a scalar field rather than one
is that any increase in collector current will automati- particular number. It is perfectly possible, for example,
cally decrease the collector voltage, decreasing the dis- that there are significant temperature differences
sipated power, which then decreases the rate at which between the fingers of the power transistor. In that case,
the temperature rises. This way we can characterize the the simple first-order model of (24) will not be sufficient

June 2008 75
 to describe the thermal behavior of the transistor. Note as quickly as possible after the experiment. We then
that it is not only the temperature that may vary inside wait until we are sure that the temperature has
the transistor, but that the same holds for the dissipated returned back to T before performing a subsequent
power. From the modeling point of view, such a case is measurement. If we can do all of this before there has
usually resolved by connecting a multitude of thermal been a significant change in temperature, we are able
networks. to directly measure the temperature-dependent
{V BE , IC } or {IGS , IDS }. This process is called pulsed bias
Why Pulsed Measurements Provide Answers or pulsed IV (PIV) characterization.
So how can we provide data to the modeler that allows Note that there are many ways to perform pulsed
him or her to model the long-term memory effects? If we measurements. In general, a lot of insight into the trap-
are dealing with thermal issues, the simplest way would ping behavior as well as the thermal behavior can be
be to directly measure the temperature-dependent gained by not only changing the bias values during the
voltage-current relationship, as illustrated below for a pulse, but by also changing the initial bias values.
bipolar transistor The technique of PIV characterization was pio-
neered in the late 1980s and further developed during
V BE = FBE (V CE , IB , T) , (32) the 1990s [4]–[9]. Figure 1 shows the result of a practical
IC = FC (V CE , IB , T) . (33) measurement performed on a 10-W GaN FET. The blue
lines indicate the dc measurements, and the red and
This can only be done in practice if we apply a par- green lines represent two pulsed measurements, where
ticular couple of values {V CE , IB } for bipolar transistors each one has a different initial bias condition. One can
or {V GS ,V DS } for FETs and a temperature T, and we clearly see that the IV relationship is a strong function
make sure that we measure {V BE , IC }—or respectively of the initial conditions, and that the characteristics are
{IGS , IDS }—before the temperature has significantly very different from the dc measurements. Note that the
changed. Such a measurement is referred to as dc measurements have been performed over a much
“isothermal.” From the hardware perspective, this smaller bias region than the pulsed measurements. This
implies that we need to have means to control the tem- is typically the case since dc measurements stress the
perature of the transistor, like a thermal chuck, such device much more than pulsed measurements. Pulsed
that it has a temperature T when we start the experi- measurements can easily be performed in regions
ment, and that we need to be able to apply {V CE , IB } or where dc measurements would cause permanent dam-
{V GS ,V DS } and make a quick measurement of {V BE , IC } age to the device because of, for example, excessive
or {IGS , IDS } before there is any significant change of heating.
the device temperature. Since we want to do more than As we stated before, a microwave amplifier cannot
one measurement, we switch {V CE , IB } or {V GS ,V DS } off only be described by a set of static voltage/current

Pulsed and Continuous DC I(V) Networks / 10 W GaN FET

Red : Vds=0V,Id=0A Green : Vds=45V, Id=100mA Blue : DC char.
1.4 Vgs = 1.5 V
1.3 Vgs = 0.9 V
1.2 Vgs = 0 V
1.1
Vgs = −0.9 V
1
Vgs = −1.5 V
0.9
0.8 Vds = 0.0 V
0.7 Vgs = 1.5 V
Id (A)

0.6 Vgs = 0.9 V

0.5 Vgs = 0 V
0.4 Vgs = −0.9 V
0.3 Vgs = −1.5 V
0.2 Vgs = 0.0 V
0.1 Vgs = −0.9 V
0.0
Vgs = −1.5 V
−0.1
10

15

20

25

30

35

40

45

50

55

60

65

70

75

80

85

90

95
5
0.0

Vds (V)

Figure 1. Pulsed and continuous bias measurement example (red and green characteristics are pulsed, starting from different
initial conditions).

76 June 2008
relationships. The model will also contain capacitive ple of pulsed-bias S-parameter measurements of a 20-
and inductive effects that need to be characterized. W FET is shown in Figure 2.
And, unfortunately, these are also a function of tem-
perature. The idea is then to also measure the bias- Why Pulsed-Bias S-parameter
dependent S-parameters under well-controlled isother- Are Never Easy
mal conditions. Such measurements are called isother- Although the basic principle of pulsed-bias S-parame-
mal pulsed-bias S-parameter measurements. Adding ter measurements is relatively simple, it is actually a
S-parameter capability to PIV measurements was pio- real challenge to carry them out in practice. Consider,
neered in the early 1990s [10], [11], and is still a hot for example, a practical self-heating phenomenon with-
topic today [12], [13]. A lot of excellent information on in an FET as presented in Figure 3. The figure is derived
the above topics can be found in [14]. A practical exam- from a simulation and shows the temperature versus

Magnitude (dB) / Frequency

10
S 11
0.0
S 12
−10 S 21

Magnitude (dB)
S 22
−20
1.4
−30
1.3
1.2 −40

1.1 −50

8
0.0
0.5

1.5

2.5

3.5

4.5

5.5

6.5

7.5
1
Frequency (GHz)
0.9
0.8 20
S 11
Id (A)

0.7 10 S 12
0.0
Magnitude (dB)

S 21
0.6
−10 S 22
0.5
−20
0.4
−30
0.3
−40
0.2
−50
0.1
0.0
0.5

1.5

2.5

3.5

4.5

5.5

6.5

7.5
1

8
0.0
Frequency (GHz)
5
0.0

10

15

20

25

30

35

40

45

50

55

60

65

70

75

80

85

90

Vds (V) 95

Figure 2. Pulsed-bias S-parameter measurement example.

45
Hot Point Temperature

40
Temp (°C)

35

30

Hot Point
25

20
0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1
Time (µs)

Figure 3. Temperature increase of AlGaN/GaN HEMTs (SiC substrate), with a chuck temperature of 0◦ C.

June 2008 77
 time when one applies an IV pulse to a transistor posed new high-power MOSFET technologies, with short
on a thermal chuck set at 0◦ C. In this example, the tran- switching times, offer new and exciting measurement
sistor gate measures 8 × 100 μm, and the pitch between capabilities for electro-thermal transistor modeling activ-
the different fingers is 35 μm (SiC substrate). For an ities. When performing such measurements, one has to
injected power of 5 W/mm, a thermal simulation using be very cautious about the presence of parasitic induc-
Ansys software shows a temperature increase of 41.5◦ C tive and capacitive elements. Because of the steep slopes
during the first 400 ns of the pulse. The temperature is of the voltage and the current pulses, parasitic inductive
calculated for a finger located in the middle of the tran- and capacitive elements can easily cause ringing effects
sistor (the location of the temperature measurement is in the applied pulses as well as in the measured results.
indicated by a point on the left). This simulation exam- Parasitic small resistances can also distort the measure-
ple shows that the transistor is not tested in isothermal ments. In fact, one needs a really careful design of the
conditions when applying IV pulse with a duration cabling between the pulses and the transistors. In gener-
longer than about 400 ns. This implies that, in order to al, one always tries to minimize the cable lengths as
provide isothermal data to the modeler, we need to be much as possible and tries to place the pulsed-bias gen-
able to measure the pulsed-bias S-parameters within a erators as close as possible to the transistor terminals.
time span smaller than 400 ns. There are three main Even then, it is a wise thing to characterize the parasitic
challenges to performing such a measurement, espe- behavior of your cabling and to correct any errors caused
cially for new technologies such as GaN transistors. by parasitics of the measurement setup.
First of all there is the challenge of generating and Another issue is related to reliability. A complete
measuring the fast bias excitation pulses, which need characterization of a transistor requires the application
transition times that are only a fraction of the pulse of extreme pulsed-bias conditions, for example near the
width, let’s say 30 ns. Using recent metal-oxide semicon- transistor breakdown area. Under such conditions, and
ductor field-effect transistor (MOSFET) technologies, when using a pulsed voltage generator, sudden break-
existing pulsers can deliver pulses up to 240 V or 20 A down effects may generate a spectacularly big current
with an output resistance as low as 0.6 . Figure 4 shows spike through the transistor. This current spike zaps the
a typical voltage pulse shape obtained with a 200-MHz transistor and can even reduce the transistor to nothing
pulser delivering 100 V to a capacitance of 100 pF. These more than a black spot on the wafer. To prevent this
from happening, one can introduce a serial resistance
between the transistor and the pulser. The resistance
140 will then provide a robust and automated protection for
120 breakdown current spikes. Besides providing protec-
100 tion, such resistive networks have other functionalities.
80 A high input serial resistance associated with a pulsed
60 voltage generator behaves like a current source and can
40 be used to drive a bipolar transistor whereby one has
20 accurate control of the pulsed input base current. This
0 is especially interesting when the temperature of the
−20 transistor changes and modifies the base-emitter diode
10 ns/div
characteristic. In addition, the resistive network can
Figure 4. Example of 100-V pulse voltage measurement also be adjusted to lower the risk of low-frequency
using the latest pulser technology. parametric oscillations. An example of a pulsed-bias
setup with a resistive net-
work is shown in Figure 5.
All of the effects men-
tioned above have to do with
the problem of performing
pulsed-bias measurements.
But the S-parameter mea-
surements are also challeng-
ing because they need to be
made under pulsed condi-
RS RS1 RS2 RS2 RS1 RS tions. Between the early
RL1 RL2 OUT RL2 RL1 1990s and 2000s, the HP-
8510 vector network analyz-
er (VNA) was a popular tool
for making pulsed S-para-
Figure 5. Pulsed-bias measurement system with resistive network. meter measurements. The

78 June 2008
instrument could make S-parameter measurements with data, I only had to add a tiny nonlinear capacitor
a good dynamic range for all pulses having duration of to the circuit and I had to introduce one new para-
more than 1 μs. Unfortunately, as explained previously, meter to the mathematical function that describes
such a pulse width is too long for the isothermal charac- the nonlinear current source.”
terization of certain modern power transistors. Using a
different operating mode, called narrowband mode or Designer: “You actually had to add new things to
asynchronous mode, VNAs could measure RF pulses as the existing model to match your data??? Now I
short as 150 ns, but not without a severe desensitization am really worried. I won’t start using your model
that was proportional to the duty cycle. This could be unless you show me that it also works under real-
resolved by averaging, but at the cost of significantly istic operating conditions!”
decreasing the measurement speed. Today, improved
ways of measuring pulsed scattering parameters have The idea is that a designer will simply not trust a
become readily available with the advent of a new gen- model derived from pulsed-bias S-parameter mea-
eration of VNAs. In addition to having better hardware, surements unless the model has been experimentally
the dynamic range of pulsed measurements is further characterized under realistic operating conditions.
improved by using techniques like hardware and soft- This leads us to a different branch of microwave
ware algorithms [12]. It is now possible to make pulsed power transistor characterization where the goal is to
S-parameter measurements in the X-band with a validate a model and not to extract the parameters of
dynamic range better than 50 dB using a pulse width of the model. Model validation is done by stimulating a
150 ns and a duty cycle of 0.001%. transistor with excitation signals that are very similar
to the actual signals the device will experience in a
Validating Models with power amplifier and by measuring certain characteris-
Load-Pull Measurements tics that can be derived from the response signals,
Isothermal pulsed-bias S-parameter measurements such as power gain and spectral regrowth. The design-
allow the modeler to construct an equivalent electrical er will start trusting a model only when it is capable of
network, called the transistor model. This model can accurately predicting the derived quantities of interest
represent the transistor in a simulator. If the modeler to the designer, and over a range of excitation signals
has done a good job, the equivalent electrical network that matches the final application.
that he or she has built will behave in a way that is So what do validation systems look like? Refering to
consistent with the measured data. In other words, if the example conversation between the designer and the
one were to simulate the isothermal pulsed-bias S- modeler, it is clear that the most significant difference
parameter measurements, the simulated response of with the pulsed-bias S-parameter system will be the
the device would closely match the actual measured power of the applied microwave signals. The validation
data. At that point, the modeler can send the model to system needs to apply microwave signals that, by them-
the designer. One can then imagine the following con- selves, are able to sweep across the whole transistor
versation taking place: operating region, whereas a pulsed-bias S-parameter
system will only use relatively small microwave signals
Designer: “How can you be so sure that your and will cover the transistor operating region by means
model will correctly predict the transistor behav- of pulsing the bias. But power is not the only parameter;
ior for my amplifier design project?” there are other, more subtle, differences. At microwave
frequencies, a pulsed-bias S-parameter system will
Modeler: “Well, if you would use that model to always terminate the transistor terminals into a 50-
simulate isothermal pulsed-bias S-parameter load. In microwave power amplifiers, the transistor out-
measurements, the simulated data will precisely put is terminated in a wide range of impedances that
match the measured data.” spans anywhere from about 1  to about 200 . This
implies that a validation system needs to provide three
Designer: “I believe you. But I am not interested main functions: exciting the transistor with sufficient
in simulating isothermal pulsed-bias S-parameter microwave power, controlling the output impedance,
measurements. I need to simulate under real and measuring the response signal of the transistor.
operating conditions, with real signals. So I repeat Controlling the output impedance is often referred to as
my question: How can you be so sure that your “load-pull,” which is why systems that have this capa-
model will correctly predict the transistor behav- bility are called load-pull systems. In the following, we
ior for my amplifier design project?” give an overview of existing load-pull techniques. Note
that one sometimes also controls the output impedance
Modeler: “Well, I pretty much used the same kind of the signal generator. This is called “source-pull.”
of equivalent circuit that worked before. To make As described in [15], load-pull systems are typically
it match the measured pulsed-bias S-parameter classified into two main categories: active and passive.

June 2008 79
 In a passive load-pull system, the load impedance is noting that the typical mismatch of a GaN transistor is
controlled by passive tuners. The passive tuner is usu- relatively mild and within reach of most simple
ally mechanical in nature, whereby a metal part is mov- mechanical tuners, in contrast with silicon laterally dif-
ing in a waveguide in order to create controllable reflec- fused metal oxide semiconductor (LDMOS) transistors
tions. A good example is described in [16]. A small frac- which have output impedances below 1 .
tion of passive load-pull setups are actually electronic An example of an advanced classic load-pull setup is
in nature and use diodes to generate a multitude of depicted in Figure 6. A load and a source tuner are
reflection coefficients, as described in [17]. placed as close as possible to the DUT, a power transis-
The major drawback of using a passive structure to tor. The two tuners provide a whole range of possible
create a controllable reflection is that one cannot com- input and output impedances. The input signal is pro-
pensate for any power that is dissipated between the vided by a synthesizer, often boosted by a power ampli-
device under test (DUT) and the passive structure that fier. A VNA and a power meter are used to measure the
generates the controllable reflection. This power dissipa- RF signals. A bias supply and monitoring system are
tion inevitably occurs in all components that are placed also present. The setup can stimulate the transistor with
between the transistor terminal and the tuning elements a realistic, high-power microwave signal while at the
such as probes, cables, couplers, diplexers, etc. As a same time presenting a realistic output impedance. It is
result, the maximum amplitude of the reflection coeffi- not that trivial, however, to determine actual perfor-
cient, as seen by the transistor, will always be smaller mance parameters of the transistor, such as output
than one. Depending on the amount of inevitable losses power, power gain, or power-added-efficiency (PAE).
in the measurement setup, the maximum amplitude of The main reason is that our power reading is taken after
the reflection coefficient may become too small to be of the tuner and not at the transistor output terminal. The
any use. This problem may be solved by using so-called transistor performance can only be calculated by using
active load-pull setups. These are setups in which one a combination of the power meter reading with the
introduces one or more amplifiers to generate wave sig- VNA measurements, the measured bias voltages and
nals that are sent towards the DUT output terminals. The currents, and, finally, the S-parameters of the tuners.
amplifier can potentially compensate for any losses and Note that these S-parameters are a function of the tuner
generate reflection coefficients with amplitudes equal to settings; they are different for each realized input or out-
and even bigger than one. put impedance. These S-parameter functions are deter-
A good example, illustrating the problems and mined a priori by a time-consuming tuner calibration
benefits of active load-pull, is described in [18]. procedure whereby one measures the S-parameters for
Unfortunately, there are not only advantages to using a whole range of tuner settings, usually covering the
an active load-pull approach. The power handling whole Smith chart.
capability of any active load-pull setup is limited by the There exist many variations of the load-pull system
amplifier that is used. This limits both the maximum depicted in Figure 6. For example, some systems are
power handling capability as well as the frequency simpler because they do not have the input coupler
range over which one can synthesize impedances. In and VNA. Some systems are more complex—for
contrast to the active load-pull setups, the maximum example, using a spectrum analyzer instead of a
power handling capability and frequency range of any power meter. Of course, the simpler systems provide
passive load-pull setup is only limited by passive struc- less information on the transistor behavior than the
tures like cables, couplers, etc. Passive tuners typically more complex ones. If one eliminates the input cou-
operate across multiple octaves and can handle power pler and VNA, for example, it is impossible to deter-
levels above 1 kW. Today, the vast majority of the load- mine the power absorbed at the input of the transistor.
pull setups use passive mechanical tuners. It is worth This implies that, using such a simplified system, one
can only measure the out-
put power generated by the
transistor, but that one can-
not determine other para-
VNA Bias Supply and Monitoring meters like power gain or
PAE. Adding a spectrum
analyzer, on the other hand,
allows you to measure the
Power amplitude of the harmonics
Sensor or the amount of spectral
re g ro w t h — i n f o r m a t i o n
that one simply cannot get
with a simple power sensor
Figure 6. Schematic of a classic load-pull setup. measurement.

80 June 2008
 Most load-pull systems control the load impedance At the heart of the time-domain load-pull system is
and perform power measurements only at the frequen- the broadband receiver. The oldest approach is to use a
cy of the input signal, the so-called fundamental fre- mixer-based receiver [22]. Such a receiver is leveraged
quency. Any large-signal excitation of the power tran- from existing VNAs and measures the fundamental and
sistor will not only generate output power at the fun- the harmonics one by one, aligning the phases of all har-
damental frequency, but also at multiples of the funda- monics by means of a reference channel that is excited by
mental frequency. These spectral components are a multiharmonic reference signal. A modern version of
called harmonics. As there is power in the harmonics, the mixer-based time-domain receiver is described in
the overall behavior of the transistor will not only [27]. An alternative solution is based on the use of a four-
depend on the load impedance at the fundamental fre- channel repetitive-sampling frequency convertor [28].
quency but also on the load impedances at the har- Note that in a time-domain load-pull system, one
monic frequencies. Some load-pull systems control the always puts the directional coupling structure between
load impedance at the second and even the third har- the transistor and the tuner. The advantage of this
monic frequency [16], [19], [20]. Such systems are approach is that the measured voltage waves, just by
called harmonic load-pull systems. themselves, completely determine the voltage waves at
the transistor terminals, and it is not necessary to know
Load-Pull and Time Domain the S-parameters of the tuner. In fact, the information on
Classic load-pull systems allow one to verify whether a the impedances represented by the tuner can be derived
model can accurately predict power levels under load- from the measurements. As such, the time-domain load-
pull operating conditions. Unfortunately, power is not pull setup no longer requires any a priori characteriza-
the only parameter that is of interest. The modeler also tion of the tuners. A second advantage is that the setup
needs to validate the capability of his or her model to can always sense all significant harmonics signals. This
describe other important aspects, such as breakdown is not true with the classical load-pull configuration
effects or forward gate conductance. A validation of the where the harmonic information is often blocked by the
model for such highly nonlinear effects can only be tuner and, as such, cannot be sensed after the tuner.
achieved by actually measuring the time-domain volt- Unfortunately, putting the directional coupling
age and current waveforms under realistic large-signal structure between the transistor and the tuner may
operating conditions and comparing them with the cause losses that result in a degradation of the range of
time-domain waveforms that result from a simulation. impedances that the tuner can generate at the terminals
Load-pull systems having the capability to provide of the transistor. This issue is addressed by using
such time-domain voltage and current waveforms were extremely low-loss directional coupling structures.
first developed in the late 1990s [24], [25] by adding tun- Currently, there are basically two solutions: one can use
ing technology to large-signal network analyzers [26]. a specialized distributed coupler design [29] or one can
Large-signal network analyzer technology itself was use a wave probe [30].
developed during the late 1980s and the 1990s [21]–[23]. The wave probe is a loop coupler with a very tiny
Note that all of the power information that is measured loop, the loop being significantly smaller than a
by a classical load-pull system can easily be derived quarter-wavelength of the highest frequency to be
from the time-domain voltage and current waveforms. measured. The principle was published more than 60
Figure 7 represents a typical schematic of a modern years ago [31]–[34]. The loop introduces virtually no
time-domain load-pull system. The incident voltage insertion loss, yet has a directivity that is sufficient for
wave signals are represented by A1 and A2 , and the scat- all load-pull applications.
tered voltage wave signals
are represented by B1 and
B2 . The subscript in the nota-
tion refers to the respective
test port. The voltage waves
A1 , B1 , A2 , and B2 are sensed
between the tuner and the
transistor terminal by a dual
directional coupling struc-
ture and are measured in the
time domain by a broadband
receiver. The voltage wave
signals A1 , B1 , A2 , and B2 are
then converted into voltage
and current waveforms V 1 ,
I1 , V 2 , and I2 [26]. Figure 7. Schematic of a time-domain load-pull setup.

June 2008 81
 Figure 8 depicts a loop coupler that is positioned right arm and not in the left arm of the wave probe,
close to the center conductor of a waveguide structure. thereby demonstrating the directivity of the structure.
Note that the ground of the waveguide is not repre- The coupling effect of a wave probe is effectively local-
sented. Assume that a traveling voltage wave (denoted ized, in contrast to classical distributed couplers.
by A) is traveling from right to left inside the wave- Probably the most important characteristic of the
guide. The electric field caused by the charge on the wave probe is its directivity. The directivity of a cou-
center conductor induces a current in the left arm of the pling structure is the quantitative measure of its ability
wave probe that is in phase with the current induced in to separate the two waves traveling in the transmission
the right arm. The magnetic field, on the other hand, line structure. In Figure 8, for example, the directivity is
induces two currents in both arms of the wave probe given by the ratio between the power measured at the
that are in opposite phase. If the loop is dimensioned right output of the wave probe and the power mea-
such that it has the same amount of electric and mag- sured at the left output of the wave probe, under the
netic coupling, there is destructive interference between assumption that there is only a wave traveling to the
the electrically and magnetically induced currents in right on the main structure (as it is the case in Figure 8).
the left arm, whereas there is constructive interference A simple wave probe has a directivity of about 12 dB,
in the right arm. Thus, a signal is only generated in the which is sufficient for load-pull applications. Another
important characteristic of the
coupling structure is the coupling
factor versus frequency. Figure 9
A depicts the coupling factor versus
a wide band of frequencies, for
different distances between the
wave probe and the center con-
ductor of a transmission line
structure. These measurement
results show a coupling factor that
|1H increases with frequency, until
Destructive |1E H Constructive about 10 GHz. The coupling fac-
|2E
Interference |2H Interference tors range from about −20 dB to
H E H H −40 dB. The increase of the cou-
E E
A pling factor for higher frequencies
H E H E H E can be beneficial for harmonic
measurements. This can be
explained by the fact that losses in
Figure 8. Loop coupler structure inserted near the center conductor of a transverse cables and connectors increase
electromagnetic mode (TEM) waveguide structure. with frequency and by the fact
that power levels of harmonics are
lower than the power level of the
fundamental. The wave probe can
0 automatically boost the power of
the higher-frequency harmonics
−10
relative to the power of the lower-
−20 Position 1 frequency fundamental. This
Coupling Factor (dB)

Position 2 power-leveling effect increases the

−30 Position 3
Position 4
dynamic range for the harmonics.
−40 Position 5 In our example, we use a coupling
Position 6 factor of the wave probe between
−50 −50 dB and −40 dB in the S-band
−60 [2–4 GHz]. The outputs of the
wave probe are directly connected
−70 to RF samplers that can handle a
maximal input power of about
−80
0 1 2 4 6 8 10 12 14 16 18 20 −10 dBm. As such, the setup used
Frequency (GHz) for the example can handle power
levels up to 40 dBm. We can con-
Figure 9. Coupling value of a wave probe for different positions above the main line trol the distance between the wave
in the band (1–20 GHz). probe and the center conductor of

82 June 2008
the transmission line, which enables one to optimize works. An example of such a structure is given in Figure
the setup for a specific power level. 13. The figure shows a Klopfenstein 50-to-7.15- trans-
Figure 10 shows a picture of the time-domain load- former [35]. The impedance transformer shown is used
pull system with wave probes at XLIM/University of to characterize a 100-W LDMOS transistor.
Limoges (France). Figures 11 and 12 show examples of Another interesting development is the advent of
time-domain load-pull measurements that have been power transistors that are contacted through a set of bal-
performed on the system. Figure 11 shows the drain anced terminals (differential terminals) rather than
voltage and drain current waveforms at the terminals unbalanced terminals (signal-ground connection). It is
of a GaN high electron mobility transistor (HEMT), cor- very hard to perform load-pull measurements on such
responding to a power sweep at 2 GHz. Note the high- components because of the need to control the differen-
ly nonlinear effects in the waveforms that cannot be tial impedance, and often also the common-mode
characterized by classic load-pull techniques. Figure 12 impedance. Two solutions have recently been devel-
shows the corresponding dynamic load line representa- oped. The first one is a passive differential tuner, as
tion of voltage and current waveform measurements. depicted in Figure 14. The tuner is constructed by care-
The device was measured under the following operat- fully aligning and synchronizing two tuner sections into
ing conditions: F0 = 2 GHz with seven harmonic fre- one mechanical structure [36]. An alternative solution is
quencies measured, V ds = 25 V, V gs = −5 V, Ids = 7 mA, the differential active load-pull setup as described in
Zload = (24 + j6) . In a dynamic load line representa- detail in [37]. In this approach the differential and com-
tion, one plots the drain current versus the drain volt- mon-mode impedances are actively synthesized by
age, which is a valuable tool for amplifier designers. carefully controlling the phase and amplitude of the
Prior to the existence of time-domain load-pull systems, injected waves at each of the differential terminals.
there was no way to measure these dynamic load lines
and they were only useful in simulators.

Other Interesting and Future Developments

During the last decade, power transistors have needed to
be characterized at ever-decreasing load impedances.
Some high-power transistors, like LDMOS transistors for
base station applications, need to be characterized at
load impedances as low as 1 . Unfortunately, tuner
technology is constructed using 50- transmission lines,
having 50- coaxial connectors. The significant differ-
ence between the impedances to be synthesized and the
characteristic impedance of the tuner causes all kinds of
problems like a deterioration of the tuning range
(compared to the range of interest), as well as poorly con-
ditioned measurements. A practical solution is offered by Figure 10. Photograph of a time-domain load-pull system
using tapered lines as impedance transforming net- containing wave probes. (Photo courtesy of XLIM, France.)

1.4 55
1.2 50
45
1.0
40
Drain Voltage (V)
Drain Current (A)

0.8
35
0.6 30
0.4 25
0.2 20
15
0.0
10
−0.2 5
−0.4 0
0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1
Time (ns) Time (ns)
(a) (b)

Figure 11. Drain voltage and current waveforms measured by a time-domain load-pull system.

June 2008 83
 As explained in this article, one can divide means of large-signal waveforms, in contrast to using a
microwave power transistor characterization into two pulsed-bias technique. A combination of pulsed time-
areas: model extraction measurements on the one hand domain load-pull measurements that are synchronized
and model validation measurements on the other. An to pulsed-bias measurements may be a promising
interesting topic is the development of model extrac- approach to solve this issue.
tion techniques that are directly based on large-signal Finally, an interesting development relates to the
measurements, which can actually be considered as a measurement of the time-varying temperature in tran-
superset of S-parameter measurements [38]. Although sistors under large-signal operating conditions. Such
this is an appealing idea, it turns out to be extremely measurements directly characterize the thermodynamic
difficult to apply in practice because it is hard to effects of microwave power transistors. One can use
explore the whole operating region of the transistor by infrared thermal imaging [40] or more advanced fast
optical interferometry [39].

1.4 The Whole Truth

We have considered microwave power transistor char-
1.2
acterization exclusively as a tool that supports model-
1.0
ers, either for model extraction purposes or for model
Drain Current (A)

0.8
validation purposes. This can be considered as a mod-
0.6 ern way of thinking about the subject, especially when
0.4 it concerns load-pull measurements. Load-pull mea-
0.2 surements were actually in use long before the first
0.0 large-signal microwave simulator saw the light of day.
−0.2 Experienced designers can succeed in building a good
−0.4 power amplifier without using any simulations at all
0 5 10 15 20 25 30 35 40 45 50 55 [1]. Instead, they use the load-pull system as a kind of
Drain Voltage (V) analog simulator. The idea is to experimentally deter-
mine the optimal matching conditions for the transistor
Figure 12. Dynamic load line measured with a time-domain in order to meet the amplifier requirements, rather than
load-pull system. optimizing the design in a simulator. It is then sufficient
to build the design such that it presents the same
impedances as the optimal ones determined by the
load-pull experiment.

Conclusions
The characterization of microwave power transistors is
an important and emerging field with many interesting
engineering challenges. One can basically distinguish
two areas: model extraction measurements and model
Figure 13. Klopfenstein impedance transformer. (Photo validation measurements.
courtesy of Prof. Paul Tasker, Cardiff University.) To make things simple, isothermal pulsed-bias pulsed
S-parameter measurements are typically used for model
extraction purposes and load-pull measurements are
typically used for model validation purposes. Both areas
are rapidly evolving in order to keep track of new power
transistor technology. The main issue with pulsed-bias
pulsed S-parameter characterization is the need to apply
pulses with ever-increasing amplitude (up to 200 V and
10 A) and ever-decreasing pulse width (smaller than 400
ns). The load-pull measurements can be done with a
variety of setups, with active or passive approaches, and
with or without handling harmonic frequencies. The
challenges of load-pull system development are to offer
time-domain voltage and current waveforms at the tran-
sistor terminals—an invaluable tool to provide insight in
highly nonlinear transistor behavior—in addition to the
Figure 14. Differential tuner. (Photo courtesy of Focus capability to present low input impedances (1 ) and to
Microwaves.) handle high power levels (up to 100 W).

84 June 2008
 A new interesting topic is the development of model [20] “Load pull measurements on transistors with harmonic imped-
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for providing the transistors and Focus Microwaves for quency operating conditions,” in 1998 IEEE MTT-S Int. Microwave
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