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IEEE TRANSACTIONS ON ELECTRON DEVICES 1

Side-by-Side Comparison of Single- and

Dual-Active Layer Oxide TFTs: Experiment
and TCAD Simulation
Kevin A. Stewart, Vasily Gouliouk, John M. McGlone, and John F. Wager, Fellow, IEEE

Abstract — Single-active layer (SAL) and dual-active (but undesirably high carrier concentration) semiconductor
layer (DAL) oxide thin-film transistors (TFTs) are fabricated such as In–Sn–O (ITO) with a low carrier concentration AOS
using the same process conditions and compared side by such as a-IGZO to achieve both high-mobility and reasonable
side. The SAL channel consists of amorphous In–Ga–Zn–O
(a-IGZO), and the DAL of ultrathin In–Sn–O and a-IGZO. The threshold voltage.
DAL TFT exhibits strongly improved performance compared Since that first report of ITO/IGZO and IZO/IGZO
to the SAL TFT such as higher mobility of 31 cm2 ·V−1 ·s−1 , TFTs [1], several more combinations of DALs have been
smaller subthreshold swing of 175 mV/dec, and better posi- reported such as IZO/ZTO [2], [3] and IZO/AIZTO [4].
tive bias temperature stress stability. Technology computer- The use of DALs with the same semiconductor but different
aided design simulation is used to investigate the SAL and
DAL device performance. A mapping technique is used to processing conditions has also been investigated [5], [6]. The
directly correlate the transfer characteristics to the sub- optimum thickness of the high-mobility layer was found to be
bandgap density of states. The simulation suggests that the between 3 and 6 nm when matched with a thicker low carrier
improved performance of the DAL TFT is due to an improved concentration layer of around 30 nm [2], [3], [7]. Additionally,
gate insulator/channel interface with an approximately one it has been shown that some DAL TFTs exhibit improved
order of magnitude lower interface trap density.
bias stress stability [2], [3]. However, fundamental physical
Index Terms — Dual-active layer (DAL), high mobility, understanding of the improved performance and stability of
In–Ga–Zn–O (IGZO), In–Sn–O (ITO), technology computer- the DAL TFT is still lacking.
aided design (TCAD) simulation, thin-film transistor (TFT).
In this paper, SAL TFTs comprised of 30-nm a-IGZO
and DAL TFTs comprised of 3-nm ITO and 27-nm a-IGZO
I. I NTRODUCTION are fabricated using the same process conditions and same
total thickness allowing for a direct comparison. Technology
A MORPHOUS oxide semiconductors (AOSs) are a prime
candidate for use in the backplane of the next-generation
active-matrix liquid crystal displays and active-matrix organic
computer-aided design (TCAD) simulation is used to match
the experimental characteristics and to gain insight into the
light-emitting diode displays. Single-active layer (SAL) AOSs density of states (DOS). Compared to an experimental mea-
such as amorphous In–Ga–Zn–O (a-IGZO) thin-film transis- surement of the DAL DOS, the simulation enables us to infer
tors (TFTs) exhibit a mobility of ∼10 cm2 ·V−1 ·s−1 , signif- trends associated with the DOS of the individual layers in the
icantly better than that of hydrogenated amorphous silicon channel.
(a-Si:H). However, future technologies such as head-mounted
displays with very high pixel density will require a mobility II. E XPERIMENTAL D ETAILS
even higher than that of a-IGZO. Staggered, bottom-gate TFTs were fabricated on p-type
A dual-active layer (DAL) oxide TFT was first reported Si substrates with a Cr/Au coated back side to act as the
in 2008 by Kim et al. [1] as a way to increase the mobility gate electrode. The gate insulator (GI) is composed of 100 nm
compared to that of a conventional SAL TFT. The gen- thermal silicon oxide. The channel layer was deposited via
eral idea of the DAL device is to match a high-mobility radio frequency (RF) sputtering. Sputtering conditions for both
the ITO (10 wt. % tin oxide doped indium oxide) and a-
Manuscript received May 1, 2017; revised August 1, 2017; accepted IGZO (In:Ga:Zn atomic ratio of 1:1:1) were kept the same
August 12, 2017. This work was supported by Corning Inc. The review
of this paper was arranged by Editor K. C. Choi. (Corresponding author: and were as follows: pressure of 5 mtorr, applied RF power
Kevin A. Stewart.) density of 3.82 W·cm−2 , target-to-substrate distance of 10 cm,
K. A. Stewart, J. M. McGlone, and J. F. Wager are with the School and a process gas ratio of O2 /(Ar + O2 ) = 10%. For the
of EECS, Oregon State University, Corvallis, OR 97330 USA (e-mail:
[email protected]). DAL stack ITO and a-IGZO were deposited subsequently
V. Gouliouk is with the Department of Chemistry, Oregon State Univer- without delay nor breaking vacuum. No intentional heating
sity, Corvallis, OR 97330 USA. was used during sputtering. A postdeposition anneal of 300 °C
Color versions of one or more of the figures in this paper are available
online at http://ieeexplore.ieee.org. for 1 h was performed in air. Next, source/drain contacts were
Digital Object Identifier 10.1109/TED.2017.2743062 formed by thermal evaporation of aluminum. The channel

0018-9383 © 2017 IEEE. Personal use is permitted, but republication/redistribution requires IEEE permission.
See http://www.ieee.org/publications_standards/publications/rights/index.html for more information.
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2 IEEE TRANSACTIONS ON ELECTRON DEVICES

TABLE I
D EVICE PARAMETERS FOR SAL AND DAL TFTs

Fig. 1. Transfer characteristics of (a) SAL and (b) DAL devices. Evolution
of the transfer characteristics with increasing PBTS time for (c) SAL
and (d) DAL devices.

layer and source/drain areas were patterned via shadow mask.

The final device had dimensions of width/length (W/L) =
2000 µm/200 µm.
Devices were characterized at room temperature in the dark
with an Agilent 4155C semiconductor parameter analyzer.
Field-effect mobility (µFE ) was calculated using the following
equation:
d IDS 1
µFE = 
d VGS W L CGI VDS
and evaluated at a gate voltage (VGS ) of 19 V and drain Fig. 2. (a) Overlay of the transfer characteristics of SAL and DAL devices.
voltage (VDS ) of 5 V. ON-current (ION ) was extracted at (b) Shift of threshold voltage with PBTS stress time. (c) Comparison of
VGS = 19 V. Threshold voltage (VTH) was defined at IDS = subthreshold swing of SAL and DAL devices. (d) Comparison of output
characteristics of SAL and DAL devices.
W/L × 1 nA. Mean subthreshold swing (S) was assessed in
the range of IDS = 1 to 10 nA. Hysteresis, the voltage differ-
ence between forward and reverse sweep, was calculated as of 1.78 V, µFE of 13.3 cm2 · V−1 · s−1 , ION of 110 nA/µm,
Hyst. (V) = VTH,REV − VTH,FWD . S of 350 mV/dec, hysteresis of 302 mV, and excellent
Analytical measurements were conducted on unpatterned uniformity. The device parameters are summarized in Table I.
films which were processed and annealed at the same con- Mean values are given with the standard deviation in parenthe-
ditions as devices. Optical spectroscopy was performed on ses (n = 8). The transfer characteristics of eight DAL devices
an ocean optics setup. A Rigaku Ultima IV diffractome- are shown in Fig. 1(b). Mean mobility increased twofold, ION
ter was employed for the grazing-incidence X-ray diffrac- by a factor of 3, devices are twice as steep, and hysteresis
tion (GI-XRD) and X-ray reflectivity (XRR) measurements. decreased by one order of magnitude.
Surface roughness was measured with an Asylum Research An overlay, i.e., transfer curves are parallel shifted to exhibit
MFP-3-D atomic force microscope (AFM) in contact matching turn-ON, for a representative SAL and DAL device
mode. is shown in Fig. 2(a). The overlay clearly shows the smaller
subthreshold swing for the DAL device as well as the higher
III. E XPERIMENTAL R ESULTS mobility at the same gate overvoltage. The subthreshold swing
Fig. 1(a) shows the transfer characteristics (forward and as a function of drain current for both forward and reverse
reverse sweep) of eight SAL devices. They exhibit a mean VTH sweeps is shown in Fig. 2(c). The DAL TFT exhibits an
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STEWART et al.: SIDE-BY-SIDE COMPARISON OF SAL AND DAL OXIDE TFTs 3

improved subthreshold swing throughout the whole subthresh-

old region with a minimum value reaching 73 mV/dec which
is an excellent result for an oxide TFT. A subthreshold swing
below 80 mV/dec for an oxide TFT was also reported by
Asami et al. [8]. However, their GI was comprised of a much
smaller equivalent oxide thickness of 9.3 nm.
The higher mobility of the DAL device also results in an
increased drain current as is apparent in the output character-
istics shown in Fig. 2(d). As expected, both SAL and DAL
devices exhibit good saturation.
Furthermore, SAL and DAL TFTs are subjected to positive
bias temperature stress (PBTS) of VGS = +20 V and tempera-
ture of 60 °C for 60 min. The evolution of transfer characteris-
tics with increasing stress time for the SAL and DAL devices
is shown in Fig. 1(c) and (d), respectively. The SAL device
shows a large VTH shift of 11.2 V, as summarized in Fig. 2(b).
In comparison, the DAL device shows a dramatically improved
stability with a shift of only 0.5 V after 60 min.
IV. TCAD S IMULATION
A. Simulation Setup
Silvaco ATLAS 2-D device simulator is used to investigate
the SAL and DAL devices, particularly the difference in the
DOS. The simulation is supported with parameters from as
many physical measurements as possible. Selected results are
depicted in Fig. 3. These are, in clockwise order, optical
spectroscopy, XRR, AFM, and GI-XRD.
The bandgap is obtained from optical spectroscopy using a
Tauc plot. The bandgap is approximately 3.2 eV for both ITO Fig. 3. Physically based simulation. TCAD model is based on experimen-
and a-IGZO. tal band gap, thickness, and amorphous microstructure among others.
The ITO and a-IGZO channel layers thicknesses are deter-
TABLE II
mined from the known linear deposition rate and confirmed G ENERAL S IMULATION PARAMETERS
via XRR measurement.
IGZO is known to be amorphous below 600 °C and this is
verified by the GI-XRD measurement shown in Fig. 3. Thicker
ITO films are typically polycrystalline. A nano-/polycrystalline
morphology is observed in the GI-XRD pattern of a 6 nm thin
ITO layer. No crystalline peaks are detected in the GI-XRD
pattern of the 3 nm ITO film. Additionally, AFM of 3 nm
ITO shows a continuous and smooth surface with an rms
roughness of 0.24 nm, depicted in the bottom right of Fig. 3.
Surface rms roughness increases from ∼0.18 nm (near the
noise floor) for a-IGZO to 0.46 nm for polycrystalline ITO
with a film thickness of 27 nm. An amorphous nucleation layer
is often observed in polycrystalline oxide thin films before
grain growth occurs [9]. In the DAL case, the ITO layer
consists entirely of the amorphous nucleation layer because the simulation model as described before and summarized
it is ultrathin. An amorphous DOS model is used in the in Table II. These parameters remain unchanged. Then,
simulation for both the ITO and a-IGZO layers. the DOS profile is adjusted until the simulation and experiment
Fig. 4(a) shows the experimental and simulated transfer converge. To achieve this, a mapping technique is used,
characteristics of the SAL device for VDS = 0.5 and 5 V both as shown in Fig. 5. In the simulation, the Fermi level position
on the log and linear scale. Similarly, Fig. 4(b) shows the is continuously probed while the bias is ramped. The virtual
transfer characteristics of the DAL device. Excellent agree- probe is located at the accumulation layer (near GI/channel
ment between experiment and simulation is achieved. interface) and centered along the channel width. As a result,
both drain current and Fermi level position are known as a
B. Mapping Technique function of gate voltage. Accordingly, any part of the Fermi
Fit of transfer characteristics is accomplished using the level curve and, hence, transfer curve can be mapped to a
following procedure. Known physical parameters are set in corresponding energy in the DOS profile. In Fig. 5(b) and (c),
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4 IEEE TRANSACTIONS ON ELECTRON DEVICES

TABLE III
S IMULATION DOS PARAMETERS

that from a DOS perspective the ON-current is dominated by

the conduction band Urbach energy and the peak density of
conduction band band-tail states, NTA . This agrees well with
previous assessments of amorphous semiconductor transport
modeling [10], [11]. At VGS ≈ 10 V (the transition of
Sections IV and V), the Fermi level moves above the conduc-
Fig. 4. Comparison of experimental and simulated transfer characteris-
tics of (a) SAL and (b) DAL devices.
tion band mobility edge according to the simulation.

the valence band mobility edge (E V ) is located at 0 eV and C. Simulation Discussion

the conduction band mobility edge (E C ) at 3.2 eV. The subbandgap state nomenclature employed in Fig. 6
For easier visualization, the transfer curve in Fig. 5(a) is and Table III is as follows. The acceptor band-tail states
divided into five sections. Each numbered and colored section are defined by the peak density NTA and the Urbach
has a corresponding region in the Fermi level versus gate energy (slope) WTA . The shallow Gaussian donor (GD) states
voltage [Fig. 5(b)] and energy versus DOS [Fig. 5(c)] plots. are defined by the peak density NGD , the characteristic
In Section I, the device is negatively biased and in the decay energy (i.e., the standard deviation of the Gaussian
OFF -state. As a result, the Fermi level is positioned below distribution) WGD , and the peak energy E GD . The Gaussian
mid-gap. deep acceptor (GA) states are defined by the peak den-
In Section II, around VGS = 0 V, the Fermi level experiences sity NGA , the characteristic decay energy WGA , and the peak
a low defect density with respect to energy. Thus, little change energy E GA . The donor band-tail (TD) states are defined by
in gate voltage is required to move the Fermi level abruptly the peak density NTD , and the Urbach energy (slope) WTD .
toward the conduction band, as depicted in Fig. 5(b) and (c). To first order, GI/channel interface states and bulk states
The TFT turns ON at VGS = 1 V. At this point the Fermi level are interchangeable in the simulation. Magnitude and units are
is at ∼2.8 eV (or ∼0.4 eV below E C ). easily converted by multiplying/dividing by channel thickness.
Section III encompasses the subthreshold region of the Hence, interface and bulk defect states which are otherwise
device. In this region, the Fermi level again reaches a higher identical, i.e., with respect to magnitude and energy distribu-
density of defects near the conduction band and further tion, are nearly indistinguishable in the simulation. However,
modulation of the Fermi level requires application of a larger the a-IGZO layer for both the SAL and DAL devices is
gate voltage, as shown in Fig. 5(b). Examining Section III processed identically. Therefore, the bulk DOS of a-IGZO
in Fig. 5(c), it becomes clear that the subthreshold behavior should be the same in both cases. As a result, an interface
is dominated by the shallow donor states around 2.95 eV (or trap density (DIT ) of 6 × 1011 cm−2 ·eV−1 is introduced in the
0.25 eV below the conduction band). An increase (decrease) SAL case in order to achieve agreement between experiment
of these shallow donor states results in an increase (decrease) and simulation. The a-IGZO bulk DOS and interface trap dis-
of the subthreshold swing in the simulated transfer curve. tribution are depicted in Fig. 6(a) and summarized in Table III.
In Sections IV and V, the TFT is in the ON-state. Focusing The interface traps have the same characteristic decay energy
on the linear plot of the transfer characteristics in Fig. 5(a) of 0.1 eV and the same peak energy of 2.95 eV as the shallow
and the upper part of Fig. 5(c), the TCAD simulation suggests donor bulk states.
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STEWART et al.: SIDE-BY-SIDE COMPARISON OF SAL AND DAL OXIDE TFTs 5

Fig. 5. Mapping the electrical I–V characteristics to subbandgap DOS via (a) drain current as a function of gate voltage to (b) Fermi level position
as a function of gate voltage to (c) energy as a function of DOS.

The interface trap density is at least one order of magnitude

smaller in the DAL case, at which point the observational
error margin of our simulation is reached. Pristine thermal
silicon oxide on silicon, which is the best known GI interface,
has a defect density of low-1010 cm−2 ·eV−1 [15] and this is
likely the lower limit. Hence, for the DAL case we can bound
the DIT value between 1 × 1010 and 6 × 1010 cm−2 ·eV−1 .
We think this small interface trap density in the DAL device
is a result of the high carrier concentration of the ITO, which
is extracted to 3.63 × 1018 cm−3 . Essentially the traps at the
interface are filled/neutralized (passivated) by the high density
of free carriers in the ITO. As a result, the DAL TFT has
a significantly improved subthreshold swing, mobility, and
hysteresis compared to the SAL TFT.
Furthermore, it is assumed that any interface trap density
at the ITO/IGZO interface is negligible small. This is moti-
vated by the facts that the ITO and a-IGZO are processed
subsequently without breaking vacuum (low contamination),
that both the ultrathin ITO and a-IGZO layer exhibit an
amorphous, smooth interface, and that ITO and a-IGZO form
a homojunction.
Besides the small DIT , the following consideration may
also contribute to the improved performance of the DAL
Fig. 6. DOS of interface and channel layer for (a) SAL and
device. ITO and a-IGZO both have an oxygen anion-derived (b) DAL devices.
valence band. This means that the ionization potential for
both ITO and a-IGZO will be approximately the same, based
on the solid state energy scale [16]. Furthermore, using The simulation input files are available online [18].
the described process conditions, the ITO and a-IGZO thin
films exhibit the same band gap. Therefore, the junction V. C ONCLUSION
between ITO and a-IGZO is modeled as a homojunction. In summary, the DAL TFT has significantly improved per-
This is different than the model for an ITZO/IGZO DAL formance exhibiting mobility of 31 cm2 ·V−1 ·s−1 , subthreshold
TFT proposed by Rim et al. [17] where their band alignment swing of 175 mV/dec, minimal hysteresis, and good PBTS sta-
results in a conduction band offset between interface and bulk bility. Excellent agreement between experiment and physically
channel layer, similar to a heterojunction field-effect transistor. based TCAD simulation is achieved. A mapping technique is
That being said, the higher carrier concentration in the ITO introduced to relate experimental transfer characteristics to the
compared to a-IGZO creates a similar band bending effect subbandgap DOS model. Simulation suggests that the DAL
in the conduction band for the ITO/IGZO DAL. According TFT has a much smaller interface trap density, presumably
to simulation, the ITO conduction band at the front of the due to the large free carrier concentration of the ITO, leading
channel is 0.11 eV below the a-IGZO conduction band at the to a reduced number of participating interface traps during
backside of the channel. TFT operation.
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6 IEEE TRANSACTIONS ON ELECTRON DEVICES

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