ELECTRICAL TECHNOLOGY

(DIGITAL ELECTRONICS)

GUIDELINES FOR
PRACTICAL ASSESSMENT TASKS

GRADE 12

2025

These guidelines consist of 49 pages.

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TABLE OF CONTENTS

PAGE
1. INTRODUCTION 3

2. TEACHER GUIDELINES 5
2.1 How to administer PATs 5
2.2 How to mark/assess PATs 5
2.3 PAT Programme of Assessment (PAT PoA) 6
2.4 Moderation of PATs 8
2.5 Absence/Non-submission of tasks 8
2.6 Simulations 9
2.7 Projects 9
2.8 Working mark sheet 10

3. LEARNER GUIDELINES 11
3.1 PAT 2025 cover page 11
3.2 Instructions to the learner 12
3.3 Declaration of Authenticity (COMPULSORY) 12

4. SIMULATIONS 13
4.1 Simulation 1: Non-inverting op amp 13
4.2 Simulation 2A: Switching circuits using 555 IC 19
Simulation 2B: Op-amp comparator using a 741 IC 25
4.3 Simulation 3: Connecting a 7-segment display to a 4-bit BCD 7-segment driver 29
4.4 Simulation 4A: Up counter using J-K flip-flops 33
Simulation 4B: PICAXE 37

5. SECTION B: DESIGN AND MAKE 39

5.1 Design and Make: Part 1 40
5.2 Assessment of the Design and Make Phase: Part 1 42
5.3 Design and Make: Part 2 44
5.4 Assessment of the Design and Make Phase: Part 2 45

6. PROJECTS 46
6.1 Practical Project: Square Wave Inverter 100 W 12 VDC to 230 VAC by IC
4047 – IRF540 46
6.2 Practical Project Programmable Buggy 47
6.3 Practical Project: Function Generator 49

7. CONCLUSION 49

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1. INTRODUCTION

The 18 Curriculum and Assessment Policy Statements subjects which contain a practical
component all include a practical assessment task (PAT). These subjects are:

 AGRICULTURE: Agricultural Management Practices, Agricultural Technology

 ARTS: Dance Studies, Design, Dramatic Arts, Music, Visual Arts
 SCIENCES: Computer Applications Technology, Information Technology, Technical
Sciences; Technical Mathematics
 SERVICES: Consumer Studies, Hospitality Studies, Tourism
 TECHNOLOGY: Civil Technology, Electrical Technology, Mechanical Technology and
Engineering Graphics and Design

A practical assessment task (PAT) mark is a compulsory component of the final promotion mark
for all candidates offering subjects that have a practical component and counts 25% (100 marks)
of the end-of-the-year examination mark. The PAT is implemented across the first three terms
of the school year. This is broken down into different phases or a series of smaller activities that
make up the PAT. The PAT allows for learners to be assessed on a regular basis during the
school year and it also allows for the assessment of skills that cannot be assessed in a written
format, e.g. test or examination. It is therefore important that schools ensure that all learners
complete the practical assessment tasks within the stipulated period to ensure that learners are
resulted at the end of the school year. The planning and execution of the PAT differs from subject
to subject.

Practical assessment tasks are designed to develop and demonstrate a learner's ability to
integrate a variety of skills in order to solve a problem. The PAT also makes use of a
technological process to inform the learner what steps needs to be followed to derive a solution
for the problem.

The PAT consists of four simulations and a practical project. The teacher may choose any ONE
of the practical projects and any TWO simulations available for DIGITAL ELECTRONICS. For
the first simulation to be completed in term 1, the teacher must choose between Simulation 1
and Simulation 2. For Simulation 2 to be completed in term 2, the teacher must choose between
Simulation 3 and Simulation 4.

The teacher must apply assessment on an ongoing basis at the same time that the learner is
developing the required skills. TWO simulations should be completed by the learners, in addition
to the manufacturing of a practical project.

The PAT incorporates all the skills the learner has developed throughout the year. The PAT
ensures that all the different skills will be acquired by learners on completion of practical work,
as well as the correct use of tools and instruments.

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Requirements for presentation

A learner must present the following:

 PAT file with all the evidence of simulations, design and prototyping. A copy of the
PAT 2025 cover page. The relevant simulations and assessment sheets should be copied
and handed to each learner to include in the file.
 Practical project with:
o Enclosure:
 The file must include a design.
 The enclosure and the design must match.
 No cardboard boxes are allowed.
 Plastic wooden and metal enclosures are acceptable.
 Enclosures that are manufactured and/or assembled by the learners are
preferred.
 The enclosure should be accessible for scrutiny inside.
 Lids that are secured are preferred.
o Circuit board:
 The file should include the PCB design.
 The PCB must be mounted inside the enclosure in such a manner that it can be
removed for scrutiny. Alternatively, inspection can be made from the bottom in
cases where translucent (see-through) enclosures are used.
 Switches, potentiometers, connectors and other items must be mounted.
 Wiring must be neat and bound/wrapped.
 Wiring must be long enough to allow for the PCB to be removed and inspected
with ease.
o Logo and name:
 The file should contain the logo and name design and specification plate.
 Logo, specification plate and name must be prominent on the enclosure.
 The logo/specification plate must be affixed in a permanent manner – painted,
glued or stuck on with vinyl.

The PAT will have a financial impact on the school's budget and school management teams are
required to make provision for accommodating this particular expense.

PAT components and other items must be acquired timeously, for use by the learners, before
the end of the first term at the start of the academic year.

It is the responsibility of the HOD to ensure that the teacher is making progress with the PAT
from the start of the school year.

Provincial departments are responsible for setting up moderation timetables and consequently
PATs should be completed by 31 August 2025, in time for moderation.

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2. TEACHER GUIDELINES

2.1 How to administer PATs

Teachers must ensure that learners complete the simulations required for each term. The project
should be started in January in order to ensure its completion by August. In instances where
formal assessments take place, the teacher has to assume the responsibility thereof.

The PAT should be completed during the FIRST THREE TERMS and must be ready at the start
of PAT moderation. Teachers must make copies of the relevant simulations and hand them to
learners at the beginning of each term.

The PAT must NOT be allowed to leave the workshop and must be kept in a safe place at
all times when learners are not working on them.

The weightings of the PAT must be adhered to and teachers are not allowed to change
weightings for the different sections.

2.2 How to mark/assess the PATs

The PAT for Grade 12 will be set and assessed internally, but moderated externally. All formal
assessment will be done by the teacher.

The teacher is required to produce a working model and model answer file that sets the baseline
for assessment at a Highly Competent Level for every project choice exercised by the learners.
This file must include all the simulations with answers the teacher has done him/herself. The
teacher will use the model answers and project to assess the simulations and projects of the
learners.

Once a facet sheet has been completed by the teacher, assessment will be deemed to be
complete. No reassessment will be done once the facet sheets have been completed and
captured by the teacher. Learners must ensure that the work is done to the required standard
before the teacher finally assesses the PAT during each stage of completion.

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2.3 PAT Programme of Assessment (PAT PoA)

The programme of assessment (PoA) of the PAT is as follows:

TIME FRAME ACTIVITY RESPONSIBILITY

Preparation Teacher – Builds the models and works out the model answers for
for PAT 2025 the simulations. Identifies shortages in tools, equipment and
consumable items for simulations that must be procured.
SMT – Receives procurement requests from teachers and
processes payments for the acquisition of required items
January–March Simulation 1 Teacher – Copies and hands out simulations
2025 Learners – Complete simulations
Teacher – Assesses simulations
HOD – Checks if tasks have been completed and marked by the
teacher before the holidays
January 2025 PAT project – Teacher – Obtains quotations for PAT projects
procurement Principal – Approves PAT procurement for PAT projects
Teacher – Ensures that PAT projects are ordered and delivered
HOD – Checks that all tasks are completed and marked by the
teacher before the holidays
February- March PAT project – Teacher – Ensures that there is secure storage for PAT projects
2025 learners Teacher – Hands out and takes in PAT projects
commence Teacher – Hands out copies of Section B, Design and Make: Part 1
with project Teacher – Includes practical sessions for learners to complete the
PAT project every week
Learners - Insert copies of Section B, Design and Make: Part 1 in
the PAT file. Complete Section B, Design and Make: Part 1 (Circuit
diagram, component list, Description of operation).
Teacher – Assesses Section B, Design and Make: Part 1
HOD – Checks in on teacher to ensure that practical workshop
sessions take place on a weekly basis
April–June 2025 Simulation 2 Teacher – Copies and hands out simulations
Learners – Complete simulations
Teacher – Assesses simulations
Learners – Complete Section B, Design and Make: Part 1 (Circuit
Board Manufacturing)
Teacher – Assesses Section B, Design and Make: Part 1
HOD – Checks if tasks have been completed and marked by the
teacher before the holidays
April–June 2025 Moderation of District subject facilitator/subject specialist will visit the school and
Simulation 1 moderate Simulation 1
10% of learners' work is moderated
April–June 2025 PAT project – Teacher – Includes practical sessions every week for learners to
learners complete the PAT project
continue with Learners – Continue with completion of the PAT project
project HOD – Checks in on teacher to ensure that practical workshop
sessions take place on a weekly basis
July holidays PAT Learners that are behind on the PAT are required to complete the
2025 intervention project during these holidays
July–August Moderation of District subject facilitator/subject specialist will visit the school and
2025 Simulation 2 moderate Simulation 2 – different learners from the previous term
10% of learners' work is moderated

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TIME FRAME ACTIVITY RESPONSIBILITY

July–August PAT project – Teacher – Ensures that there is secure storage for PAT projects
2025 completion Teacher – Hands out Section B, Design and Make: Part 2
Learners – Insert copies of Section B, Design and Make: Part 2 in
the PAT file; complete Section B, Design and Make: Part 2
Teacher – Assesses Section B, Design and Make: Part 2. Transfer
marks onto working marksheet
HOD – Checks to see that 100% of the PAT files and projects are
completed and assessed
September 2025 PAT PAT projects are moderated by subject facilitators/subject
moderation specialists from the province and learners are available to
demonstrate skills
10% of learners are moderated randomly
October 2025 PAT PAT projects and simulations are moderated by subject
moderation specialists from DBE and learners are available to demonstrate
skills
Learners are moderated randomly

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2.4 Moderation of PATs

Provincial moderation of each term's simulations will start as early as the following term.
Simulation 1 should be moderated as soon as the second term starts. Similarly, Simulation 2
will be moderated in July. The project will, however, only be moderated on completion.

During moderation of the PAT, the learner's file and project must be presented to the moderator.

The moderation process is as follows:

 During moderation, learners are randomly selected to demonstrate the different
simulations. All four simulations will be moderated.
 The teacher is required to build an exemplar model of each project type chosen for the
school.
 This model must be on display during moderation.
 The teacher's model forms the standard of the moderation at Level 4 (Highly Competent).
 Level 5 assessments must exceed the model of the teacher in skill and finishing.
 Learners who are moderated will have access to their files during moderation and may
refer to the simulations they completed earlier in the year.
 Learners may NOT ask assistance from other learners during moderation.
 All projects and files must be on display for the moderator.
 If a learner is unable to repeat the simulation or cannot produce a working circuit during
moderation, marks will be deducted and circuits assessed as not being operational.
 The moderator will randomly select no fewer than two projects (not simulations) and the
learners involved will have to explain how the project was manufactured.
 Where required, the moderator should be able to call on the learner to explain the function
and principles of operation, and request the learner to exhibit the skills acquired through
the simulations for moderation purposes.
 On completion the moderator will, if needed, adjust the marks of the group upwards or
downwards, depending on the outcome of moderation.
 Normal examination protocols for appeals will be adhered to, if a dispute arises from
adjustments made.

2.5 Absence/Non-submission of tasks

The absence of a PAT mark in Electrical Technology without a valid reason: The learner will be
given three weeks before the commencement of the final end-of-year examination to submit the
outstanding task. Should the learner fail to fulfil the outstanding PAT requirement, such a learner
will be awarded a zero (0) for that PAT component.

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2.6 Simulations

Simulations are circuits, experiments and tests/tasks which the learner will have to build, test and
measure and practically do as part of the development of practical skills. These skills have to be
illustrated to the external moderator that visits the school at intervals during the school year.

Teachers who make use of simulation programs on a computer may use them for the learners to
practise on. However, it is required that the circuit be built using real components and that
measurements be made with actual instruments for the purposes of assessment and moderation.

The correct procedure for completing simulations is outlined below for teachers and school
management teams who are responsible for the implementation of the PAT in Electrical
Technology.

STEP 1: The teacher will choose simulations from simulations that are provided.
STEP 2: Compile a list of the components needed for every simulation. Add extra
components as these items are very small and you will need extras, as these items
get lost/damaged very easily when learners work on them.
STEP 3: Contact three different electronics component suppliers for comparative quotations.
STEP 4: Submit the quotations to the SMT for approval and procurement of the items.
STEP 5: Place the components in storage. Collate items for each simulation, thus making it
easier to distribute and use during practical sessions. Ensure that different values of
components do not mix, as this would lead to components being used incorrectly
and this could damage the component and in extreme cases, the equipment used.
STEP 6: Copy the relevant simulations and hand them out to learners at the start of the term.

Teachers are allowed to adjust circuits and component values to suit their environment/resource
availability.

Teachers are required to develop a set of model answers in the teacher's file. Moderators will use
the teacher's model answers and artefacts when moderating.

2.7 Projects

The projects are construction projects teachers can choose for their learners. These projects are
based on proven circuits provided by schools and subject advisors. The projects are based on
working prototypes and require careful construction in order for it to operate correctly.

Projects vary in cost and teachers must ensure that the projects chosen to fall within the scope of
the school's budget.

Once the teacher has decided on a circuit, he/she must construct the prototype. Thereafter, copies
of the provided circuit can be made and distributed to learners. They MUST redraw these circuits
in their files correctly.

The description of the operation of the circuits is NOT complete. Learners are required to
interrogate the function of the components in the circuit provided. Learners should elaborate on
the purpose of components in the circuit. It is recommended that learners investigate similar
circuits available on the internet and in the school library or workshop reference books.

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2.8 Working mark sheet

(A working Excel file is provided with this PAT.)
PAT mark sheet Term 1 Term 2 Project

Mark out of 100

Total = Term 1 +

Moderated
Term 2 + Project
Design Design

Mark
Simulation Simulation and Make and Make
1 or 2 3 or 4 Part 1 Part 2

No. Name of Learner 50 50 120 30 250

1.
2.
3.
4.
5.
6.
7.
8.
9.
10.
11.
12.
13.
14.
15.
Total
Average

Teacher Name: Principal Name: Moderator Name:

Signature: Signature: Signature:

Date: Date:_________________________ Date:__________________

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3. LEARNER GUIDELINES

3.1 PAT 2025 COVER PAGE

(Place this page at the front of the PAT.)

Department of Basic Education Grade 12

CAPS for Technical High Schools Practical Assessment Task – Electrical Technology

Time allowed: Terms 1–3 (2025)

Learner Name:

Class:

School:

Specialisation: DIGITAL ELECTRONICS

Complete simulation 1 or 2 in the FIRST TERM and Simulation 3 or 4 in the SECOND TERM.

Project (Write the name of the project): _____________________________

Evidence of moderation:

NOTE:
When the learner evidence selected has been moderated at school level, the table will contain
evidence of moderation. Provincial moderators will sign the provincial moderation and only sign if
re-moderation is needed.

Moderation Signature Date Signature Date

School-based

District moderation

Provincial moderation Re-moderation

Mark allocation

Moderated
PAT Component Maximum Mark Learner Mark
Mark
Simulation for Term 1 50
Simulation for Term 2 50
Design and Make Project – Circuit 120
Design and Make Project – Enclosure 30
Total 250

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3.2 Instructions to the learner

 The practical assessment task counts 25% of your final promotion mark.
 All work produced by you must be your own effort. Group work and co-operative work are
NOT allowed.
 The practical assessment task must be completed over three terms.
 The PAT file must contain TWO simulations and a practical project.
 Calculations should be clear and include units. Calculations should be rounded off to TWO
decimals. SI units should be used.
 Circuit diagrams can be hand-drawn or drawn on CAD. NO photocopies or scanned files
are allowed.
 Photos are allowed and may be in colour or greyscale. Scanned photos and photocopies
are allowed.
 This document must be placed inside your PAT file together with the other evidence.
 Learners with identical photos will be penalised and receive zero for that section.

3.3 Declaration of Authenticity (COMPULSORY)

Declaration:

I ______ (name) herewith declare that the work represented

in this evidence is entirely my own effort. I understand that if proven otherwise, my final results
may be withheld.

Signature of learner Date

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4. SIMULATIONS

4.1 Non-inverting op amp

Name of learner:
Mark
Class: Date completed: 50

Date Assessed: Assessor Signature:

Date Moderated: Moderator Signature:

4.1.1 Purpose:

● To build a non-inverting operational amplifier circuit using a 741 IC

● To display the input and output waveforms on an oscilloscope
● To observe how a change in the value of RF affects the gain and output voltage
of the circuit by either increasing or decreasing the value of R1

4.1.2 Required resources:

TOOLS/INSTRUMENTS MATERIALS
Analogue/Digital trainer 1 x LM 741 op amp
Analogue/Digital oscilloscope (dual trace) 1 x 10 kΩ for R2 and R1
Function generator 1 x 100 kΩ, 1 MΩ, for R1
Multimeter Connecting wires
Variable DC power supply (split supply)
Side cutters
Wire stripper
Long-nose pliers
Breadboard

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4.1.3 Procedure:

Construct the circuit on the breadboard as shown in FIGURE 4.1.3.

Adjust the function generator to 1 kHz at a voltage of 0,6 peak to peak.
Set the oscilloscope.
Set channel 1 at 0,2 V/div, and channel 2 at 0,2 V/div and Time at 0,2 msec/div

SCOPE
+12 V

7 CH1 CH 2 GND
2
-
-0,75V /0,75 V 6 VOUT
741 OP AMP
Function Generator VIN
+
3 4
R1=10 KΩ
400 Hz -12 V

R2=10 KΩ

FIGURE 4.1.3 NON-INVERTING OP AMP

4.1.4 Set the oscilloscope up to display at least TWO complete cycles for CH1 and CH2 with
the voltage settings to display 2/3rd of the screen.

4.1.5 Draw and label both the input (from CH1) and output (from CH2) waveforms for two
complete cycles on the table on the next page.

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4.1.6 Write down the peak values of the input and output voltage readings from CH1 and
CH2 with R1 = 10 kΩ

CH 1 V/div: ________

CH 2 V/div: ________

Time/div: ________

VIN :_________

VOUT :_________

TABLE 4.1.6

NOTE: 1 mark for each correct waveform =2

1 mark for each oscilloscope setting = 3
1 mark for each voltage measurement = 2 (7)

4.1.7 Name and explain the type of feedback used in the circuit diagram.

(3)

4.1.8 Calculate the value of the gain using the values of the resistors in FIGURE 4.1.3.

𝐴𝑉 = __________________

= __________________

= _______________ (3)

4.1.9 Calculate the voltage gain of the circuit using the values of the voltages in
QUESTION 4.1.6.

𝐴𝑉 = __________________

= __________________

= __________________ (3)

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4.1.10 Measure and record the voltages across VOUT in the table below. Also calculate the
voltage gain values in the table below as you change the value of R1 in the circuit.
R1
Use 𝐴𝑉 = 1 + (R2)

Resistor R1 VIN VOUT Voltage gain (AV)

(a) 10 kΩ 0,6 V p-p _____________

(b) 100 kΩ 0,6 V p-p _____________

(c) 1M Ω 0,6 V p-p _____________

TABLE 4.1.10

NOTE: 1 mark for each correct voltage value =3

2 marks for each correct gain calculation = 6 (9)

4.1.11 Draw and label the input and output waveforms for at least two complete cycles in the
table below. Indicate the voltage settings for CH 1 and CH 2 with R1 = 1 MΩ

CH 1 V/div: ________

CH 2 V/div: ________

Time/div: ________

VIN : _________

VOUT :_________

TABLE 4.1.11

NOTE: 1 mark for each correct waveform =2

1 mark for each oscilloscope setting = 3
1 mark for each voltage measurement = 2 (7)

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4.1.12 Calculate the gain of the amplifier by using resistance values when
RF = 1 MΩ

𝐴𝑉 = __________________

= __________________

= __________________ (3)

4.1.13 Refer to TABLE 4.1.10, your waveforms on the oscilloscope for TABLES 4.1.6
and 4.1.11 as well as your calculations in QUESTIONS 4.1.8 and 4.1.9. Compare the
gain in TABLE 4.1.10 to the gain in TABLE 4.1.9 above and write a conclusion on your
findings.

(5)
Theory: (40)

NOTE: Learner competency in this context will mean the following:

(This is done for easy assessment when using a rubric.)

Not yet Have not met the requirements and will be given another opportunity for reassessment.
competent ● Be precise about what they did wrong, or the areas they need to improve in.
● Explain clearly the level of skill they need to achieve to be assessed as 'competent'.
● Indicate whether part or all of the assessment events will need to be repeated.
Competent Have the necessary ability, knowledge or skill to complete the task successfully.
● Acceptable and satisfactory, though not outstanding.

Outstanding Went beyond expectation (neatness, proficiency – high degree of skills, expertise)

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FACET SHEET FOR SIMULATION 1

Mark allocation (tick the appropriate level next to the task indicated)
Task Not yet competent after Competent after Allocation
Outstanding
description reassessment of certain/ reassessment of certain Competent of marks
(Highly competent)
all parts of the task parts of the task
Building the The learner was given The learner was given an The learner correctly built the The learner correctly built
non- opportunities to rebuild the opportunity to rebuild part of the circuit without the guidance of the circuit without the
inverting circuit after the teacher circuit after the teacher the teacher. guidance of the teacher
op amp intervened in identifying and intervened in identifying and and went beyond
using rectifying more mistakes. rectifying a few mistakes. expectations and with
LM 741 IC high proficiency. 6
(1) (2–3) (4–5) (6)
Safety The learner was timeously The learner was sometimes The learner applied safety
aspects reminded to apply safety reminded to apply safety rules, rules, regulation and correct
rules, regulation and correct regulation and correct procedure when using tools
procedure when using tools procedure when using tools and instruments to wire the
and instruments. and instruments circuits without being
reminded by the teacher. 2
(0) (1) (2)
Attitude/ The learner was completely The learner was reluctant to a The learner demonstrated
behaviour/ reluctant to work, cooperate, certain degree to work, willingness to work,
conduct take responsibility of their cooperate, take responsibility of cooperate, take responsibility
own conduct and follow their own conduct, and follow of their own conduct and
instructional, regulation and instructional, regulation and follow instructions, regulation
workshop practice even after workshop practice. and workshop practice.
being cautioned 2
/reprimanded.
(0) (1) (2)
Rubric
10
Theory
+
40
Total Simulation 1
=
50

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4.2 Simulation 2: Switching circuits using 555 IC and op-amp comparator, using
741 IC

Name of learner:
Mark
Class: Date completed: 50

Date Assessed: Assessor Signature:

Date Moderated: Moderator Signature:

Simulation 2A: Switching circuits using 555 IC

4.2.1 Purpose:

● To build an electronic piano (astable multivibrator) circuit using a 555 IC as in

FIGURE 4.2.3, on a breadboard
● To display the output waveforms on an oscilloscope
● To calculate the output frequency.
● To investigate how a change in RF and C1 affects the frequency and tone of the
output

4.2.2 Required resources:

TOOLS/INSTRUMENTS MATERIALS
Analogue/Digital trainer 1 x 555 IC
Analogue/Digital oscilloscope 2 x 0,1 µF
Dual rail DC power supply 1 x 10 µF (25 V capacitor)
(-5 V - 0 - +5 V) 7 x 1 kΩ resistor
Side cutters 1 x 10 kΩ resistor
Wire stripper 1 x 5,6 kΩ speaker
Long-nose pliers 6 x push to make switches
Breadboard Connecting wires

4.2.3 Procedure:

Build the circuit in FIGURE 4.2.3 (see next page) on the breadboard.
Connect channel 1 of the oscilloscope across capacitor C1.
Connect channel 2 of the oscilloscope to pin 3 of the IC.
Switch the circuit ON.
Press and hold S1 and observe the output on the oscilloscope. Pay attention to the
sound from the speaker.
Repeat this step for all switches.
Answer the questions that follow.

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+9 V
R1
R7 R6 R5 R4 R3 R2 1 kΩ
1 kΩ 1 kΩ 1 kΩ 1 kΩ 1 kΩ 10 kΩ
8 4
7
Output
3
555 R8
S6 S5 S4 S3 S2 S1 6
1 kΩ
2
1 5
C3
C2 10 µF
C1
0,1 µF 0,1 µF Buzzer
(104) (104)

FIGURE 4.2.3: ASTABLE MULTIVIBRATOR CIRCUIT DIAGRAM

PARAMETER FORMULAE UNIT

Time high (T1) 0,693 × (R1+R2) × C1 Second (s)

Time low (T2) 0,693 × R2 × C1 Second (s)

Time period (T) 0,693 × (R1+(2×R2+RN)) × C1 Second (s)

Frequency (F) 1,44 / (R1+(2×R2+RN)) × C1 Hertz (Hz)

Duty cycle (T1/T) ×100 Percentage (%)

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(b) Set the oscilloscope to display at least four complete cycles of the output
waveform with the amplitudes not smaller than two divisions peak-to-peak. Draw
the output waveform, when S1 is pressed, on the oscillogram below.

CH 1 V/div: ________

CH 2 V/div: ________

Time/div: ________

NOTE: 1 mark for each correct waveform (o/p) (2)

1 mark for correct oscilloscope setting (1) (3)

Calculate the following when S1 is pressed:

(c) The time that the output is high for each half cycle (Time high T 1) with:
T1 = 0,693 × (R1+R2) × C1

_____________________________________
_____________________________________
_____________________________________
_____________________________________ (2)

(d) The time that the output is low for each half cycle (Time low T2) with:
T2 = 0,693 × R2 × C1

_____________________________________
_____________________________________
_____________________________________
_____________________________________ (2)

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(e) The frequency of the output with 1,44 / (R1+(2×R2+RN)) × C1

(2)

(f) Set the oscilloscope to display at least four complete cycles of the output
waveform with the amplitudes not smaller than two divisions peak-to-peak. Draw
the output waveform when S6 is pressed on the oscillogram below.

CH 1 V/div: ________

CH 2 V/div: ________
CH 1

Time/div: ________

CH 2

NOTE: 1 mark for each correct waveform (o/p) (2)

1 mark for correct oscilloscope setting (1) (3)

(i) The time that the output is high for each half cycle (Time high T 1) with:
T1 = 0,693 × (R1+(2×R2+RN)) × C1

______________________________________________________
______________________________________________________
______________________________________________________
______________________________________________________ (2)

(ii) The time that the output is low for each half cycle (Time low T2) with:
T2 = 0,693 × (R2+R3+R4+R5+R6+R7)× C1

______________________________________________________
______________________________________________________
______________________________________________________
______________________________________________________ (2)

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(iii) The frequency of the output with f = 1,44 / (R1+(2×R2+RN)) × C1

______________________________________________________
______________________________________________________
______________________________________________________
______________________________________________________ (2)

(g) Press each of the switches/push buttons while keeping the oscilloscope
connected on the same setting as in (b).
Study the output waveform on the oscilloscope and compare it to the sound when
each of the switches/push buttons is pressed.
Record your findings and motivate why this happens.

(2)

Theory Simulation 2A (20)

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FACET SHEET FOR SIMULATION 2A

Mark allocation (tick the appropriate level next to the task indicated)
Task Competent after Not yet competent after Allocation
Outstanding
description reassessment of certain reassessment of certain/ Competent of marks
(Highly competent)
parts of the task all parts of the task
Building the The learner was given The learner was given an The learner correctly built The learner correctly built
astable opportunities to rebuild the opportunity to rebuild part of the circuit without the the circuit without the
multivibrator circuit after the teacher the circuit after the teacher guidance of the teacher. guidance of the teacher
using a 555 IC intervened in identifying intervened in identifying and and went beyond
and rectifying more rectifying a few mistakes. expectations and with high
mistakes. proficiency. 6
(1) (2–3) (4–5) (6)
Safety aspects The learner was timeously The learner was sometimes The learner applied safety
reminded to apply safety reminded to apply safety rules, regulation, and
rules, regulation and rules, regulation and correct correct procedure when
correct procedure when procedure when using tools using tools and
using tools and and instruments. instruments to wire the
instruments. circuits without been 2
reminded by the teacher.
(0) (1) (2)
Attitude/ The learner was The learner was reluctant to a The learner demonstrated
Behaviour completely reluctant to certain degree to work, willingness to work,
Conduct work, cooperate, take cooperate, take responsibility cooperate, take
responsibility of their own of their own conduct, and responsibility of their own
conduct and follow follow instructional, regulation conduct, and follow
instructional regulation and and workshop practice instructions, regulation and
workshop practice even workshop practice. 2
after being cautioned/
reprimanded. (1) (2)
(0)
Rubric
10
Theory
+
20
Total Simulation 2 A
=
30
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Simulation 2B: Op-amp comparator using a 741 IC

4.2.4 Purpose:

● To investigate the characteristics of a 741-op-amp as a comparator with a sine wave

input
● To display the input and output waveforms on an oscilloscope
● To investigate the effect of a varying the reference voltage on the output

4.2.5 Required resources:

TOOLS/INSTRUMENTS MATERIALS
Function generator 1 x LM741 op amp
Dual-trace oscilloscope 1 x 100 Ω resistor
Split DC power supply (+9 V/-9 V) or 2 x 1 x 470 Ω resistor
9 V batteries 1 x 10 kΩ potentiometer
Breadboard 1 x 1 kΩ resistor
Side cutters 1 x LED
Long-nose pliers Connecting wires
Wire stripper

4.2.6 Procedure:

 Set the dual voltage power supply to +9 V / -9 V.

 Set the function generator to deliver 3 VP-P 10 Hz sine wave.
 Build the circuit in FIGURE 4.2.6 on your experiment board and connect it to the
supply and input.
 Use a multimeter and measure the voltage on pin 3.
 Set the potentiometer until the voltage on pin 3 is 1 V.
 Connect channel 1 of the oscilloscope across the input to display at least TWO
complete cycles.
 Connect channel 2 of the oscilloscope across the output to display at least TWO
complete cycles.
 Ensure that the V/div settings for channel 1 and channel 2 are set so that the
waveforms are at least 2/3rd of the screen.
 Set the T/div setting to display at least TWO complete cycles of the input and output.
 Draw the input and output waveforms and answer the questions.

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(a) Build the circuit in FIGURE 4.2.6(a) on the experiment board.

R2
1 kΩ
R1
9V
100 Ω +9 V
2
- 7 VOUT
6

3
+ 4
R3 9V
3 VP -9 V
470 Ω
1 kHz
RREF
10 kΩ LED

FIGURE 4.2.6: 741 OP-AMP COMPARATOR CIRCUIT

(b) Draw and label the input waveforms from pin 2 and pin 6 on the oscillogram below.
NOTE: Set the oscilloscope to display at least TWO complete cycles.

CH 1 V/div: ________

CH 2 V/div: ________

Time/div: ________

NOTE: 1 mark for each correct waveform =2

1 mark for correct oscilloscope setting = 1 (3)

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(c) Explain the relationship between the input and the output waveforms with reference
to the polarity and VREF.

(2)

(d) Adjust RREF until the voltage on pin 3 is 2 V. Draw the input and output waveforms
on the oscilloscope screen below.
NOTE: Keep the oscilloscope setting the same as in QUESTION 4.2.6(b).

CH 1 V/div: ________

CH 2 V/div: ________

Time/div: ________

NOTE: 1 mark for each correct waveform =2

Oscilloscope settings remain the same (no marks awarded) (2)

(e) Compare the waveforms in QUESTION 4.2.6 (b) to the waveforms in

QUESTION 4.2.6 (d) and explain the effect that adjusting RREF has on the output.

(3)

Theory 2B (10)

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FACET SHEET FOR SIMULATION 2B

Mark allocation (tick the appropriate level next to the task indicated)
Task Not yet competent after Allocation of
description Competent after reassessment Outstanding marks
reassessment of certain/ Competent
of certain parts of the task (Highly competent)
all parts of the task
Building the The learner was given The learner was given an The learner correctly built the The learner correctly built the
comparator opportunities to rebuild the circuit opportunity to rebuild part of the circuit without the guidance of circuit without the guidance of the
using a 741 IC after the teacher intervened in circuit after the teacher intervened the teacher. teacher and went beyond
identifying and rectifying more in identifying and rectifying expectations and with high
mistakes. a few mistakes. proficiency. 𝟔
(1) (2–3) (4–5) (6)
Safety The learner was timeously The learner was sometimes The learner applied safety
aspects reminded to apply safety rules, reminded to apply safety rules, rules, regulation and correct
regulation and correct procedure regulation, and correct procedure when using tools
when using tools and instruments. procedure when using tools and instruments to wire the
and instruments. circuits without being reminded
by the teacher.
𝟐
(0) (1) (2)
Attitude/beha The learner was completely The learner was reluctant to a The learner demonstrated
viour/conduct reluctant to work, cooperate, take certain degree to work, cooperate, willingness to work, cooperate,
responsibility of their own take responsibility of their own take responsibility of their own
conduct, and follow instructional, conduct and follow instructional, conduct and follow instructions,
regulation and workshop practice regulation and workshop practice. regulation and workshop
even after being practice.
cautioned/reprimanded.
𝟐
(0) (1) (2)
Rubric ⁄𝟏𝟎
Theory + ⁄𝟏𝟎
Total Simulation 2B = ⁄𝟐𝟎
+ ⁄𝟑𝟎
Total Simulation 2A
= ⁄𝟓𝟎
TOTAL:

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4.3 Simulation 3: Connecting a 7-segment display to a 4-bit BCD 7-segment driver

Name of learner:
Mark
Class: Date completed: 50

Date Assessed: Assessor Signature:

Date Moderated: Moderator Signature:

4.3.1 Purpose:

● To build a 7-segment display connected to a 4-bit BCD 7-segment display driver

● To observe the output on the 7-segment display after entering different digital
inputs

4.3.2 Required resources:

TOOLS/INSTRUMENTS MATERIALS
Analogue/Digital trainer 7 x 390 ῼ to 750 ῼ resistors
Breadboard 4 x 1k resistors
Variable DC power supply CD4511 IC
Side cutters CD4518B IC
Breadboard wire 4 x SPST switches
7-segment display

4.3.3 Activity 3A

Build the circuit below on a breadboard and observe the output.

+ 9V
Common
cathode
3 16 4 7 x 390 to 750 display
13 a
LT +Vcc BL a
12 b
Switches
7 11 c f b
A 4511
1
BCD to 7 – 10 d
g
B
2 segment 9 e
C decoder
6 15 f e c
D
14 g
4-bit d
LE GND
BCD
5 8
input

4 x 1k

FIGURE 4.3.3: CIRCUIT DIAGRAM OF 7-SEGMENT DISPLAY CONNECTED

TO A 4-BIT BCD 7-SEGMENT DRIVER

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VCC

b
g

d
c
a

e
f
16 15 14 13 12 11 10 9

CD 4511

1 2 3 4 5 6 7 8

D3

D0
D1

D2

LT

BL

GND
LE

VCC f g a b c d e
16 15 14 13 12 11 10 9

CD 4511

1 2 3 4 5 6 7 8

D1 D2 LT BL LE D3 D0 GND

FIGURE 4.4.3.1: PIN LAYOUT OF THE CD 4511 IC

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FACET SHEET FOR SIMULATION 3

Mark allocation (tick the appropriate level next to the task indicated)
Competent after Not yet competent after Allocation
Task description Outstanding
reassessment of certain reassessment of certain/ Competent of marks
(Highly competent)
parts of the task all parts of the task
Building the The learner was given The learner was given an The learner correctly built the The learner correctly built the
7-segment display to opportunities to rebuild the opportunity to rebuild part of circuit without the guidance of circuit without the guidance
a 4-bit BCD circuit after the teacher the circuit after the teacher the teacher. of the teacher and went
7-segment display intervened in identifying and intervened in identifying and beyond expectations and
driver rectifying more mistakes. rectifying a few mistakes. with high proficiency. 𝟔
(1) (2–3) (4–5) (6)
Safety aspects The learner was timeously The learner was sometimes The learner applied safety rules,
reminded to apply safety rules, reminded to apply safety regulation and correct procedure
regulation and correct rules, regulation and correct when using tools and
procedure when using tools procedure when using tools instruments to wire the circuits
and instruments. and instruments. without being reminded by the
teacher. 𝟑
(1) (2) (3)
Hand tools Used hand tools correctly.
(1)
𝟏
Preparation for Checked the datasheet Set supply voltage correct at
insertion of on the ICs. +9 V
components into 𝟐
breadboard (1) (2)
Correct connection 8 nodes for correct connection 15 nodes for correct 20 nodes for correct connection
on breadboard – of CB4518B IC connection of CD4511 IC of CD4511 IC and the
nodes and polarity and the 7-segment display 7-segment display 𝟐𝟎
(8) (15) (20)
Attitude/ The learner was reluctant to The learner was reluctant to The learner demonstrated
Behaviour/ work, cooperate, take a certain degree to work, willingness to work, cooperate,
Conduct responsibility of their own cooperate, take responsibility take responsibility of their own
conduct and follow of their own conduct and conduct and follow instructional,
instructional, regulation and follow instructional, regulation and workshop
workshop practice even after regulation and workshop practice.
being cautioned/ reprimanded. practice. 𝟑
(0) (1–2) (3)

Rubric
𝟑𝟓

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Activity 3B

Conduct the following steps and answer the questions in the spaces provided.

STEP IC CD4185 GIVEN CODE 7-SEGMENT DISPLAY

(a) Name the segments that will illuminate on
the 7-segment display if the binary number
0001 is fed into the inputs.
(3)
(b) Name the segments that will illuminate on
the 7-segment display if the binary number
0100 is fed into the inputs.

(3)
(c) Name the segments that will illuminate on
the 7-segment display if the binary number
1001 is fed into the inputs.

(3)
(d) Name the segments that will illuminate on
the 7-segment display if C and D are
switched ON.
(3)
(e) Name the segments that will illuminate on
the 7-segment display if B and D are
switched ON.
(3)
(15)

Activity 3A: (35)

Activity 3B: (15)
TOTAL Simulation 3: [50]

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4.4 Simulation 4: Connecting an up counter using 74LS76 Dual J-K Flip-flops IC

Name of learner:
Mark
Class: Date completed: 50

Date Assessed: Assessor Signature:

Date Moderated: Moderator Signature:

Simulation 4A: Up counter using J-K flip-flops

4.4.1 Purpose:

To build an up counter using J-K flip-flops

4.4.2 Required resources:

TOOLS/INSTRUMENTS MATERIALS
Multimeter LD-2 logic designer
Side cutters 74LS76 dual J-K Flip-flops with Preset and
Wire stripper Clear
Jumper wires
TTL Data book
Power supply 5 V
Breadboard

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4.4.3 Circuit diagram

Procedure
Wire the circuit shown in FIGURE 4.4.3. Use extra caution when wiring the power and
ground connections.

VCC red green

L1 L2

S S
4 15 9 11
J Q J Q

1 6
PB2 CL CL

16 14 12 10
K Q K Q

R R
3 8

PB1

FIGURE 4.4.3(a): CIRCUIT DIAGRAM OF AN UP COUNTER USING J-K FLIP-FLOPS

CP2
VCC

CD1

CD2

SD2
J2

Q2
K2

16 15 14 13 12 11 10 9
SD

SD

K Q J Q
CP

CP

J Q K Q
CD

CD

1 2 3 4 5 6 7 8
Q1

Q2
Q1
K1
CP1

SD1
J1

GND

FIGURE 4.4.3(b): PIN LAYOUT OF THE 74LS76 IC

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4.4.4 Procedure and observation:

(a) Turn on power to the LD-2. Press PB1. All lights should be off. (1)

(b) Use PB2 as the clock input, L1 and L2 as the 1 and 2 outputs. Record your
observations of the circuit operation.
___________________________________________________________________
___________________________________________________________________
___________________________________________________________________ (2)

(c) Use PB2 to place a count of two on L1 and L2. Press PB1 and record your observation.
___________________________________________________________________
___________________________________________________________________ (2)

(d) Turn off the power to the LD-2. Remove the wires from pin 15 of the 74LS76 and place
them on pin 14. (1)

(e) Remove the wire from pin 11 of the 74L576 and place it on pin 10. (1)

(f) Tum on the power to the circuit. Press PB1. L1 and L2 should light. (1)

(g) Use PB2 as the clock input and L1 and L2 as the 1 and 2 outputs. Notice that the L1
and L2 outputs will now be LOW true so that the count when both lights are ON is
zero. Record your observations of the circuit operation.
__________________________________________________________________________
__________________________________________________________________________
_______________________________________________________________________ (2)

(h) What is the modulus of each of the counters in this circuit?

_____________________________________________________________
_____________________________________________________________ (1)

(i) How can the down counter be converted to display a high true output?
___________________________________________________________________
___________________________________________________________________
___________________________________________________________________ (2)
(13)

4.4.5 Housekeeping

When you have obtained all the measurements and the teacher has validated all your
answers, you must tidy up your workplace as part of the safety in the workshop. You
will be assessed on housekeeping with the rubric below.

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FACET SHEET FOR SIMULATION 4A

Mark allocation (tick the appropriate level next to the task indicated)
Task Competent after Not yet competent after Allocation
Outstanding
description reassessment of certain reassessment of certain/ Competent of marks
(Highly competent)
parts of the task all parts of the task
Building The learner was given The learner was given an The learner correctly built The learner correctly built the
the up opportunities to rebuild the opportunity to rebuild part of the circuit without the circuit without the guidance of
counter circuit after the teacher the circuit after the teacher guidance of the teacher. the teacher and went beyond
using J-K intervened in identifying and intervened in identifying and expectations and with high 𝟔
flip- flop rectifying more mistakes. rectifying a few mistakes. proficiency.
circuit (1) (2–3) (4) (5–6)
Safety The learner was timeously The learner was sometimes The learner applied safety
aspects reminded to apply safety rules, reminded to apply safety rules, regulation and
regulation and correct rules, regulation and correct correct procedure when
procedure when using tools procedure when using tools using tools and
and instruments. and instruments. instruments to wire the
circuits without being 𝟑
reminded by the teacher.
(1) (2) (3)
Attitude/ The learner was reluctant to The learner was reluctant to The learner demonstrated
Behaviour/ work, cooperate, take a certain degree to work, willingness to work,
Conduct responsibility of their own cooperate, take cooperate, take
conduct and follow responsibility of their own responsibility of their own
instructional, regulation and conduct and follow conduct and follow
workshop practice even after instructional, regulation and instructional, regulation 𝟑
being cautioned/reprimanded. workshop practice. and workshop practice.
(0) (1–2) (3)
Rubric
𝟏𝟐
Theory
+
𝟏𝟑
Total Simulation 4A
=
𝟐𝟓

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Simulation 4B: PICAXE

4.4.8 Purpose:

To test knowledge of flow diagrams and PICAXE

Study the scenario below and design a flow diagram for the PICAXE play park access
control system.

SCENARIO:

A play park has limited access for children who enter the park.

Design and simulate a PICAXE play park control system for 30 children to enter the
park when a space is available. There will be an entrance and exit on each end of the
play park.

This system is set up to have a single entrance and a single exit at the play park.
This system will enable access control for children's safety.
It will consist of a red light and a green light.
The green light informs the child entering the play park that a space is available.
The system will use two digital sensors.
Sensor 1 will increase the count when children enter the play park.
Sensor 2 will decrease the count when children exit the play park.
Sensor 1 will increase the count to 30 children inside the play park and the program
will toggle to the red light. This will indicate a full play park
Sensor 2 will reduce the count when children leave. The green light switches on if the
count is less than 30, which indicates that a child may now enter the play park.

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FACET SHEET FOR SIMULATION 4B

Mark allocation (tick the appropriate level next to the task indicated)
Not yet competent
Task Competent after Allocation
after reassessment of Outstanding
description reassessment of certain Competent of marks
certain/all parts of the (Highly competent)
parts of the task
task
Inserting the Either start or stop element Both start and stop element
Start/Stop correctly placed correctly placed
element (1) (2) 𝟐
Inserting the Two decision elements Four decision elements
decision correctly placed correctly placed
element (1) (2) 𝟐
Inserting the One process element Two process elements Three process elements
process correctly placed correctly placed correctly placed
element (1) (2) (3) 𝟑
Inserting the One data element correctly Two data elements Three data elements Four data elements correctly
data elements placed correctly placed correctly placed placed
(1) (2) (3) (4) 𝟒
Inserting the 0%–25% of flow lines 25%–50% of flow lines 50%–75% of flow lines All flow lines correctly placed
flow lines correctly placed correctly placed correctly placed
correctly (1–2) (3–4) (5–6) (7-8) 𝟖
Labelling of 0–3 labels correctly placed 4–6 labels correctly 7–9 labels correctly placed All labels correctly placed
elements placed
(1) (2–3) (4–5) (6) 𝟔
Rubric ⁄𝟐𝟓
Total Simulation 4A = ⁄𝟐𝟓
Total Simulation 4B + ⁄𝟐𝟓
TOTAL: = ⁄𝟓𝟎

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5. SECTION B: DESIGN AND MAKE

Design and Make Project

Time: January to August 2025

Learner Name:

School:

Class:

Title/Type of Project: ______

INSTRUCTIONS

 This section is COMPULSORY for all learners.

 The teacher will choose a circuit for the project.
 Any project constructed must include at least (but is not limited to):
o Seven components
o A variety of components (both active and passive)
o PCB making in some form
o Soldering
o An enclosure with a switch and protection
 The checklist below must be used to ensure that all the required tasks for the PAT have
been completed.

PAT CHECKLIST

The learner MUST fill in this checklist BEFORE marking of the section takes place.

NO. DESCRIPTION TICK (🗹)

NO YES
Design and Make: Part 1
1. Circuit diagram drawn  
2. Circuit description filled in  
3. Component list completed  
4. Tools list for circuitry populated  
5. Measuring instrument list filled in  
Design and Make: Part 2
1. Enclosure design completed and included in the file  
2. Unique name written down and on the enclosure  
3. Logo designed and on the enclosure  
Miscellaneous
1. Enclosure included in the project  
2. Enclosure prepared and drilled according to the design  
3. Enclosure finished off and completed with name and logo  
4. PCB securely mounted in the enclosure using acceptable techniques  
5. Circuit inside the enclosure accessible  
6. Internal wiring neat and ready for inspection  
7. File and project completed and ready for moderation at the workshop/room  

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5.1 Design and Make: Part 1

5.1.1 Circuit diagram

Draw a circuit diagram of the project chosen and paste it on the next page.

5.1.2 Project: Description of operation

Use the space below to describe how the project operates. Do research and use your
own words.

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5.1.3 Component list

List the components you will need for the circuit diagram.

LABEL DESCRIPTION AND VALUE QUANTITY

5.1.4 Tools/Instrument list

List the tools needed to complete the project.

DESCRIPTION PURPOSE

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5.2 Assessment of the Design and Make Phase: Part 1

NO. FACET DESCRIPTION Mark Achieved mark

Circuit Diagram
1. The circuit diagram was drawn using 6
● EGD equipment (4)
● CAD/Any electronic design software (6)
2. The circuit diagram was drawn using correct symbols. 3
3. The circuit diagram has all labels, e.g. R1, C1, Tr1 3
4. The circuit diagram has all component values, e.g. 100 Ω, 4
220 μF
5. The circuit diagram has a name/title. 2
6. The circuit diagram has a frame and title block. 2

Circuit Diagram Subtotal: 20

Component List
7. Labels correlate with circuit diagram. 2
8. Description and values correlate with circuit diagram. 2
9. Quantities are correct. 1

Component List Subtotal: 5

Description of Operation
10. Basic function of the circuit is described correctly. The 11
purpose/role/function of each component is described.
11. All subcircuits in the circuit diagram and component list are 4
included in the description.
12. Purposes of subcircuits in the circuit diagram are described 5
correctly.
13. Learner used own interpretation and did not copy from another 3
source verbatim.
14. Sources are acknowledged. 2

Description of Operation Subtotal: 25

Tools/Instrument List
15. The tools/instrument list has been completed. 4
16. All the tools/instruments listed have a purpose for being used. 1

Tools/Instrument List Subtotal: 5

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NO. FACET DESCRIPTION Mark Achieved mark

Circuit Board Manufacturing
17. Transfer of the PCB design onto the blank board is correct. 5
Not over-exposed or under-exposed.
18. Circuit board is etched neatly according to the PCB design. 10
19. The learner's name is etched onto the circuit design. 4
20. All burrs have been removed. 2
21. Axial and radial components are placed neatly and flush with 5
the board.
22. Component orientation is aligned between similar 2
components (e.g. the gold band of all resistors are placed on
the same side).
23. Soldered components – leads are cut off, flush and neat on 5
the solder side.
24. More than 60% of the solder joints are shiny (not dry joints). 5
25. Wire insulation is stripped to the correct length (no extra 3
copper showing).
26. Wiring is long enough to allow for dismantling and inspection. 2
27. Wiring is wrapped neatly. 2
28. A power switch is included and fitted to the enclosure. 2
29. A fuse/protection is included and fitted correctly where 2
applicable.
30. Wiring entering/exiting the enclosure is provided with a 2
grommet/applicable fittings/sockets where applicable.
31. Batteries/Transformer is mounted using a battery housing/ 2
mounting bracket and battery clip (NO double-sided tape).
32. The project has a pilot light/LED installed in the enclosure 2
showing when the circuit is operational. LED is mounted with
a grommet or applicable fitting. (Switch is on – must go out
when fuse is blown.)
33. The project is fully operational and commissioned/installed in 10
the enclosure.

Circuit Board Manufacturing Subtotal: 65

Circuit Diagram Subtotal: 20

Component List Subtotal: 5
Description of Operation Subtotal: 25
Tools/Instrument List Subtotal: 5
Circuit Board Manufacturing Subtotal: 65

TOTAL
(PART 1 = 120 marks)
NOTE: If pre-etched and pre-manufactured PCB’s are used, learners will not be able to receive
any marks for facets 17-20.
In projects where facets are not applicable, the projects should be marked, and the
totals adjusted accordingly.

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5.3 Design and Make: Part 2

5.3.1 Enclosure design

● Design an enclosure for your project.

● NO FREEHAND DRAWINGS.
● Draw using EGD equipment OR use a CAD program.
● Draw in first-angle orthographic projection.
● Add your drawings after this page.
● Use colour to enhance your drawing.

5.3.2 Manufacture the enclosure neatly according to your design.

You may use pre-cut panels from metal, wood and/or Perspex/Plexiglas.
You must, however, construct/assemble these parts.
Injection-moulded enclosures are also acceptable. It is important that your enclosure
and the placement of the parts align with your design.

5.3.3 Choose a name for your device.

Write down the name of the device below.

___________________________________________________________________

5.3.4 Design a unique logo for your device, as well as a specification plate and attach it after
this page.

Logo design Specification plate design

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5.4 Assessment of the Design and Make Phase: Part 2

NO. FACET DESCRIPTION Mark Achieved mark

Enclosure Design
1. Enclosure design is included in first-angle orthographic
2
projection.
2. Drawn design includes a title box and page border. 1
3. Isometric drawing included additionally. 2
4. Dimensions are included. 2
5. The name of the device is written in the PAT document. 1
6. The logo design and specification plate design is in the PAT 2
document.

Enclosure Design Subtotal: 10

Enclosure Manufacturing
7. Enclosure matches the design. 1
Dimensions and placement correlate.
8. Name of the device is attached on the enclosure. 1
9. The logo design is attached on the enclosure. 2
10. The logo design on the enclosure is durable and not merely a 2
paper pasted on the enclosure (painted/used
decoupage/screen printed/sublimation printed).
11. The enclosure is manufactured from scratch/pre-cut parts. 5
Perfectly manufactured square, neat and sturdy enclosure (5)
Injection moulded/pre-manufactured enclosures minimum
alterations (3)

Enclosures may include sheet metal, Perspex, Plexiglas, wood,

glass and other raw materials, injection-moulded plastic boxes.
Enclosures may NOT include cardboard, paper, margarine
containers.
12. Holes/Cut-outs in the enclosure are made with the appropriate 3
tools and match the design.
13. Specification plate with the learner's name, operating voltage, 2
fuse rating and additional information on the project.
14. Enclosure is neatly prepared, painted and aesthetically 2
pleasing.
15. The circuit board is mounted using appropriate methods inside 2
the enclosure. (NO double-sided tape, Prestik, glue, chewing
gum, masking tape, etc.)

Enclosure Manufacturing Subtotal: 20

TOTAL
(PART 2 = 30 marks)

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6. PROJECTS

6.1 Practical Project: Square Wave Inverter 100 W 12 VDC to 230 VAC by IC 4047 –
IRF540

100 W inverter circuit 12 VDC to 230 VAC with IRF540. The circuit applied IC 4047 to
generate continuous wave signal and IRF540 to amplify the signal to be stepped up by
the transformer.

NOTE: You will need a 2–3 A centre-tapped transformer to handle/supply 100 W load.

INVERTER 100 W 12 VDC TO 230 VAC BY IC 4047 – IRF540

COMPONENT LIST
Diode 1N4007 VR1 100 KΩ
C1 2 200 µF R2 390 KΩ
C2 0,01 µF R3 330 Ω
C3 0,1 µF R4 820 Ω
C4 2,2 µF R5 220 Ω–330 Ω
Varistor MOV RDN240/20
IC 4047 – IRF540 2 x D MOSFET (T1) IRF540
LED S2 SPST switch
Supply 12 V or 12 V DC supply for testing
TRANSFORMER on circuit diagram optional; a smaller one can be used for testing.
Grommet – power indicator LED
Grommet/PVC compression gland/Solder butt sleeve 3-2mm – power chord
PCB board mounting screws

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6.2 Practical project: Programmable buggy

K1-K4 is responsible for inputs for forward and backward movement of the buggy. K5 is the OK button. When the buggy is switched on, the
red LED will be on and the buggy is ready to be programmed. (K1 = Turn right, K2 = Turn left, K3 = Reverse, K4 = Forward) When the buggy
is ready, the green LED will flash. This means the instructions entered are valid. After the program is set, press K5 = OK button to execute all
instructions. The buggy can accept up to 30 input commands at a time. When the commands are executed, the green and red LEDs will emit
simultaneously.

R4 Q4 R3 R8 R7
82 Ω 8050D 82 Ω 82 Ω Q12 82 Ω
Q5 8550D Q10
R6 8050D R5 R10 8550D R9
1 kΩ M1+ 1 kΩ 1 kΩ M2+ 1 kΩ
Q15 Q14
Q9 9014
M1- M2- 9014
9014

Q6 Q13
8050D 8050D
Q7 Q12
8050D 8050D

IC
1 14
OUT 1 OUT 2
2 CN OUT 3
13
3 K5 OUT 4
12
CONFIRM 4 VDD GND
11
LED 1 K5
5 10
K4 CN
6 K3 K2
9
TURN RIGHT
K4 7 CN K1
8

DIP 14
TURN LEFT
R2 K3

560 Ω
BACKWARD
K1
VDD
LED 2 3V
FORWARD C2 + C1
K2 +
100 µF 100 µF
10 V 10 V
R1 S1
560 Ω

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NO. POSITION ITEM DESCRIPTION QTY

1 IC IC LGW-17368-SCH02 1
/NY8A053BP14
2 C1,C2 Capacitor 100 µF 10 V (size 5X7 mm) 2
3 R5,R6,R9,R10 Resistor 1 kΩ - ¼ W 4
4 R3,R4,R7,R8 Resistor 82 Ω - ¼ W 4
5 R1,R2 Resistor 560 Ω - ¼ W 2
6 Q8,Q9,Q14,Q15 Transistor 9014C 4
7 Q4,Q5,Q10,Q11 Transistor 8550D 4
8 Q6,Q7,Q12,Q13 Transistor 8050D 4
9 LED1 LED 5 mm YELLOW COLOR 1
10 LED2 LED 5 mm RED COLOR 1
11 K1,K2,K3,K4,K5 Tact switch 6 x 6 x 5 mm 5
12 S1 On/Off Switch 8 mm 1
13 MOT 1, MOT 2 Gear Box Speed rate: 1/120 straight shape 2
14 BH-3V Battery holder AA x 2 : 58 x 34 mm. 1
15 M+ Wire 3+50+3 red 2
16 M- Wire 3+50+3 black 2
17 W1 Univ. Wheel 37x17x10 mm 1
18 Plast. Wheel 37x15 mm 2
19 Gear box Screw Round head PM 3x25 mm 4
20 Battery Holder Screw Flat head KM 3x6 mm 2
21 Univ. Wheel Screw Round head PB 2 3x6x D=4 4
22 Screw Meson Head PWA 7 x 5 mm W5 1
23 M3 Screw nut M3 6
24 Gear box support Plastic A 26 x 10 x 10 mm 2
25 Gear box support Plastic B 26 x 10 x 7 mm 2
26 PCB board mounting 4
screws
27 Grommet – LEDs 2

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6.3 Practical project: Function generator

In the circuit diagram, U1B, U1C, U1A are three independent operational amplifiers
inside a LM324 IC. The circuit composed by U1B is a comparator; the circuit composed
by U1C, C1 and related circuits is an integrating circuit; the circuit composed by R6b,
C2 and R7, C3 is a filter, which is used to filter out high harmonics and convert
triangular waves into nearly triangular waves. The circuit consisting of R6b, C2, R7
and C3 is a filter for filtering out high harmonics and converting triangular waves to
approximate sine waves. Rp2 is used to adjust the output amplitude and R8 and R9
are used to limit the maximum and minimum output signal amplitude.

The output of U1B (pin 7) feeds the output signal through R2,R1 to the input (pin 6),
forming a positive feedback circuit.

The output signal from the output of U1C (pin 8) is also fed to the input of U1B (pin 6)
via R2 to control the working state of U1B. The circuit consisting of U1C, C1 and the
associated resistor is an integral circuit. The output of U1C (pin 8) outputs a triangular
wave signal, and adjusting RP1 can influence the charging and discharging time of
this integral circuit, thus changing the frequency of the triangular wave. A high-pass
filter consisting of R6b, C2, R7 and C3 is connected to the output of U1C (pin 8) to
filter out the high frequency harmonics from the triangle wave and convert the triangle
wave into an approximate sine wave.

NOTE: All circuits MUST include an On/Off switch with an ON indicator and fuse protection.

7. CONCLUSION

On completion of the practical assessment task, learners should be able to demonstrate their
understanding of the industry, enhance their knowledge, skills, values and reasoning abilities as
well as establish connections to life outside the classroom and address real-world challenges.
The PAT furthermore develops learners' life skills and provides opportunities for learners to
engage in their own learning.

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