Chapter 1
Introduction to Microprocessor (
Microprocessor Architecture & Pin
diagram)
1
Introduction
Computer: A computer is a programmable machine that receives input, stores and
manipulates data/information, and provides output in a useful format.
Basic computer system consist of a CPU, memory and I/O unit.
Address bus
I/O I/O
ROM RAM interface devices
CPU
Data bus Control
bus
Block diagram of a basic computer system
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Basic Concepts of Microprocessors
⚫ Microcomputer:- It is a programmable machine. The two principal
characteristics of a computer are:
⚫ Responds to a specific set of instructions in a well-defined manner.
⚫ It can execute a prerecorded list of instructions (a program)
⚫ Its main components are
⚫ CPU
⚫ Input & Output devices
⚫ Memory
⚫ Microprocessor:- It is a programmable VLSI chip which includes ALU, register
circuits & control circuits. Its main units are-
⚫ ALU
⚫ Registers
⚫ Control Unit
⚫ Microcontroller:- Silicon chip which includes microprocessor, memory & I/O in
a single package
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Block Diagram
Microcomputer
Microprocessor Microcontroller 4
Definition of the Microprocessor
✓ Microprocessor is a Programmable, Clock driven, Register based,
Electronic device that reads instruction from a storage device, takes the
data from input unit and process the data according to the instructions
and provides the result to the output unit.
➢ Programmable- Perform Different set operation on the data depending on the
sequence of instructions supplied by the programmer.
➢ Clock Driven – Whole task is divided into basic operations, are divided into
precise system clock periods.
➢ Register Based – Storage element
➢ Electronic Device – fabricated on a chip
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Microprocessor Based System with bus
Architecture
⚫ ALU:- Arithmetic and logical operations like add, subtraction, AND & OR.
⚫ Register Array: - Store data during the execution of program.
⚫ Control Unit: Provides necessary timing & control signal. It controls the flow of data
between microprocessor and peripherals.
*Microprocessor is one component of microcomputer.
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• Memory:
➢ Stores information such as instructions and data in binary format (0 and 1).
➢ Sub-system” of microprocessor-based system. sub-system includes the registers
inside the microprocessor .
✓ Read Only Memory (ROM): used to store programs that do not need
alterations.
✓ Random Access Memory (RAM) (R/WM): used to store programs
that can read and altered like programs and data.
• Input/output: Communicates with the outside world.
• System Bus: Communication path between the microprocessor and peripherals.
➢ group of wires to carry bits.
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How does a Microprocessor works
✓ To execute a program, the microprocessor “reads” each
instruction from memory, “interprets” it, then “executes or
perform” it.
✓ The right name for the cycle is
➢ Fetch
➢ Decode
➢ Execute
✓ This sequence is continued until all instructions are
performed.
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Machine Language
✓ To communicate with computer, instruction is given in binary language.
✓ MP has 8 bit data so 2^8 = 256 combinations. So difficult to write
programs in set of 0’s and 1’s .
for eg:
➢ 0011 1100 – is an instruction that increments the number in accumulator by 1
➢ 1000 0000– is an instruction that add the number in register B to the accumulator
content , and keep the result in A.
So it is very tedious and error inductive. For convenience, written in Hexadecimal
code. For example 0011 1100 is equivalent to 3C H
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An accumulator
1.Purpose: An accumulator is a register in a CPU that is used to store
intermediate results of arithmetic and logic operations.
1.Functionality:
1. Stores the output of arithmetic operations.
2. Temporarily holds data that the CPU is currently processing.
2.Speed: Accessing the accumulator is faster than accessing main memory,
which helps speed up the CPU’s processing time.
3.Usage:
1. Commonly used in operations like addition, subtraction, multiplication, and
division.
2. Facilitates quick read and write operations for immediate data processing.
4.Location: It is part of the CPU’s internal memory (registers), making it
crucial for efficient execution of machine instructions.
8085 Assembly Language
✓ Even program is written in Hexa decimal .. It is difficult to understand.
✓ Program is written in mnemonic.
For E.g.: binary code 0011 1100 (3C H in hexadecimal) is represented by INR
A
➢ INR(Abbreviation for "Increment) A –INR stands for Increment, A is
accumulator… this symbol suggest the operation of incrementing the accumulator
by 1
Similarly 1000 0000 is equivalent ( 80 H) is represented as
➢ ADD B– ADD stands for addition and B represents content in register B. this symbol
suggest that addition of the number in register B to the accumulator content , and
keep the result in A.
***So MP has 246 such bit pattern amounting to 74 different instruction for
performing various operations
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Features of Microprocessor- 8085
✓ 8085 is developed by INTEL
✓ 8 bit microprocessor: can accept 8 bit data simultaneously
✓ Operates on single +5V D.C. supply.
✓ Designed using NMOS technology(NMOS stands for "n-channel metal-oxide-semiconductor).
✓ 6200 transistor on single chip
✓ It provides on chip clock generator, hence it does not require external clock
generator.
✓ Operates on 3MHz clock frequency.
✓ 8bit multiplexed address/data bus, which reduce the number of pins.
✓ 16address lines, hence it can address 2^16 = 64 K bytes of memory
✓ It generates 8 bit I/O addresses, hence it can access 2^8 = 256 I/O ports.
✓ 5 hardware interrupts i.e. TRAP, RST6.5, RST5.5, RST4.5, and INTR
✓ It provides DMA.
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Hardware Interrupts
These are signals that alert the processor to handle important tasks immediately. They
interrupt the ongoing activities to address more urgent ones. Here are the key types:
1. TRAP: A high-priority interrupt that the processor cannot ignore.
2. RST6.5, RST5.5, RST4.5: Programmable interrupts that jump the processor to
specific tasks.
3. INTR: A general-purpose interrupt that can be used by various devices to gain the
processor's attention.
Direct Memory Access (DMA)
DMA allows hardware devices to read from and write to system memory without
involving the CPU, freeing it to perform other operations. This makes the system more
efficient, especially for tasks that move large amounts of data like streaming video or
transferring files.
Internal Architecture (functional block diagram)of 8085
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8085 Architecture…….cont…
8085 architecture consists of following blocks:
1. Register Array
2. ALU & Logical Group
3. Instruction decoder and machine cycle encoder, Timing and control
circuitry
4. Interrupt control Group
5. Serial I/O control Group
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8085 Architecture …… cont….
1. Registers Array : 14 register out of which 12 are 8 bit capacity and 2 of 16 bit. Classify into 4 types
(a) General purpose register: (user accessible)
➢ B,C,D,E,H,L are 8 bit register.(can be used singly)
➢ Can also be used for 16-bit register pairs- BC, DE & HL.
➢ Used to store the intermediate data and result
➢ H & L can be used as a data pointer(holds memory address)
(b) Special Purpose Register[A, Instruction Register and Flag]
(b.1) Accumulator (A): (user accessible)
➢ 8 bit register
➢ All the ALU operations are performed with reference to the contents of Accumulator.
➢ Result of an operation is stored in A.
➢ Store 8 bit data during I/O transfer
(b.2) Instruction Register: (user not accessible)
➢ When an instruction is fetched from memory, it is loaded in IR. Then transferred to the
decoder for decoding.
➢ It is not programmable and can not be accessed through any instruction.
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8085 Architecture …… cont….
(b.3) Flag Register(F): (user accessible)
➢ 8 bit Register
➢ Indicates the status of the ALU operation.
➢ ALU includes 5 flip flop, which are set or reset after an operation
according to data conditions of the result in the accumulator.
(Flag Register)
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Flag Register…… cont….
Flag Significance
C or CY (Carry) CY is set when an arithmetic operation generates a carry
out, otherwise it is 0 (reset)
P (Parity) P= 1; if the result of an ALU operation has an even number
of 1’s in A;
P= 0; if number of 1 is odd.
AC (Auxiliary carry) Similar to CY,
AC= 1 if there is a carry from D3 to D4 Bit
AC= 0 if there is a no carry from D3 to D4 Bit
(not available for user)
Z(zero) Z = 1; if result in A is 00H
0 otherwise(Set if the
result of an operation is
zero.)
S(Sign) S=1 if D7 bit of the A is 1(indicate the result is -ive)
S= 0 if D7 bit of the A is 0(indicate the result is +ive)
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8085 Architecture …… cont….
(c) Temporary Register[ W, Z, Temporary data register]
➢ Internally used by the MP(user not accessible)
(c.1) W and Z register:
▪ 8 bit capacity
▪ Used to hold temporary addresses during the execution of some
instructions
(c.2) Temporary data register:
▪ 8 bit capacity
▪ Used to hold temporary data during ALU operations.
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8085 Architecture …… cont….
(d) Pointer Register or special purpose [SP, PC]
(d.1) Stack Pointer(SP)
➢ 16 bit address which holds the address of the data present at the top of the stack
memory
➢ It is a reserved area of the memory in the RAM to store and retrieve the temporary
information.
➢ Also hold the content of PC when subroutines are used.
➢ When there is a subroutine call or on an interrupt. ie. pushing the return address on a
jump, and retrieving it after the operation is complete to come back to its original
location.
(d.3) Program Counter(PC)
➢ 16 bit address used for the execution of program
➢ Contain the address of the next instruction to be executed after fetching the instruction
it is automatically incremented by 1.
➢ Not much use in programming, but as an indicator to user only.
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8085 Architecture …… cont….
In addition to register MP contains some latches and buffer
✓ Increment and decrement address latch
➢ 16 bit register
➢ Used to increment or decrement the content of PC and SP
✓ Address buffer
➢ 8 bit unidirectional buffer
➢ Used to drive high order address bus(A8 to A15)
➢ When it is not used under such as reset, hold and halt etc this buffer is used
tristate high order address bus.
✓ Data/Address buffer
➢ 8 bit bi-Directional buffer
➢ Used to drive the low order address (A0 to A7) and data (D0 to D7) bus.
➢ Under certain conditions such as reset, hold and halt etc this buffer is used
tristate low order address bus.
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8085 Architecture …… cont….
(2) ALU & Logical Group: it consists ALU, Accumulator, Temporary
register and Flag Register.
(a) ALU
➢ Performs arithmetic and logical operations
➢ Stores result of arithmetic and logical operations in accumulator
(b) Accumulator
➢ General purpose register
➢ Stores one of the operand before any arithmetic and logical
operations and result of operation is again stored back in
Accumulator
➢ Store 8 bit data during I/O transfer
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8085 Architecture …… cont….
(2) ALU & Logical Group…………………..cont…………………
(c) Temporary Register
➢ 8 bit register
➢ During the arithmetic and logical operations one operand is available in A
and other operand is always transferred to temporary register
For Eg.: ADD B – content of B is transferred into temporary register
before actual addition
(d) Flag Register
➢ Five flag is connected to ALU
➢ After the ALU operation is performed the status of result will be stored in
five flags.
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8085 Architecture …… cont….
(3) Instruction decoder and machine cycle encoder, Timing and
control circuitry
(a) Instruction decoder and machine cycle encoder :
➢ Decodes the op-code stored in the Instruction Register (IR) and
establishes the sequence of events to follow.
➢ Encodes it and transfer to the timing & control unit to perform the
execution of the instruction.
(b) Timing and control circuitry
➢ works as the brain of the CPU
➢ For proper sequence and synchronization of all the operations of MP,
this unit generates all the timing and control signals necessary for
communication between microprocessor and peripherals.
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8085 Architecture …… cont….
(4) Interrupt Control group
➢ Interrupt:- Occurrence of an external disturbance
➢ After servicing the interrupt, 8085 resumes its normal working sequence
➢ Transfer the control to special routines
➢ Five interrupts: - TRAP, RST7.5, RST6.5, RST5.5, INTR
➢ In response to INTR, it generates INTA signal
(5) Serial I/O control Group
➢ Data transfer red on D0- D7 lines is parallel data
➢ But under some condition it is used serial data transfer
➢ Serial data is entered through SID(serial input data) input (received)
➢ Serial data is outputted on SOD(serial output data) input (send)
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8085 Pin Diagram
Pin Configuration Functional Pin diagram
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8085 Pin Description
➢ The 8085 is an 8-bit general purpose microprocessor that can
address 64K Byte of memory.
➢ It has 40 pins and uses +5V for power. It can run at a maximum
frequency of 3 MHz.
➢ The pins on the chip can be grouped into 6 groups:
⚫ Address Bus and Data Bus.
⚫ Status Signals.
⚫ Control signal
⚫ Interrupt signal
⚫ Power supply and Clock signal
⚫ Reset Signal
⚫ DMA request Signal
⚫ Serial I/O signal
⚫ Externally Initiated Signals. 25
The Address and Data Busses
❑ Address Bus (Pin 21-28)
➢ 16 bit address lines A0 to A15
➢ The address bus has 8 signal lines A8 – A15 which are unidirectional.
➢ The other 8 address lines A0 to A7 are multiplexed (time shared) with the 8
data bits.
❑ Data Bus (Pin 19-12)
➢ To save the number of pins lower order address pin are multiplexed with 8 bit
data bus (bidirectional)
➢ So, the bits AD0 – AD7 are bi-directional and serve as A0 – A7 and D0 – D7 at
the same time.
➢ During the execution of the instruction, these lines carry the address bits
during the early part (T1 state), then during the late parts(T2 state) of the
execution, they carry the 8 data bits.
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Status Signals
Status Pins – ALE, S1, S0
1. ALE(Address Latch Enable): (Pin 30)
➢ Used to demultiplexed the address and data bus
➢ +ive going pulse generated when a new operation is started by uP.
➢ ALE = 1 when the AD0 – AD7 lines have an address
➢ ALE = 0 When it is low it indicates that the contents are data.
➢ This signal can be used to enable a latch to save the address bits from the AD lines.
1. S1 and S0 (Status Signal): (Pin 33 and 29)
➢ Status signals to specify the kind of operation being performed .
➢ Usually un-used in small systems. S1 S0 Operation
0 0 HALT
0 1 WRITE
1 0 READ
1 1 FETCH
Control Signals
Control Pins – RD, WR, IO/M(active low)
1. RD: Read(Active low) (Pin 32)
➢ Read Memory or I/O device
➢ Indicated that data is to be read either from memory or I/P device and data bus is ready
for accepting data from the memory or I/O device.
2. WR: Write(Active low) (Pin 31)
➢ Write Memory or I/O device
➢ Indicated that data on the data bus are to be written into selected memory or I/P device.
3. IO/M: (Input Output/Memory-Active low) (Pin 34)
➢ Signal specifies that the read/write operation relates to whether memory or I/O device.
➢ When (IO/M=1) the address on the address bus is for I/O device
➢ When (IO/M=0) the address on the address bus is for memory
IO/M(active low) RD WR Control Signal Operation
0 0 1 MEMR M/M Read
0 1 0 MEMW M/M write
1 0 1 IOR I/O Read
1 1 0 IOW I/O Write
