ABSTRACT

Single phase conventional electric vehicle chargers usually have two stages, Power
factor correction (PFC) stage which converts AC to DC link voltage, and it maintains
sinusoidal current drawn from the grid maintaining unity power factor and DC-DC
conversion stage to convert varying DC link to stiff required output voltage. Though this
design works well without any issues, it has several drawbacks, like number of components,
more power losses, a bigger physical footprint (magnetics and DC link capacitors), and a
worse overall system efficiency due to dual stage power conversion, control complexity as
the need to control two stage and synchronous operation of two stages, greater costs, and
reliability issues arise from failure of any of the stages, especially in high power and high
density use cases.

Single stage bidirectional chargers, on the other hand, combine Power Factor
Correction circuit (PFC) and DC-DC conversion circuit into a single stage circuit, leading to
a portable and effective design. This combination improves the power density, reduces power
conversion losses, and reduces the number of components. By utilizing soft switching
approaches, the suggested single stage bidirectional charger makes it possible for all
semiconductor devices to transition at zero power thereby reducing the switching losses. ZCS
(Zero Current Switching) further improves the efficiency by removing switching losses and
lowering electromagnetic interference (EMI).

High Frequency Transformer (HFT) maintains a high-power density while

maintaining galvanic isolation. This charger design is future ready due to its bidirectional
power flow capabilities, which includes vehicle-to-grid (V2G) power flow for microgrid
applications. The suggested design is best suitable for EV applications that require high
performance and small size charger due to reliable, cost-effective solution with a smaller
formfactor.
 Contents
ACKNOWLEDGEMENT.......................................Error! Bookmark not defined.

ABSTRACT............................................................................................................ i

LIST OF FIGURES................................................................................................. 3

LIST OF ABBREVIATIONS..................................................................................... 5

1. INTRODUCTION............................................................................................ 6

2. LITERATURE SURVEY:................................................................................... 6

3. TWO STAGE CONVERTER:............................................................................ 7

4. SINGLE STAGE POWER CONVERSION:..........................................................9

5. SIMULATION CIRCUIT DIAGRAM:................................................................11

6. MODES OF OPERATION:............................................................................. 11

7. DESIGN EQUATION:.................................................................................... 16

8. MODULATION SCHEME:............................................................................. 17

9. PHASE LOCKED LOOP:............................................................................... 21

10. CONVERTER MODELLING:.......................................................................23

11. CONTROL SCHEME:................................................................................ 26

12. SIMULATION RESULTS:............................................................................28

CONCLUSION.................................................................................................... 43

REFERENCES.....................................................Error! Bookmark not defined.

Power Electronics and drives, ASE, Bengaluru 2

 LIST OF FIGURES
Fig. 1 Typical two-stage battery charger arrangement............................................................8

Fig. 2 Typical Single-stage battery charger arrangement [1]..................................................10

Fig. 3 Bidirectional AC DC Converter Topology................................................................11

Fig. 4 Mode 1 switching pulse...................................................................................... 13

Fig. 5 Mode 2 switching pulse...................................................................................... 14

Fig. 6 Mode 3 switching pulse...................................................................................... 15

Fig. 7 Mode 4 switching pulse...................................................................................... 16

Fig. 8 Time intervals in one switching cycle.....................................................................24

Fig. 9 Operational modes in one switching cycle...............................................................24

Fig. 10 (a) Positive half cycle open loop pulse, (b) Negative half cycle open loop pulse, (c) MOSFET

current and voltage Probing, (d) Modulation scheme, (e) DC simulation of Bidirectional AC DC

Converter Topology for verifying ZCS............................................................................29

Fig. 11 Modulation scheme of DC simulation of Bidirectional AC DC Converter Topology..........30

Fig. 12 Primary MOSFET VDS and ID (ZCS Verificaion)....................................................30

Fig. 13 Primary MOSFET VDS and ID (ZCS Verificaion) Zoomed........................................31

Fig. 14 HF Transformer Voltage and Current....................................................................31

Fig. 15 One Cycle HF Transformer Voltage and Current......................................................32

Fig. 16 Open Loop Output Voltage and Current of Bidirectional AC-DC converter.....................32

Fig. 17 Open loop simulation of Bidirectional DC AC Converter Topology with DC input and

resistive load............................................................................................................ 33

Fig. 18 Analog Modulation Scheme of Sinusoidal Phase Shifted Modulation with variable dead time

............................................................................................................................ 33

Fig. 19 Phase shift between leading leg and lagging leg of secondary H-Bridge.........................33

Fig. 20 vTHD of output voltage in V2G mode...................................................................34

Fig. 21 Output Voltage and Current of open loop V2G converter with Resistive Load..................34

Fig. 22 Analog Modulation for Open loop Power Factor Correction Circuit..............................35

Power Electronics and drives, ASE, Bengaluru 3

Fig. 23 Output Voltage and Current of AC open loop operation in G2V...................................35

Fig. 24 Modulation Scheme of converter in G2V mode with PI controller and without SOGI PLL. .36

Fig. 25 Closed Loop Simulation of Converter...................................................................36

Fig. 26 Input Current of Converter in V2G mode...............................................................37

Fig. 27 Output Volatage and Current of converter in closed loop V2G mode.............................37

Fig. 28 Transformer Voltage and Current.........................................................................38

Fig. 29 MOSFET Voltage and Current of Converter with ZCS...............................................38

Fig. 30 Closed Loop simulation of converter in G2V with SOGI PLL.....................................39

Fig. 31 PI Controller with SOGI PLL............................................................................. 39

Fig. 32 Input Voltage and Current of G2V converter with PI controller and SOGI filter................40

Fig. 33 Output Voltage and Current of V2G converter with closed loop control with SOGI PLL.....40

Fig. 34 iTHD Analysis of Input Current..........................................................................41

Fig. 35 V2G simulation of converter with feedforward control..............................................41

Fig. 36 V2G Voltage and Current................................................................................... 42

Fig. 37 vTHD% Analysis of converter in V2G mode..........................................................42

Power Electronics and drives, ASE, Bengaluru 4

 LIST OF ABBREVIATIONS
ZCS: Zero Current Switching

ZVS: Zero Voltage Switching

PFC: Power Factor Correction

HFT: High-Frequency Transformer

EV: Electric Vehicle

G2V: Grid-to-Vehicle

V2G: Vehicle-to-Grid

DC: Direct Current

AC: Alternating Current

THD: Total Harmonic Distortion

MOSFET: Metal-Oxide-Semiconductor Field-Effect Transistor

PWM: Pulse-Width Modulation

CM: Common Mode

DM: Differential Mode

EMI: Electromagnetic Interference

RMS: Root Mean Square

SOGI: Second-Order Generalized Integrator

PLL: Phase-Locked Loop

PI: Proportional-Integral

PM: Phase Margin

GM: Gain Margin

CM: Common Mode

DM: Differential Mode

Power Electronics and drives, ASE, Bengaluru 5

INTRODUCTION
The increasing price of fossil fuels and environmental demand to cut greenhouse gas
emissions has speed up the change to electric vehicles. Internal combustion engine cars are
slowly being replaced with battery fed electric vehicles (BEVs) with benefits including
reduced greenhouse gas emissions, increased conversion efficiency, and improved
environmental sustainability. The demand for effective, portable, and dependable charging
infrastructure is expanding as EV use increases.

Conventional two stage EV chargers have serious drawbacks since they have separate
power factor correction (PFC) stage for AC to DC link conversion and DC-DC conversion
stage. Component counts, power losses, bulkier designs, and worse system efficiency are a
some among them. For EV applications, such designs are less dependable and economical
due to the need for complex control methods [1].

Single stage chargers offers an effective substitute as they combine PFC and DC-DC
conversion to a single stage. These designs achieve increased power density, reduced power
losses, and limit the number of components. This single-stage, bidirectional, soft-switching
charger that employs Zero Current Switching (ZCS) on all load range is the main this of this
project. This topology uses a current-fed full-bridge converter on the primary (AC) side that
is connected via a high-frequency transformer (HFT) to a full-bridge converter on the DC
side.

By achieving ZCS operation across all switches, this charger lowers electromagnetic
interference (EMI), reduces switching losses, and removes the need for clamping circuits or
snubbers. This makes it more suitable for upcoming generation of EV chargers as it provides
a dependable, economical, and effective solution for both grid-to-vehicle (G2V) power flow
and vehicle-to-grid (V2G) power flow.

LITERATURE SURVEY:
EV charging systems have received a lot of attention due to the rising demand for efficient
power conversion systems and the expanding popularity of electric cars (EVs). [2] presents a
one stage dual-active-bridge (DAB) open-loop PFC soft switched AC-DC converter. [3]
describes various bidirectional OBD charger topologies available. [4] discusses the actively
clamped bidirectional flyback converter and [5] describes the bidirectional converter with
flyback snubber. [6] [7], [8]Discusses various single phase topologies for single phase power

Power Electronics and drives, ASE, Bengaluru 6

factor correction circuits. [9] discusses single stage open loop power factor correction
converter with soft switching. This design helps to minimize power loss and achieve gentle
switching across a wide load range. It offers open-loop control, which is less complicated but
has poor dynamic performance while using a dual-active-bridge technique. [10]suggest a new
isolated single-phase, and single-stage bidirectional AC-DC converter, with integrated PFC,
for use in EV charging applications. The topology satisfies modern EV charging requirements
by offering high power density and efficiency. [11], [12] present a full-bridge isolated soft-
switched current feed DC/DC converter for fuel cell cars that is snubber less and naturally
commutated. By removing the requirement for snubber circuits, this design improves
reliability and reduces losses. Although it focuses on fuel cell cars, its ideas can be applied to
EV chargers, especially where high voltage is involved. [13], [14] suggest a phase shifted
twin H-bridge converter that reduces the output filter size and increases the zero-voltage
switching (ZVS) range. This architecture helps to improve converter performance under a
variety of load range, it is mostly used for industrial applications. A soft-switched single-
stage single-phase bidirectional power factor correction (PFC) converter for plug-in electric
vehicle (EV) chargers is introduced [15] [16], [17]. By combining soft switching and single-
stage conversion, this topology achieves increased efficiency, increased power density, and
bidirectional power flow (V2G & G2V), making it an alternative for modern EV charging
infrastructure.

TWO STAGE CONVERTER:

Two-stage power conversion design is frequently used in conventional electric vehicle
(EV) chargers. There are two separate conversions in this system:
AC-DC Conversion (Power Factor Correction Stage):
To comply with grid compliance requirements, the first stage rectifies the grid's AC
input to DC link voltage and adds a power factor correction (PFC) mechanism to
make sinusoidal current taken from grid as depicted in Fig. 1. This enhances grid side
power quality by providing less total harmonic distortion (THD) and maintaining
unity power factor.

DC-DC Conversion (Galvanic Isolation and Voltage Regulation Stage):

The second stage consists of an isolated DC-DC converter that provides galvanic
isolation by using high frequency transformer for safety while stepping up or down

Power Electronics and drives, ASE, Bengaluru 7

 the DC link voltage to meet the charging voltage and current needs of the EV battery
as illustrated in Fig. 1.

The two-stage method has a number of serious issues despite being widely used:
1. Greater Number of Components: Because the two stages use different circuits, each
circuit needs its own semiconductor switches, analog or digital controllers, and energy
storing passive components. Higher material cost, more complicated systems, and more
failure points result from this system.
2. Greater Power Losses: The efficiency of the overall system is reduced by combined
switching losses of two stage converter and number of passives. At higher power level
these losses in percentage will be high making.
3. Bulky Design: Two stage power converter design is usually bulky because of multiple
power stage and the requirement for energy storage components like inductors and large
DC link capacitor. This in turn makes the volume of charger high and increases the power
density of overall system. So, two stage power converter is not suited for high power
applications.
4. Decreased Reliability: The life of EV Charger containing two stage power conversion
is reduced due to the need for large DC link capacitor as this capacitor life reduces with
increased stress and temperature as illustrated in Fig. 1. And these two stage power
converters have more failure points due to the presence of two power conversion stage
and large DC link capacitor.
5. Difficult Control Conditions: To coordinate the functioning of power factor
correction stage and DC-DC conversion stage complex control circuitry and controller
algorithms are needed this will in turn increase the development time and complexity of
the overall system design.
6. Cost and Maintenance: The cost of two stage power converter increases due to
number of switches used for power conversion. And manufacturing and maintenance
expenses for these converters are also high.

Fig. 1 Typical two-stage battery charger arrangement.

Power Electronics and drives, ASE, Bengaluru 8

SINGLE STAGE POWER CONVERSION:
To overcome the issues with two stage power conversion, single stage power
conversion architecture has been introduced which has much simpler system, lesser
component counts simple control requirement. Single stage power conversion combines both
power factor correction circuit and DC-DC conversion circuit to a single stage thus reducing
the number of stages required for power conversion. This removes the intermediate energy
storage recruitment like dc link capacitor as depicted in Fig. 2 Typical Single-stage battery
charger arrangement [1].. Due to the Above mentioned changes the size of the converter
reduces which in turn increases the power density of overall system as the number of
components required for power conversion is reduced including active components and
passive components. This makes single stage power conversion suitable for high-power,
high-density EV charging infrastructure applications.

Reduction in the number of component count is one of the main advantages of stage
power conversion. Elimination of electrolytic capacitors which highest failure rate and bulky
space consuming component reduces the converter size and increases the reliability of the
overall system.

Losses happening in multiple stages has been completely eradicated in single stage
power converter, with soft switching technique the overall efficiency of the converter is
increased and makes it suitable for high power and high-power density EV charger
infrastructure applications and board EV charger applications. Also, the control requirement
is made simpler by removing the need for two stage control which reduces the expanse
required for designing complex control algorithm.

Topology Overview: This topology has a current fed full bridge converter on the primary
side and a full bridge converter on the secondary side integrated together with a high
frequency transformer (HFT) as shown in

Power Electronics and drives, ASE, Bengaluru 9

Fig. 3. This topology has several advantages such as bidirectional power flow capability
isolated power conversion power factor adjustment and soft switching. Primary side consists
of eight switches connected in configuration such that it blocks voltage in both directions and
allows current in both directions. A boost inductor is connected in series with AC supply for
PFC application. The battery to be charged is connected to the full bridge converter on the
DC side which provides controlled charging voltage and controlled charging current. The
high frequency transformer acts as connecting medium between primary and secondary side
providing isolation for safety purpose.

Zero-Current Switching (ZCS): The primary switches are switched with zero current
switching (ZCS) over entire load range. The ability of the suggested single-stage topology to
do Zero-Current Switching (ZCS) is a crucial component. By guaranteeing that there is no
current flowing through the semiconductor devices when they are switched on or off, ZCS
reduces switching losses. This lowers the system's total size, cost, and complexity by doing
away with the requirement for extra snubber or clamping circuits. Additionally, ZCS reduces
electromagnetic interference (EMI), enhancing the charger's robustness and dependability.

Additional Advantages: This converter is future ready for smart grid applications with
bidirectional power flow capability that is vehicle-to-grid (V2G) application, which makes
the system to work as grid connected inverter using vehicles battery as source. Reactive
power compensation can also be achieved by appropriate switching of the converter thereby
supplying reactive power to the grid or consuming reactive power from the grid. A single-
stage topology's simpler control technique, which lowers system costs and development time
while preserving superior performance across a broad operating range, adds to its allure.

Power Electronics and drives, ASE, Bengaluru 10

 Fig. 2 Typical Single-stage battery charger arrangement [1].

SIMULATION CIRCUIT DIAGRAM:

Fig. 3 Bidirectional AC DC Converter Topology

MODES OF OPERATION:
Primary-Side Switches DC-Side Switches
MODE Description
Operation Operation
Grid-to-Battery power
High-frequency
Mode-I (G2V, transfer when grid Operated with fixed duty
modulation with 180°
Positive Cycle) voltage and current are cycle.
phase shift, ZCS
both positive.
Battery-to-Grid power Voltage-fed full-bridge,
Mode-II (V2G,
transfer when grid Remained On Phase-shift modulation
Negative Cycle)
current is negative. (PSM) with ZVS
Mode-III (G2V, Grid-to-Battery power Same as Mode-I but Operated with fixed duty
Negative Cycle) transfer when grid during negative half- cycle.

Power Electronics and drives, ASE, Bengaluru 11

 voltage is negative. cycle of grid voltage
Battery-to-Grid power Voltage-fed full-bridge,
Mode-IV (V2G,
transfer when grid Remained On Phase-shift modulation
Positive Cycle)
current is positive. (PSM) with ZVS

Above table explains the modulation scheme of Converter in various operating

conditions. Based on the polarity of grid voltage and polarity of grid current the mode of
operation that is grid to vehicle or vehicle to grid can be chosen and modulation scheme will
be changed accordingly. We have different modulation scheme for positive half cycle and
negative half cycle in each mode of operation vehicle to grid and grid to vehicle so in total
four modes of operation. These modes of operation are discussed in detail below,

Mode I: Grid-to-Battery (Positive Grid Voltage and Current)

In this mode, the car battery receives electricity from the grid during the grid voltage's
positive half-cycle. On the AC side, the current-fed full-bridge converter functions as a stand-
alone boost converter. The DC-side switches control the power supply to the battery. The
high-frequency transformer (HFT) charges the DC side with the AC side's inductor current
(IL). On the AC side, Zero-Current Switching (ZCS) is accomplished by allowing the current
to naturally drop to zero prior by setting current in leakage inductance by switching
secondary switches. Switching pulse of Primary switches S1A, S4A, S2A, S3A and
Secondary switches S5, S6, S7, S8 are shown in Fig. 4. S1B, S4B, S2B, S3B are kept ON as
they are naturally forward biased during positive half cycle. Switching pulse of S5, S6, S7,
S8 induces current in Llk this makes the zero current switching to be achieved. Output of this
converter in mode 1 operation is given by Eq. 1.

( n . Vᵢₙ ) Eq. 1
V 0=
( 2. ( 1−d 1 ) )
Where,

n- Transformer turns ratio.

Vin – Input Voltage,

D1 – Duty cycle of current fed converter,

V0 – Output voltage

Power Electronics and drives, ASE, Bengaluru 12

 Fig. 4 Mode 1 switching pulse.

Mode II: Battery-to-Grid (Positive Grid Voltage, Negative Grid Current)

Vehicle-to-grid (V2G) operating during the grid voltage's positive half-cycle is

represented by this mode. The DC-side full-bridge converter functions as a voltage-fed
converter, and the AC-side switches are managed to preserve unity power factor as electricity
moves from the battery to the grid. The power flow is controlled by the Sinusoidal phase-shift
modulation between the DC-side legs. While the DC-side switches function with Zero
Voltage Switching (ZVS) by varying the dead time dynamically according to load this
forward biases the body diode making the voltage across the device fall close to zero before
switching on of the MOFET, the AC-side switches naturally turned off at zero current,
attaining ZCS. Switching pulse of Secondary switches S5, S6, S7, S8 are shown in Fig 5.
S1B, S4B, S2B, S3B are kept ON as they are naturally forward biased during positive half
cycle. Output of this converter in mode 1 operation is given by Eq. 2.

Eq. 2
( Φ−Φ' ) .V o
V ¿=
2. n
Where,

n- Transformer turns ratio.

Vin – Input Voltage,
'
(Φ−Φ ) – Phase difference between two legs.

Power Electronics and drives, ASE, Bengaluru 13

V0 – Output voltage

Fig. 5 Mode 2 switching pulse

Mode III: Grid-to-Battery (Negative Grid Voltage and Current)

Though it takes place during the grid voltage's negative half-cycle, this mode is
comparable to Mode I. Continuous power transmission to the battery is ensured by the
inductor current flowing in the opposite direction. ZCS is attained on the AC side, same as in
Mode I by inducing current in the leakage inductance by switching the secondary switches.
To control the output voltage and current, the DC-side switches run on predetermined duty
cycles. Switching pulse of Primary switches S1B, S4B, S2B, S3B and Secondary switches
S5, S6, S7, S8 are shown in Fig 6. S1A, S4A, S2A, S3A are kept ON as they are naturally
forward biased during negative half cycle. Switching pulse of S5, S6, S7, S8 induces current in
Llk this makes the zero current switching to be achieved. Output of this converter in mode 1 operation
is given by Eq. 3. ZCS is achieved at secondary switches too as the current is discontinuous and goes
to zero every switching cycle

( n . Vᵢₙ )
V 0= Eq. 3
( 2. ( 1−d 1 ) )
Where,

n- Transformer turns ratio.

Vin – Input Voltage,
D1 – Duty cycle of current fed converter,

Power Electronics and drives, ASE, Bengaluru 14

V0 – Output voltage

Fig. 6 Mode 3 switching pulse.

Mode IV: Battery-to-Grid (Negative Grid Voltage, Positive Grid Current)

In this mode, during the grid voltage's negative half-cycle, power returns to the grid
from the vehicle's battery. The battery current is controlled by the DC-side full-bridge
converter, and power injection into the grid is accomplished by the AC-side switches using
complimentary gate signals. Switching pulse of Secondary switches S5, S6, S7, S8 are shown
in Fig 7. S1A, S4A, S2A, S3A are kept ON as they are naturally forward biased during
Negative half cycle. Output of this converter in mode 1 operation is given by Eq. 4.

( Φ−Φ' ) .V 0
V ¿= Eq. 4
2.n
Where,

n- Transformer turns ratio.

Vin – Input Voltage,

'
(Φ−Φ ) – Phase difference between two legs.

V0 – Output voltage

The AC-side switches in this mode utilize ZCS, and the DC-side switches use ZVS. The
Control method lowers total harmonic distortion (THD) while maintaining unity power factor.

Power Electronics and drives, ASE, Bengaluru 15

 Fig. 7 Mode 4 switching pulse

DESIGN EQUATION:
Maximum Voltage stress at Primary devices

Eq. 5
V 0 ,max
V SW ,P =
n

Turns Ratio of HFT used.

2 ⋅V 0 , min ⋅ ( 1−d 1, min )

n= Eq. 6
V ¿, max
Leakage Inductance Required for ZCS

V 0 ,min ⋅ ( d 1, min −0.5 )

Llk = Eq. 7
2⋅ I ¿ ,max ⋅ f s ⋅n
Boost Inductor

V ¿, max ⋅d 1 ,min
L= Eq. 8
Δ I L ⋅f s
Minimum duty required for ZCS

I ¿ ,max ⋅ f s ⋅n ⋅ Ls Eq. 9
dr ≥
V 0 , min

Power Electronics and drives, ASE, Bengaluru 16

 Converter Design:

Input voltage (V_in): 230 V RMS (AC grid voltage)

Output voltage range (V_out): 350 V to 400 V (DC battery voltage)

Output power (P_out): 3200 W

Switching frequency (f_s): 100 kHz

Inductor ripple current (ΔI_L): 20% of maximum inductor current

Line frequency (f_line): 50 Hz

Calculated Component Values

 Boost Inductor (L): 570.65 μH

 Transformer Turns Ratio (n): 0.751

 Leakage Inductance of Transformer (Llk): ≈ 10 μH

 Output Filter Capacitor (C0): ≈ 3000 μF

MODULATION SCHEME:
Grid to Vehicle Mode of Operation:

function [S1,S2,S3,S4,S5, S6, S7, S8] = generatePulses(t, Ts, d1, d2)

% Inputs:
% t: Simulation time
% Ts: Switching period
% d1: Duty cycle for S1, S2, S3, S4
% d2: Duty cycle for S5, S8, S6, S7
% Generate pulses for S1, S2, S3, S4
S1 = mod(t, Ts) < d1 * Ts;
S2 = mod(t + Ts/2, Ts) < d1 * Ts;
S3 = mod(t, Ts) < d1 * Ts;
S4 = mod(t + Ts/2, Ts) < d1 * Ts;
% Generate pulses for S5, S8, S6, S7

Power Electronics and drives, ASE, Bengaluru 17

 S5 = (mod(t, Ts) > (d1 * Ts - d2 * Ts)) & (mod(t, Ts) < d1 * Ts);
S8 = (mod(t + Ts/2, Ts) > (d1 * Ts - d2 * Ts)) & (mod(t + Ts/2, Ts) < d1 * Ts);
S6 = (mod(t, Ts) > (d1 * Ts - d2 * Ts)) & (mod(t, Ts) < d1 * Ts);
S7 = (mod(t + Ts/2, Ts) > (d1 * Ts - d2 * Ts)) & (mod(t + Ts/2, Ts) < d1 * Ts);
end
In the above code a carrier-based PWM scheme has been implemented which
simultaneously governs eight MOSFETS: the four of Primary side and four of secondary
switches namely S1-S4 and S5-S8 respectively. The MATLAB function generatePulses(t, Ts,
d1, d2) uses this strategy in four concise lines of code. Where, t is the simulation time, Ts is
the switching frequency period, d1 is the high-frequency duty cycle in percentage applied to
the AC-side bridge and d2 is the dynamically calculated duty cycle applied to the DC-side
bridge. During switching period, the code calculates two modulo-Ts carrier signals: one
(mod(t, Ts)) for S1 and S3 switches, and the other offset by half a period (mod(t + Ts/2, Ts))
for their complementary switches S2 and S4. The code compares these carriers with the
threshold d1·Ts, to generate symmetrical gating signals for the AC-side legs, which is 180°
phase shifted, ensuring that S1/S3 and S2/S4 turn on for exactly d1·Ts seconds each.
Simultaneously, the DC-side switches S5, S8 (in phase with S1/S3) and S6, S7 (in phase with
S2/S4) are gated only during the trailing d2·Ts interval, that is when the carrier value is in the
range of (d1–d2)·Ts to d1·Ts. This makes sure that each time an AC-leg switch is about to
turn off, its corresponding DC-leg switch is already conducting. Conversely, the DC-side
switches stop conduction before the complementary AC switches turn on back. As a result,
when the AC switches turn off, the current has been already redirected through DC bridge
and same occurs in reverse which ensures natural zero-current switching (ZCS) is achieved.
Additionally, the constant duty cycle d2 separates the energy-transfer interval from the AC
side duty cycle. This gives an extra degree of freedom to minimize peak currents on the AC
side and manage the trade-off between soft-switching time and conduction losses.

Embedded within the broader Mode-I & Mode-III operation of my bidirectional converter
where grid voltage and grid current are positive and power flows from the utility to the EV
battery this modulation scheme ensures both overlap and ZCS across the entire high-
frequency cycle. During Mode-I, the AC-side devices S1a, S2a, S3a, and S4a are modulated
with the high-frequency duty cycle d1, similarly during Mode-III the AC-side devices S1b,
S2b, S3b, and S4b are modulated with the high-frequency duty cycle d1 (maintained above
50% to guarantee conduction overlap between complementary legs), while their counterparts

Power Electronics and drives, ASE, Bengaluru 18

S1b–S4b remain continuously on for the positive half-cycle and S1a–S4a remain
continuously on for the negative half-cycle of the grid. Concurrently, the DC-side switches
S5, S8, S6, and S7 operate under fixed duty cycle d2, as realized in the generate Pulses logic.
When S1a and S4a conduct, the grid current Iin charges the high-frequency transformer’s
(HFT) magnetizing and leakage inductances; as these switches turn off, energy is seamlessly
transferred through S6 and S7 until their current collapse to zero. By activating S6 and S7
just prior to the turn-off of S1a and S4a (i.e., during the (d1–d2)Ts to d1Ts interval), the
primary-side current is naturally commutated, enabling ZCS regardless of load variations.
The HFT’s AC-side voltage, V₀/n, is thus established by gating the DC braces precisely,
flattening current waveforms and suppressing switching transients. Because the energy must
be delivered within the shorter window (1–d1)Ts when d1 is high, peak currents can rise;
however, by judiciously fixing d2, peak currents through the AC-side switches are strictly
limited. This dual-duty-cycle approach provides high efficiency across a wide operating
range key requirements for grid-interactive EV charger applications.

Vehicle to Grid Mode of Operation:

function [S5, S6, S7, S8] = generatePWM(clk, period, deadtime, phase_shift)

% clk: simulation time (usually use 'clock' block)
% period: switching period (sec)
% deadtime: dead time between complementary switches (sec)
% phase_shift: phase shift between S1/S2 and S3/S4 pairs (sec)
% Ensure values stay within half-period limits
Phaseshift1= phase_shift*period;
half_period = period / 2;
dt = min(deadtime, half_period / 2);
ps = mod(Phaseshift1, period); % wrap around period
% Carrier signals (modulo based)
t1 = mod(clk, period);
t2 = mod(clk + ps, period);
% Generate PWM signals
S5 = double((t1 >= dt) && (t1 < (half_period - dt)));
S6 = double((t1 >= (half_period + dt)) && (t1 < (period - dt)));
S8 = double((t2 >= dt) && (t2 < (half_period - dt)));
S7 = double((t2 >= (half_period + dt)) && (t2 < (period - dt)));

Power Electronics and drives, ASE, Bengaluru 19

end
To generate the gating signals for the four active switches on the secondary side—
namely S5, S6, S7, and S8 a carrier-based pulse-width modulation (PWM) strategy is used.
The core idea is to have two complementary PWM channels (one for S5/S6 and another for
S7/S8), each of which is offset in time by programmable phase shift and is derived from a
common triangular carrier waveform. The function generatePWM accepts inputs the desired
switching period, the deadtime to prevent shoot-through in each complimentary pair, the
phase_shift in seconds, instantaneous simulation time clk. The algorithm internally ensures
correct modulo behaviour by wrapping the phase shift around the period and initially
constrains the deadtime to at most one-quarter of the switching period (half of half‐period).
Later the real time clock modulo is reduced to compute the two “carrier” time bases, t1 and
t2, with period t2 being offset by the phase shift. These carriers increase from 0 up to period
and then reset, thus effectively emulating a sawtooth or triangular waveform. For each switch
the gating signals are generated by simple threshold comparisons: each switch is activated
only when its carrier lies between the deadtime-adjusted rising and falling edges of the
corresponding half‐period window. Specifically, S6 is active in the second half of the period
with a similar margin as of S5 (and its complement S6) which is active when t1 is between
the deadtime and half-period minus deadtime. Likewise, the offset carrier t2 drives S8 and
S7.

This modulation scheme provides multiple practical advantages for the given
converter topology. Initially, it prevents overlapping conduction of S5/S6 or S7/S8 by
explicitly enforcing a minimum deadtime (dt) between complementary transitions, thereby
avoiding catastrophic shoot-through faults. Later, to achieve soft‐switching transitions in
phase shifted converters which is critical, the programmable phase shift (phase_shift) enables
interleaving of the two PWM channels. Zero‐voltage switching instants across the bridge legs
is ensured by adjusting the offset, leading to reduced switching losses and lower
electromagnetic interference (EMI). Finally, the use of simple modulo and comparison
operations ensures the function computationally efficient and simpler to implement on digital
signal controllers (DSCs). Based on the key requirements for high-performance EV charger
applications, the resulting gate patterns makes sure that the balanced current sharing in
multiphase arrangements, smooth input–output voltage waveforms and reliable operation
across a wide load range.

Power Electronics and drives, ASE, Bengaluru 20

PHASE LOCKED LOOP:
The Phase-Locked Loop (PLL) serves as a critical building block for synchronizing the power
stage to the grid voltage. Traditional synchronous-reference-frame PLLs (SRF-PLLs) rely on
extracting the grid voltage’s d-axis and q-axis components via Park transformation and then using the
q-axis component as the phase error signal. Although widely used, SRF-PLLs suffer from several
practical drawbacks: they exhibit a slow dynamic response when the grid frequency or amplitude
varies, they produce significant phase error under unbalanced or harmonically distorted voltages, and
they require a prefilter or notch filter to attenuate the second-harmonic component of the grid voltage.
These limitations can lead to inaccurate phase detection, increased total harmonic distortion (THD) in
the current, and degraded performance of the converter’s current-control loops, especially under
weak-grid or fault conditions. To overcome these challenges, I have implemented a Second-Order
Generalized Integrator PLL (SOGI-PLL), which combines a specially designed quadrature signal
generator (the SOGI) with a control loop to deliver a robust, fast, and distortion-resistant phase
detection mechanism.

Fig. 8 Block diagram implementation of SOGI PLL

The SOGI-PLL architecture consists of two principal parts: the Second-Order Generalized Integrator
(SOGI), which forms the Phase Detector (PD) block, and a conventional Proportional-Integral (PI)
loop filter followed by a Voltage-Controlled Oscillator (VCO). As shown in the attached block
diagram, the grid voltage is first passed into the SOGI network, which implements two parallel
second-order filters: one tuned to yield the in-phase fundamental component alpha, and the other
shifted by 90° to produce the quadrature component beta. The SOGI achieves this through a
combination of feedforward of the input signal and feedback of the integrals, with the gain tuned to
provide a high selectivity at the fundamental frequency while attenuating unwanted harmonics. The
outputs are then fed into a simple arctangent or cross-product stage (the phase detector) to generate
the instantaneous phase error, which is proportional to the angular difference between the estimated
and actual grid phases. This error is processed by a PI controller that adjusts the VCO frequency,

Power Electronics and drives, ASE, Bengaluru 21

closing the loop such that beta is forced to zero, implying perfect phase alignment. By embedding the
SOGI within the PLL, the system benefits from fast extraction of quadrature signals without requiring
explicit notch filters.

A key advantage of the SOGI-PLL over SRF-PLL variants lies in its inherent attenuation of the
second-harmonic component. In unbalanced or distorted grid conditions, the grid voltage typically
contains a significant 2ω component that would otherwise slip through conventional PLLs, corrupting
the phase detection and causing double-frequency oscillations in the estimated angle. The SOGI’s
second-order filter is explicitly tuned to provide infinite gain at the fundamental frequency (ω) and
finite gain at other frequencies; by selecting the damping factor via the gain, the filter’s quality factor
can be optimized to produce a deep notch at 2ω, thereby rejecting the second-harmonic with minimal
penalty to the dynamic response. This built-in harmonic attenuation eliminates the need for extra
digital notch filters and ensures that the PI loop sees a clean, predominantly fundamental-frequency
error signal. Consequently, the SOGI-PLL exhibits superior disturbance rejection, maintaining stable
and accurate phase tracking even when the grid undergoes voltage sags, dips, or distortion events.
Additionally, the SOGI-PLL’s faster transient response—achieved by choosing appropriate SOGI
bandwidth and PI gains—enables the converter to quickly re-synchronize to the grid after
disturbances, improving ride-through capabilities and minimizing current overshoot.

In implementing the SOGI-PLL in my bidirectional converter control scheme, I structured the

algorithm into three software modules: the SOGI filter, the phase detector with loop filter, and the
digital VCO. The SOGI filter is realized using a pair of discrete-time IIR sections whose coefficients
are derived from the continuous-time model via bilinear transformation. The phase detector and PI
loop filter follow with carefully chosen proportional and integral gains to balance tracking speed
against noise sensitivity. The VCO integrates the estimated angular frequency to generate a phase
estimate θPLL, which is then used in the converter’s dq-frame transformations for current control. By
feeding this high-fidelity phase estimate into both the modulation block and the grid-current
controllers, the overall converter system achieves precise vector control, bidirectional power flow
capability, and compliance with grid codes under a wide range of operating and fault conditions. The
SOGI-PLL’s advantages—rapid response, second-harmonic attenuation, and minimal implementation
complexity—make it a highly effective solution for modern grid-interactive power electronics
applications.

Power Electronics and drives, ASE, Bengaluru 22

CONVERTER MODELLING:
The presented model helps in designing advanced digital control strategies ensuring
improved system performance, protection, and grid compliance for single stage AC DC
converter. The operation of this mode involves energy flow from utility grid to electric
vehicle (EV) battery through converter. The converter topology operates with multiple
switches on both primary and secondary sides, designed to achieve soft-switching and high-
efficiency power transfer. For accurate modelling and control, the operation of one complete
switching cycle is divided into six distinct time intervals: d1, d2, d3, d4, d5, d6 as shown in
Fig. 9.

In the first interval d1 Fig. 9 & Fig. 10(a) , the current through the leakage inductance of
transformer begins to discharge, and the boost inductor on the primary side starts charging.
Due to the activation of selected switches (i.e., GS2a, GS3a, GS1a, GS4a), a path is
established for inductor energy to buildup. As energy is temporarily stored in the boost
inductor the current in the leakage path decreases, preparing for transfer in later stages.

During interval d2 Fig. 9 & Fig. 10(b), the current in the leakage inductance reduces to zero,
effectively entering a zero-current switching (ZCS) condition. At this point, a smooth
communication is facilitated as the current through the active switches becomes equal. For
reduced switching losses, this zero-current condition is essential, which is a critical design
goal for high-frequency bidirectional converters.

In interval d3 Fig. 9 & Fig. 10(c), for resonant rise in the leakage inductance current and to
drive it in the reverse direction, the secondary side switches (i.e., GS3a, GS4a, GS8) are
turned on in a controlled manner. As a result, zero current is experienced in one of the
primary side switches, allowing for soft turn-off without the need for additional snubber
circuitry. Which in turn helps minimize electromagnetic interference (EMI) and switching
stress.

Intervals d4 and d5 Fig. 9 & Fig. 10(d & e) represents the energy transfer phase, where the
energy stored in the boost inductor of primary side is delivered to the secondary side. The
coordinated gating of switches ensures that this transfer occurs efficiently and with minimum
loss. For smooth power flow into the output stage connected to the EV battery, the gate
signals are appropriately phased.

Power Electronics and drives, ASE, Bengaluru 23

The final interval d6 Fig. 9 & Fig. 10(f) serves the converter reset for the next switching
cycle. It ensures the continuity of power flow.

This modelling approach enables a detailed understanding of the converter’s switching

dynamics, how each current path behaves, particularly the leakage and magnetizing
inductance, and transitions through various operating conditions of converter. The converter
state equations for various time intervals in one switching cycle are listed from Eq. 10 to Eq.
26. Transfer function of the converter is provided in Eq. 34 which will be used for control .

Fig. 9 Time intervals in one switching cycle

Fig. 10 Operational modes in one switching cycle

State equations during time interval d1 Fig. 10(a):

Power Electronics and drives, ASE, Bengaluru 24

 d iL Eq. 10
V ¿ −L =0
dt
d iL d i lk Eq. 11
V ¿ −L −Llk ⋅ +η ⋅V o=0
dt dt
d vc Eq. 12
η ⋅i lk =C ⋅ + I bat
dt
State equations during time interval d2 Fig. 10(b):

d iL Eq. 13
V ¿ −L =0
dt
d vc Eq. 14
C⋅ + I bat =0
dt
State equations during time interval d3 Fig. 10(c):

d iL Eq. 15
V ¿ −L =0
dt
d iL d i lk Eq. 16
V ¿ −L −Llk ⋅ +η ⋅V o=0
dt dt
d vc Eq. 17
η ⋅i lk =C ⋅ + I bat
dt
State equations during time interval d4 Fig. 10(d):

d iL Eq. 18
V ¿ −L =0
dt
d iL d i lk Eq. 19
V ¿ −L −Llk ⋅ +η ⋅V o=0
dt dt
d vc Eq. 20
−η ⋅i lk =C + I bat
dt

State equations during time interval d5 Fig. 10(e):

d iL Eq. 21
V ¿ −L =0
dt
d iL d i lk Eq. 22
V ¿ −L −Llk ⋅ +η ⋅V o=0
dt dt
d vc Eq. 23
−η ⋅i lk =C + I bat
dt
State equations during time interval d5 Fig. 10(f):

Power Electronics and drives, ASE, Bengaluru 25

 d iL Eq. 24
V ¿ −L =0
dt
d iL d i lk Eq. 25
V ¿ −L −Llk ⋅ +η ⋅V o=0
dt dt
d vc Eq. 26
−η ⋅i lk =C + I bat
dt
Transfer function derivation:

d 1 +d 2 +d 3 +d 4 + d 5+ d 6 +d 7 +d 8 +d 9 + d10=0 Eq. 27

' Eq. 28
d 4 =d 9=D , d 4 + d5 =d 9 +d 10=( 1−D )

d i L d 1 V in d 2 V in d 3 V in d 4 V in d 5 V in d 6 V in d 7 V in d 8 V in d 9 V in d 10 ( V in −ηV )
Eq.o29
= + + + + + + + + +
dt L1 L1 L1 L1 L1 L1 L1 L1 L1 L1

Eq. 30

Eq. 31

Eq. 32

Eq. 33

Eq. 34

CONTROL SCHEME:
Grid to Vehicle Mode:

Single-Phase Isolated PFC Control Scheme without SOGI PLL:

The design of a single-phase isolated power factor correction (PFC) converter necessitates precise
regulation of both the output voltage and the input current to achieve high power quality and
efficiency. In the absence of a Second-Order Generalized Integrator Phase-Locked Loop (SOGI PLL),
the control architecture relies on an open-loop estimation of the grid voltage phase and amplitude. The
outer voltage loop continuously senses the isolated converter’s output voltage—typically on the
secondary side of a high-frequency transformer—and compares it to the desired reference. A
proportional–integral (PI) controller processes the voltage error, generating a current reference signal
that corresponds to the instantaneous load demand while maintaining the DC bus at its setpoint. This

Power Electronics and drives, ASE, Bengaluru 26

outer loop must be designed with relatively low bandwidth to ensure stability over slow variations in
load and input voltage, while retaining sufficient dynamic response to react to step changes in power
draw.

Beneath the voltage-regulation layer, an inner current loop enforces the sinusoidal shape of the input
current drawn from the utility, thereby achieving near-unity power factor. The current loop receives
the reference current from the outer voltage loop and measures the actual input current through a
high-bandwidth shunt or current transformer on the primary side. A dedicated PI controller processes
the current error, adjusting the duty cycle of the primary‐side switching network—often comprising a
full‐bridge or half‐bridge topology—to force the instantaneous current to follow the desired
waveform. Because the current loop operates at a higher bandwidth than the voltage loop, it
effectively rejects disturbances such as switching noise and grid harmonics, ensuring that the
converter draws only the fundamental component of the grid voltage.

Without a SOGI PLL, the synchronization of the current reference with the line voltage relies
on either a simple zero-crossing detection circuit or an analog multiplier that produces a product of
the sensed line voltage and a unit sine reference. In digital implementations, a look-up table or direct
digital synthesizer (DDS) may approximate the sinusoid, but any phase error introduced in this
generation directly impacts the current loop’s ability to maintain low displacement angle.
Consequently, the design of the line‐voltage sensing network and the digital signal processing path
must minimize phase delays and amplitude distortion. Careful attention to anti-aliasing filters, ADC
latency, and code execution time is crucial, as these factors collectively determine the achievable total
harmonic distortion (THD) and thus the overall power quality.

Finally, without the inherent filtering capabilities of a SOGI loop, the control scheme must
incorporate additional passive or digital filtering to attenuate line-frequency disturbances and
switching‐frequency ripple that could otherwise degrade performance. Passive LC filters on the input
side can reduce EMI but increase component count and size, while digital notch filters may introduce
phase lags. Trade-offs between complexity, cost, and transient response define the optimal filter
design. In the absence of SOGI, achieving precise synchronization and robust disturbance rejection
demands meticulous design of both analog and digital signal pathways, as well as judicious selection
of PI controller gains in both voltage and current loops to balance stability margins with dynamic
performance.

Single-Phase Isolated PFC Control Scheme with SOGI PLL

The integration of a Second-Order Generalized Integrator Phase-Locked Loop (SOGI PLL) into
the single-phase isolated PFC converter significantly enhances its ability to extract the fundamental
component of the grid voltage, thereby improving synchronization and reducing distortion. As in the

Power Electronics and drives, ASE, Bengaluru 27

conventional scheme, the outer voltage loop monitors the isolated converter’s output voltage,
comparing it against a reference and employing a PI controller to generate the instantaneous current
demand. However, with SOGI PLL in place, the phase and amplitude information of the grid voltage
is derived directly and dynamically by the PLL, eliminating the need for separate zero-cross detectors
or analog multipliers. The PI-based voltage controller thus receives a current reference that is
intrinsically synchronized to the true grid phase, enabling more accurate tracking of load variations
and reducing the risk of phase mismatch.

Within the SOGI PLL block, a second-order filter processes the sensed line voltage, producing in
quadrature both the fundamental in-phase component and the corresponding orthogonal component. A
subsequent arctangent function, followed by a PI-based loop filter, locks the internal oscillator to the
exact phase of the grid voltage. This mechanism yields a unit-amplitude sinusoidal reference that is
phase-aligned with the true line voltage, which is then multiplied by the outer‐loop current reference
to establish the desired input current waveform. The high selectivity of the SOGI filter effectively
suppresses harmonics and noise, providing the current loop with a clean reference even in the
presence of distorted or unbalanced grid conditions.

The inner current loop remains structured around a PI controller that regulates the instantaneous
input current to match the reference generated by the voltage loop modulated with the SOGI-derived
sine. The synchronization provided by the SOGI PLL ensures that the current loop duty-cycle
commands are phase-accurate, thereby minimizing displacement angle and reducing THD. Because
the SOGI filter attenuates harmonic content before it enters the PLL, the converter is far more resilient
to grid anomalies such as voltage sags, flicker, or single‐cycle dropouts. Moreover, the tight control
bandwidth of the current loop rejects residual switching ripple, ensuring that only the fundamental
frequency component is drawn from the grid.

Crucially, the SOGI-based architecture simplifies loop‐tuning and improves stability margins.
Since the reference generation and phase detection are consolidated within the PLL, there is less
cumulative phase delay in the control path compared to discrete detection and filtering stages. This
allows for somewhat higher bandwidth in both voltage and current loops, enhancing dynamic
response to load transients without risking instability. Furthermore, digital implementations of SOGI
PLL can easily adapt to variable switching frequencies or multi-phase expansions, providing
scalability for higher‐power applications. In sum, the adoption of SOGI PLL in single‐phase isolated
PFC control schemes yields superior synchronization, noise immunity, and dynamic performance,
while retaining the straightforward PI‐based dual‐loop structure that is well understood in power
electronics research.

Power Electronics and drives, ASE, Bengaluru 28

SIMULATION RESULTS:
DC OPEN LOOP SIMULATION of G2V and ZCS verification:

Fig 8 Illustrates the MATLAB Simulink simulation of open loop control of

bidirectional AC-DC Converter. Fig. 11 (a), (b), (c) Show various probing points of switching
pulses during positive and negative half cycle and MOSFET voltage stress and current stress
during positive and negative half cycle. Fig. 11 (d) & Fig. 12 Demonstrate the open loop
modulation scheme of bidirectional ac DC Converter on grid 2 vehicle mode of operation.
Fig. 13 & Fig. 14 shows the primary MOSFET’s voltage and current waveform, zero current
switching operation of the converter is verified in Fig 11, where the current through switch
goes to zero before the switch is turned on.

Fig. 15 illustrates the high frequency transformer’s voltage and current

waveforms, the short spike on positive side before negative voltage is applied is the voltage
from the secondary side for enabling zero current switching is shown in Fig. 16. Fig. 17 is the
output voltage and load current observed at the output of bidirectional AC-DC converter.

c
b

e
c

d
c

Fig. 11 (a) Positive half cycle open loop pulse, (b) Negative half cycle open loop pulse, (c)
MOSFET current and voltage Probing, (d) Modulation scheme, (e) DC simulation of
Bidirectional AC DC Converter Topology for verifying ZCS.

Power Electronics and drives, ASE, Bengaluru 29

 Fig. 12 Modulation scheme of DC simulation of Bidirectional AC DC Converter Topology

Fig. 13 Primary MOSFET VDS and ID (ZCS Verificaion)

Power Electronics and drives, ASE, Bengaluru 30

 Fig. 14 Primary MOSFET VDS and ID (ZCS Verificaion) Zoomed

Fig. 15 HF Transformer Voltage and Current

Power Electronics and drives, ASE, Bengaluru 31

 Fig. 16 One Cycle HF Transformer Voltage and Current

Fig. 17 Open Loop Output Voltage and Current of Bidirectional AC-DC converter

DC OPEN LOOP SIMULATION of V2G:

Fig. 18 depicts the open loop simulation of single phase single stage bidirectional AC
DC Converter in Vehicle to Grid mode of operation. To replicate vehicle battery, DC source
with similar voltage is used. And for AC load resistor of approximate value is chosen. the
secondary switches are operated with sinusoidal phase shifted PWM. Where the duty of two
complementary switch is always kept to 50% and the phase shift between leading and lagging
legs is adjusted in sinusoidal way between 0 to 180degree. The dead time in each leg is varied
dynamically to prevent shoot through and aid Zero Voltage Switching in secondary switches.
Fig. 19 Describes the open loop modulation scheme of converter in vehicle to grid mode.
During positive half cycle all B switches of primary side are kept on. And during negative
half cycle A switches are kept on to allow reverse current flow.

Gate pulses of the secondary switches are depicted in Fig. 20. The output voltage and
current are provided in Fig. 22. vTHD% analysis of Output voltage has been done in Fig. 21
and it is observed to have 1.22%.

Power Electronics and drives, ASE, Bengaluru 32

 Fig. 18 Open loop simulation of Bidirectional DC AC Converter Topology with DC input and resistive load

Fig. 19 Analog Modulation Scheme of Sinusoidal Phase Shifted Modulation with variable dead time

Fig. 20 Phase shift between leading leg and lagging leg of secondary H-Bridge.

Power Electronics and drives, ASE, Bengaluru 33

 Fundamental (50Hz) = 325.4 , THD= 1.22%

0.7

0.6
Mag (% of Fundamental)

0.5

0.4

0.3

0.2

0.1

0
0 5 10 15 20 25 30 35 40
Harmonic order

Fig. 21 vTHD of output voltage in V2G mode.

Fig. 22 Output Voltage and Current of open loop V2G converter with Resistive Load

AC OPEN LOOP SIMULATION of G2V:

Analog modulation scheme of converter is pictured in Fig. 23. The placement of

secondary pulse exactly before the end of overlap duration.

Power Electronics and drives, ASE, Bengaluru 34

 Fig. 23 Analog Modulation for Open loop Power Factor Correction Circuit

Fig. 24 Output Voltage and Current of AC open loop operation in G2V

AC CLOSED LOOP SIMULATION of G2V WITHOUT PLL:

Closed loop simulation of converter with PI controller is presented in Fig. 26.

Modulation Scheme of converter in G2V mode with PI controller and without PLL is shown in Fig.
25. Fig. 27 shows the sinusoidal current drawn from the AC source to provide the battery voltage
provided in Fig. 28. 100HZ ripple content seen in output can be reduced by incorporating feed
forward compensation and by choosing the predictive control schemes. Fig. 29 and Fig. 30 shows the
ZCS switching in the primary switches with transformer voltages and currents.

Power Electronics and drives, ASE, Bengaluru 35

 Fig. 25 Modulation Scheme of converter in G2V mode with PI controller and without SOGI PLL

Fig. 26 Closed Loop Simulation of Converter

Power Electronics and drives, ASE, Bengaluru 36

 Fig. 27 Input Current of Converter in V2G mode

Fig. 28 Output Volatage and Current of converter in closed loop V2G mode

Power Electronics and drives, ASE, Bengaluru 37

 Fig. 29 Transformer Voltage and Current

Fig. 30 MOSFET Voltage and Current of Converter with ZCS

AC CLOSED LOOP SIMULATION of G2V WITH SOGI PLL:

Closed loop simulation of converter with PI controller with SOGI PLL is presented
inFig. 31 Closed Loop simulation of converter in G2V with SOGI PLL Fig. 31. Control
Scheme of converter in G2V mode with PI controller and with SOGI PLL is shown in Fig. 32. Fig. 33
shows the sinusoidal current drawn from the AC source to provide the battery voltage provided in Fig.
34. 100HZ ripple content seen in output can be reduced by incorporating feed forward compensation
and by choosing the predictive control schemes. Fig. 29 and Fig. 30 shows the ZCS switching in the
primary switches with transformer voltages and currents. iTHD% analysis of input current is
performed as shown in Fig. 35. Power Factor Correction operation of converter is verified by
observing sinusoidal input current.

Power Electronics and drives, ASE, Bengaluru 38

 Fig. 31 Closed Loop simulation of converter in G2V with SOGI PLL

Fig. 32 PI Controller with SOGI PLL

Power Electronics and drives, ASE, Bengaluru 39

 Fig. 33 Input Voltage and Current of G2V converter with PI controller and SOGI filter

Fig. 34 Output Voltage and Current of V2G converter with closed loop control with SOGI PLL

Power Electronics and drives, ASE, Bengaluru 40

 Fig. 35 iTHD Analysis of Input Current

AC CLOSED LOOP SIMULATION of V2G WITH FEED FORWARD CONTROL:

V2G simulation of converter with feedforward control is presented in Fig. 36. The
output voltage and current waveform of the converter is depicted in Fig. 37. vTHD analysis
of the output voltage in V2G is performed and presented in Fig. 38.

Fig. 36 V2G simulation of converter with feedforward control

Power Electronics and drives, ASE, Bengaluru 41

 Fig. 37 V2G Voltage and Current

Fig. 38 vTHD% Analysis of converter in V2G mode

Power Electronics and drives, ASE, Bengaluru 42

 CONCLUSION
The study and analysis of single-phase single stage bidirectional AC DC Converter has been
done in MATLAB Simulink simulation. Achieving Zero Current Switching (ZCS), a critical
parameter for reducing switching losses and enhancing overall efficiency is verified in Grid-to-
Vehicle (G2V) operation. The suggested converter's capacity for soft switching was verified by the
successful demonstration of ZCS's operation in the open-loop mode through MATLAB Simulink
simulation.

Open Loop Simulation of the converter in Grid to Vehicle mode and Vehicle to Grid mode is
done and results are published. Zero Current Switching (ZCS) is verified during the simulation and
the results are presented in simulation results section. Closed loop simulation of G2V converter with
PI controller is done with and without SOGI PLL is carried out and power factor correction action
verified with THD analysis of input current. Vehicle to Grid mode is simulated with feed forward
control and the THD analysis of the same is performed using MATLAB.

In conclusion, with the results the studied single stage converter will be a better high power
dense alternate for conventional two stage battery chargers.

Power Electronics and drives, ASE, Bengaluru 43