Computer Organization and Architecture 77627 Dec 2020
Computer Organization and Architecture 77627 Dec 2020
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18
B.Tech.(CSE)(2018Batch) (Sem.–4)
COMPUTERORGANIZATIONANDARCHITECTURE
SubjectCode:BTES-401-18
77627
Time:3Hrs. Max.Marks:60
INSTRUCTIONSTOCANDIDATES:
1. SECTION-A is COMPULSORY consisting of TEN questions carrying TWO marks
each.
2. SECTION-B contains FIVE questions carrying FIVE marks each and students
YouhavetoattemptanyFOURquestions.
SECTION-C contains THREE questions carrying TEN marks each and students
havetoattemptanyTWOquestions.
SECTION-A
Write briefly:
4. How many memory chips are needed to construct a 2M*16 memory system using 512K*8?
static memory chips?
9. Under what situations is the micro program counter not incremented after a new instruction?
is fetched from micro program memory.
10. What are the disadvantages of increasing the number of stages in pipeline processing?
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SECTION-B
12. What is a Mapping Function? What are the ways cache can be mapped?
14. With examples explain the data transfer, Logic and Program control instructions.
SECTION-C
16. What is Instruction Hazard? Explain the methods of dealing with instruction hazards.
17. Explain the basic organization of the micro programmed control unit and the generation of control.
signals using micro program.
NOTE: Disclosure of Identity by writing Mobile No. or Marking of passing request on any
The paper of the Answer Sheet will lead to UMC against the Student.
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