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PCS-931S X Operation+and+Commissioning+Manual EN Overseas+General X R1.00

The document is a manual for the PCS-931S Line Differential Relay, detailing its operation, commissioning, and safety information. It includes instructions for device monitoring, controlling, and testing, as well as safety warnings and guidelines for qualified personnel. The manual outlines the device's functions, applications, and compliance with standards, while also emphasizing the importance of following safety measures to prevent injury or equipment damage.

Uploaded by

Aldion Prems
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© © All Rights Reserved
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0% found this document useful (0 votes)
60 views241 pages

PCS-931S X Operation+and+Commissioning+Manual EN Overseas+General X R1.00

The document is a manual for the PCS-931S Line Differential Relay, detailing its operation, commissioning, and safety information. It includes instructions for device monitoring, controlling, and testing, as well as safety warnings and guidelines for qualified personnel. The manual outlines the device's functions, applications, and compliance with standards, while also emphasizing the importance of following safety measures to prevent injury or equipment damage.

Uploaded by

Aldion Prems
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
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Copyright © 2021 NR. All rights reserved.

NR, the NR logo are either registered trademarks or trademarks of NR Electric Co., Ltd. No NR
trademarks may be used without written permission. NR products appearing in this document may
be covered by P.R. China and foreign patents. NR Electric Co., Ltd. reserves all rights and benefits
afforded under P.R. China and international copyright and patent laws in its products, including but
not limited to software, firmware and documentation. NR Engineering Co., Ltd. is licensed to use
this document as well as all intellectual property rights owned or held by NR Electric Co., Ltd,
including but not limited to copyright, rights in inventions, patents, know-how, trade secrets,
trademarks and trade names, service marks, design rights, database rights and rights in data, utility
models, domain names and all similar rights.

The information in this document is provided for informational use only and does not constitute a
legal contract between NR and any person or entity unless otherwise specified. Information in this
document is subject to change without prior notice.

To the extent required the products described herein meet applicable IEC and IEEE standards, but
no such assurance is given with respect to local codes and ordinances because they vary greatly.

Although every reasonable effort is made to present current and accurate information, this
document does not purport to cover all details or variations in equipment nor provide for every
possible contingency to be met in connection with installation, operation, or maintenance. Should
further information be desired or should particular problems arise which are not covered sufficiently
for your purposes, please do not hesitate to contact us.
Preface

Preface

About This Manual

The manual describes operation and commissioning for PCS-931S Line Differential Relay. The
operation part contains instructions on how to operate the device. It provides instructions for the
monitoring, controlling and setting of the device. The commissioning part provides procedures for
the checking function and configuration as well as verifying settings by secondary injection. It
describes the process of testing device in a substation which is not in service and can also be used
by engineers and maintenance personnel for assistance during the service and maintenance
activities.

Safety Information

This manual is not a complete index of all safety measures required for operation of the equipment
(module or device). However, it comprises important information that must be followed for personal
safety, as well as to avoid material damage. Information is highlighted and illustrated as follows
according to the degree of danger:

Indicates an imminently hazardous situation that, if not avoided, will

result in death or serious injury.

Indicates a potentially hazardous situation that, if not avoided, could

result in death or serious injury.

Indicates a potentially hazardous situation that, if not avoided, may result

in minor or moderate injury or equipment damage.

Indicates that property damage can result if the measures specified are

not taken.

Important information about the device, product handling or a certain


section of the documentation which must be given particular attention.

Instructions and Warnings

The following hazard statements apply to this device.

PCS-931S Line Differential Relay I


Date: 30 January 2021
Preface

Disconnect or de-energize all external connections BEFORE opening this


device. Contact with hazardous voltages and currents inside this device can
cause electrical shock resulting in injury or death.

Contact with instrument terminals can cause electrical shock that can result
in injury or death.

Use of this equipment in a manner other than specified in this manual can
impair operator safety safeguards provided by this equipment.

Have ONLY qualified personnel service this equipment. If you are not
qualified to service this equipment, you can injure yourself or others, or
cause equipment damage.

This device is shipped with default passwords. Default passwords should


be changed to private passwords at installation. Failure to change each
default password to a private password may allow unauthorized access. NR
shall not be responsible for any damage resulting from unauthorized access.

DO NOT look into the fiber (laser) ports/connectors.

DO NOT look into the end of an optical cable connected to an optical output.

DO NOT perform any procedures or adjustments that this instruction


manual does not describe.

II PCS-931S Line Differential Relay


Date: 30 January 2021
Preface

During installation, maintenance, or testing of the optical ports, ONLY use


the test equipment qualified for Class 1 laser products!

Incorporated components, such as LEDs, transceivers, and laser emitters,


are NOT user serviceable. Return units to NR for repair or replacement.

Equipment components are SENSITIVE to electrostatic discharge (ESD).


Undetectable permanent damage can result if you do not use proper ESD
procedures. Ground yourself, your work surface, and this equipment
BEFORE removing any cover from this equipment. If your facility is not
equipped to work with these components, contact NR about returning this
device and related NR equipment for service.

Insufficiently rated insulation can deteriorate under abnormal operating


conditions and cause equipment damage. For external circuits, use wiring
of SUFFICIENTLY RATED insulation that will not break down under
abnormal operating conditions.

SEVERE power and ground problems can occur on the communications


ports of this equipment as a result of using non-standard cables. Please use
the wiring method recommended in the manual for communication terminals.

DO NOT connect power to the relay until you have completed these
procedures and receive instruction to apply power. Equipment damage can
result otherwise.

Use of controls or adjustments, or performance of procedures other than


those specified herein, may RESULT IN hazardous radiation exposure.

The firmware may be upgraded to add new features or enhance/modify

PCS-931S Line Differential Relay III


Date: 30 January 2021
Preface

existing features, please MAKE SURE that the version of this manual is
compatible with the product in your hand.

Document Conventions

⚫ The abbreviations and acronyms in this manual are explained in “Appendix A Glossary”. The
Glossary also contains definitions of important terms.

⚫ Menu path is connected with the arrow "→" and bold.

For example: the access path of protection settings is: MainMenu -> Settings -> Protection
Settings

⚫ Settings not in the table should be placed in brackets.

For example: the system setting [Opt_SysFreq]

⚫ Cross-references are presented in italics.

For example: refer to Figure 1.1-1, refer to Table 1.1-1, reference to Section 1.1

⚫ Binary input signals, binary output signals, analogs, LED lights, buttons, and other fixed
meanings, should be written in double quotes and bold.

For example: press the button "ENT".

Symbols

⚫ AND Gate

& & &

⚫ OR Gate

>=1 >=1 >=1

⚫ Comparator

⚫ Binary signal Input

IV PCS-931S Line Differential Relay


Date: 30 January 2021
Preface

BI xxx

⚫ Signal input

SIG xxx

⚫ Setting input

SET xxx

⚫ Enable input

EN xxx

⚫ Timer

Optional definite-time or inverse-time characteristic

Timer
t
t

⚫ Timer

Fixed delay pickup (10ms), fixed delay drop-off (2ms)

10ms 2ms

⚫ Timer

Settable delay pickup, fixed delay drop-off

[Tset1] 0ms

⚫ Timer

Fixed delay pickup, settable delay drop-off

0ms [Tset2]

⚫ Timer

Settable delay pickup, settable delay drop-off

[Tset1] [Tset2]

⚫ Generator

PCS-931S Line Differential Relay V


Date: 30 January 2021
Preface

⚫ Transformer

⚫ Reactor

⚫ Motor

⚫ Capacitor

⚫ Busbar

⚫ Circuit breaker

52

⚫ Current transformer

3CT
*

⚫ Voltage transformer

3VT

VI PCS-931S Line Differential Relay


Date: 30 January 2021
Preface

⚫ Disconnector

⚫ Earth

Three-phase Corresponding Relationship

Basic
A, B, C L1, L2, L3 R, Y, B
AN, BN, CN L1N, L2N, L3N RN,YN, BN
ABC L123 RYB
U (voltage) V U

Example
Ia, Ib, Ic, I0 IL1, IL2, IL3, IN IR, IY, IB, IN
Ua, Ub, Uc VL1, VL2, VL3 UR, UY, UB
Uab, Ubc, Uca VL12, VL23, VL31 URY, UYB, UBR
U0, U1, U2 VN, V1, V2 UN, U1, U2

Warranty

This product is covered by the standard NR 10-year warranty. For warranty details, please consult
the manufacturer or agent for warranty information.

Document Structure

This document describes how to view and operate the device. And How to test the device at
different stages to verify that the hardware and software functions of the device are intact, and the
function configuration meets the requirements.

1 Introduction
Introduces summarizes functions and typical applications of the device.

2 HMI Overview
Introduce the hardware of the human machine interface (HMI) module.

3 HMI Operation

PCS-931S Line Differential Relay VII


Date: 30 January 2021
Preface

Introduces a detailed guide for the user how to use this relay through HMI. It also lists all the
information which can be view through HMI, such as settings, measurements, all kinds of reports
etc.

4 PCS-Studio Operation
Introduce the online viewing and operation of PCS-Studio software

5 Test Preparation
Preparation before test, including test principle, precautions, and test equipment.

6 Check before Power On


Check the appearance, insulation, external wiring, and auxiliary power supply of the device before
power on.

7 Check after Energized


After power on, check the HMI, AC inputs, binary inputs, binary outputs, and other auxiliary
connections.

8 Protection Function Test


The chapter provides procedures for protection function and configuration as well as verifying
settings by secondary injection. And It can also be used by system engineers and maintenance
personnel for assistance during the service and maintenance activities.

9 Control Function Test


The chapter provides procedures for control function and configuration as well as verifying settings
by secondary injection. And It can also be used by system engineers and maintenance personnel
for assistance during the service and maintenance activities.

10 Finish the Test


After the completion of the test, it is necessary to restore the device configuration, wiring settings,
etc.

Document Revision History

PN: ZL_PCS-931S_X_Operation and Commissioning Manual_X

Current version: R1.00

Version
Release Date Description of change
Document Firmware

R1.00 R1.41 30 December 2020 Form the original manual.

VIII PCS-931S Line Differential Relay


Date: 30 January 2021
1 Introduction

1 Introduction 1

Table of Contents

1.1 Application ....................................................................................................... 1-1


1.2 Functions ......................................................................................................... 1-1
1.2.1 Protection ............................................................................................................................. 1-1

1.2.2 Control .................................................................................................................................. 1-5

1.2.3 Synchrophasor measurement .............................................................................................. 1-6

1.2.4 Measurement........................................................................................................................ 1-6

1.2.5 Recording ............................................................................................................................. 1-6

1.2.6 Supervision ........................................................................................................................... 1-7

1.2.7 Pilot channel scheme ........................................................................................................... 1-7

1.2.8 Communication interface...................................................................................................... 1-7

1.2.9 Communication protocol....................................................................................................... 1-7

1.2.10 Digital application ............................................................................................................... 1-8

1.2.11 Clock synchronization ......................................................................................................... 1-8

1.2.12 Cyber security..................................................................................................................... 1-8

1.2.13 User interface ..................................................................................................................... 1-8

1.2.14 Miscellaneous ..................................................................................................................... 1-9

PCS-931S Line Differential Relay 1-a


Date: 30 January 2021
1 Introduction

1-b PCS-931S Line Differential Relay


Date: 30 January 2021
1 Introduction

1.1 Application 1
PCS-931S protect overhead and underground lines, feeders, and cables on all voltage levels with
highest possible selectivity. The devices contain all important auxiliary functions that are necessary
today for safe network operation. This includes control, measurement and monitoring functions.
The PCS-931S is widely adopted not only for conventional substations, but also for digital
substations.

1.2 Functions

Busbar

3VT

52

85 21 67P 67G 67Q 32R 49P 50DZ 46BC 62P D 50BF 37 PMU 59P
3CT
*

87L 21D 50/51P 50/51G 50/51Q FR 59Q

78 FL

Data transmit/Rec eiv e


SOTF 59G

81O 27P

81U 81R

87STB (Only for one and a half breakers arrangement)


1VT
25 79

Line

1.2.1 Protection

ANSI Protection functions Remark

⚫ DPFC current differential element (2 stages)

⚫ Steady-state current differential element (2 stages)

87 Current differential protection ⚫ Neutral current differential element (1 stage)

⚫ CT saturation detection

⚫ Capacitive current compensation

85 Pilot distance protection ⚫ Independent pilot zone (forward direction and reverse

PCS-931S Line Differential Relay 1-1


Date: 30 January 2021
1 Introduction

1 direction, mho or quadrilateral characteristics)

⚫ PUTT, POTT, Blocking, Unblocking, Zone Extension

⚫ Current reversal logic

⚫ Weak infeed echo or echo&trip

⚫ Open breaker echo

⚫ Directional zero-sequence comparison element for pilot

scheme
Pilot directional earth-fault
⚫ PTT, Blocking and Unblocking
protection
⚫ Current reversal logic

⚫ Open breaker echo

⚫ Up to 6 zones

⚫ 3 independent phase-to-ground distance elements for

each zone

⚫ 3 independent phase-to-phase distance elements for

each zone

⚫ Selectable quadrilateral characteristics or mho

characteristics

⚫ Independent impedance settings and time delays for each


21L Distance protection
zone

⚫ Zero-sequence current compensation for phase-to-

ground distance element

⚫ Selectable forward direction, reverse direction or non-

direction (except zone 1 that is fixed as forward direction)

⚫ Load encroachment for each zone

⚫ Power swing blocking and releasing for each zone

⚫ Faulty phase selection for each zone

⚫ Fixed forward direction

21D DPFC distance protection ⚫ High-speed operation

⚫ Supplementary for zone 1 of distance protection

1-2 PCS-931S Line Differential Relay


Date: 30 January 2021
1 Introduction

78 Out-of-step protection ⚫ Easy to set and independent of system parameters


1
⚫ Up to 6 stages with independent logic

⚫ Voltage control element for each stage

⚫ Optional direction element for each stage, including

67P forward direction, reverse direction or non-direction


Phase overcurrent protection
50/51P ⚫ Optional definite-time characteristics and inverse-time

characteristics for each stage

⚫ Trip purpose or alarm purpose for each stage

⚫ Harmonic control element for each stage

⚫ Up to 6 stages with independent logic

⚫ Optional direction element for each stage, including

forward direction, reverse direction or non-direction


67G
Earth fault protection ⚫ Optional definite-time characteristics and inverse-time
50/51G
characteristics for each stage

⚫ Selectable trip purpose or alarm purpose for each stage

⚫ Harmonic control element for each stage

⚫ Up to 2 stages with independent logic

⚫ Optional direction element for each stage, including


67Q Negative-sequence overcurrent
forward direction, reverse direction or non-direction
50/51Q protection
⚫ Optional definite-time characteristics and inverse-time

characteristics for each stage

⚫ Via distance measurement elements

SOTF Switch onto fault ⚫ Via dedicated earth fault element

⚫ Via phase overcurrent element

⚫ Up to 2 stages with independent logic


49P Thermal overload protection
⚫ Selectable trip purpose or alarm purpose for each stage

⚫ Up to 2 stages with independent logic

59P Phase overvoltage protection ⚫ Optional definite-time characteristics and inverse-time

characteristics for each stage

PCS-931S Line Differential Relay 1-3


Date: 30 January 2021
1 Introduction

1 ⚫ Optional phase voltage or phase-to-phase voltage

⚫ Optional “1-out-of-3” logic or “3-out-of-3” logic

⚫ Selectable trip purpose or alarm purpose for each stage

⚫ Up to 2 stages with independent logic

⚫ Optional definite-time characteristics and inverse-time

characteristics for each stage

⚫ Optional phase voltage or phase-to-phase voltage

27P Phase undervoltage protection ⚫ Optional “1-out-of-3” logic or “3-out-of-3” logic

⚫ Blocked by instantaneous VT circuit failure

⚫ Selectable trip purpose or alarm purpose for each stage

⚫ Optional auxiliary criterion, including CB position check

and current check

Negative-sequence overvoltage ⚫ Up to 2 stages with independent logic


59Q
protection ⚫ Selectable trip purpose or alarm purpose for each stage

⚫ Up to 2 stages with independent logic


59G Residual overvoltage protection
⚫ Selectable trip purpose or alarm purpose for each stage

⚫ Up to 4 stages with independent logic


81O Overfrequency protection
⚫ Voltage control element

⚫ Up to 4 stages with independent logic


81U Underfrequency protection
⚫ Voltage control element

Frequency rate-of-change ⚫ Up to 4 stages with independent logic


81R
protection ⚫ Voltage control element

⚫ Up to 2 stages with independent logic


32R Reverse power protection
⚫ Selectable trip purpose or alarm purpose for each stage

⚫ Optional auxiliary criterion, including CB position check

37 Undercurrent protection and current check

⚫ Selectable trip purpose or alarm purpose for each stage

⚫ Phase-segregated re-trip and three-phases re-trip


50BF Breaker failure protection
⚫ Optional current criterion (phase overcurrent element,

1-4 PCS-931S Line Differential Relay


Date: 30 January 2021
1 Introduction

zero-sequence overcurrent element, negative-sequence


1
overcurrent element)

⚫ Optional circuit breaker position check

⚫ Two time delays

⚫ Protect the T-zone in one-and-a-half breaker and ring


87STB Stub differential protection
breaker arrangements

⚫ Clear the dead zone faults between CT and the circuit


50DZ Dead zone protection
breaker

⚫ Adopt the ratio of negative-sequence current to positive-


46BC Broken conductor protection
sequence current (Ι2/Ι1) to detect the broken conductor.

⚫ Initiated by three auxiliary contacts of phase-segregate

circuit breaker
62PD Pole discrepancy protection
⚫ Optional auxiliary criterion (zero-sequence current

element or negative-sequence current element)

25 Synchronism check ⚫ Independent logic for auto-reclosing and manually closing

⚫ One shot or multi-shot

⚫ 1-pole AR, 3-pole AR or 1/3-pole AR

79 Auto-reclosing ⚫ Optional trigger mode, including protection operating and

external binary input

⚫ Support synchro-check and voltage check

⚫ Compatible with IEEE C37.118-2005, IEEE C37.118.1-


PMU Phasor measurement unit
2011, IEEE C37.118.2-2011 and IEEE C37.118.1a-2014.

⚫ Single-ended impedance-based method

FL Fault location ⚫ Zero-sequence mutual coupling compensation for parallel

lines

⚫ Single-ended travelling-wave-based method


TWFL Travelling-Wave fault location
⚫ Double-ended travelling-wave-based method

1.2.2 Control
⚫ Circuit breaker & disconnector control (Remote/local)

PCS-931S Line Differential Relay 1-5


Date: 30 January 2021
1 Introduction

⚫ Synchronism check for auto-reclosing and manual closing


1 ⚫ Voltage selection

1.2.3 Synchrophasor measurement


⚫ Synchronize with the GPS time by IRIG-B time source

⚫ Calculate synchronized phasors, including: Ua, Ub, Uc, U1, U2, U0, Ia, Ib, Ic, I1, I2, I0

⚫ Calculate analog values, including: active power (P), reactive power (Q), frequency,
ROCOF (df/dt)

⚫ Transmit binary status of the IED to PDC (Phasor Data Concentrator) according to IEEE
C37.118 standard

⚫ Realize high accurate measurement of the phasors and analogs according to the IEEE
C37.118.1-2011 and IEEE C37.118.1a-2014 standard.

⚫ Communicate with PDC according to IEEE C37.118-2005 and IEEE C37.118.2-2011

⚫ Supporting P Class or M Class measurement (user selectable)

⚫ Measurement of up to 32 binary status (user configurable)

⚫ Output of synchrophasor with timestamp, support of multiple protocols (TCP, TCP-UDP,


UDP) and multiple data rates (2f0, f0, f0/2) for maximum 4 clients (PDC)

1.2.4 Measurement
⚫ Current and voltage measurement at a 2.4KHz sampling rate

⚫ Current and voltage measurement at a 9.6KHz sampling rate

⚫ Travelling wave current measurement at a 1MHz sampling rate

⚫ Energy metering (active and reactive energy are calculated in import respectively export
direction)

⚫ Power (Apparent/Real/Reactive)

⚫ Power factor

⚫ Frequency

1.2.5 Recording

⚫ Event Recorder including 1024 disturbance records, 1024 binary events, 1024 supervision
events, 256 control logs and 1024 device logs.

⚫ 64 disturbance waveforms records (The file format of disturbance recorder is compatible


with international COMTRADE file.)

⚫ 64 travelling wave fault location (TWFL) records (The file format of disturbance recorder
is compatible with international COMTRADE file.)

1-6 PCS-931S Line Differential Relay


Date: 30 January 2021
1 Introduction

⚫ 64 high-frequency waveforms records (The file format of disturbance recorder is


compatible with international COMTRADE file.) 1
1.2.6 Supervision

⚫ VT circuit supervision

⚫ CT circuit supervision

⚫ Trip/Close coil supervision

⚫ Self diagnostic

⚫ Pilot communication channel supervision

⚫ DC power supply supervision

⚫ Channel status statistic

⚫ System frequency supervision

1.2.7 Pilot channel scheme


⚫ Optional single- or dual- pilot channels (fiber optic)

⚫ Support G.703 and C37.94

1.2.8 Communication interface

⚫ 2 or 4 100Base-TX copper Ethernet ports for SCADA communication

⚫ 2 or 4 100Base-FX optical Ethernet ports for SCADA communication

⚫ 2 RS-485 serial ports for SCADA communication

⚫ 1 RS-485 serial port for clock synchronization

⚫ 1 TTL serial port for clock synchronization

⚫ 1 BNC port for clock synchronization

⚫ 1 front RJ-45 port for debugging

⚫ 1 rear RJ-45 port for debugging

1.2.9 Communication protocol


⚫ IEC 61850 Editions 1 and 2

⚫ IEC 60870-5-103

⚫ DNP3.0

⚫ Modbus

⚫ IEC 62439 Parallel Redundancy Protocol (PRP)

⚫ IEC 62439 High-availability Seamless Redundancy (HSR)

PCS-931S Line Differential Relay 1-7


Date: 30 January 2021
1 Introduction

⚫ IEEE 802.1w Rapid Spanning Tree Protocol (RSTP)


1
1.2.10 Digital application

⚫ IEC 61850 MMS Server

⚫ IEC 61850-8-1 GOOSE

⚫ IEC 61850-9-2LE SV

⚫ 4 100Base-TX electrical or 100Base-FX optical Ethernet port (station level)

⚫ Extendable 100Base-FX optical Ethernet port (process level)

1.2.11 Clock synchronization

⚫ IRIG-B: IRIG-B via RS-485 differential level, TTL level or BNC

⚫ PPS: Pulse per second (PPS) via RS-485 differential level, binary input or BNC

⚫ PPM: Pulse per minute (PPM) via RS-485 differential level or binary input

⚫ IEEE 1588: Clock message based on IEEE 1588 via Ethernet network

⚫ SNTP (PTP): Unicast (point-to-point) SNTP mode via Ethernet network

⚫ SNTP (BC): Broadcast SNTP mode via Ethernet network

⚫ Clock messages: IEC103 protocol, Modbus protocol and DNP3.0 protocol

1.2.12 Cyber security

⚫ NERC CIP

⚫ IEC 62351

⚫ IEC 62443

⚫ IEEE 1686

1.2.13 User interface

⚫ Friendly HMI interface with LCD, easy-to-use keypad aids simple navigation and set-point
adjustment

⚫ Push buttons for open/close, switch for selection between local and remote control, and
user's login and logout authority management

⚫ 4 Programmable operator push-buttons with user-configurable labels

⚫ Up to 18 programmable target LEDs with user-configurable labels

⚫ 1 RS-232 rear ports for printer

⚫ Language switchover—English + selected language

⚫ Configuration tool—PCS-Studio

1-8 PCS-931S Line Differential Relay


Date: 30 January 2021
1 Introduction

1.2.14 Miscellaneous
1
⚫ User programmable logic

⚫ Fault phase selection

⚫ Switching system phase sequences function (ABC or ACB)

PCS-931S Line Differential Relay 1-9


Date: 30 January 2021
1 Introduction

1-10 PCS-931S Line Differential Relay


Date: 30 January 2021
2 HMI Overview

2 HMI Overview

Table of Contents 2
2.1 General Description......................................................................................... 2-1
2.2 LCD Display ..................................................................................................... 2-2
2.2.1 Overview ............................................................................................................................... 2-2

2.2.2 Normal Display ..................................................................................................................... 2-2

2.2.3 Display Disturbance Records ............................................................................................... 2-3

2.2.4 Display Supervision Event ................................................................................................... 2-5

2.2.5 Display IO Events ................................................................................................................. 2-5

2.3 Keypad.............................................................................................................. 2-6


2.4 Shortcut Keys .................................................................................................. 2-7
2.5 Function Key .................................................................................................... 2-8
2.6 Debugging port ................................................................................................ 2-8
2.7 LED Indications................................................................................................ 2-9

List of Figures

Figure 2.1-1 Front panel.............................................................................................................. 2-2

Figure 2.2-1 LCD Overview ......................................................................................................... 2-3

Figure 2.2-2 Disturbance records 1 ........................................................................................... 2-4

Figure 2.2-3 Disturbance records 2 ........................................................................................... 2-4

Figure 2.2-4 Supervision events ................................................................................................ 2-5

Figure 2.2-5 Binary events.......................................................................................................... 2-6

Figure 2.3-1 Keypad buttons ...................................................................................................... 2-6

Figure 2.5-1 Function key ........................................................................................................... 2-8

Figure 2.6-1 Communication port .............................................................................................. 2-8

Figure 2.7-1 LED indications ...................................................................................................... 2-9

PCS-931S Line Differential Relay 2-a


Date: 30 January 2021
2 HMI Overview

2-b PCS-931S Line Differential Relay


Date: 30 January 2021
2 HMI Overview

The operator can access the device from the front panel. Local communication with the device is
possible using a computer via a multiplex RJ45 port on the front panel. Furthermore, remote
communication is also possible using a PC with the substation automation system via rear Ethernet
port or rear RS485 port. The operator can check the protective device status at any time.
2
2.1 General Description

The human-machine interface consists of a human-machine interface (HMI) module which allows
a communication to be as simple as possible for the user.

PCS-931S Line Differential Relay 2-1


Date: 30 January 2021
2 HMI Overview

Figure 2.1-1 Front panel

No. Description Remark

1 LCD Local LCD screen for device status and information display
2 2 Keypad Easy-to-use keypad aids simple navigation and set-point adjustment
Push buttons for opening/closing operation and switching of local/remote
3 Shortcut Key
control mode
4 Shortcut Key Push button for user login/logout of authority management
5 Function Key 4 Programmable operator pushbuttons with user-configurable labels
6 Communication port Front RJ45 multiplex port for debugging
7 Shortcut Key Target reset
Two LED indictors for device running status
8 Fixed LED
“HEALTHY” (green) and “ALARM” (yellow)
Programmable LED indicators with configurable labels (18 for 1/1 or 1/2
9 Programmable LED
variant, 15 for 1/3 variant)

2.2 LCD Display

2.2.1 Overview

There are some kinds of LCD display, SLD (single line diagram) display, disturbance records,
supervision events, IO events, control logs and device logs. Disturbance records and supervision
events will not disappear until them are acknowledged by pressing the “RESET” button in the
protection panel (i.e. energizing the binary input [BI_RstTarg]). If any event is detected, the
corresponding event display will pop up automatically, and user can keep pressing “ENT” and then
press “ESC” to switch between normal display and event display. IO events will be displayed for 5s
and then it will return to the previous display interface automatically. Device logs will not pop up
and can only be viewed by navigating the corresponding menu.

2.2.2 Normal Display

After the device is powered and entered into the initiating interface, it takes tens of seconds to
complete the initialization of the device. During the initialization of the device, the “HEALTHY”
indicator lamp of the device goes out.

Under normal condition, LCD will display the following interface. LCD adopts white color as its
backlight that is activated if once there is any keyboard operation, moreover, the backlight will be
extinguished automatically if no keyboard operation is detected for a duration.

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S Addr:101 2021-01-28 10:10:20 Group:01

Q1
Ua:
Ub:
135.15
134.39
kV
kV
2
Uc: 135.29 kV
Ia : 358.15 A
Q0
Ib : 359.35 A
Ic : 360.28 A
Q3

Figure 2.2-1 LCD Overview

The content displayed on the screen contains: the current date and time of the device (with a format
of yyyy-mm-dd hh:mm:ss:), the active setting group number The device can also display single line
diagram (SLD) and primary operation information if that had been configured by PCS-Studio tool.
If all information cannot be fully displayed within one screen, they will be scrolling-displayed
automatically from the top to the bottom.

If IP address of Ethernet A is “xxx.xxx.a.b”, the displayed address equals to (a×256+b). For example,
If IP address of Ethernet A is “198.087.095.023”, the displayed address will be “95×256+23 =
24343”.

If the device has detected any abnormal state, it′ll display the self-check alarm information.

“S” indicates that device clock is synchronized. If “S” disappears, it means that device clock is not
synchronized.

2.2.3 Display Disturbance Records

This device can store up to 32 groups of disturbance records with fault waveform. Each group
consists of disturbance records of operation elements and corresponding fault detector elements.
Up to 1024 disturbance records can be stored in this device. If there is protection element operation,
LCD will automatically display the latest group of disturbance records, and two kinds of LCD display
interfaces will be available depending on whether there are supervision events or not.

For the situation that the disturbance records and the supervision events coexist, the upper half
part is the disturbance record, and the lower half part is the supervision event. The following items
are listed in the upper half part: record No., record name, generation time of the disturbance record.
If there is protection element operation, faulty phase and relative operation time (with reference to
the corresponding fault detector element) will be displayed. If the disturbance records can not be
displayed in one page, they will be displayed in several pages alternately.

If there is no supervision event, disturbance records will be displayed as shown in the following
figure.

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NO.001 2021-01-15 13:22:23:669 Disturb

0000ms FD.DPFC.Pkp

2 0024ms AB 21Q.Z1.Op

Figure 2.2-2 Disturbance records 1

If the device has the supervision event, the display interface will show the disturbance record and
the supervision event at the same time.

NO.001 2021-01-15 13:22:23:669 Disturb

0000ms FD.DPFC.Pkp
0024ms AB 21Q.Z1.Op

Superv Events
Alm_Device

Figure 2.2-3 Disturbance records 2

NO.001 shows the SOE No. of the disturbance record.

2021-01-15 13:22:23:669 shows the time of the disturbance record, the format is “yyyy-mm-
dd hh:mm:ss:fff”.

Disturb shows the title of the disturbance record.

0000ms FD.DPFC.Pkp shows fault detector element and its operation time (set as
“0000ms” fixedly).

0024ms AB 21Q.Z1.Op shows operation element and its relative operation time (with
reference to the corresponding fault detector element).

All the protection elements have been listed in chapter “Operation Theory”, and please refer to
each protection element for details. The reports related to oscillography function are showed in the

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following table.

No. Message Description


1 TrigDFR_Man Oscillography function is triggered manually.
2 TrigDFR_Rmt Oscillography function is triggered remotely. 2
Oscillography function is triggered by binary input [BI_TrigDFR]. The
3 TrigDFR_BI binary input [BI_TrigDFR] is configurable, and it can be designated to
internal signal or external input.

2.2.4 Display Supervision Event

This device can store 1024 pieces of supervision events. During the running of the device, the
supervision event of hardware self-check errors or system running abnormity will be displayed
immediately.

S Superv Events

Alm_Device
Alm_Version

Figure 2.2-4 Supervision events

S indicates that device clock is synchronized. If “S” disappears, it


means that device clock is not synchronized.

Superv Events shows the title of the supervision events.

Alm_Device shows the contents of supervision events.

Alm_Version

2.2.5 Display IO Events

This device can store 1024 pieces of binary events. During the running of the device, the binary
input will be displayed once its state has changed, i.e. from “0” to “1” or from “1” to “0”.

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NO.001 2021-01-15 13:31:24:339 IO Events

BI_Maintenance 0 1

Figure 2.2-5 Binary events

NO.001 shows the No. of the binary event.

2021-01-15 13:31:24:339 shows date and time when the report occurred, the format is “yyyy-
mm-dd hh:mm:ss:fff”.

IO Chg shows the title of the binary event.

BI_Maintenance 0→1 shows the state change of binary input, including binary input
name, original state and final state.

2.3 Keypad

E NT

Figure 2.3-1 Keypad buttons

1. “MENU”

◼ Enter the device main menu

2. “ESC”:

◼ Cancel the operation

◼ Quit the current menu

3. “ENT”:

◼ Execute the operation

◼ Confirm the interface

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4. “◄” and “►”. Leftward and rightward direction keys

◼ Move the cursor horizontally

◼ Enter the next menu or return to the previous menu


2
5. “▲” and “▼”. Upward and downward direction keys

◼ Move the cursor vertically

◼ Select command menu within the same level of menu

6. “+” and “-”. Plus and minus sign keys

◼ Modify the value

◼ Modify and display the message number

◼ Page up/down

2.4 Shortcut Keys

This device provides the following keys on the front HMI panel to quickly realize frequently-used
functions.

Key Description Remark

Closing operation of control


function for local control mode
Only valid when single line diagram is drawn and the control
configuration between output and position indication signal of the
object switchgear is completed.
Opening operation of control
function for local control mode

Switching of Remote and Local Two LEDs are equipped to indicate current remote/local control
control mode for control function mode.

User login and logout authority management. Setup of max.40


User login/logout for authority users and allow each user to own different password and access
management authority. One LED is equipped to indicate the use logged in/out
state.
In device default configuration, this button is the triggering signal to
Reset of latched LED indicators reset the LED indicators other than "HEALTHY" and "ALARM".
(by default) User may customize another logic that is triggered by the press of
this button, such as clearing log, resetting trip counter, etc.

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2.5 Function Key

This device provides four keys (F1, F2, F3 and F4) for programmable rapid functions, such as an
2 input signal, a quick execution of menu command or a direct access to sub-level menu path.

F1

F2

F3

F4

Figure 2.5-1 Function key

◼ Input signal: an unlatched signal (500ms pulse, programmable) or a latched signal (flip-
flop mechanism, programmable).

◼ Command Menu: a pre-set execution operation from device LCD menu for local command,
device debugging, authority management, etc.

◼ View Menu: a pre-set access operation from device LCD menu for visualization of
measured quantities, recorded events, signal status, etc.

2.6 Debugging port

Front RJ45 debug port for connection to a portable computer is at the bottom left of the panel.

Figure 2.6-1 Communication port

By default, the IP address of front debugging port is “100.100.100.100” with the subnet mask
“255.255.000.000”.

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2.7 LED Indications

HEALTHY
ALARM 2

Figure 2.7-1 LED indications

A brief explanation has been made as bellow.


LED Display Description
When the equipment is out of service or any hardware error is defected during
Off
HEALTHY self-check.

Steady Green Lit when the equipment is in service and ready for operation.

Off When equipment in normal operating condition.


ALARM
Steady Yellow Lit when VT circuit failure, CT circuit failure or other abnormal alarm is issued.

“HEALTHY” LED can only be turned on by energizing the device and no


abnormality detected.

“ALARM” LED is turned on when abnormalities of device occurs like above


mentioned and can be turned off after abnormalities are removed except
alarm report [CTS.Alm] which can only be reset only when the failure is
removed and the device is rebooted or re-energized.

Other LED indicators with no labels are configurable and user can configure
them to be lit by signals of operation element, alarm element and binary
output contact according to requirement through PCS-Studio software, but
as drawn in figure, “HEALTHY” LED is fixed as green, 19 LEDs are
configurable with selectable color among green, yellow and red. And the

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second LED is generally configured as “ALARM” displayed in yellow.

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3 HMI Operation

Table of Contents

3.1 Menu Tree ......................................................................................................... 3-1 3


3.2 Keypad Operation ............................................................................................ 3-5
3.2.1 Menu Operation .................................................................................................................... 3-5

3.2.2 View Device Measurements ................................................................................................. 3-6

3.2.3 View Device Status............................................................................................................... 3-6

3.2.4 View Device Records ........................................................................................................... 3-7

3.2.5 Delete Device Records......................................................................................................... 3-9

3.2.6 View Device Setting ............................................................................................................. 3-9

3.2.7 Modify Device Setting ......................................................................................................... 3-10

3.2.8 Copy Device Setting ........................................................................................................... 3-12

3.2.9 Print .................................................................................................................................... 3-13

3.2.10 Local Command ............................................................................................................... 3-14

3.2.11 Switch Setting Group ........................................................................................................ 3-15

3.2.12 View Device Information................................................................................................... 3-15

3.2.13 Local Control via Menu..................................................................................................... 3-16

3.2.14 Local Control via SLD....................................................................................................... 3-19

3.2.15 Control with Open/Close Buttons ..................................................................................... 3-22

3.2.16 Communication Test ......................................................................................................... 3-24

3.2.17 Modify Device Clock ......................................................................................................... 3-24

3.2.18 Select Language .............................................................................................................. 3-25

List of Figures

Figure 3.1-1 First-level menu...................................................................................................... 3-1

Figure 3.2-1 Quick Menu ............................................................................................................. 3-5

Figure 3.2-2 Main Menu............................................................................................................... 3-5

Figure 3.2-3 Delete device records ............................................................................................ 3-9

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Figure 3.2-4 Password diagram1 ..............................................................................................3-11

Figure 3.2-5 Modify setting diagram2...................................................................................... 3-12

Figure 3.2-6 Modify setting diagram3...................................................................................... 3-12

Figure 3.2-7 Copy settings diagram ........................................................................................ 3-13

3 Figure 3.2-8 Change active group diagram ............................................................................ 3-15

Figure 3.2-9 Password diagram 2 ............................................................................................ 3-16

Figure 3.2-10 Control diagram 1 .............................................................................................. 3-17

Figure 3.2-11 Control diagram 2 .............................................................................................. 3-17

Figure 3.2-12 Control diagram 3 .............................................................................................. 3-18

Figure 3.2-13 Control diagram 4 .............................................................................................. 3-18

Figure 3.2-14 Control diagram 5 .............................................................................................. 3-19

Figure 3.2-15 Control diagram 6 .............................................................................................. 3-20

Figure 3.2-16 Control diagram 7 .............................................................................................. 3-20

Figure 3.2-17 Control diagram 8 .............................................................................................. 3-21

Figure 3.2-18 Control diagram 9 .............................................................................................. 3-21

Figure 3.2-19 Control diagram 10 ............................................................................................ 3-21

Figure 3.2-20 Control diagram 11 ............................................................................................ 3-22

Figure 3.2-21 Control diagram 12 ............................................................................................ 3-22

Figure 3.2-22 Control diagram 13 ............................................................................................ 3-23

Figure 3.2-23 Control diagram 14 ............................................................................................ 3-23

Figure 3.2-24 Control diagram 15 ............................................................................................ 3-23

Figure 3.2-32 Modify device clock ........................................................................................... 3-25

Figure 3.2-33 Select language .................................................................................................. 3-26

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3.1 Menu Tree

Press “MENU” and enter the main menu. The menu is divided into 10 sections:

3
Measurements
Status
Records
Settings
Print
Local Cmd
Information
Test
Clock
Language

Figure 3.1-1 First-level menu

The command menu adopts a tree shaped content structure. The above diagram provides the
integral structure and all main menus (first-level menus) under menu tree of the device.

The menu structure is fully expanded as shown in the following table:


Table 3.1-1 Menu structure

Level 1 menu Level 2 menu Level 3 menu Level 4 menu


General Values
Angle Values
Primary Values SeqComponent Values
Power Values
Harmonics
General Values
Angle Values
Secondary Values SeqComponent Values
Measurements
Power Values
Harmonics
Diff Values
Function Values ThOvLd Values
Synchrocheck Check
Energy Metering
Power Quality
UserDef Values
Contact Inputs
Status Inputs GOOSE Input
Pilot_Ch Inputs

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Level 1 menu Level 2 menu Level 3 menu Level 4 menu


Contact Outputs
Outputs
Interlock Status
Device Superv
Superv Status Goose Superv
SV Superv
3 Function Links
Logic Links Status GOOSE Recv Links
SV Recv Links
Running Status Device Temperature
UserDef Status 1
UserDef Status
UserDef Status 2
Disturb Records
Superv Events
IO Events
Device Logs
Records Control Logs
Regulation Logs
HighFreq Records
TWFL Records
Clear Records
System Settings
Device Settings
General Comm Settings
IEC61850 Settings
Comm Settings
DNP Settings
Global Settings IEC103 Settings
DFR Settings
Label Settings
ClockSyn Settings
Superv Settings
UserDef Global Settings
Settings
FD Settings
Line Settings
Rmt CommCh Settings
Diff Settings
Pilot Scheme Settings
Protection Settings DPFC Dist Settings
DistProt Settings
ROC Settings
OC Settings
SOTF Settings
NegOC Settings

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Level 1 menu Level 2 menu Level 3 menu Level 4 menu


UC Settings
OV Settings
ROV Settings
NegOV Settings
UV Settings
FreqPort Settings 3
RevPower Settings
BCP Settings
Stub Settings
ThOvLd Settings
BFP Settings
DZP Settings
PDP Settings
OOS Settings
TT Settings
Trip Logic Settings
AR Settings
Function Settings
Syn Settings
DPS Settings
Meas Control Settings
Control Settings
Interlock Settings
Energy Metering Settings
PMU Settings
Logic Links Function Links
UserDef Global Setting
UserDef Settings
UserDef Grouped Setting
Confirm Settings
Copy Settings
Device Info
Settings Global Settings All Settings
Disturb Records
Superv Events
Print
IO Events
Device Status
IEC103 Info
Cancel Print
Reset Target
Trig Oscillograph
Local Cmd Enable Download
Change Setting Grp
Clear Counter Clear GOOSE Counter

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Level 1 menu Level 2 menu Level 3 menu Level 4 menu


Clear AR Counter
Clear All Counters
Clear Energy Metering
Control
Regulate
3 Program Info
Version Info MON Info
Config Info
Information Board Info
MOT Info
Device unique ID
S/N
information
GOOSE Counter
Counter Switchgear Counter
AR Counter
All Items Test
Disturb Events
Single Item Test
All Items Test
Superv Events
Single Item Test
Device Test All Items Test
IO Events
Single Item Test
Measurements
Test Contact Outputs
GOOSE Outputs
Internal Signal
Disturb Item
BacklitDur
Contrast
HMI Setup LgtIntnsty
SupervLCD
SupervLED
Ping
Initialization Error
Clock
Language

The name of menu structure directory expresses the function of this menu. For detailed menu
operation, please refer to chapter 3.2 Keypad Operation.

The menu will not be displayed if the function is disable into the public

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configuration.

3.2 Keypad Operation

3.2.1 Menu Operation


Press “MENU” to enter the main menu with the interface as shown in the following diagram: 3

MainMenu

Language
Clock

Quick Menu

Figure 3.2-1 Quick Menu

For the first powered device, there is no record in quick menu. Press “MENU” to enter the main
menu with the interface as shown in the following diagram:

Measurements
Status
Records
Settings
Print
Local Cmd
Information
Test
Clock
Language

Figure 3.2-2 Main Menu

Press “MENU” and enter the main menu. Select different submenu by “▲” and “▼”. Enter the
selected submenu by pressing “ENT” or “►”. Press “◄” and return to the previous menu. Press
“ESC” back to main menu directly. For sake of entering the command menu again, a command
menu will be recorded in the quick menu after its execution. Five latest command menus can be
recorded in the quick menu. When five command menus are recorded, the latest command menu
will cover the earliest one, adopting the “first in first out” principle. It is arranged from top to bottom
and in accordance with the execution order of command menus.

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The descriptions about menu are based on the maximized configuration, for a specific project, if
some function is not available, the corresponding submenu will be hidden.

3.2.2 View Device Measurements

This menu is used to display real-time measured values, including AC voltage, AC current, phase
angle and calculated quantities. These data can help users to acquaint the device′s status.
3 This menu comprises following submenus.

No. Item Function description

Display primary voltage, current, phase angle and calculated quantities. It has several
1 Primary Values submenus, General_Values, Angle_Values, SeqComponent_Values, Power_Values,
Power_Values.

Display secondary voltage, current, phase angle and calculated quantities. It has
2 Secondary Values several submenus, General Values, Angle Values, SeqComponent Values, Power
Values, Power Values.

3 Function Values Display function calculated quantities.

4 GOOSE Values Display quantities received from GOOSE.

5 Energy Metering Display metering values of active and reactive energy.

6 Power Quality Display quantities of power quality.

7 UserDef Values Display quantities of user configured.

The operation to view the measurements is as follows:

1. Press the “MENU” to enter the main menu;

2. Press the “▲” or “▼” to move the cursor to the “Measurements” menu, and then press the
“ENT” or “►” to enter the menu;

3. Press the “▲” or “▼” to move the cursor to any command menu, and then press the “ENT” to
enter the menu;

4. Press the “▲” or “▼” to page up/down (if all information cannot be displayed in one display
screen, one screen can display 14 lines of information at most);

5. Press the “◄” or “►” to select pervious or next command menu;

6. Press the “ENT” or “ESC” to exit this menu (returning to the “Measurements” menu).

3.2.3 View Device Status

This menu is mainly used to display the state of binary inputs (including binary inputs via opto-
coupler and GOOSE binary inputs) and alarm signals in the device. This menu and “Analog” menu
fully reflect the running environment of the device. This menu is set to greatly facilitate the
debugging and maintenance of people on site.
Enter the menu through the MENU of the panel, select status to enter the status view interface.

This menu comprises the following submenus.

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No. Item Function description

Display all input signal states. It has several submenus such as


1 Inputs
Contact_Inputs, GOOSE_Inputs, etc.

Display all output signal states. It has several submenus such as


2 Outputs
Contact_Outputs, GOOSE_Outputs, etc.

3 Superv States
Display supervision alarm states. It has several submenus such as
Device_Superv, GOOSE_Superv, SV_Superv, etc.
3
4 Logic Links Status Display logic links status

5 Running Status Display running status

6 UserDef Status Display UserDef status

The operation to view the status is as follows:

1. Press the “MENU” to enter the main menu;

2. Press the key “▲” or “▼” to move the cursor to the “Status” menu, and then press the
“ENT” or “►” to enter the menu.

3. Press the key “▲” or “▼” to move the cursor to any command menu item, and then press
the key “ENT” to enter the submenu.

4. Press the “▲” or “▼” to page up/down (if all information cannot be displayed in one display
screen, one screen can display 14 lines of information at most).

5. Press the key “◄” or “►” to select pervious or next command menu.

6. Press the key “ENT” or “ESC” to exit this menu (returning to the “Status” menu).

3.2.4 View Device Records

The device can store the latest 1024 time-stamped disturbance records, 1024 time-stamped binary
events, 1024 time-stamped supervision events, 256 time-stamped control logs and 1024 time-
stamped device logs. All the records are stored in non-volatile memory, and when the available
space is exhausted, the oldest record is automatically overwritten by the latest one.

This menu is used to display all kinds of records, including the disturbance records, supervision
events, binary events and device logs, so that the operator can load to view and use as the
reference of analyzing accidents and repairing the device. All records are stored in non-volatile
memory, it can still record them even if it loses its power.

Enter the menu through the MENU of the panel, select records to enter the records view interface.

This menu comprises the following submenus.

No. Item Function description


When any protection element operates or drops out, such as fault detector,
distance protection etc., they will be logged in event records. Disturbance
1 Disturb Records
records include signal name, its value before and after changing, and the
time precision is up to 1ms.

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The device is under automatic supervision all the time. If there are any failure or
abnormal condition detected, such as, chip damaged, VT circuit failure and so
2 Superv Events
on, it will be logged in event records. Supervision events include signal name, its
value before and after changing, and the time precision is up to 1ms.
When there is a binary input is energized or de-energized, i.e., its state has
changed from “0” to “1” or from “1” to “0”, it will be logged in event records. Binary
3 IO Events
3 events include signal name, its value before and after changing, and the time
precision is up to 1ms.
If an operator executes some operations on the device, such as reboot protective
device, modify setting, etc., they will be logged in event records. Device logs
4 Device Logs
include signal name, its value before and after changing, and the time precision
is up to 1ms.
When an operator executes a control command via local LCD, PCS-Studio or
communication client, it will be logged in control logs. Control logs include time
5 Control Logs
stamp, controlled object, control origination, control position, operation condition,
interlocking condition, control command and operation result.
When an operator executes a regulation command via local LCD, PCS-Studio or
communication client, it will be logged in regulation logs. Regulation logs include
6 Regulation Logs
time stamp, controlled object, control origination, operation condition ,and
operation result.
7 Clear Records Clear all records

The operation to view the records is as follows:

1. Press the “MENU” to enter the main menu;

2. Press the “▲” or “▼” to move the cursor to the “Records” menu, and then press the “ENT”
or “►” to enter the menu;

3. Press the “▲” or “▼” to move the cursor to any command menu, and then press the “ENT”
to enter the menu;

4. Press the “▲” or “▼” to page up/down;

5. Press the “+” or “-” to select pervious or next record;

6. Press the “◄” or “►” to select pervious or next command menu;

7. Press the “ENT” or “ESC” to exit this menu (returning to the “Records” menu).

Before putting into operation, we can clear all the reports during commissioning, the operation to
clear the records is as follows:

1. Press the “MENU” to enter the main menu;

2. Press the “▲” or “▼” to move the cursor to the “Records” menu, and then press the “ENT”
or “►” to enter the menu;

3. Press the “▲” or “▼” to move the cursor to the “Clear Records” menu, and then press
the “ENT”.

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The operation of deleting device message will delete all messages saved
by the protection device, including disturbance records, supervision events,
binary events, but not including device logs. Furthermore, the message is
irrecoverable after deletion, so the application of the function shall be
cautious. 3
Shortcut for clearing record: Exit the main menu, press the “+”, “-”, “+”,
“-” and “ENT”.

3.2.5 Delete Device Records

The operation is as follows:

1. Exit the main menu;

2. Press the “+”, “-”, “+”, “-” and “ENT”; Press the “ESC” to exit this menu (returning to
the original state). Press the “ENT” to carry out the deletion.

Press <ENT> To Clear


Press <ESC> To Exit

Figure 3.2-3 Delete device records

The operation of deleting device message will delete all messages saved
by the protection device, including disturbance records, supervision events,
binary events, but not including device logs. Furthermore, the message is
irrecoverable after deletion, so the application of the function shall be
cautious.

3.2.6 View Device Setting

This menu is used to check the device setup, system parameters, protection settings and logic links
settings, as well as modifying any of the above setting items. Moreover, it can also execute the
setting copy between different setting groups.

This menu comprises the following submenus.

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No. Item Function description

1 Global Settings Check or modify the system parameters

2 Protection Settings Check or modify the protection settings

3 Meas Control Settings Check or modify the measurement and control settings

Check or modify the logic links settings, including function links, SV links,
4 Logic Links
3 GOOSE links and spare links

5 Copy Settings Copy setting between different setting groups

The operation to view the settings is as follows:

1. Press the “MENU” to enter the main menu;

2. Press the “▲” or “▼” to move the cursor to the “Settings” menu, and then press the “ENT”
or “►” to enter the menu;

3. Press the “▲” or “▼” to move the cursor to any command menu, and then press the “ENT”
to enter the menu;

4. Press the “▲” or “▼” to move the cursor;

5. Press the “+” or “-” to page up/down;

6. Press the “◄” or “►” to select pervious or next command menu;

7. Press the “ESC” to exit this menu (returning to the menu “Settings”).

3.2.7 Modify Device Setting

The operation to modify the settings is as follows:

1. Press the “MENU” to enter the main menu;

2. Press the “▲” or “▼” to move the cursor to the “Settings” menu, and then press the “ENT”
or “►” to enter the menu;

3. Press the “▲” or “▼” to move the cursor to any command menu, and then press the “ENT”
to enter the menu;

4. Press the “▲” or “▼” to move the cursor;

5. Press the “+” or “-” to page up/down;

6. Press the “◄” or “►” to select pervious or next command menu;

7. Press the “ESC” to exit this menu (returning to the menu “Settings”);

8. If selecting the command menu “System Settings”, move the cursor to the setting item
to be modified, and then press the “ENT”;

Press the “+” or “-” to modify the value (if the modified value is of multi-bit, press the “◄”
or “►” to move the cursor to the digit bit, and then press the “+” or “-” to modify the
value), press the “ESC” to cancel the modification and return to the displayed interface of

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the command menu “System Settings”. Press the “ENT” to automatically exit this menu
(returning to the displayed interface of the command menu “System Settings”).

Move the cursor to continue modifying other setting items. After all setting values are
modified, press the “◄”, “►” or “ESC”, and the LCD will display “Save or Not?”. Directly
press the “ESC” or press the “◄” or “►” to move the cursor. Select the “Cancel”, and then
press the “ENT” to automatically exit this menu (returning to the displayed interface of the
command menu “System Settings”). 3
Press the “◄” or “►” to move the cursor. Select “No” and press the “ENT”, all modified
setting item will restore to its original value, exit this menu (returning to the menu
“Settings”).

Press the “◄” or “►” to move the cursor to select “Yes”, and then press the “ENT”, the
LCD will display password input interface.

Password:

____

Figure 3.2-4 Password diagram1

Input a 4-bit password (“+”, “◄”, “▲” and “-”). If the password is incorrect, continue
inputting it, and then press the “ESC” to exit the password input interface and return to the
displayed interface of the command menu “System Settings”. If the password is correct,
LCD will display “Save Setting Now…”, and then exit this menu (returning to the displayed
interface of the command menu “System Settings”), with all modified setting items as
modified values.

For different setting items, their displayed interfaces are different, but their modification
methods are the same. The following is ditto.

9. If selecting the submenu “Protection Settings”, and press “ENT” to enter. After selecting
different command menu, the LCD will display the following interface: (take “BFP Settings”
as an example)

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BFP Settings

Please Select Group for Config

Active Group: 01

Selected Group: 01

Figure 3.2-5 Modify setting diagram2

Press the “+” or “-” to modify the value, and then press the “ENT” to enter it. Move the
cursor to the setting item to be modified, press the “ENT” to enter.

Take the setting [CB1. 50BF.I_Set] as an example is selected to modify, then press the
“ENT” to enter and the LCD will display the following interface. Press “+” or “-” to modify
the value and then press the “ENT” to confirm.

CB1. 50BF.I_Set

Current Value 0.200

Modified Value 0.250


5

Min Value 0.050

Max Value 200.000

Figure 3.2-6 Modify setting diagram3

After modifying protection settings in current active setting group or system


parameters of the device, the “HEALTHY” LED indicator the device will be
lit off, and the MON module will check the new settings. If the abnormality
is detected during the setting check, corresponding alarm signals will be
issued. Moreover, if the critical error is detected, the device will be blocked.

3.2.8 Copy Device Setting


The operation to copy the settings is as follows:

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1. Press the “MENU” to enter the main menu;

2. Press the “▲” or “▼” to move the cursor to the “Settings” menu, and then press the “ENT”
or “►” to enter the menu;

3. Press the “▲” or “▼” to move the cursor to the command menu “Copy Settings”, and
then press the “ENT” to enter the menu.

3
Copy Settings

Active Group: 01

Copy To Group: 02

Figure 3.2-7 Copy settings diagram

Press the “+” or “-” to modify the value. Press the “ESC” and return to the menu “Settings”. Press
the “ENT”, the LCD will display the interface for password input, if the password is incorrect,
continue inputting it, press the “ESC” to exit the password input interface and return to the menu
“Settings”. If the password is correct, the LCD will display “Settings Copied!”, and exit this menu
(returning to the menu “Settings”).

3.2.9 Print

The device can print out settings, device information, etc., through a directly connected
parallel port printer. The operation is as follows:

1. Press the “MENU” to enter the main menu;

2. Press the “▲” or “▼” to move the cursor to the “Print” menu, and then press the “ENT” or
“►” to enter the menu;

3. Press the “▲” or “▼” to move the cursor to any command menu, and then press the “ENT”
to enter the menu;

 Selecting the “Disturb Records”, and then press the “+” or “-” to select pervious
or next record. After pressing the key “ENT”, the LCD will display “Start Printing...”,
and then automatically exit this menu (returning to the menu “Print”). If the printer
does not complete its current print task and re-start it for printing, and the LCD will
display “Printer Busy…”. Press the key “ESC” to exit this menu (returning to the menu
“Print”).

 Selecting the command menu “Superv Events” or “IO Events”, and then press the
key “▲” or “▼” to move the cursor. Press the “+” or “-” to select the starting and

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ending numbers of printing message. After pressing the key “ENT”, the LCD will
display “Start Printing…”, and then automatically exit this menu (returning to the menu
“Print”). Press the key “ESC” to exit this menu (returning to the menu “Print”).

4. If selecting the command menu “Device Info”, “Device Status” or “IEC103 Info”, press
the key “ENT”, the LCD will display “Start printing..”, and then automatically exit this menu
(returning to the menu “Print”).
3 5. If selecting the “Settings”, press the key “ENT” or “►” to enter the next level of menu.

6. After entering the submenu “Settings”, press the key “▲” or “▼” to move the cursor, and
then press the key “ENT” to print the corresponding default value. If selecting any item to
printing:

Press the key “+” or “-” to select the setting group to be printed. After pressing the key
“ENT”, the LCD will display “Start Printing…”, and then automatically exit this menu
(returning to the menu “Settings”). Press the key “ESC” to exit this menu (returning to the
menu “Settings”).

7. After entering the submenu “Waveforms”, press the “+” or “-” to select the waveform
item to be printed and press “ENT” to enter. If there is not any waveform data, the LCD
will display “No Waveform Data!” (Before executing the command menu “Waveforms”, it
is necessary to execute the command menu “Trig Oscillograph” in the menu “Local
Cmd”, otherwise the LCD will display “No Waveform Data!”). With waveform data existing:

Press the key “+” or “-” to select pervious or next record. After pressing the key “ENT”,
the LCD will display “Start Printing…”, and then automatically exit this menu (returning to
the menu “Waveforms”). If the printer does not complete its current print task and re-start
it for printing, and the LCD will display “Printer Busy…”. Press the key “ESC” to exit this
menu (returning to the menu “Waveforms”).

3.2.10 Local Command

This menu is used to input several commands to the device, such as reset target, trigger
oscillograph, change setting group, etc.

This menu comprises the following submenus.

No. Item Function description

1 Reset Target Reset Target, the same function with shortcut key of “Target Reset”

Trigger the recording manually, then the device will record the analog and
2 Trig Oscillograph
digital quantities, and form a disturb record

3 Enable Download Used to enable before downloading

4 Change Setting Grp Switch setting group

5 Clear Counter Clear Counter of GOOSE, SV, etc.

5 Regulate Regulate command, and change Mode for 61850 Ed 2.0

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3.2.11 Switch Setting Group


The operation to switch setting group is as follows:

1. Press the “MENU” to enter the main menu;

2. Press the “▲” or “▼” to move the cursor to the “Local Cmd” menu, and then press the
“ENT” or “►” to enter the menu;

3. Press the “▲” or “▼” to move the cursor to the command “Change Setting Grp”, and
3
then press the “ENT”;

Change Active Group

Active Group: 01

Change To Group: 02

Figure 3.2-8 Change active group diagram

Press the “+” or “-” to modify the value, and then press the “ESC” to exit this menu (returning to
the main menu). After pressing the “ENT”, the LCD will display the password input interface. If the
password is incorrect, continue inputting it, and then press the “ESC” to exit the password input
interface and return to its original state. If the password is correct, the “HEALTHY” indicator lamp
of the protection device will go out, and the protection device will re-check the protection setting. If
the check doesn’t pass, the protection device will be blocked. If the check is successful, the LCD
will return to its original state.

Active setting group is listed in “System Settings” as a setting named


[Active_Grp], So Setting Group can be switched as modifying a normal
setting.

3.2.12 View Device Information

This menu is used to view the device version, board, and selection.
Enter the menu through the MENU of the panel, select Information to enter the information view
interface.

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This menu comprises the following submenus.

No. Item Description

1 Version Info Display program Info, MON Info, Configuration Info

2 Board Info Display state of all boards

3 MOT Info Display MOT code


3 The operation is as follows:

1. Press the “MENU” to enter the main menu.

2. Press the “▲” or “▼” to move the cursor to the “Information” menu, and then press the
“ENT” to enter the submenu.

3. Press the key “▲” or “▼” to move the cursor to the command menu “Version Info”, and
then press the key “ENT” to display the software version.

4. Press the “ESC” to return to the main menu.

3.2.13 Local Control via Menu


Control operation method is introduced as below:

1. Press the key “MENU” to enter the main menu.

2. Press the key “▲” or “▼” to move the cursor to the command menu “Local Cmd”, and
then press the key “ENT” to enter submenus. Press the key “▲” or “▼” to move the cursor
to the command menu “Control”, and then press the key “ENT” to enter and the following
display will be shown on LCD.

Password:
000

Figure 3.2-9 Password diagram 2

Input a 3-bit password (“111”). If the password is incorrect, continue inputting it, and then press the
“ESC” to exit the password input interface and return to the displayed interface of the command
menu “Control”. If the password is correct, it will go to the following step.

3. Press the key “▲” or “▼” to move the cursor to the control object and press the key “ENT”
to select control object.

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Control
Step1: select Control Object
1. CSWI01
2. CSWI02
3. CSWI03
4. CSWI04
5.
6.
CSWI05
CSWI06 3
7. CSWI07
8. CSWI08
9. CSWI09
10. CSWI10

Figure 3.2-10 Control diagram 1

4. Press the key “◄” or “►” to select control command press the key “ENT” to the next step.

Three control commands are optional:

1) Open (Lower): Remote open

2) Close (Raise): Remote close

3) Stop: Reserved

CSWI01
Step2: select Control Command

Open(Lower) Close(Raise) (Stop)

NoCheck SynchroCheck DeadCheck


LoopCheck EF Line Selection

InterlockChk InterlockNotChk

Select Execute Cancel

Result

Figure 3.2-11 Control diagram 2

5. Press the key “◄” or “►” to select synchronism check mode and press the key “ENT” to
the next step.

Five synchronism check modes are optional:

1) NoCheck: Without any check

2) SynchroCheck: Synchronism-check mode

3) DeadCheck: Dead check mode

4) LoopCheck: Reserved

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5) EF Line Selection: Reserved

CSWI01
Step3: select Execution Condition

Open(Lower) Close(Raise) (Stop)

3 NoCheck
LoopCheck
SynchroCheck
EF Line Selection
DeadCheck

InterlockChk InterlockNotChk

Select Execute Cancel

Result

Figure 3.2-12 Control diagram 3

6. Press the key “◄” or “►” to select interlock mode and press the key “ENT” to next step.

Two interlock check modes are optional:

1) InterlockChk: Check interlocking criteria

2) InterlockNotChk: Not check interlocking criteria

CSWI01
Step4: select Interlock Condition

Open(Lower) Close(Raise) (Stop)

NoCheck SynchroCheck DeadCheck


LoopCheck EF Line Selection

InterlockChk InterLockNotChk

Select Execute Cancel

Result

Figure 3.2-13 Control diagram 4

7. Press the key “◄” or “►” to select control type and press the key “ENT”.

As shown in the following figure, operation results will be shown after “Result” at the bottom of the
LCD.

Three synchronism control types are optional:

1) Select: Select control object

2) Execute: Execute control operation

3) Cancel: Cancel control operation

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CSWI01
Step5: select Control Type

Open(Lower) Close(Raise) (Stop)

NoCheck SynchroCheck DeadCheck


LoopCheck EF Line Selection

InterlockChk InterLockNotChk
3
Select Execute Cancel

Result

Figure 3.2-14 Control diagram 5

“Execute” operation should be operated after “Select” operation.

3.2.14 Local Control via SLD

The control operation (close or open) also can be executed on the single line diagram (SLD) of the
default display under normal operation condition. The signs of the circuit breaker (abbreviated as
CB) and switch (DS or ES) are listed in the following table.

Sign Explanation Sign Explanation

Position of CB: Open Position of switch: Open

Position of CB: Closed Position of switch: Closed

Position of CB: Intermediate state Position of switch: Intermediate state

Position of CB: Bad state Position of switch: Bad state

An example of normal display with SLD is shown in the following figure. The single line diagram of
the default display on the LCD is shown as below when the device is in normal situation if this
device adopts the single line diagram as default display.

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S Addr:150 2020-11-28 10:10:00 Group 01

Bus1

Bus2

M011 M0112

3
M0131

M01

M0151

M0171
Feeder M01

Figure 3.2-15 Control diagram 6

In SLD display, press "▲" or "▼" to select a switchgear to be opened/closed, and then press key
"ENT" to control selected CB/switch. After the selection of an open or close operation, the
confirmation window will be valid for a short duration after inputting the correct control password.
This password is configurable by the setting [Ctrl_Password] in the menu “Device Settings”. A
control operation result of success or fail will be returned at last.

1) The selected object will be framed in a dotted line.

Step 1: Select the control object

Figure 3.2-16 Control diagram 7

2) Note: From the last step, press “ENT” to popup this operation selection window.

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Step 1: Select the control object

CSWI**

Open Close 3

Figure 3.2-17 Control diagram 8

3) Consult or modify the password through [Ctrl_Password] in "Device Settings".

Step 3: Enter the control password

CSWI** open/close

Password: xxx

Figure 3.2-18 Control diagram 9

4) Use "←", "→" and "ENT" to confirm or cancel the control operation.

Step 4: Confirm/Cancel the control operation

CSWI** open/close

Open Close

Figure 3.2-19 Control diagram 10

5) Check the operation success or fail result from the control report.

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Step 5: Check the control operation result

CSWI** open/close

3 Op success (or Op fail)

Figure 3.2-20 Control diagram 11

3.2.15 Control with Open/Close Buttons

In SLD display, press "▲" or "▼" to select a switchgear to be opened/closed, and then press key
"ENT" to control selected CB/switch. Press the open or close button on the HMI panel and the
confirmation window will be valid for a short duration after inputting the correct control password.
This password is configurable by the setting [Ctrl_Password] in the menu “Device Settings”. A
control operation result of success or fail will be returned at last.

1) The selected object will be framed in a dotted line.

Step 1: Select the control object

Figure 3.2-21 Control diagram 12

2) From the last step, press a control button to popup this window. Consult or modify the
password through [Ctrl_Password] in "Device Settings".

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Step 3: Enter the control password

CSWI** open/close

Password: xxx
3

Figure 3.2-22 Control diagram 13

3) Use "←", "→" and "ENT" to confirm or cancel the control operation.

Step 4: Confirm/Cancel the control operation

CSWI** open/close

Open Close

Figure 3.2-23 Control diagram 14

4) Check the operation success or fail result from the control report.

Step 5: Check the control operation result

CSWI** open/close

Op success (or Op fail)

Figure 3.2-24 Control diagram 15

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3.2.16 Communication Test


The operation is as follows:

1. Press the key “MENU” to enter the main menu.

2. Press the key “▲” or “▼” to move the cursor to the “Test” menu, and then press the key
“ENT” or “►” to enter the menu.
3 3. Press the key “▲” or “▼” to move the cursor to the submenu “Device Test”, and then
press the key “ENT” to enter the submenu, to select test item. If “Disturb Events” “Superv
Events” or “IO Events” is selected, two options “All Test” and “Select Test” are provided.

4. Press the key “▲” or “▼” to move the cursor to select the corresponding command menu
“All Test” or “Select Test”. If selecting the “All Test”, press the “ENT”, and the device will
successively carry out all operation element message test one by one.

5. If “Select Test” is selected, press the key “ENT”. Press the “+” or “-” to page up/down,
and then press the key “▲” or “▼” to move the scroll bar. Move the cursor to select the
corresponding protection element. Press the key “ENT” to execute the communication test
of this protection element, the substation automatic system (SAS) will receive the
corresponding message.

If no input operation is carried out within 60s, exit the communication


transmission and return to the “Test” menu, at this moment, the LCD will
display “Communication Test Timeout and Exiting...”.

Press the key “ESC” to exit this menu (returning to the menu “Test”, at this moment, the LCD will
display “Communication Test Exiting…”.

3.2.17 Modify Device Clock


The operation is as follows:

1. Press the key “MENU” to enter the main menu;

2. Press the “▲” or “▼” to move the cursor to the “Clock” menu, and then press the “ENT”
to enter clock display

3. Press the “▲” or “▼” to move the cursor to the date or time to be modified;

4. Press the “+” or “-” to modify value, and then press the “ENT” to save the modification and
return to the main menu;

5. Press the “ESC” to cancel the modification and return to the main menu.

Move the cursor to select the item “Format” to setup time display format.

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Press the “+” or “-” to modify from the following options.

1. YYYY-MM-DD (Default display format)

2. YYYY/MM/dd

3. DD-MM-YYYY

4. DD/MM/YYYY
3
5. MM-DD-YYYY

6. MM/DD/YYYY

Clock

Year: 2020
Month: 11
Day: 28
Hour: 20
Minute: 59
Format: YYYY/MM/DD

Figure 3.2-25 Modify device clock

3.2.18 Select Language

The operation is as follows:

1. Press the key “MENU” to enter the main menu.

2. Press the key “▲” or “▼” to move the cursor to the command menu “Language”, and
then press the key “ENT” to enter the menu and the following display will be shown on
LCD.

Please Select Language:

1. 中文
2. English Configured by
3. XXXX PCS-Stuido

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Figure 3.2-26 Select language

3. Press the key “▲” or “▼” to move the cursor to the language user preferred and press the
key “ENT” to execute language switching. After language switching is finished, LCD will
return to the menu “Language”, and the display language is changed. Otherwise, press
the key “ESC” to cancel language switching and return to the menu “Language”.

3
LCD interface provided in this chapter is only a reference and available for
explaining specific definition of LCD. The displayed interface of the actual
device may be some different from it, so you shall be subject to the actual
protection device.

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4 PCS-Studio Operation

4 PCS-Studio Operation

Table of Contents

4.1 Overview........................................................................................................... 4-1


4.2 View Device Measurements ............................................................................ 4-2
4.3 View Device Status .......................................................................................... 4-2
4
4.4 View Settings ................................................................................................... 4-3
4.5 Modify Settings ................................................................................................ 4-3
4.6 View Disturb Records ...................................................................................... 4-5
4.7 Waveform Upload ............................................................................................ 4-5
4.8 Switch Setting Group ...................................................................................... 4-6

List of Figures

Figure 4.1-1 TelDevice interface ................................................................................................ 4-1

Figure 4.2-1 Measurement diagram ........................................................................................... 4-2

Figure 4.3-1 Status diagram ....................................................................................................... 4-2

Figure 4.4-1 View settings diagram ........................................................................................... 4-3

Figure 4.5-1 Modify settings diagram 1..................................................................................... 4-4

Figure 4.5-2 Modify settings diagram 2..................................................................................... 4-4

Figure 4.5-3 Modify settings diagram 3..................................................................................... 4-4

Figure 4.5-4 Modify settings diagram 4..................................................................................... 4-5

Figure 4.6-1 View disturb records diagram .............................................................................. 4-5

Figure 4.7-1 Waveform upload diagram 1 ................................................................................. 4-6

Figure 4.7-2 Waveform upload diagram 2 ................................................................................. 4-6

Figure 4.8-1 Setting group diagram........................................................................................... 4-7

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4.1 Overview

The device can be remotely debugged through the TelDevice tool integrated in PCS-Studio.
Connect the commissioning laptop with the device through an Ethernet cable. Then open PCS-
Studio tool and select “Tools” →“Online Status Tool” →“TelDevice”, type device name and
device address to connect with the device. After connected, it will display as below:

Zone 1 Zone 2 Zone 3

Figure 4.1-1 TelDevice interface

The TelDevice interface is consist of 3 zones:

Zone 1: LED status display zone: which is used to display the LED status of the device. If no LED
is configured in the PCS-Studio tool, only the default Healthy and Alarm LED will be
displayed here.

Zone 2: Menu display zone: which is used to display the corresponding submenu of this device.

Zone 3: Detailed information display zone: which is used to display specific information under the
submenu.

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4.2 View Device Measurements

Click “Device Name”“Measurements" in the menu bar to view analog quantities.

Figure 4.2-1 Measurement diagram

4.3 View Device Status

Click "Status" in the menu bar to view the digital quantities.

Figure 4.3-1 Status diagram

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4.4 View Settings

Through the PCS-Studio tool user can view the setting value.

Figure 4.4-1 View settings diagram

4.5 Modify Settings

Through the PCS-Studio tool user can modify the setting value.
Take the modification of CB1. 50BF.I_Set as an example.
1. Select “Settings” → “Protection Settings” → “BFP Settings” in the menu.

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Figure 4.5-1 Modify settings diagram 1

2. Modify [CB1. 50BF.I_Set] from “1.000” to “2.000” .

Figure 4.5-2 Modify settings diagram 2

3. Right click on zone 3 and select “Download”.

Figure 4.5-3 Modify settings diagram 3

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4. Click sequentially on the simulated keyboard (+ ← ↑ -) and then click on “ENT”.

4
Figure 4.5-4 Modify settings diagram 4

4.6 View Disturb Records

Click “Records” → “Disturb Records” to view records.

Figure 4.6-1 View disturb records diagram

4.7 Waveform Upload

Right click on a disturb records and select “Records”, the tool will upload waveform. After the
waveform upload is completed, it will be automatically opened. Wave files are saved in the file
“PCS-Studio-Customer\bin\wave\directory\”.

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Figure 4.7-1 Waveform upload diagram 1

Figure 4.7-2 Waveform upload diagram 2

4.8 Switch Setting Group

The device can switch the setting group by modifying “Active_Grp” in “Settings”-> “Global

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Settings”-> “System Settings”.

Figure 4.8-1 Setting group diagram

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5 Test Preparation

Table of Contents

5.2 Test Principle ................................................................................................... 5-1


5.3 Test Considerations ........................................................................................ 5-1
5.4 Test Equipment ................................................................................................ 5-2
5.5 Setting Familiarization .................................................................................... 5-3
5.6 Connection between IED and PCS-Studio ..................................................... 5-3 5

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5.1 Overview

This relay is fully numerical in their design, implementing all protection and non-protection functions
in software. The relay employs a high degree of self-checking and in the unlikely event of a failure,
will give an alarm. Because of this, the commissioning test does not need to be as extensive as
with non-numeric electronic or electro-mechanical relays.

To commission numerical relays, it is only necessary to verify that the hardware is functioning
correctly and the application-specific software settings have been applied to the relay.

5.2 Test Principle


5
The acceptance test mainly detects that the hardware of the equipment is intact and whether the
functional configuration meets the requirements of the power grid. This test usually tests all
hardware and software functions of the device Hardware inspection content includes the
appearance, LCD display, LED signal light, CT/VT input circuit, input / output circuit, communication
interface, fiber interface and other circuits or hardware inspection software function test includes
all protection function tests, logic configuration, report display and printing, recording, self-test
information.

The on-site installation and commissioning test mainly check whether the equipment is correctly
set, and verifies that the wiring of all external circuits is correct. The setting test includes the on-
site configuration, the reasonableness and correctness of the protection settings. The external
circuit detection can detect the correctness of the sampling circuit by Inject the current and voltage
on the primary side of CT and VT, and the correctness of the tripping, opening, and alarming circuits
through the transmission test.

Periodic maintenance tests during operation mainly check whether the equipment is operating
normally and whether the external circuit is normal.

5.3 Test Considerations

Current transformer secondary circuits must be short-circuited before the


current leads to the device are disconnected.

Only qualified personnel should work on or in the vicinity of this device. The
personnel should be familiar with all safety regulations and service
procedures described in this manual. During operating of electrical device,
certain part of the device is under high voltage. Severe personal injury and

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5 Test Preparation

significant device damage could result from improper behavior.

Before performing any operation on the device, the user should be familiar
with the contents of the safety instructions, the technical parameter chapters,
and the rated parameters marked on the device nameplate.

Special attention needs to be paid to:

⚫ Before making other electrical wiring, you must ensure that the device's grounding post is
reliably connected to the protective ground.

5 ⚫ Hazardous voltages may exist in all circuits and components associated with the unit's
power supply and sampling circuits, and even when the power is disconnected, dangerous
voltages (in storage capacitors) may exist.

⚫ During the debugging process, the input voltage and current must be within the range
specified in the technical parameter table, and must not exceed the specified range.

⚫ When the device is tested with a secondary test device, it must be ensured that no other
AC quantities are added.

⚫ Unless otherwise specified, it is necessary to disconnect the trip / close circuit connected
to the circuit breaker or other primary switch from the device.

⚫ Because the CT secondary circuit may generate high voltage that may cause personal
injury or damage the equipment, it is necessary to ensure that the CT secondary circuit
must be shorted before disconnecting the current Inputted to the device.

5.4 Test Equipment

The minimum recommended equipment is a multifunctional three-phase AC current and voltage


injection test set featuring:

⚫ Controlled three-phase AC current and voltage sources,

⚫ Transient (dynamic) switching between pre-fault and post-fault conditions (to generate
delta conditions),

⚫ Integrated or separate variable DC supply (0 - 250 V)

⚫ Integrated or separate AC and DC measurement capabilities (0-440V AC, 0-250V DC)

⚫ Integrated and/or separate timer,

⚫ Integrated and/or separate test switches.

In addition, user will need:

⚫ A portable computer, installed with appropriate software to liaise with the equipment under

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5 Test Preparation

test (EUT). Typically this software will be proprietary to the product’s manufacturer (for
example PCS-Studio).

⚫ Suitable electrical test leads.

5.5 Setting Familiarization

The device has several sets of protection settings to correspond to different system operation
modes. Only a set of current settings is effective. However, communication settings, system
settings, device settings, logical link settings, and measurement and control settings are common.

Device global settings include system settings, equipment settings, communication settings,
recording settings, clock synchronization settings, and alarm settings.
5
The device measurement and control settings include function settings, synchronization settings,
dual position settings, control settings, interlocking values, and power settings.

5.6 Connection between IED and PCS-Studio

Device commissioning software is PCS-Studio. The software can connect with the device through
an ethernet cable directly. The IP address of the console port on the front side of the device is fixed
as 100.100.100.100. Through the connection of the tool and the device, operations such as
remotely checking data and setting values, modifying the setting values, and uploading the record
waves can be realized.

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5 Test Preparation

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6 Check before Power On

6 Check before Power On

Table of Contents

6.1 Visual inspection ............................................................................................. 6-1


6.2 Insulation check............................................................................................... 6-1
6.3 External wiring ................................................................................................. 6-2
6.4 Auxiliary power ................................................................................................ 6-2

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6 Check before Power On

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6 Check before Power On

6.1 Visual inspection

After unpacking the product, check for any damage to the relay case. If there is any damage, the
internal module might also have been affected, contact the vendor. The following items listed is
necessary.

⚫ Protection panel

Carefully examine the protection panel, protection equipment inside and other parts inside to
see that no physical damage has occurred since installation.

The rated information of other auxiliary protections should be checked to ensure it is correct
for the installation.

⚫ Panel wiring

Check the conducting wire which is used in the panel to assure that their cross section meeting 6
the requirement.

Carefully examine the wiring to see that they are no connection failure exists.

⚫ Label

Check all the isolator binary inputs, terminal blocks, indicators, switches and push buttons to
make sure that their labels meet the requirements of this project.

⚫ Equipment plug-in modules

Check each plug-in module of the equipment on the panel to make sure that they are well
installed into the equipment without any screw loosened.

⚫ Earthing cable

Check whether the earthing cable from the panel terminal block is safely screwed to the panel
steel sheet.

⚫ Switch, keypad, isolator binary inputs and push button

Check whether all the switches, equipment keypad, isolator binary inputs and push buttons
work normally and smoothly.

6.2 Insulation check

Insulation resistance tests are only necessary during commissioning if it is required for them to be
done and they have not been performed during installation.

Isolate all wiring from the earth and test the isolation with an electronic or brushless insulation tester
at a DC voltage not exceeding 500V, the circuits need to be tested should include:

⚫ Voltage transformer circuits

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6 Check before Power On

⚫ Current transformer circuits

⚫ DC power supply

⚫ Optic-isolated control inputs

⚫ Output contacts

⚫ Communication ports

The insulation resistance should be greater than 100MΩ at 500V.

Test method:

To unplug all the terminals sockets of this relay, and do the Insulation resistance test for each circuit
above with an electronic or brushless insulation tester.

On completion of the insulation resistance tests, ensure all external wiring is correctly reconnected
to the protection.
6

There is an integrated circuit chip in the communication interface, and it is


forbidden to perform insulation test on it to avoid damaging the
communication interface of the device.

6.3 External wiring

Check whether the external wiring of the device is consistent with the device wiring diagram and
engineering design drawing, and at the same time ensure that the actual phase sequence of the
wiring is the same as the pre-designed phase sequence.

Check the wiring against the installation principle drawing to ensure that the wiring is consistent
with the customer's actual application.

6.4 Auxiliary power

The device can work normally with DC/AC power supply, and the power supply voltage depends
on the rated power supply parameters. The input power supply voltage must be within the range
specified in the following table to ensure the normal operation of the device.

The power supply module NR6310A and NR6305A supports external


power source whose voltage level is DC110V/125V/220V/250V or
AC100V/110V/115V/120V/127V/220V/230V/240V/250V.

The power supply module NR6311A supports external power source

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6 Check before Power On

whose voltage level is DC24V/30V/48V/60V.

NR6310A /NR6305A DC Supply AC Supply

110Vdc/125Vdc/ 100Vac/110Vac/115Vac/120Vac/
Rated voltage
220Vdc/250Vdc 127Vac/220Vac/230Vac/240Vac/250Vac
IEC 61000-4-11:2017
IEC 61000-4-29:2000
IEC 61000-4-29:2000
Permissible voltage range
IEC 60255-26:2013
88~300Vdc
≤15% of the nominal auxiliary voltage

NR6311A DC Supply

24Vdc/30Vdc/
Rated voltage
48Vdc/60Vdc

Permissible voltage range


IEC 61000-4-11:2017
IEC 61000-4-29:2000
6
18~72Vdc

Before powering on the device, make sure that the power supply voltage is
within the specified operating voltage range..

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6 Check before Power On

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7 Check after Energized

7 Check after Energized

Table of Contents

7.1 Program Version .............................................................................................. 7-1


7.2 Date and Time .................................................................................................. 7-1
7.3 LED Indicators ................................................................................................. 7-1
7.4 AC Current Input .............................................................................................. 7-1
7.5 AC Voltage Input .............................................................................................. 7-2
7.6 Binary Inputs .................................................................................................... 7-2
7.7 Binary Outputs ................................................................................................. 7-2
7.8 Clock Synchronization .................................................................................... 7-3
7.9 Communication Connection ........................................................................... 7-3
7

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7 Check after Energized

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7 Check after Energized

7.1 Program Version

Connect the relay to DC power supply correctly and turn the relay on. Check program version and
forming time displayed in command menu to ensure that they are corresponding to what ordered.

7.2 Date and Time

If the time and date is not being maintained by substation automation system, the date and time
should be set manually.

Set the date and time to the correct local time and date using menu item “Clock”.

In the event of the auxiliary supply failing, with a battery fitted on CPU board, the time and date will
be maintained. Therefore, when the auxiliary supply is restored the time and date will be correct
and not need to set again.

To test this, remove the auxiliary supply from the relay for approximately 30s. After being re-
energized, the time and date should be correct.
7
7.3 LED Indicators

On power up, the green LED “HEALTHY” should have illuminated and stayed on indicating that the
relay is healthy.

The relay has latched signal relays which remember the state of the trip when the relay was last
energized from an auxiliary supply. Therefore, these indicators may also illuminate when the
auxiliary supply is applied. If any of these LEDs are on then they should be reset before proceeding
with further testing. If the LED successfully reset, the LED goes out.

Apply the rated DC power supply and check that the “HEALTHY” LED is lighting in green. We need
to emphasize that the “HEALTHY” LED is always lighting in operation course except that the
equipment finds serious errors in it.

Produce one of the abnormal conditions, the “ALARM” LED will light in yellow. When abnormal
condition reset, the “ALARM” LED extinguishes.

Enter the menu "Test"-"HMI Setup"-"SupervLED" to check whether the programmable LEDs are
normal.

7.4 AC Current Input

This test verified that the accuracy of current measurement is within the acceptable tolerances.

Apply rated current to each current transformer input in turn; checking its magnitude using a
multimeter/test set readout. The corresponding reading can then be checked in the relay menu.

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7 Check after Energized

The measurement accuracy of the protection is 1% or 0.01In. However, an additional allowance


must be made for the accuracy of the test equipment being used.

While the CT primary is energized, the secondary circuit shall never be


open circuited because extremely dangerous high voltages may arise.

7.5 AC Voltage Input

This test verified that the accuracy of voltage measurement is within the acceptable tolerances.

Apply rated voltage to each voltage transformer input in turn; checking its magnitude using a
multimeter/test set readout. The corresponding reading can then be checked in the relay menu.

The measurement accuracy of the relay is 2.5% or 0.1V. However, an additional allowance must
be made for the accuracy of the test equipment being used.

7
While testing VT secondary circuit and associated secondary equipment,
care shall be exercised to isolate the VT from the circuit being tested to
avoid back charging the VT from the secondary side.

7.6 Binary Inputs

This test checks that all the binary inputs on the equipment are functioning correctly.

The binary inputs should be energized one at a time, see external connection diagrams for terminal
numbers.

Ensure that the voltage applied on the binary input must be within the operating range.

Test method:

The status of each binary input can be viewed using relay menu. Sign “1” denotes an energized
input and sign “0” denotes a de-energized input.

To unplug all the terminals sockets of this protective device, and do the insulation resistance test
for each circuit above with an electronic or brushless insulation tester.

On completion of the insulation resistance tests, ensure all external wiring is correctly reconnected
to the protection.

7.7 Binary Outputs

When the device undergoes an operational check, a tripping pulse is normally obtained on one or

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7 Check after Energized

more of the output contacts and preferably on the test switch. The healthy circuit is of utmost
importance for the protection operation. If the circuit is not provided with a continuous trip-circuit
supervision, it is possible to check that circuit is really closed when the test-plug handle has been
removed by using a high-ohmic voltmeter and measuring between the plus and the trip output. The
measurement is then done through the trip coil of the circuit breaker and therefore the complete
trip circuit is checked.

Enter the menu "Test"-"Device Test"-"Contact Outputs" to check the binary output one by one.

The binary outputs test will trip the switch, and when the binary outputs are
connected to the binary input of other devices, the input of other devices will
be energized.

7.8 Clock Synchronization

Connect the standard time synchronization source to the corresponding interface of the device,
such as IRIG-B, IEEE1588 or SNTP synchronization source. After a few minutes, the "S" mark will
7
display in the upper left corner of the LCD, indicating that the clock of the device is synchronized
normally.

The LED configured for time out of step alarm will be active when the source of the time
synchronization is lost. The device can hold the time for a period and the device has full
functionality without time synchronization, but the clock may have some deviation. The time
source and network connection need to be checked. After troubleshooting, the device keeps
consistent with the time source.

7.9 Communication Connection

The device supports multiple protocols to communicate with the SCADA system. The protocols
include IEC61850 Ed1 & Ed2, Modbus, DNP3.0, and IEC60870-5-103.

Taking IEC61850 as an example, a client-side tool (such as IEDScout) is used to communicate


with the device. After the communication is established, the client can perform signal display and
remote-control operations.

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7 Check after Energized

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8 Protection Function Test

8 Protection Function Test

Table of Contents
8.1 Report Records ................................................................................................ 8-1
8.2 Test Content and Purpose .............................................................................. 8-1
8.3 Differential protection (87L) ............................................................................ 8-1
8.3.1 Setting List ............................................................................................................................ 8-1

8.3.2 Wiring Preparation ................................................................................................................ 8-2

8.3.3 Differential Protection Test ................................................................................................... 8-2

8.3.4 CT Circuit Failure Blocking Current Differential Protection .................................................. 8-8

8.4 DPFC distance protection (21D) ..................................................................... 8-9


8.4.1 Setting List ............................................................................................................................ 8-9

8.4.2 Wiring Preparation ................................................................................................................ 8-9

8.4.3 DPFC distance protection Test ........................................................................................... 8-10


8
8.5 Distance Protection (21L) ............................................................................. 8-12
8.5.1 Setting List .......................................................................................................................... 8-12

8.5.2 Wiring Preparation .............................................................................................................. 8-12

8.5.3 Distance Protection Test ..................................................................................................... 8-13

8.6 Pilot Distance Protection (85) ....................................................................... 8-19


8.6.1 Setting List .......................................................................................................................... 8-19

8.6.2 Wiring Preparation .............................................................................................................. 8-20

8.6.3 Pilot Distance Protection Test ............................................................................................ 8-20

8.7 Pilot Directional Earth-fault Protection (85)................................................. 8-22


8.7.1 Setting List .......................................................................................................................... 8-22

8.7.2 Wiring Preparation .............................................................................................................. 8-22

8.7.3 Pilot Directional Earth-fault Protection Test ........................................................................ 8-22

8.8 Phase Overcurrent Protection (50/51P) ....................................................... 8-24


8.8.1 Setting List .......................................................................................................................... 8-24

8.8.2 Wiring Preparation .............................................................................................................. 8-24

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8 Protection Function Test

8.8.3 Definite-time Phase Overcurrent Test ................................................................................ 8-25

8.8.4 Inverse-time Phase Overcurrent Test................................................................................. 8-26

8.8.5 Voltage Control Element Test ............................................................................................. 8-27

8.8.6 Direction Control Element Test ........................................................................................... 8-29

8.8.7 Harmonic Control Element Test ......................................................................................... 8-31

8.8.8 Abnormal Condition Blocking Test ...................................................................................... 8-32

8.8.9 Dropout Characteristic Test ................................................................................................ 8-33

8.9 Zero-sequence Overcurrent Protection (50/51G) ........................................ 8-36


8.9.1 Settings List ........................................................................................................................ 8-36

8.9.2 Wiring Preparation .............................................................................................................. 8-37

8.9.3 Definite-time Zero-sequence Overcurrent Test .................................................................. 8-37

8.9.4 Inverse-time Zero-sequence Overcurrent Test .................................................................. 8-38

8.9.5 Direction Control Element Test ........................................................................................... 8-39

8.9.6 Harmonic Control Element Test ......................................................................................... 8-41


8 8.9.7 Abnormal Condition Blocking Test ...................................................................................... 8-42

8.9.8 Dropout Characteristic Test ................................................................................................ 8-42

8.10 Negative-sequence Overcurrent Protection (50/51Q) ............................... 8-46


8.10.1 Settings List ...................................................................................................................... 8-46

8.10.2 Wiring Preparation ............................................................................................................ 8-46

8.10.3 Definite-time Negative-sequence Overcurrent Protection Test ........................................ 8-46

8.10.4 Inverse-time Negative-sequence Overcurrent Protection Test ........................................ 8-47

8.10.5 Direction Control Element Test ......................................................................................... 8-49

8.10.6 Abnormal Condition Blocking Test.................................................................................... 8-50

8.10.7 Dropout Characteristic Test .............................................................................................. 8-51

8.11 Switch-On-To-Fault Protection (SOTF) ...................................................... 8-54


8.11.1 Settings List ...................................................................................................................... 8-54

8.11.2 Wiring Preparation ............................................................................................................ 8-55

8.11.3 50PSOTF Initiated by CBPos ........................................................................................... 8-55

8.11.4 50GSOTF Initiated by CBPos .......................................................................................... 8-56

8.11.5 21SOTF Initiated by CBPos ............................................................................................. 8-57

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8 Protection Function Test

8.11.6 50PSOTF Initiated by Auto-Reclose................................................................................. 8-57

8.11.7 50GSOTF Initiated by Auto-Reclose ................................................................................ 8-58

8.11.8 21SOTF Initiated by Auto-Reclose ................................................................................... 8-59

8.12 Phase Overvoltage Protection (59P) .......................................................... 8-61


8.12.1 Settings List ...................................................................................................................... 8-61

8.12.2 Wiring Preparation ............................................................................................................ 8-61

8.12.3 Definite-time Phase Overvoltage Test .............................................................................. 8-61

8.12.4 Inverse-time Phase Overvoltage Test .............................................................................. 8-62

8.12.5 Dropout Characteristic Test .............................................................................................. 8-64

8.13 Residual Overvoltage Protection (59G) ..................................................... 8-65


8.13.1 Settings List ...................................................................................................................... 8-65

8.13.2 Wiring Preparation ............................................................................................................ 8-66

8.13.3 Definite-time Residual Overvoltage Test .......................................................................... 8-66

8.13.4 Dropout Characteristic Test .............................................................................................. 8-67

8.14 Negative-sequence Overvoltage Protection (59Q) .................................... 8-68


8
8.14.1 Settings List ...................................................................................................................... 8-68

8.14.2 Wiring Preparation ............................................................................................................ 8-68

8.14.3 Definite-time Negative-sequence Overvoltage Test ......................................................... 8-68

8.14.4 Dropout Characteristic Test .............................................................................................. 8-69

8.15 Phase Undervoltage Protection (27P) ........................................................ 8-70


8.15.1 Settings List ...................................................................................................................... 8-70

8.15.2 Wiring Preparation ............................................................................................................ 8-71

8.15.3 Definite-time Phase Undervoltage Test ......................................................................... 8-71

8.15.4 Inverse-time Phase Undervoltage Test ............................................................................ 8-72

8.15.5 Dropout Characteristic Test .............................................................................................. 8-73

8.16 Overfrequency Protection (81O)................................................................. 8-75


8.16.1 Settings List ...................................................................................................................... 8-75

8.16.2 Wiring Preparation ............................................................................................................ 8-75

8.16.3 Function Test .................................................................................................................... 8-75

8.17 Underfrequency Protection (81U)............................................................... 8-76

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8 Protection Function Test

8.17.1 Settings List ...................................................................................................................... 8-76

8.17.2 Wiring Preparation ............................................................................................................ 8-76

8.17.3 Function Test .................................................................................................................... 8-77

8.18 Frequency Rate-of-change Protection (81R) ............................................. 8-78


8.18.1 Settings List ...................................................................................................................... 8-78

8.18.2 Wiring Preparation ............................................................................................................ 8-78

8.18.3 Function Test .................................................................................................................... 8-78

8.19 Reverse Power Protection (32R) ................................................................ 8-79


8.19.1 Settings List ...................................................................................................................... 8-79

8.19.2 Wiring Preparation ............................................................................................................ 8-80

8.19.3 Function Test .................................................................................................................... 8-80

8.20 Thermal Overload Protection (49) .............................................................. 8-81


8.20.1 Settings List ...................................................................................................................... 8-81

8.20.2 Wiring Preparation ............................................................................................................ 8-81


8 8.20.3 Thermal Overload Protection Test .................................................................................... 8-82

8.21 Undercurrent Protection (37) ...................................................................... 8-83


8.21.1 Settings List ...................................................................................................................... 8-83

8.21.2 Wiring Preparation ............................................................................................................ 8-83

8.21.3 Function Test .................................................................................................................... 8-83

8.22 Breaker Failure Protection (50BF) .............................................................. 8-84


8.22.1 Settings List ...................................................................................................................... 8-84

8.22.2 Wiring Preparation ............................................................................................................ 8-85

8.22.3 Phase current criterion test .............................................................................................. 8-85

8.22.4 Zero-sequence Current Criterion Test .............................................................................. 8-86

8.22.5 Negative-sequence Current Criterion Test ....................................................................... 8-86

8.22.6 50BF.52b Criterion Test .................................................................................................... 8-87

8.22.7 Three-phases Re-trip Test ................................................................................................ 8-88

8.23 Broken Conductor Protection (46BC) ........................................................ 8-88


8.23.1 Settings List ...................................................................................................................... 8-88

8.23.2 Wiring Preparation ............................................................................................................ 8-89

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8 Protection Function Test

8.23.3 Function Test .................................................................................................................... 8-89

8.24 Pole Discrepancy Protection (62PD) .......................................................... 8-91


8.24.1 Settings List ...................................................................................................................... 8-91

8.24.2 Wiring Preparation ............................................................................................................ 8-91

8.24.3 Function Test .................................................................................................................... 8-91

8.25 Stub Differential Protection (87STB) .......................................................... 8-93


8.25.1 Setting List ........................................................................................................................ 8-93

8.25.2 Wiring Preparation ............................................................................................................ 8-93

8.25.3 Stub Differential Protection Test ....................................................................................... 8-94

8.26 Dead Zone Protection (50DZ)...................................................................... 8-99


8.26.1 Settings List ...................................................................................................................... 8-99

8.26.2 Wiring Preparation ............................................................................................................ 8-99

8.26.3 Function Test .................................................................................................................. 8-100

8.27 Synchronism Check and Automatic Reclose (25/79).............................. 8-101


8.27.1 Settings List .................................................................................................................... 8-101
8
8.27.2 Wiring Preparation .......................................................................................................... 8-102

8.27.3 AR with Synchronism check ........................................................................................... 8-102

8.27.4 Dead Charge Check Test ............................................................................................... 8-105

8.27.5 Reclosing Numbers Control Test .................................................................................... 8-109

8.27.6 Operate time test .............................................................................................................8-110

8.28 Transfer Trip (TT) ........................................................................................ 8-114


8.28.1 Settings List .....................................................................................................................8-114

8.28.2 Wiring Preparation ...........................................................................................................8-114

8.28.3 Function Test ...................................................................................................................8-115

8.29 Impedance-Based Fault Location (FL) ...................................................... 8-116


8.29.1 Settings List .....................................................................................................................8-116

8.29.2 Wiring Preparation ...........................................................................................................8-116

8.29.3 Function Test ...................................................................................................................8-117

8.30 VT Circuit Supervision (VTS) ..................................................................... 8-119


8.30.1 Settings List .....................................................................................................................8-119

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Date: 30 January 2021
8 Protection Function Test

8.30.2 Wiring Preparation .......................................................................................................... 8-120

8.30.3 Function Test .................................................................................................................. 8-120

8.31 CT Circuit Supervision (CTS).................................................................... 8-121


8.31.1 Settings List .................................................................................................................... 8-121

8.31.2 Wiring Preparation .......................................................................................................... 8-122

8.31.3 Function Test .................................................................................................................. 8-122

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8 Protection Function Test

8.1 Report Records

During the operation of the device, it can record the information such as the input position, abnormal
alarm, operation log, as well as fault recording and fault event report. Opening position change and
abnormal alarm information can be cyclically recorded 1024, fault record and fault event report can
be cyclically recorded 64.

Through the MENU → Records → Disturb Records, you can view the fault event report, and you
can find the previous fault event report by pressing the “+” or “-” button. Superv Events or IO
Events can be viewed in the same way.

You can also use a PC with the TelDevice online tool to read device event records and fault records.
By connecting the debug port (RJ45) on the front panel or the communication port on the back
panel, the report records will be automatically sent to the TelDevice. The fault record data is a
standard COMTRADE format file, which can be analyzed using any waveform analysis tool that
supports this format.

Click Menu → Records → Clear Record in turn to clear all reports.

8.2 Test Content and Purpose

Protection function test verify the correctness of protection logic, and puts forward suggestions on
8
the settings for commissioning.

The test data is calculated according to the device accuracy and tester
accuracy, so the test results may be different when using different test
instruments. For example: Max {1% × 50 / 51p1. I_ Set, 0.01A} means that
the current value to be injected is the larger value of 1% current accuracy
and 0.01A.

8.3 Differential protection (87L)

8.3.1 Setting List


Set the settings of Differential protection as the following table.

No. Setting Value No. Setting Value


1 87L.I_Pkp 0.300 14 87L.Z_RmtReac 10000.000
2 87L.I_ALM 0.300 15 87L.Z_RmtGndReac 10000.000
3 87L.I_Pkp_CTS 1.000 16 87L.En Enabled
4 87L.K_Cr_CT 1.000 17 87L.En_DPFC1 Enabled
5 87L.I_Knee1 0.500 18 87L.En_DPFC2 Enabled

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8 Protection Function Test

No. Setting Value No. Setting Value


6 87L.I_Knee2 2.000 19 87L.En_Biased1 Enabled
7 87L.Slope1 0.500 20 87L.En_Biased2 Enabled
8 87L.Slope2 0.700 21 87L.En_Neutral Enabled
9 87L.t_Op_Neutral 0.040 22 87L.En_InterTrp Enabled
10 87L.XC1L 10000.000 23 87L.En_LocDiff Disabled
11 87L.XC0L 10000.000 24 87L.En_CapCurrComp Disabled
12 87L.Z_LocReac 10000.000 25 87L.En_CTS_Blk Disabled
13 87L.Z_LocGndReac 10000.000

8.3.2 Wiring Preparation

1. Connecting the tester voltage output Ua/Ub/Uc to the voltage input of the device. Parallel
the N of three phase and connect it back to the “Un” of tester.

2. Connecting the tester current output Ia/Ib/Ic to the current input of the device. Parallel the
N of three phase and connect it back to the “In” of tester.

3. Please connect the tripping connector to the binary input of tester.

4. If the protection function enabling signal and the protection function disabling signal are
configured, the protection function enabling signal must be energized and the protection

8 function disabling signal must be de-energized.

8.3.3 Differential Protection Test

Current differential protection includes phase-segregated DPFC current differential element,phase-


segregated steady-state current differential element and neutral current differential element. We
only take stage 1 of steady-state current differential element as an example.

The formulas of steady-state current differential element stage 1:

IDiffΦ

k=1
k2

k1
IH

IBiasΦ
Knee1 Knee2

Operating characteristics of steady-state current differential element stage 1

𝐼DiffΦ > 𝐼𝐻 (𝐼BiasΦ < 𝐾𝑛𝑒𝑒1)

𝐼DiffΦ > 𝐼𝐻 + 𝐾1 × (𝐼BiasΦ -Knee1)(𝐾𝑛𝑒𝑒1 ≤ 𝐼BiasΦ < 𝐾𝑛𝑒𝑒2)

𝐼DiffΦ > 𝐼𝐻 + 𝐾1 × (Knee2-Knee1) + 𝐾2 × (𝐼BiasΦ − 𝐾𝑛𝑒𝑒2)(𝐼BiasΦ > 𝐾𝑛𝑒𝑒2)

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8 Protection Function Test

̇ + 𝐼NΦ
𝐼DiffΦ = |𝐼MΦ ̇ |

̇ | + |𝐼NΦ
𝐼BiasΦ = |𝐼MΦ ̇ |

Where:

𝐼DiffΦ is the phase differential current

𝐼BiasΦ : is the phase restraint current

𝐼𝐻 : max(1.5×[87L.I_Pkp], 1.5UN/XC1L)

8.3.3.1 Pickup current setting of differential protection test

Put a jumper to connect the RX and TX of the relay by a single mode FO to make a loopback circuit.
In this case, if we inject 1A current to the relay, there will be 2A differential current . The settings of
the FO communication channel should be as follows.

No. Setting Value No. Setting Value


1 FO.LocID 1 5 FO1.Nx64k_C37.94 12
2 FO.RmtID 1 6 FO1.Opt_ClkSrc Int
3 FO.BaudRate 2048 7 FO1.En Enabled
4 FO.Protocol G.703 8

The pickup value for stage 1 of 87_Biased is 1.5 times of [87L.I_Pkp] setting. 8
Using “State Sequencer” testing module with two states:

The state1 is the normal state:

Inject UA-N/UB-N/UC-N with the rated positive-sequence voltage

Inject IA /IB /IC with 0A

Trigger condition is set to timed trigger, state duration = 6s

The state 2 is the fault state:

Simulate the single-phase grounding fault

1.5 1.5
Fault 1: The faulty phase current = ×[87L.I_Pkp]+ ×Max {5%×[87L.I_Pkp], 0.02In}
2 2

1.5 1.5
Fault 2: The faulty phase current = ×[87L.I_Pkp]- ×Max {5%×[87L.I_Pkp], 0.02In}
2 2

The trigger condition can be set to “binary input or timed trigger”, and the state duration =
100ms

The test result:

Fault 1: The 87L _Biased1 should operate reliably.

Fault 2: The 87L _Biased1 should not operate reliably.

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8 Protection Function Test

8.3.3.2 Operate time test

Using “State Sequencer” testing module with two states:

The state1 is the normal state:

Inject UA-N/UB-N/UC-N with the rated positive-sequence voltage

Inject IA /IB /IC with 0A. Trigger condition is set to timed trigger, state duration = 6s

The state 2 is the fault state:

Simulate the single-phase grounding fault, The faulty phase current = 2×1.5× [87L.I_Pkp].

The trigger condition can be set to binary input or timed trigger, and the state duration =
50ms.

The test result:

The The 87L _Biased1 should operate reliably, the operation time ≤30ms.

8.3.3.3 Differential characteristic test

In this section, the correctness of settings [87L.I_Knee1]/ [87L.Slope1] and [87L.I_Knee2]/


[87L.Slope2] are tested, in order to verify the correctness of the differential opereation
characterisitcs.
8 Usually there is one relay in the local side and the other one is in the remote side, we simulated
the current injected into the two relays after synchronization.

In this test, we put two devices in one place .Connect two relays with two single mode FO jumpers.
The Rx and Tx of FO module on two relays connect crosswise. Set the local relay FO ID as 1 and
the remote relay FO ID as 2.The setting of FO communication is as follows:

RmtCommCh Settings
Local Remote
No. Symbol Value No. Symbol Value
1 FO.LocID 1 1 FO.LocID 2
2 FO.RmtID 2 2 FO.RmtID 1
3 FO.BaudRate 2048KBPS 3 FO.BaudRate 2048KBPS
4 FO.Protocol G.703 4 FO.Protocol G.703
5 FO1.Nx64k_C37.94 12 5 FO1.Nx64k_C37.94 12
6 FO1.Opt_ClkSrc Int 6 FO1.Opt_ClkSrc Int
7 FO1.En Enabled 7 FO1.En Enabled

[87L.I_Knee1]/ [87L.Slope1] and [87L.I_Knee2]/ [87L.Slope2] Setting of Differential Protection Test

1. Testing mode One: “State Sequencer” testing module.

According to the setting [87L.I_Knee1](0.5A)/ [87L.Slope1](0.5) and [87L.I_Knee2](2.0A)/


[87L.Slope2](0.7),we calculate a series of threshold values that can simulate relay operation.

No. 87L.I_Knee Local (A) Remote (A) I_diff (A) I_res (A)

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8 Protection Function Test

Case 1 0.700 0.100 0.60 0.80


Case 2 87L.I_Knee1 1.000 0.200 0.80 1.20
Case 3 1.300 0.300 1.00 1.60
Case 4 3.500 0.500 1.90 3.00
Case 5 87L.I_Knee2 4.375 0.625 2.60 4.00
Case 6 5.250 0.750 3.30 5.00

Take Case 1 as an example.

Using “State Sequencer” testing module with two states:

The state1 is the normal state:

Inject UA-N/UB-N/UC-N with the rated positive-sequence voltage

Inject IA /IB /IC with 0A

Trigger condition is set to timed trigger, state duration = 6s

The state 2 is the fault state:

Simulate the single-phase grounding fault, the phase angle between two sides is 180°.

Fault 1: The faulty phase current of local side = 1.05×0.7 = 0.735A, the faulty phase
current of remote side = 0.1A.
8
Fault 2: The faulty phase current of local side = 0.95×0.7 = 0.665A, the faulty phase
current of remote side = 0.1A.

The trigger condition can be set to “binary input or timed trigger”, and the state duration =
100ms

The test result:

Fault 1: The 87L _Biased1 should operate reliably.

Fault 2: The 87L _Biased1 should not operate reliably.

According to the above table, complete the test from Case 01 to Case 06.

2. Testing mode two: “Diff Operating Characteristic” testing module.

Test the differential protection automatically by “Diff Operating Characteristic” module.

Configure the “Test Object” in “Differential Protection Parameters”.

“Protected Object” should be set as follows:

Choose the “Busbar” item, other parameters keep default.

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“CT” should be set as follows:

According to setting, set the CT ratio of the two sides.

8
“Protection Device” should be set as follows:

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“Characteristic Definition” should be set as follows:

Add the low slope and the high slope characteristics line.

8
“Test View” should be set as follows:

Choose the “Search Test”→“Add Sweep...” →“Add Multiple”to add test items. Set the parameter
as the following picture. Choose the faulty type as “L1-E”.

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According to the same method as above,we can test the phase-segregated DPFC current
differential element,phase-segregated steady-state current differential element and neutral current
differential element protection in sequence.

8.3.4 CT Circuit Failure Blocking Current Differential Protection

1. Modify the 87L settings as follows:

[87L.En_CTS_Blk] = Disable

Using “State Sequencer” testing module with two states:

The state1 is the normal state:

Inject Ua/Ub/Uc with the rated positive-sequence voltage (Un)

Inject Ia/Ib/Ic with the positive-sequence current:

Ia/Ib/Ic = 1.1×[CTS.3I0_Set]

Trigger condition is set to timed trigger, state duration =10s

The state 2 is the fault state:

Simulate failure of single-phase on CT, the abnormal phase current = 0 A, the current of
other two phase and the voltage of three phase keeps the same with that in stage 1.
8
The trigger condition can be set to “timed trigger”, and the state duration > [CTS.t_DPU].

The alarm signal “CTS.Alm” should be issued reliably.

The state 3 simulates faulty state:

Simulate the single-phase grounding fault

1 1
Fault 1: The faulty phase current = ×[87L.I_Pkp_CTS]+ ×Max {5%×[87L.I_Pkp_CTS],
2 2
0.02In}

1 1
Fault 2: The faulty phase current = ×[87L.I_Pkp_CTS]- ×Max {5%×[87L.I_Pkp_CTS],
2 2
0.02In}

The trigger condition can be set to “binary input or timed trigger”, and the state duration =
50ms

The test result:

Fault 1: The 87L _Biased1 should operate reliably.

Fault 2: The 87L _Biased1 should not operate reliably.

2. Modify the 87L settings as follows:

[87L.En_CTS_Blk] = Enable

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8 Protection Function Test

Using “State Sequencer” testing module with two states:

The state1 is the normal state:

Inject Ua/Ub/Uc with the rated positive-sequence voltage (Un)

Inject Ia/Ib/Ic with the positive-sequence current:

Ia/Ib/Ic = 1.1×[CTS.3I0_Set]

Trigger condition is set to timed trigger, state duration =10s

The state 2 is the fault state:

Simulate failure of single-phase on CT, the abnormal phase current = 0 A, the current of
other two phase and the voltage of three phase keeps the same with that in stage 1.

The trigger condition can be set to “timed trigger”, and the state duration > [CTS.t_DPU].

The alarm signal “CTS.Alm” should be issued reliably.

The state 3 is the fault state:

Simulate the single-phase grounding fault

1
The faulty phase current = ×1.1×[87L.I_Pkp_CTS]
2
8
The trigger condition can be set to “binary input or timed trigger”, and the state duration =
50ms

The test result:

The 87L _Biased1 should not operate reliably.

8.4 DPFC distance protection (21D)

8.4.1 Setting List

Set the settings of DPFC distance protection as the following table.

No. Setting Value No. Setting Value


1 21D.Z_Set 5.000 4 21L1.Real_K0 0.660
2 21D.En Enabled 5 21L1.Imag_K0 0.000

3 21L1.phi1_Reach 78

8.4.2 Wiring Preparation

1. Connecting the tester voltage output Ua/Ub/Uc to the voltage input of the device. Parallel
the N of three phase and connect it back to the “Un” of tester.

2. Connecting the tester current output Ia/Ib/Ic to the current input of the device. Parallel the

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8 Protection Function Test

N of three phase and connect it back to the “In” of tester.

3. Please connect the tripping connector to the binary input of tester.

4. If the protection function enabling signal and the protection function disabling signal are
configured, the protection function enabling signal must be energized and the protection
function disabling signal must be de-energized.

8.4.3 DPFC distance protection Test

8.4.3.1 Impedance setting test of phase-to-ground DPFC distance protection

The phase voltage calculation formula:

UØ = IØ(1 + K0) [21D.Z_Set] + (1 − m)UØN

When m=1.4, 21D will trip, when m=0.9, 21D will not trip.

Using “State Sequencer” testing module with two states:

The state1 is the normal state:

Inject UA-N/UB-N/UC-N with 57.74V positive-sequence voltage.

Inject IA /IB /IC with 0A

8 Trigger condition is set to timed trigger, state duration = 6s

The state 2 is the fault state:

Simulate the single-phase grounding fault

Fault 1: The faulty phase voltage = 5×( 1 + 0.66 )×5 + ( 1 - 1.4 )×57.74 = 18.4V

Inject faulty phase voltage with 18.82V.

Inject faulty current with 5A, the angle of faulty voltage leads the faulty current 78
degrees ([21L1.phi_Reach]).

The trigger condition can be set to “binary input or timed trigger”, and the state duration
= 100ms

Fault 2: The faulty phase current = 5×( 1 + 0.66 )×5 + ( 1 - 0.9 )×57.74 = 47.3V

Inject faulty phase voltage with 47.3V.

Inject faulty current with 5A, the angle of faulty voltage leads the faulty current 78
degrees ([21L1.phi_Reach]).

The trigger condition can be set to “binary input or timed trigger”, and the state duration =
100ms

The test result:

Fault 1: The 21D should operate reliably, the operation time≤12ms

Fault 2: The 21D should not operate reliably.

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When the DPFC Distance setting is small, it is possible that UØ and UØØ are
calculated as negative numbers. At this time, the fault current needs to be
increased to meet the non-negative values of UØ and UØØ.

8.4.3.2 Impedance setting test of phase-to-phase DPFC distance protection

The phase to phase voltage calculation formula:

UØØ = IØØ×Zzd + (1 − m)UØØN

When m=1.4, 21D will trip, when m=0.9, 21D will not trip.

Using “State Sequencer” testing module with two states:

The state1 is the normal state:

Inject UA-N/UB-N/UC-N with 57.74V positive-sequence voltage.

Inject IA /IB /IC with 0A.

Trigger condition is set to timed trigger, state duration = 6s

The state 2 is the fault state:

Simulate the phase-to-phase fault,


8
Fault 1: The faulty phase to phase voltage = 10×5 + ( 1 - 1.4 )×100 = 10V

Inject faulty phase to phase voltage with 10V.

Inject faulty phase to phase current with 10A, the angle of faulty phase to phase voltage
leads the faulty phase to phase current 78 degrees ([21L1.phi_Reach]).

The trigger condition can be set to “binary input or timed trigger”, and the state duration
= 100ms

Fault 2: The faulty phase to phase current = 10×5 + ( 1 - 0.9 )×100 = 60V

Inject faulty phase to phase voltage with 10V.

Inject faulty phase to phase current with 10A, the angle of faulty phase to phase voltage
leads the faulty phase to phase current 78 degrees ([21L1.phi_Reach]).

The trigger condition can be set to “binary input or timed trigger”, and the state duration =
100ms

The test result:

Fault 1: The 21D should operate reliably, the operation time≤12ms

Fault 2: The 21D should not operate reliably.

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8 Protection Function Test

When the DPFC Distance setting is small, it is possible that UØ and UØØ are
calculated as negative numbers. At this time, the fault current needs to be
increased to meet the non-negative values of UØ and UØØ.

8.5 Distance Protection (21L)

In this section, we take 21L1 of Quadrilateral Distance Protection as a testing example.

8.5.1 Setting List


Set the settings of Quadrilateral Distance Protection as the following table.

No. Setting Value No. Setting Value


1 21L.Ang_Alpha 20 18 21L1.ZG.En_BlkAR Disabled
2 21L.Ang_Beta 15 19 21L1.ZG.En_3I0 Enabled
3 21L.LoadEnch.phi 12 20 21L1.ZG.En_NeuDir_Blk Enabled
4 21L.LoadEnch.R_Set 40.000 21 21L1.ZG.En_NegDir_Blk Enabled
5 21L.I_PSBR 1.000 22 21L1.ZP.RCA 12

8 6
7
21L.ZG.Opt_Characteristic
21L.ZP.Opt_Characteristic
Quad
Quad
23 21L1.ZP.Z_Set
24 21L1.ZP.R_Set
5.000
9.6
8 21L1.Real_K0 0.660 25 21L1.ZP.R_Offset 1.000
9 21L1.Imag_K0 0.000 26 21L1.ZP.phi_Shift 0
10 21L1.phi1_Reach 78 27 21L1.ZP.t_Op 0.000
11 21L1.ZG.RCA 12 28 21L1.ZP.En Enabled
12 21L1.ZG.Z_Set 5.000 29 21L1.ZP.En_BlkAR Disabled
13 21L1.ZG.R_Set 9.6 30 21L1.ZP.En_NegDir_Blk Enabled
14 21L1.ZG.R_Offset 1.000 31 21L1.LoadEnch.En Enabled
15 21L1.ZG.phi_Shift 0 32 21L1.En_PSBR Enabled
16 21L1.ZG.t_Op 0.000 33 21L1.En_ReacLine Enabled
17 21L1.ZG.En Enabled
… ……

8.5.2 Wiring Preparation

1. Connecting the tester voltage output Ua/Ub/Uc to the voltage input of the device. Parallel
the N of three phase and connect it back to the “Un” of tester.

2. Connecting the tester current output Ia/Ib/Ic to the current input of the device. Parallel the
N of three phase and connect it back to the “In” of tester.

3. Please connect the tripping connector to the binary input of tester.

4. If the protection function enabling signal and the protection function disabling signal are
configured, the protection function enabling signal must be energized and the protection

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8 Protection Function Test

function disabling signal must be de-energized.

8.5.3 Distance Protection Test

8.5.3.1 Setting of impedence of phase-to-ground distance element Test

The phase voltage calculation formula:

UØ =m× IØ(1 + K0)×[21L1.ZG.Z_Set]

When m =0.95, 21L1 will trip, when m=1.05, 21L1 will not trip.

Using “State Sequencer” testing module with two states:

The state1 is the normal state:

Inject UA-N/UB-N/UC-N with the rated positive-sequence voltage

Inject IA /IB /IC with 0A

Trigger condition is set to timed trigger, state duration = 6s

The state 2 is the fault state:

Simulate the single-phase grounding fault

Fault 1: The faulty phase voltage = 0.95×2×( 1 + 0.66 )×5 = 15.77V


8
Inject faulty phase voltage with 15.77V.

Inject faulty current with 2A, the angle of faulty voltage leads the faulty current 78
degrees.

Fault 2: The faulty phase voltage = 1.05×2×( 1 + 0.66 )×5 = 17.43V

Inject faulty phase voltage with 17.43V.

Inject faulty current with 2A, the angle of faulty voltage leads the faulty current 78
degrees.

The trigger condition can be set to “binary input or timed trigger”, and the state duration =
[21L1.ZG.t_Op] + 50ms

The test result:

Fault 1: The 21L1.Op should operate reliably.

Fault 2: The 21L1.Op should not operate reliably.

8.5.3.2 Setting of impedence of phase-to- phase distance element Test

The phase -to- phase voltage calculation formula:

UØØ = m× IØØ ×[21L1.ZP.Z_Set]

When m =0.95, 21L1 will trip, when m=1.05, 21L1 will not trip.

Using “State Sequencer” testing module with two states:

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8 Protection Function Test

The state1 is the normal state:

Inject UA-N/UB-N/UC-N with the rated positive-sequence voltage

Inject IA /IB /IC with 0A

Trigger condition is set to timed trigger, state duration = 6s

The state 2 is the fault state:

Simulate the phase -to- phase fault.

Fault 1: The faulty phase -to- phase voltage = 0.95×2×5 = 9.5V

Inject faulty phase -to- phase voltage with 9.5V.

Inject faulty phase -to- phase current with 2A, the angle of faulty phase -to- phase
voltage leads the faulty phase -to- phase current 78 degrees.

Fault 2: The faulty phase -to- phase voltage = 1.05×2× 5 = 10.5V

Inject faulty phase -to- phase voltage with 10.5V.

Inject faulty phase -to- phase current with 2A, the angle of faulty phase -to- phase
voltage leads the faulty phase -to- phase current 78 degrees.

8 The trigger condition can be set to “binary input or timed trigger”, and the state duration =
[21L1.ZP.t_Op] + 50ms

The test result:

Fault 1: The 21L1.Op should operate reliably.

Fault 2: The 21L1.Op should not operate reliably.

8.5.3.3 Setting of load encroachment resistance of phase-to-ground distance element Test

Modify the 21L settings as follows:

[21L.LoadEnch.R_Set] = 7Ω.

Make sure [21L.LoadEnch.R_Set] is less than [21L1.ZG.R_Set].

The phase voltage calculation formula:

UØ =m× IØ×(1 + K0)×[21L.LoadEnch.R_Set]

When m =0.95, 21L1 will trip, when m=1.05, 21L1 will not trip.

Using “State Sequencer” testing module with two states:

The state1 is the normal state:

Inject UA-N/UB-N/UC-N with the rated positive-sequence voltage

Inject IA /IB /IC with 0A

Trigger condition is set to timed trigger, state duration = 6s

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The state 2 is the fault state:

Simulate the single-phase grounding fault

Fault 1: The faulty phase voltage = 0.95×2×( 1 + 0.66 )×7 = 22.078V

Inject faulty phase voltage with 22.078V.

Inject faulty current with 2A, the angle of faulty voltage leads to the faulty current θ.

-[21L.LoadEnch.phi]≤θ≤+[21L.LoadEnch.phi].

Fault 2: The faulty phase voltage = 1.05×2×( 1 + 0.66 )×7 = 24.402V

Inject faulty phase voltage with 24.402V.

Inject faulty current with 2A, the angle of faulty voltage leads to the faulty currentθ.

-[21L.LoadEnch.phi]≤θ≤+[21L.LoadEnch.phi].

The trigger condition can be set to “binary input or timed trigger”, and the state duration =
[21L1.ZG.t_Op] + 50ms

The test result:

Fault 1: The 21L1.Op should operate reliably.

Fault 2: The 21L1.Op should not operate reliably. 8


8.5.3.4 Setting of load encroachment resistance of phase-to- phase distance element Test

Modify the 21L settings as follows:

[21L.LoadEnch.R_Set] = 7Ω.

Make sure [21L.LoadEnch.R_Set] is less than [21L1.ZP.R_Set].

The phase -to- phase voltage calculation formula:

UØØ = m× IØØ ×[21L.LoadEnch.R_Set]

When m =0.95, 21L1 will trip, when m =1.05, 21L1 will not trip.

Using “State Sequencer” testing module with two states:

The state1 is the normal state:

Inject UA-N/UB-N/UC-N with the rated positive-sequence voltage

Inject IA /IB /IC with 0A

Trigger condition is set to timed trigger, state duration = 6s

The state 2 is the fault state:

Simulate the phase -to- phase fault.

Fault 1: The faulty phase -to- phase voltage = 0.95×2×7 = 13.3V

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Inject faulty phase -to- phase voltage with 13.3V.

Inject faulty phase -to- phase current with 2A, the angle of faulty phase -to- phase
voltage leads to the faulty phase -to- phase current θ.

-[21L.LoadEnch.phi]≤θ≤+[21L.LoadEnch.phi].

Fault 2: The faulty phase -to- phase voltage = 1.05×2× 7 = 14.7V

Inject faulty phase -to- phase voltage with 14.7V.

Inject faulty phase -to- phase current with 2A, the angle of faulty phase -to- phase
voltage leads to the faulty phase -to- phase current θ.

-[21L.LoadEnch.phi]≤θ≤+[21L.LoadEnch.phi].

The trigger condition can be set to “binary input or timed trigger”, and the state duration =
[21L1.ZP.t_Op] + 50ms

The test result:

Fault 1: The 21L1.Op should operate reliably.

Fault 2: The 21L1.Op should not operate reliably.

8 8.5.3.5 Operate time test

Take phase-to-ground distance element of zone-1 as a testing example.

The phase voltage calculation formula:

UØ =m× IØ(1 + K0)×[21L1.ZG.Z_Set]

When m =0.7, measure 21L operation time. the operation error time ≤ 1%×Setting+30ms

Using “State Sequencer” testing module with two states:

The state1 is the normal state:

Inject UA-N/UB-N/UC-N with the rated positive-sequence voltage.

Inject IA /IB /IC with 0A.

Trigger condition is set to timed trigger, state duration = 6s.

The state 2 is the fault state:

Simulate the single-phase grounding fault

The faulty phase voltage = 0.7×2×( 1 + 0.66 )×5 = 11.62V

Inject faulty phase voltage with 11.62V.

Inject faulty current with 2A, the angle of faulty voltage leads the faulty current 78
degrees.

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The trigger condition can be set to binary input or timed trigger, and the state duration =
50ms.

The test result:

The 21L1 should operate reliably, the operation error time ≤ Max {1%×[21L1.ZG.t_Op],
30ms }

8.5.3.6 Auto test for the boundary of distance protection

Take the impedance quadrilateral as an example below.

Test the boundary of distance protection automatically by “Advanced Distance” module.

Configure the “Distance Protection Parameters” of “Test Object”.

Set the “line length” and the “line angle” in “System Settings”,and then set the “KL magnitude” and
the “ KL angle”.

“System setting” of “Distance Protection Parameters”should be set as follows:

Accorde to the setting:impedance of zone-1 is 5Ω, resistance 9.6Ω, phase angle of positive-
sequence impedance of zone-1 is 78 degrees,etc.

Choose the mode as “Line Cartesian”, set R and X as (0, 0 )and the angle as -15°.

Choose the mode as “Line Cartesian”, set R and X as (9.6, 0 )and the angle as 78°.

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Choose the mode as “Line polar”, set Z and Phi as (5, 78° ), and the angle as -12°.

Choose the mode as “Line polar”, set Z and Phi as (5, 78° ), and the angle as 180°.

Choose the mode as “Line cartesian”, set R and X as (-1, 0 )and the angle as 90°.

Choose the mode as “Line cartesian”, set R and X as (0, 0 )and the angle as 110°.

Choose “Autoclose”to get a closed quadrilateral automatically.

“Characteristic Editor” of“Zone Setting”should be set as follows:

Choose “Append”→“Sequence” →“Add search lines to”to add the test item.

Set the original point R and X as (0, 0) to set the start point of search test.

Set search length, it should cover all the impedance area.

Set the range of angle, set start angle as 0°and end angle as 330°, angle step as 30°.

“Add search lines to” should be set as follows:

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Search Test of quadrilateral distance protection has be set as follows:

The test result:

After the test finished, the results and reports will be shown.

8.6 Pilot Distance Protection (85)

8.6.1 Setting List


Set the settings of Pilot Distance Protection as the following table.

No. Setting Value No. Setting Value


1 85.Opt_Mode POTT 15 21L.PilotFwd.Imag_K0 0.000
2 85.En_Ch_PhSeg Disabled 16 21L.PilotFwd.phi1_Reach 78
3 85.En_WI Disabled 17 21L.PilotFwd.ZG.RCA 12
4 85.U_UV_WI 50.000 18 21L.PilotFwd.ZG.Z_Set 10.000
5 85.En_WI_Pkp Disabled 19 21L.PilotFwd.ZG.R_Set 18.000

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No. Setting Value No. Setting Value


6 85.En_Trp_Send Enabled 20 21L.PilotFwd.ZG.R_Offset 2.000
7 85.En_PilotTrp_Send Enabled 21 21L.PilotFwd.ZG.En_3I0 Enabled
8 85.En_52b_Send Enabled 22 21L.PilotFwd.ZG.En_NeuDir_Blk Enabled
9 85.En_52b_Echo Enabled 23 21L.PilotFwd.ZG.En_NegDir_Blk Enabled
10 85.Z.En Enabled 24 21L.PilotFwd.ZP.RCA 12
11 85.t_DPU_Blocking1 0.100 25 21L.PilotFwd.ZP.Z_Set 10.000
12 85.t_DPU_CR1 0.025 26 21L.PilotFwd.ZP.R_Set 18.000
13 85.t_DDO_CR1 0.025 27 21L.PilotFwd.ZP.R_Offset 2.000
14 21L.PilotFwd.Real_K0 0.660
… ……

8.6.2 Wiring Preparation

1. Connecting the tester voltage output Ua/Ub/Uc to the voltage input of the device. Parallel
the N of three phase and connect it back to the “Un” of tester.

2. Connecting the tester current output Ia/Ib/Ic to the current input of the device. Parallel the
N of three phase and connect it back to the “In” of tester.

3. Please connect the tripping connector to the binary input of tester.

8 4. If the protection function enabling signal and the protection function disabling signal are
configured, the protection function enabling signal must be energized and the protection
function disabling signal must be de-energized.

8.6.3 Pilot Distance Protection Test


8.6.3.1 Impedance setting test of pilot distance element

Take phase-to-ground pilot distance element as a testing example.

The phase voltage calculation formula: UØ =m× IØ(1 + K0)×[21L.PilotFwd.ZG.Z_Set]

When m =0.95, 85.Z will trip, when m=1.05, 85.Z will not trip.

Using “State Sequencer” testing module with two states:

The state1 is the normal state:

Inject UA-N/UB-N/UC-N with the rated positive-sequence voltage

Inject IA /IB /IC with 0A

Trigger condition is set to timed trigger, state duration = 6s

The state 2 is the fault state:

Simulate the single-phase grounding fault.

Fault 1: The faulty phase voltage = 0.95×2×( 1 + 0.66 )×10 = 31.54V

Inject faulty phase voltage with 31.54V.

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8 Protection Function Test

Inject faulty current with 2A, the angle of faulty voltage leads the faulty current 78
degrees . At the same time, the pilot distance element receive a signal which the tester
outputs to simulate the permissive signal from the remote end.

Fault 2: The faulty phase voltage = 1.05×2×( 1 + 0.66 )×10 = 34.86V

Inject faulty phase voltage with 34.86V.

Inject faulty current with 2A, the angle of faulty voltage leads the faulty current 78
degrees. At the same time, the pilot distance element receive a signal which the tester
outputs to simulate the permissive signal from the remote end.

The trigger condition can be set to “binary input or timed trigger”, and the state duration =
100ms

The test result:

Fault 1: The 85.Z should operate reliably.

Fault 2: The 85.Z should not operate reliably.

When the Impedenc setting of phase-to-ground distance element is big, it is


possible that UØ and UØØ are calculated as negative numbers. At this time, 8
the fault current needs to be decreased to meet the non-negative values of
UØ and UØØ.

8.6.3.2 Operation time test

Take phase-to-ground pilot distance element as a testing example.

The phase voltage calculation formula: UØ = m× IØ(1 + K0)×[21L.PilotFwd.ZG.Z_Set]

When m =0.7, measure 85.Z operation time. the operation error time ≤1%×Setting+30ms

Using “State Sequencer” testing module with two states:

The state1 is the normal state:

Inject UA-N/UB-N/UC-N with the rated positive-sequence voltage

Inject IA /IB /IC with 0A

Trigger condition is set to timed trigger, state duration = 6s

The state 2 is the fault state:

Simulate the single-phase grounding fault.

Fault : The faulty phase voltage = 0.7×2×( 1 + 0.66 )×10 = 23.24V

Inject faulty phase voltage with 23.24V.

Inject faulty current with 2A, the angle of faulty voltage leads the faulty current 78

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8 Protection Function Test

degrees .At the same time, the pilot distance element receive a signal which the tester
outputs to simulate the permissive signal from the remote end.

The trigger condition can be set to “binary input or timed trigger”, and the state duration
= 50ms.

The test result:

The 85.Z should operate reliably, the operation time≤ 35ms

8.7 Pilot Directional Earth-fault Protection (85)

8.7.1 Setting List

Set the settings of Pilot Distance Protection as the following table.

No. Setting Value No. Setting Value


1 85.Opt_Mode POTT 10 85.t_DDO_CR2 0.025
2 85.DEF.En Enabled 11 50/51G.DIR.RCA 78
3 85.DEF.En_BlkAR Disabled 12 50/51G.DIR.phi_Min_Fwd 90
4 85.DEF.En_IndepCh Enabled 13 50/51G.DIR.phi_Max_Fwd 90
5 85.En_Unblocking2 0.200 14 50/51G.DIR.phi_Min_Rev 90
8 6 85.t_Unblocking2 0.200 15 50/51G.DIR.phi_Max_Rev 90
7 85.DEF.3I0_Set 0.300 16 50/51G.DIR.I_Min 0.050
8 85.DEF.t_DPU 0.150 17 50/51G.DIR.U_Min 1.000
9 85.t_DPU_CR2 0.025
… ……

8.7.2 Wiring Preparation

1. Connecting the tester voltage output Ua/Ub/Uc to the voltage input of the device. Parallel
the N of three phase and connect it back to the “Un” of tester.

2. Connecting the tester current output Ia/Ib/Ic to the current input of the device. Parallel the
N of three phase and connect it back to the “In” of tester.

3. Please connect the tripping connector to the binary input of tester.

4. If the protection function enabling signal and the protection function disabling signal are
configured, the protection function enabling signal must be energized and the protection
function disabling signal must be de-energized.

8.7.3 Pilot Directional Earth-fault Protection Test

8.7.3.1 Current setting test of pilot directional earth-fault element

Take phase-to-ground pilot fault as a testing example.

Using “State Sequencer” testing module with two states:

The state1 is the normal state:

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Inject UA-N/UB-N/UC-N with the rated positive-sequence voltage

Inject IA /IB /IC with 0A

Trigger condition is set to timed trigger, state duration = 6s

The state 2 is the fault state:

Simulate the single-phase grounding fault, the faulty phase voltage should be set between
0V~0.9Un

Fault 1: The faulty phase current =[85.DEF.3I0_Set]+Max{5%×[85.DEF.3I0_Set], 0.02In}

Inject faulty current, the angle of faulty voltage leads the faulty current 78 degrees . At
the same time, the pilot directional earth-fault element receive a signal which the tester
outputs to simulate the permissive signal from the remote end.

Fault 2: The faulty phase current =[85.DEF.3I0_Set]-Max{5%×[85.DEF.3I0_Set], 0.02In}

Inject faulty current, the angle of faulty voltage leads the faulty current 78 degrees. At
the same time, the pilot distance element receive a signal which the tester outputs to
simulate the permissive signal from the remote end.

The trigger condition can be set to “binary input or timed trigger”, and the state duration =
[85.DEF.t_DPU] +100ms

The test result:


8
Fault 1: The 85.DEF should operate reliably.

Fault 2: The 85.DEF should not operate reliably.

8.7.3.2 Operation time test

Take phase-to-ground pilot fault as a testing example.

Using “State Sequencer” testing module with two states:

The state1 is the normal state:

Inject UA-N/UB-N/UC-N with the rated positive-sequence voltage

Inject IA /IB /IC with 0A

Trigger condition is set to timed trigger, state duration = 6s

The state 2 is the fault state:

Simulate the single-phase grounding fault, the faulty phase voltage should be set between
0V~0.9Un

Fault : The faulty phase current = [85.DEF.3I0_Set]×2

Inject faulty current, the angle of faulty voltage leads the faulty current 78 degrees . At
the same time, the pilot directional earth-fault element receive a signal which the tester
outputs to simulate the permissive signal from the remote end.

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8 Protection Function Test

The test result:

The 85.DEF should operate reliably, the operation error time≤ Max {1%×[85.DEF.t_DPU],
30ms }

8.8 Phase Overcurrent Protection (50/51P)

In this section, we take 50/51P1 as a testing example.

8.8.1 Setting List


Set the settings of Phase Overcurrent Protection as the following table.

No. Setting Value No. Setting Value


1 50/51P.VCE.Upp 70.000 V 17 50/51P1.I_Set 1.000 A
2 50/51P.VCE.U2 4.000 V 18 50/51P1.t_Op 0.500 s
3 50/51P.VCE.3U0 8.000 V 19 50/51P1.t_DropOut 0.000 s
4 50/51P.DIR.RCA 45 deg 20 50/51P1.En_Volt_Blk Disabled
5 50/51P.DIR.RCA_NegOC 45 deg 21 50/51P1.Opt_Dir Non_Directional
6 50/51P.DIR.phi_Min_Fwd 90 deg 22 50/51P1.En_Hm_Blk Disabled
7 50/51P.DIR.phi_Max_Fwd 90 deg 23 50/51P1.En Enabled

8 8
9
50/51P.DIR.phi_Min_Rev
50/51P.DIR.phi_Max_Rev
90 deg
90 deg
24
25
50/51P1.Opt_Trp/Alm
50/51P1.Opt_Curve
Trp
IECDefTime
10 50/51P.DIR.Opt_PolarizedVolt U1 26 50/51P1.Opt_Curve_DropOut Inst
11 50/51P.DIR.I_Min 0.050 A 27 50/51P1.TMS 0.100
12 50/51P.DIR.U_Min 10.000 V 28 50/51P1.tmin 0.000 s
13 50/51P.DIR.En_VTS_Blk Disabled 29 50/51P1.K 0.1400
14 50/51P.HMB.K_Hm2 0.200 30 50/51P1.Alpha 0.0200
15 50/51P.HMB.I_Rls 20.000 A 31 50/51P1.C 0.0000
16 50/51P.HMB.Opt_Blk PhaseBlk

8.8.2 Wiring Preparation

1. Connecting the tester voltage output Ua/Ub/Uc to the voltage input of 50/51P1 of the
device. Parallel the N of three phase and connect it back to the “Un” of tester.

2. Connecting the tester current output Ia/Ib/Ic to the current input of 50/51P1 of the device.
Parallel the N of three phase and connect it back to the “In” of tester.

3. Please set the tripping logic setting for 50/51P1 according to the configuration of PCS-
931S, and connect the corresponding binary output of 50/51P1 to the binary input of tester.

4. If the protection function enabling signal and the protection function disabling signal are
configured, the protection function enabling signal must be energized and the protection
function disabling signal must be de-energized.

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8.8.3 Definite-time Phase Overcurrent Test


8.8.3.1 Current setting test

Using “State Sequencer” testing module with two states:

The state1 is the normal state:

Inject Ua/Ub/Uc with the rated positive-sequence voltage

Inject Ia/Ib/Ic with 0A

Trigger condition is set to timed trigger, state duration = 2s

The state 2 is the fault state:

Simulate the single phase grounding fault, the faulty voltage can set between 0V~0.9Un

Fault 1: The faulty phase current = 1.05×[50/51P1.I_Set]

Fault 2: The faulty phase current = 0.95×[50/51P1.I_Set]

The trigger condition can be set to “binary input or timed trigger”, and the state duration =
Max{1.01×[50/51P1.t_Op], [50/51P1.t_Op]+100ms}

The test result:

Fault 1: The 50/51P1 should operate reliably. 8


Fault 2: The 50/51P1 should not operate reliably.

8.8.3.2 Operate time test

Using “State Sequencer” testing module with two states:

The state1 is the normal state:

Inject Ua/Ub/Uc with the rated positive-sequence voltage.

Inject Ia/Ib/Ic with 0A.

Trigger condition is set to timed trigger, state duration = 2s.

The state 2 is the fault state:

Simulate the single phase grounding fault, the faulty voltage can be set between
0V~0.9Un.

The faulty phase current = 2× [50/51P1.I_Set].

The trigger condition can be set to binary input or timed trigger, and the state duration =
[50/51P1.t_Op]+100ms.

The test result:

The 50/51P1 should operate reliably, the operation error time should be:

≤ Max{30ms, 1%×[50/51P1.t_Op]}

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8 Protection Function Test

8.8.4 Inverse-time Phase Overcurrent Test

In this section, we take IEC normal inverse operation characteristic as a testing example. Modify
the testing settings as follow:

[50/51P1.Opt_Curve] = IECN

Using “Overcurrent” testing module

At first, configuring the “Test Object” of “Overcurrent” module, the “Tolerances” should be
set as follows:

8 The Inverse-time characteristic settings are shown as follows. If the inverse time
characteristic of the test is not in the predefined characteristics, you can customize the
new inverse time. In the figure, “I pick-up” corresponds to the setting 50/51P1.I_Set, and
time index is 50/51P1.TMS, please pay attention to the unit (Iref) of I pick-up, it’s related
with I nom (Secondary) in Test Object Device.

Add the new test project to “Overcurrent” testing module, shown as follows. tnom is
theoretical operate time of inverse-time protection, Tmax and tmin correspond to the

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8 Protection Function Test

upper and lower action time allowed by the error. tact is the record of actually action time.

The error of the actual action time is within the range set above only when
the testing current between 1.2~30×[I_set].

The test result: 8


The operation time should be within {tmin, tmax} for every test.

8.8.5 Voltage Control Element Test

The corresponding relationship between phase-segregated overcurrent element and the voltage
control element is as follows. The relationship between Phase-to-phase criterion, Negative-
sequence criterion and Zero-sequence criterion is “or”. The negative-sequence voltage is U2, the
zero-sequence voltage is 3U0.

Voltage control
Phase A Phase B Phase C
criterion
Uab<[50/51P.Upp_VCE] Uab<[50/51P.Upp_VCE] Ubc<[50/51P.Upp_VCE]
Phase-to-phase criterion
Uca<[50/51P.Upp_VCE] Ubc<[50/51P.Upp_VCE] Uca<[50/51P.Upp_VCE]
Negative-sequence
U2>[50/51P.U2_VCE] U2>[50/51P.U2_VCE] U2>[50/51P.U2_VCE]
criterion
U0_Cal>[50/51P.3U0_VC U0_Cal>[50/51P.3U0_VC U0_Cal>[50/51P.3U0_VC
Zero-sequence criterion
E] E] E]

Modify the 50/51P1 settings as follows:

[50/51P1.En_Volt_Blk] = Enabled

8.8.5.1 Phase-to-phase criterion test

Using “State Sequencer” testing module with two states:

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The state1 is the normal state:

Inject Ua/Ub/Uc with the rated positive-sequence voltage.

Inject Ia/Ib/Ic with 0A.

Trigger condition is set to timed trigger, the state duration = 2s (Should be larger than the
setting [VTS.t_DDO]).

The state 2 is the fault state:

Simulate the three-phase shorting fault, the faulty current = 2×[50/51P1.I_Set]

Fault 1: The faulty phase voltage = 0.95×[50/51P.VCE.Upp] / 1.732

Fault 2: The faulty phase voltage = 1.05×[50/51P.VCE.Upp] / 1.732

The trigger condition can be set to binary input or timed trigger, and the state duration =
Max {1.01×[50/51P1.t_Op], [50/51P1.t_Op]+100ms}

The test result:

Fault 1: The 50/51P1 should operate reliably;

Fault 2: The 50/51P should not operate reliably

8 8.8.5.2 Negative-sequence criterion test

Modify the 50/51P1 settings as follows:

[50/51P.VCE.Upp] = 10V

[50/51P.VCE.3U0] = 57V

[50/51P.VCE.U2] = 4V

Using “State Sequencer” testing module with two states:

The state1 is the normal state:

Inject Ua/Ub/Uc with the rated positive-sequence voltage

Inject Ia/Ib/Ic with 0A

Trigger condition is set to timed trigger, the state duration = 2s (Should be larger than the
setting [VTS.t_DDO])

The state 2 is the fault state:

Simulate the phaseA grounding fault, the faulty phase current =2×[50/51P1.I_Set]

The three-phase voltage angles are 0°, -120°,120°.

Fault 1: The faulty phase voltage = Un-3×1.05×[50/51P.VCE.U2]

Fault 2: The faulty phase voltage = Un-3×0.95×[50/51P.VCE.U2]

The trigger condition can be set to binary input or timed trigger, and the state duration =

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Max {1.01×[50/51P1.t_Op], [50/51P1.t_Op]+100ms}

The test result:

Fault 1: The 50/51P1 should operate reliably;

Fault 2: The 50/51P should not operate reliably

8.8.5.3 Zero-sequence criterion

Modify the 50/51P1 settings as follows:

[50/51P.VCE.Upp] = 10V

[50/51P.VCE.U2] = 57V

[50/51P.VCE.3U0] = 8V

Using “State Sequencer” testing module with two states:

The state1 is the normal state:

Inject Ua/Ub/Uc with the rated positive-sequence voltage

Inject Ia/Ib/Ic with 0A

Trigger condition is set to timed trigger, the state duration = 2s (Should be larger than the
setting [VTS.t_DDO]) 8
The state 2 is the fault state:

Simulate the phaseA grounding fault, the faulty phase current =2×[50/51P1.I_Set]

Fault 1: The faulty phase voltage = Un-1.05×[50/51P.VCE.3U0]

Fault 2: The faulty phase voltage = Un-0.95×[50/51P.VCE.3U0]

The trigger condition can be set to binary input or timed trigger, and the state duration =
Max {1.01×[50/51P1.t_Op], [50/51P1.t_Op]+100ms}

The test result:

Fault 1: The 50/51P1 should operate reliably;

Fault 2: The 50/51P should not operate reliably.

8.8.6 Direction Control Element Test


8.8.6.1 Forward direction test

Modify the 50/51P1 settings as follows:

[50/51P1.Opt_Dir] = Forward

Using “State Sequencer” testing module with two states:

The state1 is the normal state:

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Inject Ua/Ub/Uc with the rated positive-sequence voltage

Inject Ia/Ib/Ic with 0A

Trigger condition is set to timed trigger, the state duration = 2s (Should be larger than the
setting [VTS.t_DDO])

The state 2 is the fault state:

Simulate three phase shorting fault, the faulty phase current = 2× [50/51P1.I_Set], faulty
phase voltage = 50V

Fault 1: The angle of faulty phase current lags behind voltage by

[50/51P.DIR.RCA]-[50/51P.DIR.phi_Min_Fwd]+3°

Fault 2: The angle of faulty phase current lags behind voltage by

[50/51P.DIR.RCA]-[50/51P.DIR.phi_Min_Fwd]-3°

Fault 3: The angle of faulty phase current lags behind voltage by

[50/51P.DIR.RCA]+[50/51P.DIR.phi_Max_Fwd]-3°

Fault 4: The angle of faulty phase current lags behind voltage by

8 [50/51P.DIR.RCA]+[50/51P.DIR.phi_Max_Fwd]+3°

The trigger condition can be set to binary input or timed trigger, and the state duration =
Max {1.01×[50/51P1.t_Op], [50/51P1.t_Op]+100ms}

The test result:

Fault 1: The 50/51P1 should operate reliably;

Fault 2: The 50/51P1 should not operate reliably;

Fault 3: The 50/51P1 should operate reliably;

Fault 4: The 50/51P1 should not operate reliably

8.8.6.2 Reverse Direction Element Test

Modify the 50/51P1 settings as follows:

[50/51P1.Opt_Dir] = Reverse

Using “State Sequencer” testing module with two states:

The state1 is the normal state:

Inject Ua/Ub/Uc with the rated positive-sequence voltage

Inject Ia/Ib/Ic with 0A

Trigger condition is set to timed trigger, the state duration = 2s (Should be larger than the
setting [VTS.t_DDO])

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The state 2 is the fault state:

Simulate three phase shorting fault, the faulty phase current = 2×[50/51P1.I_Set], faulty
phase voltage = 50V

Fault 1: The angle of faulty phase current lags behind voltage by

180°+[50/51P.DIR.RCA]-[50/51P.DIR.phi_Min_Rev]+3°

Fault 2: The angle of faulty phase current lags behind voltage by

180°+[50/51P.DIR.RCA]-[50/51P.DIR.phi_Min_Rev]-3°

Fault 3: The angle of faulty phase current lags behind voltage by

180°+[50/51P.DIR.RCA]+[50/51P.DIR.phi_Max_Rev]-3°

Fault 4: The angle of faulty phase current lags behind voltage by

180°+[50/51P.DIR.RCA]+[50/51P.DIR.phi_Max_Rev]+3°

The trigger condition can be set to binary input or timed trigger, and the state duration =
Max {1.01×[50/51P1.t_Op], [50/51P1.t_Op]+100ms}

The test result:

Fault 1: The 50/51P1 should operate reliably;


8
Fault 2: The 50/51P1 should not operate reliably;

Fault 3: The 50/51P1 should operate reliably;

Fault 4: The 50/51P1 should not operate reliably.

8.8.7 Harmonic Control Element Test


Modify the 50/51P1 settings as follows:

[50/51P1.En_Hm_Blk] = Enabled

[50/51P.HMB.Opt_Blk] = PhaseBlk

Connect phase A and C of the tester in parallel to the phase A analog input of the device. The
fundamental current is exported by phase A of the tester, the second harmonic component current
is exported by phase C of the tester.

When modifying the phase-C frequency, you need to uncheck the “Link
Frequencies” of the right-click menu to modify the frequency value
separately for each phase.

Using “State Sequencer” testing module with two states:

The state1 is the normal state:

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Inject Ua/Ub/Uc with the rated positive-sequence voltage

Inject Ia/Ib/Ic with 0A

Trigger condition is set to timed trigger, the state duration = 2s (Should be larger than the
setting [VTS.t_DDO])

The state 2 is the fault state:

Simulate phase A grounding fault, the faulty phase current: IF = 2×[50/51P1.I_Set]

Changing the phase C current frequency to twice of fundamental

Fault 1: Ic = 0.95×[50/51P.HMB.K_Hm2]×IF

Fault 2: Ic = 1.05×[50/51P.HMB.K_Hm2]×IF

The trigger condition can be set to binary input or timed trigger, and the state duration =
Max {1.01×[50/51P1.t_Op], [50/51P1.t_Op]+100ms}

The test result:

Fault 1: The 50/51P1 should operate reliably;

Fault 2: The 50/51P should not operate reliably.

8 8.8.8 Abnormal Condition Blocking Test

In this section, we only take VT circuit failure alarm (VTS.Alm) block 50/51P1 as an example.
‘VTS.Alm’ block the direction Control Element has the same function, which will not be described
here.

Don’t forget to enable the [VTS_En] in Superv_Settings.

Modify the 50/51P1 settings as follows:

[50/51P.En_VTS_Blk] = Enabled

[50/51P1.En_Volt_Blk] = Enabled

[50/51P.DIR.En_VTS_Blk] = Disabled

Using “State Sequencer” testing module with two states:

The state1 is the normal state:

Fault 1:Inject Ua/Ub/Uc with the rated positive-sequence voltage

Fault 2: Inject U A-N = 0V, UB-N/U C-N with positive-sequence voltage Un

Inject Ia/Ib/Ic with 0A

Trigger condition is set to timed trigger, the state duration should be greater than
[VTS.t_DDO] (Delay drop off setting for the alarm of VT circuit supervision).

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The state 2 is the fault state:

Simulate three phase short circuit fault, the faulty phase current = 2×[50/51P1.I_Set], the
faulty phase voltage = 0.7×[50/51P.VCE.Upp]/1.732 (except the VT abnormal phase).

The trigger condition can be set to binary input or timed trigger, and the state duration =
Max {1.01×[50/51P1.t_Op], [50/51P1.t_Op]+100ms}.

The test result:

Fault 1: The 50/51P1 should operate reliably;

Fault 2: The 50/51P1 should not operate reliably.

8.8.9 Dropout Characteristic Test


8.8.9.1 Instantaneous dropout test

Modify the 50/51P1 settings as follows:

[50/51P1.Opt_Curve_DropOut] = Inst

Using “State Sequencer” testing module with four states:

The state1 is the normal state:

Inject Ua/Ub/Uc with the rated positive-sequence voltage 8


Inject Ia/Ib/Ic with 0A

Trigger condition is set to timed trigger, the state duration = 2s (Should be larger than the
setting [VTS.t_DDO])

The state 2 is the fault state:

Simulate single phase grounding fault, the faulty phase current = 2×[50/51P1.I_Set], fault
voltage should be set between 0V~0.9Un

Trigger condition is set to timed trigger, the state duration = 0.5×[50/51P1.t_Op]

The status 3 is the dropout state:

Inject Ua/Ub/Uc with the rated positive-sequence voltage

the faulty phase current should be less than 0.95×[50/51P1.I_Set], here set to
0.9×[50/51P1.I_Set]

Trigger condition is set to timed trigger, the state duration = 30ms

The state 4 is the fault state:

Simulate single phase grounding fault, the faulty phase current = 2×[50/51P1.I_Set], fault
voltage should be set between 0V~0.9Un

The trigger condition can be set to binary input or timed trigger, the state duration = Tmax
(the maximum operation time within the error tolerance) – t (the duration of status 2) +

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0.05 s, (which should be less than the minimum operation time within the error tolerance)

Where:

T_max = [50/51P1.t_Op]+Max{1%×[50/51P1.t_Op], 25ms} = 0.525s

The test result:

The 50/51P1 should not operate reliably.

8.8.9.2 Definite-time dropout test

Modify the 50/51P1 settings as follows:

[50/51P1.Opt_Curve_DropOut] = DefTime

[50/51P1.t_DropOut] = 1s

Using “State Sequencer” testing module with four states:

The state1 is the normal state:

Inject Ua/Ub/Uc with the rated positive-sequence voltage, inject Ia/Ib/Ic with 0A.

Trigger condition is set to timed trigger, the state duration = 2s (Should be larger than the
setting [VTS.t_DDO])

8 The state 2 is the fault state:

Simulate single phase grounding fault, the faulty phase current = 2×[50/51P1.I_Set], fault
voltage should be set between 0V~0.9Un

Trigger condition is set to timed trigger, state duration = 0.5×[50/51P1.t_Op]

The status 3 is the dropout state:

Inject Ua/Ub/Uc with the rated positive-sequence voltage

the faulty phase current should be less than 0.95×[50/51P1.I_Set], here set to
0.9×[50/51P1.I_Set]

Fault 1: Trigger condition is set to timed trigger, state duration =

[50/51P1.t_DropOut]-Max{1%×[50/51P1.t_DropOut], 30ms}

Fault 2: Trigger condition is set to timed trigger, state duration =

[50/51P1.t_DropOut]+Max{1%×[50/51P1.t_DropOut], 30ms}

The status 4 is the fault state:

Simulate single phase grounding fault, the faulty phase current = 2×[50/51P1.I_Set], fault
voltage should be set between 0V~0.9Un

The trigger condition can be set to binary input or timed trigger, the state duration = T_max
(the maximum operation time within the error tolerance) –t (the duration of status 2) + 0.05
s, which should be less than the minimum operation time within the error tolerance.

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Where:

T_max = [50/51P1.t_Op]+Max{1%×[50/51P1.t_Op], 25ms} = 0.525s

The test result:

Fault 1: The 50/51P1 should operate reliably;

Fault 2: The 50/51P1 should not operate reliably

8.8.9.3 Inverse-time dropout test

Modify the 50/51P1 settings as follows:

[50/51P1.Opt_Curve_DropOut] = IDMT

[50/51P1.Opt_Curv] = ANSIN

[50/51P1.TMS] = 0.5

Using “State Sequencer” testing module with four states:

The state1 is the normal state:

Inject Ua/Ub/Uc with the rated positive-sequence voltage

Inject Ia/Ib/Ic with 0A

Trigger condition is set to timed trigger, the state duration = 2s (Should be larger than the
8
setting [VTS.t_DDO])

The state 2 is the fault state:

Simulate single phase grounding fault, the faulty phase current = 2×[50/51P1.I_Set], fault
voltage should be set between 0V~0.9Un

Trigger condition is set to timed trigger, the state duration = 0.8 × T_cal. In which T_cal is
operation time in ANSIN

𝑘 0.0086
T_cal = { + 𝑐} × 𝑇𝑀𝑆 = { + 0.0185} × 0.5 = 0.317𝑠
(𝐼 ⁄𝐼𝑃 ) − 1
𝑎 (2⁄1)0.02 − 1

The status 3 is the dropout state:

Inject Ua/Ub/Uc with the rated positive-sequence voltage.

The fault phase current should be less than 0.95×[50/51P1.I_Set], here set to
0.8×[50/51P1.I_Set].

Trigger condition is set to timed trigger, the state duration = 0.5 × T_dr,in which T_dr is
the theoretical calculated dropout time from 100% droping to 0:

𝑡𝑟 0.46
T_dr = × 𝑇𝑀𝑆 = × 0.5 = 0.639𝑠
1 − (𝐼 ⁄𝐼𝑃 )2 1 − 0.82

The status 4 is the fault state:

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Simulate single phase grounding fault, the faulty phase current set as 2×[50/51P1.I_Set],
voltage should be set between 0V~0.9Un

The trigger condition can be set to binary input or timed trigger, the state duration = T_max
(the maximum operation time within the error tolerance)

The test result:

The 50/51P1 should operate reliably, and the tripping time which is counted from the begin of
state 4 should be (1-(0.8-0.5))×T_op, where T_op is the theoretical calculated tripping time,
and it should be less than T_max and larger than T_min.

Where T_max (the maximum operation time within the error tolerance) and T_min (the
minimum operation time within the error tolerance) are:

k
T_max = (1 + 5%) × T_cal + Max (( + c) × TMS − T_cal, 0.035s)
((I − 1% × I)⁄IP )a − 1

= (1 + 5%) × 0.317s + 0.035s = 0.368s

k
T_min = (1 − 5%) × T_cal − Max (T_cal − ( + c) × TMS, 0.035s)
((I + 1% × I)⁄IP )a − 1
= (1 − 5%) × 0.317s − 0.035s = 0.266s

8 Where T_cal is same with state 2.

8.9 Zero-sequence Overcurrent Protection (50/51G)

In this section, we take 50/51G1 as a testing example.

8.9.1 Settings List


Set the settings of Zero-sequence Overcurrent Protection as the following table.

No. Setting Value No. Setting Value


1 50/51G.DIR.RCA 60 deg 13 50/51G1.t_DropOut 0.000 s
2 50/51G.DIR.phi_Min_Fwd 90 deg 14 50/51G1.Opt_Dir Non_Directional
3 50/51G.DIR.phi_Max_Fwd 90 deg 15 50/51G1.En_Hm_Blk Disabled
4 50/51G.DIR.phi_Min_Rev 90 deg 16 50/51G1.En Enabled
5 50/51G.DIR.phi_Max_Rev 90 deg 17 50/51G1.Opt_Trp/Alm Trp
6 50/51G.DIR.3I0_Min 0.050 A 18 50/51G1.Opt_Curve IECDefTime
7 50/51G.DIR.3U0_Min 2.000 V 19 50/51G1.Opt_Curve_DropOut Inst
8 50/51G.DIR.En_VTS_Blk Disabled 20 50/51G1.TMS 0.100
9 50/51G.HMB.K_Hm2 0.200 21 50/51G1.tmin 0.000 s
10 50/51G.HMB.I_Rls 20.000 A 22 50/51G1.K 0.1400
11 50/51G1.3I0_Set 1.000 A 23 50/51G1.Alpha 0.0200
12 50/51G1.t_Op 0.500 s 24 50/51G1.C 0.0000

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8.9.2 Wiring Preparation

1. Connecting the tester voltage output Ua/Ub/Uc to the voltage input of 50/51G1 of the
device. Parallel the N of three phase and connect it back to the Un of tester.

2. Connecting the tester current output Ia/Ib/Ic to the current input of 50/51G1 of the device.
Parallel the N of three phase and connect it back to the In of tester.

3. Please set the tripping logic setting for 50/51G1 according to the configuration of PCS-
931S, and connect the corresponding binary output of 50/51G1 to the binary input of tester.

4. If the protection function enabling signal and the protection function disabling signal are
configured, the protection function enabling signal should be energized and the protection
function disabling signal should be de-energized.

8.9.3 Definite-time Zero-sequence Overcurrent Test

8.9.3.1 Current setting test

Using “State Sequencer” testing module with two states:

The state1 is the normal state:

Inject Ua/Ub/Uc with the rated positive-sequence voltage

Inject Ia/Ib/Ic with 0A 8


Trigger condition is set to timed trigger, the state duration = 2s

The state 2 is the fault state:

Simulate the single phase grounding fault, the faulty phase voltage should be set between
0V~0.9Un

Fault 1: The faulty phase current = 1.05×[50/51G1.3I0_Set]

Fault 2: The faulty phase current = 0.95×[50/51G1.3I0_Set]

The trigger condition can be set to binary input or timed trigger, and the state duration =
Max {1.01×[50/51G1.t_Op], [50/51G1.t_Op]+100ms}

The test result:

Fault 1: The 50/51G1 should operate reliably;

Fault 2: The 50/51G1 should not operate reliably.

8.9.3.2 Operate time test

Using “State Sequencer” testing module with two states:

The state1 is the normal state:

Inject Ua/Ub/Uc with the rated positive-sequence voltage

Inject Ia/Ib/Ic with 0A

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Trigger condition is set to timed trigger, the state duration = 2s (Should be larger than the
setting [VTS.t_DDO])

The state 2 is the fault state:

Simulate the single phase grounding fault, the faulty phase voltage should be set between
0V~0.9Un. The faulty phase current = 2× [50/51G1.3I0_Set]

The trigger condition can be set to binary input or timed trigger, and the state duration =
[50/51G1.t_Op]+100ms

The test result:

The 50/51G1 should operate reliably, the error of operation time should be:

≤ Max {25ms, 1%×[50/51G1.t_Op]}

8.9.4 Inverse-time Zero-sequence Overcurrent Test

In this section, we take IEC normal inverse operation characteristic as a testing example.

Modify the 50/51G1 settings as follows:

[50/51G1.Opt_Curve] = IECN

Using “Overcurrent” testing module


8
At first, configuring the “Test Object” of “Overcurrent” module

The “Tolerances” should be set as follows:

The Inverse-time characteristic settings are shown as follows. If the inverse-time


characteristic of the test is not in the predefined characteristics, you can customize the
new inverse time limit. In the figure, I pick-up corresponds to the setting [50/51G1.I_Set],
and time index is [50/51G1.TMS], please pay attention to the unit (Iref) of I pick-up,it’s
related with I nom (Secondary) in Test Object Device.

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Add the new test project to “Overcurrent” testing module, shown as follows. tnom is
theoretical operate time of inverse-time protection, Tmax and tmin correspond to the
upper and lower action time allowed by the error. tact is the record of actually action time. 8

The error of the actual operation time is within the range set above only
when the testing current between 1.2~30×[I_set]

The test result: the operation time should be within {tmin, tmax} for each test.

8.9.5 Direction Control Element Test


8.9.5.1 Forward direction test

Modify the 50/51G1 settings as follows:

[50/51G1.Opt_Dir] = Forward

Using “State Sequencer” testing module with four states:

The state1 is the normal state:

Inject Ua/Ub/Uc with the rated positive-sequence voltage

Inject Ia/Ib/Ic with 0A

Trigger condition is set to timed trigger, the state duration = 2s (Should be larger than the
setting [VTS.t_DDO])

The state 2 is the single phase grounding fault state:

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faulty phase current = 2× [50/51G1.3I0_Set],

faulty phase voltage = 50V (Greater than setting [50/51G.DIR.U_Min])

Fault 1: The angle of faulty phase current lags behind voltage by

[50/51G.DIR.RCA]+ [50/51G.DIR.phi_Max_Fwd]-3°

Fault 2: The angle of faulty phase current lags behind voltage by

[50/51G.DIR.RCA]+ [50/51G.DIR.phi_Max_Fwd]+3°

Fault 3: The angle of faulty phase current lags behind voltage by

[50/51G.DIR.RCA]- [50/51G.DIR.phi_Min_Fwd]+3°

Fault 4: The angle of faulty phase current lags behind voltage by

[50/51G.DIR.RCA]- [50/51G.DIR.phi_Min_Fwd]-3°

The trigger condition can be set to binary input or timed trigger, and the state duration =
Max {1.01×[50/51G1.t_Op], [50/51G1.t_Op]+100ms}

The test result:

Fault 1: The 50/51G1 should operate reliably;

8 Fault 2: The 50/51G1 should not operate reliably.

Fault 3: The 50/51G1 should operate reliably;

Fault 4: The 50/51G1 should not operate reliably

8.9.5.2 Reverse direction test

Modify the 50/51G1 settings as follows:

[50/51G1.Opt_Dir] = Reverse

Using “State Sequencer” testing module with two states:

The state1 is the normal state:

Inject Ua/Ub/Uc with the rated positive-sequence voltage

Inject Ia/Ib/Ic with 0A

Trigger condition is set to timed trigger, the state duration = 2s (Should be larger than the
setting [VTS.t_DDO])

The state 2 is the single phase grounding fault state:

faulty phase current = 2× [50/51G1.3I0_Set],

faulty phase voltage = 50V (Greater than setting [50/51G.DIR.U_Min])

Fault 1: The angle of faulty phase current lags than voltage by

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180°+[50/51G.DIR.RCA]+[50/51G.DIR.phi_Max_Rev]-3°

Fault 2: The angle of faulty phase current lags than voltage by

180°+[50/51G.DIR.RCA]+[50/51G.DIR.phi_Max_Rev]+3°

Fault 3: The angle of faulty phase current lags than voltage by

180°+[50/51G.DIR.RCA]-[50/51G.DIR.phi_Min_Rev]+3°

Fault 4: The angle of faulty phase current lags than voltage by

180°+[50/51G.DIR.RCA]-[50/51G.DIR.phi_Min_Rev]-3°

The trigger condition can be set to binary input or timed trigger, and the state duration =
Max {1.01×[50/51G1.t_Op], [50/51G1.t_Op]+100ms}

The test result:

Fault 1: The 50/51G1 should operate reliably;

Fault 2: The 50/51G1 should not operate reliably;

Fault 3: The 50/51G1 should operate reliably;

Fault 4: The 50/51G1 should not operate reliably

8.9.6 Harmonic Control Element Test 8


Modify the 50/51G1 settings as follows:

[50/51G1.En_Hm_Blk] = Enabled

Connect phase A and C of the tester in parallel to the phase A analog input of the device. The
fundamental current is exported by phase A of the tester, the second harmonic component current
is exported by phase C of the tester.

Notice: When modifying the C-phase frequency, you need to uncheck the “Link Frequencies” of the
right-click menu to modify the frequency value separately for each phase.

Using “State Sequencer” testing module with two states:

The state1 is the normal state:

Inject Ua/Ub/Uc with the rated positive-sequence voltage, inject Ia/Ib/Ic with 0A.

Trigger condition is set to timed trigger, the state duration = 2s (Should be larger than the
setting [VTS.t_DDO])

The state 2 is the fault state:

Simulate phase A grounding fault, the faulty phase voltage should be set between
0V~0.9Un. Faulty phase current: IF = 2×[50/51G1.3I0_Set],

Changing the phase C frequency to twice of fundamental

Fault 1: Ic = 0.95×[50/51G.HMB.K_Hm2]×IF

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8 Protection Function Test

Fault 2: Ic = 1.05×[50/51G.HMB.K_Hm2]×IF

The trigger condition can be set to binary input or timed trigger, and the state duration =
Max {1.01×[50/51G1.t_Op], [50/51G1.t_Op]+100ms}

The test result:

Fault 1: The 50/51G1 should operate reliably;

Fault 2: The 50/51G1 should not operate reliably.

8.9.7 Abnormal Condition Blocking Test

Modify the 50/51G1 settings as follows:

[50/51G.En_VTS_Blk] = Enabled

[50/51G1.Opt_Dir] = Forward

Don’t forget to enable the [VTS_En] in Superv_Settings.

Using “State Sequencer” testing module with two states:

8 The state1 is the normal state:

Fault 1: Inject Ua/Ub/Uc with the rated positive-sequence voltage.

Fault 2: Inject U A-N = 0V, UB-N/U C-N with the rated positive-sequence voltage.

Inject Ia/Ib/Ic with 0A

Trigger condition is set to timed trigger, the state duration should be greater than
[VTS.t_DDO] (Delay drop off setting for the alarm of VT circuit supervision)

The state 2 is the fault state:

Simulate phase A grounding fault, the faulty phase current = 2× [50/51G1.3I0_Set], the
faulty phase voltage should be set between 0V,the angle of phase A current lags behind
voltage by [50/51G.DIR.RCA]

The trigger condition can be set to binary input or timed trigger, and the state duration =
Max {1.01×[50/51G1.t_Op], [50/51G1.t_Op]+100ms}

The test result:

Fault 1: The 50/51G1 should operate reliably;

Fault 2: The 50/51G1 should not operate reliably.

8.9.8 Dropout Characteristic Test


8.9.8.1 Instantaneous dropout test

Modify the 50/51G1 settings as follows:

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[50/51G1.Opt_Curve_DropOut] = Inst

Using “State Sequencer” testing module with four states:

The state1 is the normal state:

Inject Ua/Ub/Uc with the rated positive-sequence voltage

Inject Ia/Ib/Ic with 0A

Trigger condition is set to timed trigger, the state duration = 2s (Should be larger than the
setting [VTS.t_DDO])

The state 2 is the fault state:

Simulate single phase grounding fault, the faulty phase current = 2× [50/51G1.3I0_Set],
voltage should be set between 0V~0.9Un

Trigger condition is set to timed trigger, the state duration = 0.5×[50/51G1.t_Op]

The status 3 is the dropout state:

The faulty phase current should be less than 0.95× [50/51G1.3I0_Set], here set to 0.9×
[50/51G1.3I0_Set], voltage should be set between 0V~0.9Un.

Trigger condition is set to timed trigger, the state duration = 30ms

The state 4 is the faulty state:


8
Simulate single phase grounding fault, the faulty phase current set as
2×[50/51G1.3I0_Set], voltage should be set between 0V~0.9Un

The trigger condition can be set to binary input or timed trigger, the state duration = T_max
(the maximum operation time within the error tolerance) – t (the duration of status 2) +
0.05 s, (which should be less than the minimum operation time within the error tolerance)

The test result:

The 50/51G1 should not operate reliably.

8.9.8.2 Definite-time dropout test

Modify the 50/51G1 settings as follows:

[50/51G1.Opt_Curve_DropOut] = DefTime

[50/51G1.t_DropOut] = 1s

Using “State Sequencer” testing module with four states:

The state1 is the normal state:

Inject Ua/Ub/Uc with the rated positive-sequence voltage

Inject Ia/Ib/Ic with 0A

Trigger condition is set to timed trigger, the state duration = 2s (Should be larger than the

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setting [VTS.t_DDO])

The state 2 is the fault state:

Simulate single phase grounding fault, the faulty phase current = 2× [50/51G1.3I0_Set],
voltage should be set between 0V~0.9Un

Trigger condition is set to timed trigger, the state duration = 0.5×[50/51G1.t_Op]

The status 3 is the dropout state:

The faulty phase current should be less than 0.95× [50/51G1.3I0_Set], here set to 0.9×
[50/51G13.I0_Set] , voltage should be set between 0V~0.9Un.

Fault 1: Trigger condition is set to timed trigger, the state duration =

[50/51G1.t_DropOut]-Max{1%×[50/51G1.t_DropOut], 30ms}

Fault 2: Trigger condition is set to timed trigger, the state duration =

[50/51G1.t_DropOut]+Max{1%×[50/51G1.t_DropOut], 30ms}

The status 4 is the faulty state:

Simulate single phase grounding fault, the faulty phase current = 2× [50/51G1.3I0_Set],
voltage should be set between 0V~0.9Un
8 The trigger condition can be set to binary input or timed trigger, the state duration = T_max
(Maximum operation time within the error tolerance) –t (the duration of status 2) + 0.05 s,
which should be under the minimum operation time within the error tolerance.

Where:

T_max = [50/51G1.t_Op]+Max{1%×[50/51G1.t_Op], 25ms} = 0.525s

The test result:

Fault 1: The 50/51G1 should operate reliably;

Fault 2: The 50/51G1 should not operate reliably

8.9.8.3 Inverse-time dropout test

Modify the 50/51G1 settings as follows:

[50/51G1.Opt_Curve_DropOut] = IDMT

[50/51G1.Opt_Curv] = ANSIN

[50/51G1.TMS] = 0.5

Using “State Sequencer” testing module with four states:

The state1 is the normal state:

Inject Ua/Ub/Uc with the rated positive-sequence voltage

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Inject Ia/Ib/Ic with 0A

Trigger condition is set to timed trigger, state duration = 2s

The state 2 is the fault state:

Simulate single phase grounding fault, the faulty phase current = 2× [50/51G1.3I0_Set],
voltage should be set between 0V~0.9Un

Trigger condition is set to timed trigger, the state duration = 0.5×T_cal. In which T_cal is
operate time in ANSIN

𝑘 0.0086
T_cal = { + 𝑐} × 𝑇𝑀𝑆 = { + 0.0185} × 0.5 = 0.317𝑠
(𝐼 ⁄𝐼𝑃 ) − 1
𝑎 (2⁄1)0.02 − 1

The status 3 is the dropout state:

Inject Ua/Ub/Uc with the rated positive-sequence voltage

The fault phase current should be less than 0.95× [50/51G1.3I0_Set], here set to 0.8×
[50/51G1.3I0_Set]

Trigger condition is set to timed trigger, the state duration = 0.5 × T_dr, in which T_dr is
the theoretical calculated dropout time from 100% droping to 0:

T_dr =
𝑡𝑟
1 − (𝐼 ⁄𝐼𝑃 )2
× 𝑇𝑀𝑆 =
0.46
1 − 0.82
× 0.5 = 0.639𝑠 8
The status 4 is the fault state:

Simulate single phase grounding fault, the faulty phase current = 2× [50/51G1.I_Set],
voltage should be set between 0V~0.9Un

The trigger condition can be set to binary input or timed trigger, the state duration = T_max
(Maximum operation time within the error tolerance)

The test result:

The 50/51G1 should operate reliably, and the tripping time which is counted from the begin of
state 4 should be (1-(0.8-0.5))×T_op, where T_op is the theoretical calculated tripping time,
and it should be less than T_max and larger than T_min.

Where T_max (the maximum operation time within the error tolerance) and T_min (the
minimum operation time within the error tolerance) are:

k
T_max = (1 + 5%) × T_cal + Max (|T_cal − ( + c) × TMS| , 0.035s)
((I − 1% × I)⁄IP )a − 1
= (1 + 5%) × 0.317s + 0.035s = 0.368s

k
T_min = (1 − 5%) × T_cal − Max (|T_cal − ( + c) × TMS| , 0.035s)
((I − 1% × I)⁄IP )a − 1
= (1 − 5%) × 0.317s − 0.035s = 0.266s

Where T_cal is same with state 2.

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8.10 Negative-sequence Overcurrent Protection (50/51Q)

In this section, we take 50/51Q1 as a testing example.

8.10.1 Settings List


Set the settings of Negative-sequence Overcurrent Protection as the following table.

No. Setting Value No. Setting Value


1 50/51Q.DIR.RCA 45 12 50/51Q1.Opt_Dir Non_Directional

2 50/51Q.DIR.phi_Min_Fwd 90 13 50/51Q1.En Enabled


3 50/51Q.DIR.phi_Max_Fwd 90 14 50/51Q1.Opt_Trp/Alm Trp
4 50/51Q.DIR.phi_Min_Rev 90 15 50/51Q1.Opt_Curve IECDefTime
5 50/51Q.DIR.phi_Max_Rev 90 16 50/51Q1.Opt_Curve_DropOut Inst
6 50/51Q.DIR.I2_Min 0.050 17 50/51Q1.TMS 0.100
7 50/51Q.DIR.U2_Min 1.000 18 50/51Q1.tmin 0.020
8 50/51Q.DIR.En_VTS_Blk Disabled 19 50/51Q1.K 0.1400
9 50/51Q1.I2_Set 1.000 A 20 50/51Q1.Alpha 0.0200
10 50/51Q1.t_Op 0.030 s 21 50/51Q1.C 0.0000
11 50/51Q1.t_DropOut 0.000 s

8 8.10.2 Wiring Preparation

1. Connecting the tester voltage output Ua/Ub/Uc to the voltage input of 50/51Q1 of the
device. Parallel the N of three phase and connect it back to the Un of tester.

2. Connecting the tester current output Ia/Ib/Ic to the current input of 50/51Q1 of the device.
Parallel the N of three phase and connect it back to the In of tester.

3. Please set the tripping logic setting for 50/51Q1 according to the configuration of PCS-
931S, and connect the corresponding binary output of 50/51Q1 to the binary input of tester.

4. If the protection function enabling signal and the protection function disabling signal are
configured, the protection function enabling signal should be energized and the protection
function disabling signal should be de-energized.

8.10.3 Definite-time Negative-sequence Overcurrent Protection Test

8.10.3.1 Current setting test

Set up two states in State Sequencer test module:

The state 1 is normal condition:

Inject Ua/Ub/Uc with rated voltage in positive sequence.

Inject Ia/Ib/Ic with 0A.

Trigger condition is set to timed trigger, state duration = 2s.

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The state 2 is fault condition:

Simulate the single phase grounding fault, the faulty phase voltage should be set between
0V~0.9Un

Fault 1: fault current = 1.05×3×[50/51Q1.I2_Set]

Fault 2: fault current = 0.95×3×[50/51Q1.I2_Set]

The trigger condition can be set to binary input or timed trigger, with a duration time of
Max {1.01×[50/51Q1.t_Op],[50/51Q1.t_Op] +100ms}

The test result:

Fault 1: The 50/51Q1 should operate reliably;

Fault 2: The 50/51Q1 should not operate reliably.

8.10.3.2 Operate time test

Set up two states in State Sequencer test module:

The state1 is normal condition:

Inject Ua/Ub/Uc as rated voltage in positive sequence

Inject Ia/Ib/Ic as 0 A.
8
The trig condition as time trig with a duration time of 2s

The state2 is fault condition:

Simulate single phase to earth fault with fault voltage set as 0V~0.9Un

Inject fault current as 2×3×[50/51Q1.I2_Set]

The trigger condition can be set to binary input or timed trigger, with a duration time of
[50/51Q1.t_Op] +100ms

The test result:

Earth fault protection should operate and the error of time delay should be ≤Max{30ms,
1%×[50/51Q1.t_Op] }

8.10.4 Inverse-time Negative-sequence Overcurrent Protection Test


This section takes IEC normal inverse Curve as example.

We simulate single-phase fault to test the Inverse-time characteristic curve.

Modify the 50/51Q1 settings as follows:

[50/51Q1.Opt_Curve] = IECN

Using “Overcurrent” testing module

At first, configuring the “Test Object” of “Overcurrent” module

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The “Tolerances” should be set as follows:

The Inverse-time characteristic settings are shown as follows. If the inverse-time


characteristic of the test is not in the predefined characteristics, you can customize the
new inverse time limit. In the figure, I pick-up corresponds to the setting 3×[50/51Q1.I_Set],
and time index is [50/51Q1.TMS], please pay attention to the unit (Iref) of I pick-up,it’s
related with I nom (Secondary) in “Test Object Device”.

Add the new test project to “Overcurrent” testing module, shown as follows. tnom is
theoretical operate time of inverse-time protection, Tmax and tmin correspond to the
upper and lower action time allowed by the error. tact is the record of actually action time.

The error of the actual operation time is within the range set above only
when the testing current between 1.2~30×[I_set]

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The test result: the operation time should be within {tmin, tmax} for every test.

8.10.5 Direction Control Element Test

8.10.5.1 Forward fault test

Modify the 50/51Q1 settings as follows:

[50/51Q1.Opt_Dir] = Forward

Set up two states in State Sequencer test module:

The state1 is normal condition:

Inject Ua/Ub/Uc as rated voltage in positive sequence

Inject Ia/Ib/Ic as 0

The trig condition as time trig with a duration time of 2s

The state2 is fault condition:

Simulate sigle phase grounding fault with fault phase current of 2×3×[50/51Q1.I2_Set],
and fault phase voltage of 30V (be higher than [50/51Q.DIR.U2_Min], and phase angle is
same with state 1)

Fault 1: fault current lags voltage = 8


[50/51Q.DIR.RCA]+ [50/51Q.DIR.phi_Max_Fwd]-3°

Fault 2: fault current lags voltage =

[50/51Q.DIR.RCA]+[50/51Q.DIR.phi_Max_Fwd]+3°

Fault 3: fault current lags voltage =

[50/51Q.DIR.RCA]-[50/51Q.DIR.phi_Min_Fwd]+3°

Fault 4: fault current lags voltage =

[50/51Q.DIR.RCA]-[50/51Q.DIR.phi_Min_Fwd]-3°

(For single phase grounding fault, the direction of polarized voltage −𝑈2 is same with
fault phase voltage.)

The trigger condition can be set to binary input or timed trigger, with a duration time of
Max{1.01×[50/51Q1.t_Op],[50/51Q1.t_Op]+100ms}

The test result:

Fault 1 and Fault 3: The 50/51Q1 should operate reliably;

Fault 2 and Fault 4: The 50/51Q1 should not operate reliably.

8.10.5.2 Reverse fault test

Modify the 50/51Q1 settings as follows:

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[50/51Q1.Opt_Dir] = Reverse

Set up two states in State Sequencer test module:

The state1 is normal condition:

Inject Ua/Ub/Uc with rated voltage in positive sequence.

Inject Ia/Ib/Ic with 0A.

Trigger condition is set to timed trigger, state duration = 2s.

The state2 is fault condition:

Simulate single phase grounding fault with fault phase current of 2×3×[50/51Q1.I2_Set],
and fault phase voltage of 50V (be higher than 50/51Q.DIR.U_Min, and phase angle is
same with State 1)

Fault 1:fault current lags fault voltage =

180°+[50/51Q.DIR.RCA]+([50/51Q.DIR.phi_Max_Rev]-3°

Fault 2: fault current lags fault voltage =

180°+[50/51Q.DIR.RCA]+([50/51Q.DIR.phi_Max_Rev]+3°

8 Fault 3: fault current lags fault voltage =

180°+[50/51Q.DIR.RCA]-([50/51Q.DIR.phi_Min_Rev]+3°

Fault 4: fault current lags fault voltage =

180°+[50/51Q.DIR.RCA]-([50/51Q.DIR.phi_Min_Rev]-3°

(For single phase grounding fault, the direction of polarized voltage −𝑈2 is same with
fault phase voltage.)

The trigger condition can be set to binary input or timed trigger, with a duration time of
Max{1.01×[50/51Q1.t_Op],[50/51Q1.t_Op]+100ms}

The test result:

Fault 1 and Fault 3: The 50/51Q1 should operate reliably;

Fault 2 and Fault 4: The 50/51Q1 should not operate reliably.

8.10.6 Abnormal Condition Blocking Test

Modify the 50/51G1 settings as follows:

[50/51Q.DIR.En_VTS_Blk] = Enabled

[50/51Q1.Opt_Dir] = Forward

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Don’t forget to enable the [VTS_En] in Superv_Settings.

Using “State Sequencer” testing module with two states:

The state1 is the normal state:

Fault 1:Inject Ua/Ub/Uc with the rated positive-sequence voltage.

Fault 2: Inject U A-N = 0V, UB-N/U C-N with the rated positive-sequence voltage.

Inject Ia/Ib/Ic with 0A

Trigger condition is set to timed trigger, the state duration should be greater than
[VTS.t_DDO] (Delay drop off setting for the alarm of VT circuit supervision)

The state 2 is the fault state:

Simulate phase A grounding fault, the faulty phase current = 2×3× [50/51Q1.I2_Set], the
faulty phase voltage should be set between 0V,the angle of phase A current lags behind
voltage by [50/51Q.DIR.RCA]

The trigger condition can be set to binary input or timed trigger, and the state duration =
Max {1.01×[50/51Q1.t_Op], [50/51Q1.t_Op]+100ms}
8
The test result:

Fault 1: The 50/51Q1 should operate reliably;

Fault 2: The 50/51Q1 should not operate reliably.

8.10.7 Dropout Characteristic Test


8.10.7.1 Instantaneous dropout test

Modify the 50/51Q1 settings as follows:

[50/51Q1.Opt_Curve_DropOut] = Inst

Using “State Sequencer” testing module with four states:

The state1 is the normal state:

Inject Ua/Ub/Uc with the rated positive-sequence voltage

Inject Ia/Ib/Ic with 0A

Trigger condition is set to timed trigger, the state duration = 2s (Should be larger than the
setting [VTS.t_DDO])

The state 2 is the fault state:

Simulate single phase grounding fault, the faulty phase current = 2×3× [50/51Q1.I2_Set],
voltage should be set between 0V~0.9Un

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Trigger condition is set to timed trigger, the state duration = 0.5×[50/51Q1.t_Op]

The status 3 is the dropout state:

The faulty phase current should be less than 0.95×3× [50/51Q1.I2_Set], here set to 0.9×
[50/51G1.3I0_Set], voltage should be set between 0V~0.9Un.

Trigger condition is set to timed trigger, the state duration = 30ms

The state 4 is the fault state:

Simulate single phase grounding fault, the faulty phase current set as

2×3× [50/51Q1.I2_Set], voltage should be set between 0V~0.9Un

The trigger condition can be set to binary input or timed trigger, the state duration = T_max
(the maximum operation time within the error tolerance) – t (the duration of status 2) +
0.05 s, (which should be less than the minimum operation time within the error tolerance)

The test result:

The 50/51Q1 should not operate reliably.

8.10.7.2 Definite-time dropout test

Modify the 50/51Q1 settings as follows:


8 [50/51Q1.Opt_Curve_DropOut] = DefTime

[50/51Q1.t_DropOut] = 1s

Using “State Sequencer” testing module with four states:

The state1 is the normal state:

Inject Ua/Ub/Uc with the rated positive-sequence voltage

Inject Ia/Ib/Ic with 0A

Trigger condition is set to timed trigger, the state duration = 2s (Should be larger than the
setting [VTS.t_DDO])

The state 2 is the fault state:

Simulate single phase grounding fault, the faulty phase current = 2×3× [50/51Q1.I2_Set],
voltage should be set between 0V~0.9Un

Trigger condition is set to timed trigger, the state duration = 0.5×[50/51Q1.t_Op]

The status 3 is the dropout state:

The faulty phase current should be less than 0.95×3× [50/51Q1.I2_Set], here set to 0.9×
3× [50/51Q1.I2_Set] , voltage should be set between 0V~0.9Un.

Fault 1: Trigger condition is set to timed trigger, the state duration =

[50/51Q1.t_DropOut]-Max{1%×[50/51Q1.t_DropOut], 30ms}

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Fault 2: Trigger condition is set to timed trigger, the state duration =

[50/51Q1.t_DropOut]+Max{1%×[50/51Q1.t_DropOut], 30ms}

The status 4 is the fault state:

Simulate single phase grounding fault, the faulty phase current = 2×3× [50/51Q1.I2_Set],
voltage should be set between 0V~0.9Un

The trigger condition can be set to binary input or timed trigger, the state duration = T_max
(Maximum operation time within the error tolerance) –t (the duration of status 2) + 0.05 s,
which should be under the minimum operation time within the error tolerance.

Where:

T_max = [50/51Q1.t_Op]+Max{1%×[50/51Q1.t_Op], 25ms} = 0.525s

The test result:

Fault 1: The 50/51Q1 should operate reliably;

Fault 2: The 50/51Q1 should not operate reliably

8.10.7.3 Inverse-time dropout test

Modify the 50/51Q1 settings as follows:

[50/51Q1.Opt_Curve_DropOut] = IDMT
8
[50/51Q1.Opt_Curv] = ANSIN

[50/51Q1.TMS] = 0.5

Using “State Sequencer” testing module with four states:

The state1 is the normal state:

Inject Ua/Ub/Uc with the rated positive-sequence voltage

Inject Ia/Ib/Ic with 0A

Trigger condition is set to timed trigger, state duration = 2s

The state 2 is the fault state:

Simulate single phase grounding fault, the faulty phase current =2×3× [50/51Q1.I2_Set],

voltage should be set between 0V~0.9Un

Trigger condition is set to timed trigger, the state duration = 0.5×T_cal. In which T_cal is
operate time in ANSIN

𝑘 0.0086
T_cal = { + 𝑐} × 𝑇𝑀𝑆 = { + 0.0185} × 0.5 = 0.317𝑠
(𝐼 ⁄𝐼𝑃 ) − 1
𝑎 (2⁄1)0.02 − 1

The status 3 is the dropout state:

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8 Protection Function Test

Inject Ua/Ub/Uc with the rated positive-sequence voltage

The fault phase current should be less than 0.95× 3× [50/51Q1.I2_Set], here set to 0.8×
3× [50/51Q1.I2_Set]

Trigger condition is set to timed trigger, the state duration = 0.5 × T_dr, in which T_dr is
the theoretical calculated dropout time from 100% droping to 0:

𝑡𝑟 0.46
T_dr = × 𝑇𝑀𝑆 = × 0.5 = 0.639𝑠
1 − (𝐼 ⁄𝐼𝑃 )2 1 − 0.82

The status 4 is the fault state:

Simulate single phase grounding fault, the faulty phase current = 2×3× [50/51Q1.I2_Set],
voltage should be set between 0V~0.9Un

The trigger condition can be set to binary input or timed trigger, the state duration = T_max
(Maximum operation time within the error tolerance)

The test result:

The 50/51Q1 should operate reliably, and the tripping time which is counted from the begin of
state 4 should be (1-(0.8-0.5))×T_op, where T_op is the theoretical calculated tripping time,
and it should be less than T_max and larger than T_min.

8 Where T_max (the maximum operation time within the error tolerance) and T_min (the
minimum operation time within the error tolerance) are:

k
T_max = (1 + 5%) × T_cal + Max (|T_cal − ( + c) × TMS| , 0.035s)
((I − 1% × I)⁄IP )a − 1
= (1 + 5%) × 0.317s + 0.035s = 0.368s

k
T_min = (1 − 5%) × T_cal − Max (|T_cal − ( + c) × TMS| , 0.035s)
((I − 1% × I)⁄IP )a − 1
= (1 − 5%) × 0.317s − 0.035s = 0.266s

Where T_cal is same with state 2.

8.11 Switch-On-To-Fault Protection (SOTF)

8.11.1 Settings List


Set the settings of SOTF Protection as the following table.

No. Symbol Value No. Symbol Value


1 SOTF.t_En 0.400 21 21SOTF.t_1PAR 0.025
2 50GSOTF.3I0_Set 1.000 22 21SOTF.En Enabled
3 50GSOTF.t_Op_1P 0.060 23 21SOTF.Z2.En_ManCls Enabled
4 50GSOTF.t_Op_3P 0.100 24 21SOTF.Z3.En_ManCls Disabled
5 50GSOTF.En Enabled 25 21SOTF.Z4.En_ManCls Disabled
6 50GSOTF.En_Hm2_Blk Disabled 26 21SOTF.Z2.En_3PAR Enabled

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7 50PSOTF.I_Set 1.000 27 21SOTF.Z3.En_3PAR Disabled


8 50PSOTF.t_Op 0.100 28 21SOTF.Z4.En_3PAR Disabled
9 50PSOTF.Up_Set 40.000 29 21SOTF.Z2.En_PSBR Enabled
10 50PSOTF.Upp_Set 70.000 30 21SOTF.Z3.En_PSBR Enabled
11 50PSOTF.U2_Set 2.000 31 21SOTF.Z4.En_PSBR Enabled
12 50PSOTF.3U0_Set 6.000 32 21SOTF.Z2.En_1PAR Enabled
13 50PSOTF.En_Up_UV Disabled 33 21SOTF.t_PDF 0.025
14 50PSOTF.En_Upp_UV Disabled 34 21SOTF.En_PDF Disabled
15 50PSOTF.En_U2_OV Disabled 35 SOTF.U_Ddl 30.000
16 50PSOTF.En_3U0_OV Disabled 36 SOTF.t_Ddl 15.000
17 50PSOTF.En Enabled 37 SOTF.Opt_Mode_ManCls CBPos
18 50PSOTF.En_Hm2_Blk Disabled 38 21L2.Real_K0 0.66
19 21SOTF.t_ManCls 0.025 39 21L2.ZG.Z_Set 5Ω
20 21SOTF.t_3PAR 0.025

8.11.2 Wiring Preparation

1. Connecting the tester voltage output Ua/Ub/Uc to the voltage input of


50PSOTF/50GSOTF/21SOTF of the device. Parallel the N of three phase and connect it back
to the “Un” of tester.

2. Connecting the tester current output Ia/Ib/Ic to the current input of 8


50PSOTF/50GSOTF/21SOTF of the device. Parallel the N of three phase and connect it back
to the “In” of tester.

3. Please set the tripping logic setting for 50PSOTF/50GSOTF according to the configuration of
PCS-931S, and connect the corresponding binary output of 50PSOTF/50GSOTF/21SOTF to
the binary input of tester.

4. If the protection function enabling signal and the protection function disabling signal are
configured, the protection function enabling signal should be energized and the protection
function disabling signal should be de-energized.

8.11.3 50PSOTF Initiated by CBPos

Modify the 50PSOTF settings as follows:

[50PSOTF.En]=Enabled

[50GSOTF.En]=Disabled

[21SOTF.En]=Disabled

Using “State Sequencer” testing module with two states:

The state1 is the normal state:

Make sure the CB is open or short the 52b_PhA/52b_PhB/52b_PhC with DC power supply
positive terminal.

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Inject Ua/Ub/Uc with the rated positive-sequence voltage.

Inject Ia/Ib/Ic with 0A.

Trigger condition is set to timed trigger, the state duration =2s (Should be larger than the
setting [VTS.t_DDO]).

The state 2 is the fault state:

Simulate the single phase grounding fault, the faulty phase voltage should be set between
0V~0.9Un.

The faulty phase current = 2×[50PSOTF.I_Set].

The trigger condition can be set to binary input or timed trigger, and the state duration
=[50PSOTF.t_Op]+100ms .

The test result:

The 50PSOTF should operate reliably, the operation time should under the error tolerance.

8.11.4 50GSOTF Initiated by CBPos

Modify the 50PSOTF settings as follows:

[50PSOTF.En]= Disabled
8
[50GSOTF.En]= Enabled

[21SOTF.En]=Disabled

Using “State Sequencer” testing module with two states:

The state1 is the normal state:

Make sure the CB is opened or short the 52b_PhA/52b_PhB/52b_PhC with DC power


supply positive terminal.

Inject Ua/Ub/Uc with the rated positive-sequence voltage

Inject Ia/Ib/Ic with 0A

Trigger condition is set to timed trigger, the state duration =2s (Should be larger than the
setting [VTS.t_DDO])

The state 2 is the fault state:

Simulate the single phase grounding fault, the faulty phase voltage should be set between
0V~0.9Un.

The faulty phase current = 2×[50GSOTF.I_Set].

The trigger condition can be set to binary input or timed trigger, and the state duration
=[50GSOTF.t_Op_3P]+100ms.

The test result:

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The 50GSOTF should operate reliably, the operation time should under the error tolerance.

8.11.5 21SOTF Initiated by CBPos

Modify the 50PSOTF settings as follows:

[50PSOTF.En]= Disabled

[50GSOTF.En]= Disabled

[21SOTF.En]= Enabled

Using “State Sequencer” testing module with two states:

The state1 is the normal state:

Make sure the CB is opened or short the 52b_PhA/52b_PhB/52b_PhC with DC power


supply positive terminal.

Inject Ua/Ub/Uc with the rated positive-sequence voltage

Inject Ia/Ib/Ic with 0A

Trigger condition is set to timed trigger, the state duration =2s (Should be larger than the
setting [VTS.t_DDO])

The state 2 is the fault state: 8


Simulate the single phase grounding fault.

Inject faulty current with 2A.

The faulty phase voltage = 0.7×( 1 + [21L2.K0]) × [21L2.ZG.Z_Set].

The trigger condition can be set to binary input or timed trigger, and the state duration
=[21SOTF.t_ManCls]+100ms.

The test result:

The 21SOTF should operate reliably, the operation time should under the error tolerance.

8.11.6 50PSOTF Initiated by Auto-Reclose

Modify the 50PSOTF settings as follows:

[50PSOTF.En]=Enabled

[50GSOTF.En]=Disabled

[21SOTF.En]=Disabled

Set the 50/51P and Auto-Reclose settings as follows:

Enable the 50/51P1, without any blocking element.

Enable the Auto Reclose.

Enabling no check for AR.

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[CBx.79.Opt_ValidMode]=setting

[CBx.79.En_3P]= Enabled

Using “State Sequencer” testing module with four states:

The state1 is the normal state:

Make sure the CB is closed.

Inject Ua/Ub/Uc with the rated positive-sequence voltage.

Inject Ia/Ib/Ic with 0A.

Trigger condition is set to timed trigger, the state duration =11s (should be greater than
the [VTS.t_DDO] and [79.t_CBClsd]).

The state 2 is the fault state:

Simulate single phase grounding fault, voltage can be set between 0V~0.9Un.

The faulty phase current=2×[50/51P1.I_Set].

Trigger condition is set to timed trigger, the state duration =[50/51P1.t_Op]+50ms.

The status 3 simulates AR delay condition

8 Inject Ua/Ub/Uc with the rated positive-sequence voltage.

Inject Ia/Ib/Ic with 0A.

Trigger condition is set to timed trigger, the state duration=[79.t_Dd_3PS1]+0.1s

The status 4 is the fault state:

Simulate single phase grounding fault, voltage should be set between 0V~0.9Un.

The faulty phase current =2×[50PSOTF.I_Set].

The trigger condition can be set to binary input or timed trigger, the state duration =
[50PSOTF.t_Op]+100ms.

The test result:

The 50/51P1 should operate at the first fault, after the 79.Colse, the 50PSOTF should operate
reliably and the operate time should under the error tolerance.

8.11.7 50GSOTF Initiated by Auto-Reclose


Modify the 50PSOTF settings as follows:

[50PSOTF.En]= Disabled

[50GSOTF.En]= Enabled

[21SOTF.En]=Disabled

Modify the 50/51G and Auto-Reclose settings as follows:

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Enable the 50/51G1, without any blocking element.

Enable the Auto Reclose.

Enabling no check for AR.

[CBx.79.Opt_ValidMode]=setting

[CBx.79.En_3P]= Enabled

Using “State Sequencer” testing module with four states:

The state1 is the normal state:

Make sure the CB is closed.

Inject Ua/Ub/Uc with the rated positive-sequence voltage.

Inject Ia/Ib/Ic with 0A.

Trigger condition is set to timed trigger,the state duration=11s (should be greater than the
[VTS.t_DDO] and [79.t_CBClsd]).

The state 2 is the fault state:

Simulate single phase grounding fault, voltage should be set between 0V~0.9Un.

The faulty phase current =2×[50/51G1.3I0_Set]. 8


Trigger condition is set to timed trigger, the state duration =[50/51G1.t_Op]+50ms.

The status 3 simulates AR delay condition:

Inject Ua/Ub/Uc with the rated positive-sequence voltage.

Inject Ia/Ib/Ic with 0A.

Trigger condition is set to timed trigger, state duration=[79.t_Dd_3PS1]+0.1s.

The status 4 is the fault state:

Simulate single phase grounding fault, voltage should be set between 0V~0.9Un.

The faulty phase current =2×[50GSOTF.3I0_Set].

The trigger condition can be set to binary input or timed trigger, the state duration =
[50GSOTF.t_Op]+100ms.

The test result:

The 50/51G1 should operate at the first fault, after the AR, the 50GSOTF should operate
reliably and the operate time should under the error tolerance.

8.11.8 21SOTF Initiated by Auto-Reclose

Modify the 21PSOTF settings as follows:

[50PSOTF.En]= Disabled

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[50GSOTF.En]= Disabled

[21SOTF.En]= Enabled

Modify the 50/51G and Auto-Reclose settings as follows:

Enable the 50/51G1, without any blocking element.

Enable the Auto Reclose.

[CBx.79.Opt_ValidMode]=setting

[CBx.79.En_3P]= Enabled

Using “State Sequencer” testing module with four states:

The state1 is the normal state:

Make sure the CB is closed.

Inject Ua/Ub/Uc with the rated positive-sequence voltage.

Inject Ia/Ib/Ic with 0A.

Trigger condition is set to timed trigger,the state duration=11s (should be greater than the
[VTS.t_DDO] and [79.t_CBClsd]).

8 The state 2 is the fault state:

Simulate single phase grounding fault.

Inject faulty current with 2A.

The faulty phase voltage = 0.7×( 1 + [21L2.K0] ) × [21L2.ZG.Z_Set].

Trigger condition is set to timed trigger, the state duration =[21L2.ZG.t_Op]+50ms.

The status 3 simulates AR delay condition:

Inject Ua/Ub/Uc with the rated positive-sequence voltage.

Inject Ia/Ib/Ic with 0A.

Trigger condition is set to timed trigger, state duration=[79.t_Dd_3PS1]+0.1s

The status 4 is the fault state:

Simulate single phase grounding fault

Inject faulty current with 2A.

The faulty phase voltage = 0.7×( 1 + [21L2.K0] ) × [21L2.ZG.Z_Set].

The trigger condition can be set to binary input or timed trigger, the state duration =
[21SOTF.t_3PAR]+100ms.

The test result:

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The 21L2 should operate at the first fault, after the AR, the 21SOTF should operate reliably
and the operate time should under the error tolerance.

8.12 Phase Overvoltage Protection (59P)

In this section, we take 59P1 as a testing example.

8.12.1 Settings List

Set the settings of 59P Protection as the following table.

No. Setting Value No. Setting Value


1 59P.Opt_Up/Upp UP 9 59P1.Opt_Curve IECDefTime
2 59P.Opt_1P/3P 1p 10 59P1.Opt_Curve_DropOut Inst
3 59P1.U_Set 76 V 11 59P1.TMS 0.5
4 59P1.K_DropOut 0.980 12 59P1.tmin 0s
5 59P1.t_Op 0.5 s 13 59P1.K 0.14
6 59P1.t_DropOut 0.000 s 14 59P1.Alpha 0.02
7 59P1.En Enabled 15 59P1.C 0.0000
8 59P1.Opt_Trp/Alm Trp

8.12.2 Wiring Preparation 8


1. Connecting the tester voltage output Ua/Ub/Uc to the voltage input of 59P1 of the device.
Parallel the N of three phase and connect it back to the Un of tester.

2. Please set the tripping logic setting for 59P1 according to the configuration of PCS-931S,
and connect the corresponding binary output of 59P1 to the binary input 1 of tester. (In
the Hardware Configuration of Test Universe Software, set Binary Input 1 to the type ‘Trip’)

3. If the protection function enabling signal and the protection function disabling signal are
configured, the protection function enabling signal should be energized and the protection
function disabling signal should be de-energized.

8.12.3 Definite-time Phase Overvoltage Test

8.12.3.1 Voltage settings test

Using “State Sequencer” testing module with two states:

The state1 is the normal state:

Inject Ua/Ub/Uc with the rated positive-sequence voltage

Inject Ia/Ib/Ic with 0A

Trigger condition is set to timed trigger, the state duration = 2s (Should be larger than the
setting [VTS.t_DDO])

The state 2 is the fault state:

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Simulate the single phase overvoltage fault, the faulty phase voltage:

Fault 1: The faulty phase voltage = 1.05×[59P1.U_Set]

Fault 2: The faulty phase voltage = 0.95×[59P1.U_Set]

The trigger condition can be set to binary input or timed trigger, and the state duration =

Max{1.01×[59P1.t_Op], [59P1.t_Op]+100ms}

The test result:

Fault 1: The 59P1 should operate reliably;

Fault 2: The 59P1 should not operate reliably.

8.12.3.2 Operate time test

Using “State Sequencer” testing module with two states:

The state1 is the normal state:

Inject Ua/Ub/Uc with the rated positive-sequence voltage.

Inject Ia/Ib/Ic with 0A.

Trigger condition is set to timed trigger, the state duration = 2s (Should be larger than the
8 setting [VTS.t_DDO]).

The state 2 is the fault state:

Simulate the single phase overvoltage fault, the faulty phase voltage =1.1×[59P1.U_Set].

The trigger condition can be set to binary input or timed trigger, and the state duration =

[59P1.t_Op]+100ms.

The test result:

The 59P1 should operate reliably, the error of operation time should be:

≤ Max{35ms, 1%×[59P1.t_Op]}

8.12.4 Inverse-time Phase Overvoltage Test

Modify the 59P1 settings as follows:

[59P1.Opt_Curve] = InvTime_U

Using “State Sequencer” to test module to test 1.1(1.2/1.5)×[59P1.U_Set] respectively, each test
point should be set with two states in relay tester.

The state1 is the normal state:

Inject Ua/Ub/Uc with the rated positive-sequence voltage.

Inject Ia/Ib/Ic with 0A.

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Trigger condition is set to timed trigger, the state duration = 2s (Should be larger than the
setting [VTS.t_DDO]).

The state 2 is the fault state:

Simulate the single phase overvoltage fault, the trigger condition can be set to binary input
or timed trigger, the faulty phase voltage should be set:

Fault 1: The faulty phase voltage = 1.1×[59P1.U_Set],

the duration = T1_max+100ms

Fault 2: The faulty phase voltage = 1.2×[59P1.U_Set],

the duration = T2_max+100ms

Fault 3: The faulty phase voltage = 1.5×[59P1.U_Set],

the duration = T3_max+100ms

Where:

𝑘 1
T_cal = { + 𝑐} × 𝑇𝑀𝑆 = { + 0} × 0.5 = 5𝑠
(𝑈⁄𝑈𝑃 )𝑎 − 1 (1.1)1 − 1

T1_max = 105% × T_cal + Max {{


k
((U − 1% × U)⁄UP )a − 1
+ c} × TMS − T_cal, 0.04s} 8
≈ (1 + 5%) × 5s + 0.618s = 5.868s

k
T1min = 95% × Tcal − Max {Tcal − { + c} × TMS, 0.04s}
((U + 1% × U)⁄UP )a − 1
≈ (1 − 5%) × 5s − 0.495s = 4.255s

Use the same formula to calculate T2_max/T2_min and T3_max/T3_min for U=


1.2×[59P1.U_Set] and U=1.5×[59P1.U_Set] respectively.

T2_max = 2.785s, T2_min = 2.234s

T3_max = 1.09s, T3_min = 0.91s

The test result:

The 59P1 should operate reliably for each fault, the error of operation time should meet the
follow condition:

T1_min ≤ Fault1 ≤ T1_max

T2_min ≤ Fault2 ≤ T2_max

T3_min ≤ Fault3 ≤ T3_max

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8 Protection Function Test

8.12.5 Dropout Characteristic Test


8.12.5.1 Instantaneous dropout test

Modify the 59P1 settings as follows:

[59P1.Opt_Curve_DropOut] = DefTime

[59P1.Opt_Curve_DropOut] = Inst

Using “State Sequencer” testing module with four states:

The state1 is the normal state:

Inject Ua/Ub/Uc with the rated positive-sequence voltage.

Inject Ia/Ib/Ic with 0A.

Trigger condition is set to timed trigger, the state duration = 2s (Should be larger than the
setting [VTS.t_DDO]).

The state 2 is the fault state:

Simulate single phase overvoltage fault, the faulty phase voltage = 1.1× [59P1.U_Set]

Trigger condition is set to timed trigger, state duration = 0.5×[59P1.t_Op]


8 The status 3 is the dropout state:

The faulty phase voltage = 0.9×[59P1.U_Set], the rest of two phase with the rated positive-
sequence voltage

Trigger condition is set to timed trigger, the state duration = 30ms

The status 4 is the fault state:

Simulate single phase overvoltage fault, the faulty phase voltage should be set:
1.1×[59P1.U_Set].

The trigger condition can be set to binary input or timed trigger, and the state duration =
T_max (Maximum operation time within the error tolerance) – t (the duration of status 2)
+ 0.05s, (which should be less than the minimum operation time within the error tolerance)

The test result:

The 59P1 should not operate reliably.

8.12.5.2 Definite-time dropout test

Modify the 59P1 settings as follows:

[59P1.Opt_Curve_DropOut] = DefTime

[59P1.t_DropOut] = 1s

Using “State Sequencer” testing module with four states:

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The state1 is the normal state:

Inject Ua/Ub/Uc with the rated positive-sequence voltage.

Inject Ia/Ib/Ic with 0A.

Trigger condition is set to timed trigger, the state duration = 2s (Should be larger than the
setting [VTS.t_DDO]).

The state 2 is the fault state:

Simulate single phase overvoltage fault, the faulty phase voltage set as 1.1× [59P1.U_Set].

Trigger condition is set to timed trigger, the state duration = 0.5×[59P1.t_Op]

The status 3 is the dropout state:

The faulty phase voltage = 0.9×[59P1.U_Set], the rest of two phases with the rated
positive-sequence voltage

Fault 1: Trigger condition is set to timed trigger, the state duration =

[59P1.t_DropOut]-Max{1%×[59P1.t_DropOut], 30ms}

Fault 2: Trigger condition is set to timed trigger, the state duration =

[59P1.t_DropOut]+Max{1%×[59P1.t_DropOut], 30ms}
8
The status 4 is the fault state:

Simulate single phase overvoltage fault, the faulty phase voltage = 1.1× [59P1.U_Set]

The trigger condition can be set to binary input or timed trigger, and the state duration =
T_max (the maximum operation time within the error tolerance) –t (the duration of status
2) + 0.05 s, which should be less than the minimum operation time within the error
tolerance)

The test result:

Fault 1: The 59P1 should operate reliably;

Fault 2: The 59P1 should not operate reliably

8.13 Residual Overvoltage Protection (59G)

In this section, we take 59G1 as a testing example.

8.13.1 Settings List

Set the settings of 59G Protection as the following table.

No. Setting Value No. Setting Value


1 59G1.3U0_Set 50 4 59G1.t_DropOut 0
2 59G1.K_DropOut 0.98 5 59G1.En Enabled

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8 Protection Function Test

3 59G1.t_Op 1 6 59G1.Opt_Trp/Alm Trp

8.13.2 Wiring Preparation

1. Connecting the tester voltage output Ua/Ub/Uc to the voltage input of 59G1 of the device.
Parallel the N of three phase and connect it back to the Un of tester.

2. Please set the tripping logic setting for 59G1 according to the configuration of PCS-931S,
and connect the corresponding binary output of 59G1 to the binary input of tester.

3. If the protection function enabling signal and the protection function disabling signal are
configured, the protection function enabling signal should be energized and the protection
function disabling signal should be de-energized.

8.13.3 Definite-time Residual Overvoltage Test


8.13.3.1 Voltage settings test

Using “State Sequencer” testing module with two states:

The state1 is the normal state:

Inject Ua/Ub/Uc with the rated positive-sequence voltage.

Inject Ia/Ib/Ic with 0A.


8 Trigger condition is set to timed trigger, the state duration = 2s (Should be larger than the
setting [VTS.t_DDO]) .

The state 2 is the fault state:

Simulate the single phase earth fault, the faulty phase voltage:

Fault 1: The faulty phase voltage = Un-1.05×[59G1.3U0_Set]

Fault 2: The faulty phase voltage = Un-0.95×[59G1.3U0_Set]

Where, Un is rated phase voltage.

The trigger condition can be set to binary input or timed trigger, and the state duration =

Max{1.01×[59G1.t_Op], [59G1.t_Op]+100ms}

The test result:

Fault 1: The 59G1 should operate reliably;

Fault 2: The 59G1 should not operate reliably.

8.13.3.2 Operate time test

Using “State Sequencer” testing module with two states:

The state1 is the normal state:

Inject Ua/Ub/Uc with the rated positive-sequence voltage

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Inject Ia/Ib/Ic with 0A

Trigger condition is set to timed trigger, the state duration = 2s (Should be larger than the
setting [VTS.t_DDO])

The state 2 is the fault state:

Simulate the single phase earth fault, the faulty phase voltage = Un-1.1×[59G1.3U0_Set]

The trigger condition can be set to binary input or timed trigger, and the state duration =
[59G1.t_Op]+100ms

The test result:

The 59G1 should operate reliably, the error of operation time should be:

≤ Max{35ms, 1%×[59G1.t_Op]}

8.13.4 Dropout Characteristic Test


Modify the 59G1 settings as follows:

[59G1.t_DropOut] = 1s

Using “State Sequencer” testing module with four states:

The state1 is the normal state: 8


Inject Ua/Ub/Uc with the rated positive-sequence voltage.

Inject Ia/Ib/Ic with 0A.

Trigger condition is set to timed trigger, the state duration = 2s (Should be larger than the
setting [VTS.t_DDO]).

The state 2 is the fault state:

Simulate single phase earth fault,

the faulty phase voltage=Un-1.1×[59G1.3U0_Set]

Trigger condition is set to timed trigger, the state duration = 0.5×[59G1.t_Op]

The status 3 is the dropout state:

The faulty phase voltage = Un - 0.9×[59G1.3U0_Set], the rest of two phases with the rated
positive-sequence voltage

Fault 1: Trigger condition is set to timed trigger, the state duration =

[59G1.t_DropOut]-Max{1%×[59G1.t_DropOut], 30ms}

Fault 2: Trigger condition is set to timed trigger, the state duration =

[59G1.t_DropOut]+Max{1%×[59G1.t_DropOut], 30ms}

The status 4 is the fault state:

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8 Protection Function Test

Simulate single phase overvoltage fault, the faulty phase voltage =

Un-1.1×[59G1.3U0_Set]

The trigger condition can be set to binary input or timed trigger, and the state duration =
T_max (the maximum operation time within the error tolerance) –t (the duration of status
2) + 0.05 s, which should be less than the minimum operation time within the error
tolerance.

The test result:

Fault 1: The 59G1 should operate reliably;

Fault 2: The 59G1 should not operate reliably

8.14 Negative-sequence Overvoltage Protection (59Q)

In this section, we take 59Q1 as a testing example.

8.14.1 Settings List

Set the settings of 59Q Protection as the following table.


No. Symbol Value No. Symbol Value

8 1
2
59Q1.U2_Set
59Q1.K_Drop-out
15
0.98
4
5
59Q1.t_Drop-out
59Q1.En
0
Enabled
3 59Q1.t_Op 1 6 59Q1.Opt_Trp/Alm Trp

8.14.2 Wiring Preparation

1. Connecting the tester voltage output Ua/Ub/Uc to the voltage input of 59Q1 of the device.
Parallel the N of three phase and connect it back to the Un of tester.

2. Please set the tripping logic setting for 59Q1 according to the configuration of 59Q1 of PCS-
931S, and connect the corresponding binary output of 59Q1 to the binary input of tester.

3. If the protection function enabling signal and the protection function disabling signal are
configured, the protection function enabling signal should be energized and the protection
function disabling signal should be de-energized.

8.14.3 Definite-time Negative-sequence Overvoltage Test


8.14.3.1 Voltage settings test

Using “State Sequencer” testing module with two states:

The state1 is the normal state:

Inject Ua/Ub/Uc with the rated positive-sequence voltage

Inject Ia/Ib/Ic with 0A

Trigger condition is set to timed trigger, the state duration =2s (Should be larger than the
setting [VTS.t_DDO])

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The state 2 is the fault state:

Simulate the single phase earth fault, the faulty phase voltage:

Fault 1: The faulty phase voltage = Un-3×1.05×[59Q1.U2_Set]

Fault 2: The faulty phase voltage = Un-3×0.95×[59Q1.U2_Set]

The trigger condition can be set to binary input or timed trigger, and the state duration =
Max{1.01×[59Q1.t_Op], [59Q1.t_Op]+100ms}

The test result:

Fault 1: The 59Q1 should operate reliably;

Fault2: The 59Q1 should not operate reliably.

8.14.3.2 Operate time test

Using “State Sequencer” testing module with two states:

The state1 is the normal state:

Inject Ua/Ub/Uc with the rated positive-sequence voltage

Inject Ia/Ib/Ic with 0A

Trigger condition is set to timed trigger, the state duration =2s (Should be larger than the 8
setting [VTS.t_DDO])

The state 2 is the fault state:

Simulate the single phase earth fault, the faulty phase voltage=

Un-1.1×3×[59Q1.U2_Set]

The trigger condition can be set to binary input or timed trigger, and the state duration =
[59Q1.t_Op]+100ms

The test result:

The 59Q1 should operate reliably, the error of operation time should be:

≤ Max{35ms, 1%×[59Q1.t_Op]}

8.14.4 Dropout Characteristic Test

Modify the 59Q1 settings as follows:

[59Q1.t_DropOut] = 1s

8.14.4.1 Definite-time dropout test

Using “State Sequencer” testing module with four states:

The state1 is the normal state:

Inject Ua/Ub/Uc with the rated positive-sequence voltage

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Inject Ia/Ib/Ic with 0A

Trigger condition is set to timed trigger, the state duration =2s (Should be larger than the
setting [VTS.t_DDO])

The state 2 is the fault state:

Simulate single phase overvoltage fault, the faulty phase voltage =

Un-1.1×3×[59Q1.U2_Set]

Trigger condition is set to timed trigger, the state duration =0.5×[59Q1.t_Op]

The status 3 is the dropout state:

the faulty phase voltage = Un-0.9×3×[59Q1.U2_Set], the rest of two phases with the rated
positive-sequence voltage

Fault1: Trigger condition is set to timed trigger, the state duration = 59Q1.t_DropOut-
Max{1%×59Q1.t_DropOut, 30ms}

Fault2: Trigger condition is set to timed trigger, the state duration =


59Q1.t_DropOut+Max{1%×59Q1.t_DropOut, 30ms}

The status 4 is the fault state:

8 Simulate single phase overvoltage fault, the faulty phase voltage =

Un-1.1×3×[59Q1.U2_Set]

The trigger condition can be set to binary input or timed trigger, and the state duration =
T_max (the maximum operation time within the error tolerance) –t (the duration of status
2) + 0.05 s, which should be less than the minimum operation time within the error
tolerance.

The test result:

Fault 1: The 59Q1 should operate reliably;

Fault 2: The 59Q1 should not operate reliably.

8.15 Phase Undervoltage Protection (27P)

In this section, we take 27P1 as a testing example.

8.15.1 Settings List

Set the settings of 27P Protection as the following table.

No. Setting Value No. Setting Value


1 27P.Opt_1P/3P 3p 10 27P1.Opt_Trp/Alm Trp
2 27P.Opt_Up/Upp Up 11 27P1.Opt_Curve IECDefTime

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3 27P.Opt_LogicMode Curr 12 27P1.Opt_Curve_DropOut Inst


4 27P1.U_Set 44 V 13 27P1.TMS 0.5
5 27P1.K_DropOut 1.030 14 27P1.tmin 0s
6 27P1.t_Op 1.000 s 15 27P1.K 0.1400
7 27P1.t_DropOut 0.000 s 16 27P1.Alpha 0.0200
8 27P1.En_VTS_Blk Disabled 17 27P1.C 0.0000
9 27P1.En Enabled

8.15.2 Wiring Preparation

1. Connecting the tester voltage output Ua/Ub/Uc to the voltage input of 27P1 of the device.
Parallel the N of three phase and connect it back to the Un of tester.

2. Connecting the tester current output Ia/Ib/Ic to the current input of 27P1 of the device.
Parallel the N of three phase and connect it back to the In of tester.

3. Please set the tripping logic setting for 27P1 according to the configuration of PCS-931S,
and connect the corresponding binary output of 27P1 to the binary input 1 of tester. (In
the Hardware Configuration of Test Universe Software, set Binary Input 1 to the type ‘Trip’)

4. If the protection function enabling signal and the protection function disabling signal are
configured, the protection function enabling signal should be energized and the protection
function disabling signal should be de-energized.
8
8.15.3 Definite-time Phase Undervoltage Test
8.15.3.1 Voltage settings test

Using “State Sequencer” testing module with two states:

The state1 is the normal state:

Inject Ua/Ub/Uc with the rated positive-sequence voltage, Ia/Ib/Ic with 0.1A (>0.04In).

Trigger condition is set to timed trigger, state duration = 5s (Should be larger than the
setting [VTS.t_DDO])

The state 2 is the fault state:

Simulate the three phase undervoltage fault, the current remains the same,The faulty
phase voltage should be set:

Fault 1: The faulty phase voltage = 0.95×[27P1.U_Set]

Fault 2: The faulty phase voltage = 1.05×[27P1.U_Set]

The trigger condition can be set to binary input or timed trigger, and the state duration =
Max {1.01×[27P1.t_Op], [27P1.t_Op]+100ms}

The test result:

Fault 1: The 27P1 should operate reliably;

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8 Protection Function Test

Fault 2: The 27P1 should not operate reliably.

8.15.3.2 Operate time test

Using “State Sequencer” testing module with two states:

The state1 is the normal state:

Inject Ua/Ub/Uc with the rated positive-sequence voltage, Ia/Ib/Ic with 0.1A (>0.04In)

Trigger condition is set to timed trigger, the state duration = 5s (Should be larger than the
setting [VTS.t_DDO])

The state 2 is the fault state:

Simulate the three phase undervoltage fault, the faulty phase voltage should be set =
0.9×[27P1.U_Set]

The trigger condition can be set to binary input or timed trigger, and the state duration =
[27P1.t_Op]+100ms

The test result:

The 27P1 should operate reliably, the error of operation time should be:

≤Max {35ms, 1%×[27P1.t_Op]}


8
8.15.4 Inverse-time Phase Undervoltage Test
Modify the 27P1 settings as follows:

[27P1.Opt_Curve] = InvTime_U

Using “State Sequencer” testing module to test 0.9(/0.7/0.5)×[27P1.U_Set] respectively, each one
with two states:

The state1 is the normal state:

Inject Ua/Ub/Uc with the rated positive-sequence voltage, Ia/Ib/Ic = 0.1A (>0.04In).

Trigger condition is set to timed trigger,the state duration = 5s (Should be larger than the
setting [VTS.t_DDO])

The state 2 is the fault state:

Simulate the three phase undervoltage fault, the trigger condition can be set to binary
input or timed trigger, the faulty phase voltage should be set:

Fault 1: The faulty phase voltage = 0.9×[27P1.U_Set],

the duration = T1_max+100ms

Fault 2: The faulty phase voltage = 0.7×[27P1.U_Set],

the duration = T2_max+100ms

Fault 3: The faulty phase voltage = 0.5×[27P1.U_Set],

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the duration = T3_max+100ms

Where:

𝑘 1
T_cal = { + 𝑐} × 𝑇𝑀𝑆 = { + 0} × 0.5 = 5𝑠
1 − (𝑈⁄𝑈𝑃 )𝑎 1 − (0.9)1

k
T1_max = 105% × T_cal + Max {{ + c} × TMS − T_cal, 0.05s}
1− ((U + 1% × U)⁄UP )a

= (1 + 5%) × 5s + 0.495s = 5.745s

k
T1_min = 95% × T_cal − Max {{ + c} × TMS − T_cal, 0.05s}
1 − ((U − 1% × U)⁄UP )a

= (1 − 5%) × 5s − 0.413s = 4.337s

Use the same formula to calculate T2_max/T2_min and T3_max/T3_min for U =


0.7×[27P1.U_Set] and U = 0.5×[27P1.U_Set] respectively.

T2_max = 1.8s, T2_min = 1.533s

T3_max = 1.1s, T3_min = 0.9s

The test result:


8
The 27P1 should operate reliably for each fault, the error of operation time should meet the
follow condition:

T1_min ≤ Fault1 ≤ T1_max

T2_min ≤ Fault2 ≤ T2_max

T3_min ≤ Fault3 ≤ T3_max.

8.15.5 Dropout Characteristic Test

8.15.5.1 Instantaneous dropout test

Using “State Sequencer” testing module with four states:

The state1 is the normal state:

Inject Ua/Ub/Uc with the rated positive-sequence voltage, Ia/Ib/Ic with 0.1A(>0.04In).

Trigger condition is set to timed trigger, the state duration = 5s (Should be larger than the
setting [VTS.t_DDO])

The state 2 is the fault state:

Simulate three phase undervoltage fault, the faulty phase voltage = 0.9×[27P1.U_Set]

Trigger condition is set to timed trigger, the state duration = 0.5×[27P1.t_Op]

The status 3 is the dropout state:

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8 Protection Function Test

The faulty phase voltage = 1.1×[27P1.U_Set]

Trigger condition is set to timed trigger, the state duration = 30ms

The status 4 is the fault state:

Simulate three phase undervoltage fault, the faulty phase voltage = 0.9×[27P1.U_Set].

The trigger condition can be set to binary input or timed trigger, the state duration = T_max
(the maximum operation time within the error tolerance)– t (the duration of status 2) + 0.05
s, (which should be less than the minimum operation time within the error tolerance)

The test result:

The 27P1 should not operate reliably.

8.15.5.2 Definite-time dropout test

Modify the 27P1 settings as follows:

[27P1.Opt_Curve_DropOut] = DefTime

[27P1.t_DropOut] = 1s

Using “State Sequencer” testing module with four states:

8 The state1 is the normal state:

Inject Ua/Ub/Uc with the rated positive-sequence voltage, Ia/Ib/Ic with 0.1A (>0.04In).

Trigger condition is set to timed trigger,the state duration = 5s (Should be larger than the
setting [VTS.t_DDO])

The state 2 is the fault state:

Simulate three phase undervoltage fault, the faulty phase voltage = 0.9×[27P1.U_Set]

Trigger condition is set to timed trigger, state duration = 0.5×[27P1.t_Op]

The status 3 is the dropout state

The faulty phase voltage = 1.1×[27P1.U_Set]

Fault 1: Trigger condition is set to timed trigger,the state duration =

[27P1.t_DropOut]-Max{1%×[27P1.t_DropOut], 30ms}

Fault 2: Trigger condition is set to timed trigger,the state duration =

[27P1.t_DropOut]+Max{1%×[27P1.t_DropOut], 30ms}

The status 4 is the fault state:

Simulate three phase undervoltage fault, the faulty phase voltage =0.9×[27P1.U_Set].

The State Termination set as Timeout or Binary Input, the duration = T_max (the maximum
operation time within the error tolerance) –t (the duration of status 2) + 0.05 s, which

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should be less than the minimum operation time within the error tolerance)

The test result:

Fault 1: The 27P1 should operate reliably;

Fault 2: The 27P1 should not operate reliably.

8.16 Overfrequency Protection (81O)

In this section, we take stage 1 as a testing example.

8.16.1 Settings List


Set the settings of 81O Protection as the following table.

No. Symbol Value No. Symbol Value


1 81.Upp_Blk 70.000 V 3 81O1.t_Op 0.100 s
2 81O1.f_Set 51.000 Hz 4 81O1.En Enabled

8.16.2 Wiring Preparation

1. Connecting the tester voltage output Ua/Ub/Uc to the voltage input of 81O1 of the device.
Parallel the N of three phase and connect it back to the Un of tester.
8
2. Please set the tripping logic setting for 81O1 according to the configuration of PCS-931S,
and connect the corresponding binary output of 81O1 to the binary input 1 of tester.

3. If the protection function enabling signal and the protection function disabling signal are
configured, the protection function enabling signal should be energized and the protection
function disabling signal should be de-energized.

8.16.3 Function Test

8.16.3.1 Overfrequency Protection Test

[81O1.f_Set] = 51Hz

Using “State Sequencer” testing module with two states:

The state1 is the normal state:

Inject Ua/Ub/Uc with the rated positive-sequence voltage, f = 50Hz

Inject Ia/Ib/Ic with 0A

Trigger condition is set to timed trigger,the state duration = 5s (Should be larger than the
setting [VTS.t_DDO])

The state 2 is the fault state:

Fault 1: Inject Ua/Ub/Uc with the rated positive-sequence voltage,

f = [81O1.f_Set]+0.01Hz

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Fault 2: Inject Ua/Ub/Uc with the rated positive-sequence voltage,

f = [81O1.f_Set]-0.01Hz

Inject Ia/Ib/Ic with 0A

The trigger condition can be set to binary input or timed trigger, and the state duration =
1.01×[81O1.t_Op]+100ms

The test result:

Fault 1: The 81O1 should operate reliably;

Fault 2: The 81O1 should not operate reliably

8.16.3.2 Operate time test

[81O1.t_Op] = 0.100 s

Using “State Sequencer” testing module with two states:

The state1 is the normal state:

Inject Ua/Ub/Uc with the rated positive-sequence voltage, f = 50Hz

Inject Ia/Ib/Ic with 0A

8 Trigger condition is set to timed trigger,the state duration = 5s (Should be larger than the
setting [VTS.t_DDO])

The state 2 is the fault state:

Fault 1: Inject Ua/Ub/Uc with the rated positive-sequence voltage,

f = [81O1.f_Set]+0.1Hz

The test result:

The 81O1 should operate reliably, the operation error time ≤Max{70ms, 1%×[81O1.t_Op]}.

8.17 Underfrequency Protection (81U)

In this section, we take stage 1 as a testing example.

8.17.1 Settings List

Set the settings of 81U Protection as the following table.

No. Setting Value No. Setting Value


1 81.Upp_Blk 70.000 V 3 81U1.t_Op 0.100 s
2 81U1.f_Set 49.000 Hz 4 81U1.En Enabled

8.17.2 Wiring Preparation

1. Connecting the tester voltage output Ua/Ub/Uc to the voltage input of the device. Parallel

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the N of three phase and connect it back to the Un of tester.

2. Please set the tripping logic setting for 81U1 according to the configuration of PCS-931S,
and connect the corresponding binary output of 81U1 to the binary input 1 of tester. (In
the Hardware Configuration of Test Universe Software, set Binary Input 1 to the type ‘Trip’)

3. If the protection function enabling signal and the protection function disabling signal are
configured, the protection function enabling signal should be energized and the protection
function disabling signal should be de-energized.

8.17.3 Function Test

8.17.3.1 Underfrequency Protection Test

[81U1.f_Set] = 49Hz

Using “State Sequencer” testing module with two states:

The state1 is the normal state:

Inject Ua/Ub/Uc with the rated positive-sequence voltage, f = 50Hz

Inject Ia/Ib/Ic with 0A

Trigger condition is set to timed trigger, the state duration = 5s (Should be larger than the
setting [VTS.t_DDO]) 8
The state 2 is the fault state:

Fault 1: Inject Ua/Ub/Uc with the rated positive-sequence voltage,

f = [81U1.f_Set]-0.01Hz

Fault 2: Inject Ua/Ub/Uc with the rated positive-sequence voltage,

f = [81U1.f_Set]+0.01Hz

Inject Ia/Ib/Ic with 0A

The trigger condition can be set to binary input or timed trigger, and the state duration =
1.01×[81U1.t_Op]+100ms

The test result:

Fault 1: The 81U1 should operate reliably;

Fault 2: The 81U1 should not operate reliably

8.17.3.2 Operate time test

[81O1.t_Op] = 0.100 s

Using “State Sequencer” testing module with two states:

The state1 is the normal state:

Inject Ua/Ub/Uc with the rated positive-sequence voltage, f = 50Hz

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Inject Ia/Ib/Ic with 0A

Trigger condition is set to timed trigger,the state duration = 5s (Should be larger than the
setting [VTS.t_DDO])

The state 2 is the fault state:

Fault 1: Inject Ua/Ub/Uc with the rated positive-sequence voltage,

f = [81U1.f_Set] - 0.1Hz

The test result:

The 81U1 should operate reliably, the operation error time ≤Max{25ms, 1%×[81U1.t_Op]}.

8.18 Frequency Rate-of-change Protection (81R)

In this section, we take stage 1 as a testing example.

8.18.1 Settings List

Set the settings of 81R protection as the following table.

No. Symbol Value No. Symbol Value

8 1
2
81.Upp_Blk
81R1.df/dt_Set
70.000 V
0.500 Hz/s
4
5
81R1.f_Pkp
81R1.En
45.000 Hz
Enabled
3 81R1.t_Op 0.100 s

8.18.2 Wiring Preparation

1. Connecting the tester voltage output Ua/Ub/Uc to the voltage input of 81R1 of the device.
Parallel the N of three phase and connect it back to the Un of tester.

2. Please set the tripping logic setting for 81R according to the configuration of PCS-931S,
and connect the corresponding binary output of 81R to the binary input 1 of tester.

3. If the protection function enabling signal and the protection function disabling signal are
configured, the protection function enabling signal should be energized and the protection
function disabling signal should be de-energized.

8.18.3 Function Test


8.18.3.1 Frequency Rate-of-change Protection Test

[81R1.df/dt_Set] = 0.500 Hz/s

Disable 81O and 81U to prevent from affecting the test results.

Using “Ramping” testing module with two states:

The state1 is the normal state:

Inject Ua/Ub/Uc with the rated positive-sequence voltage, frequency 50Hz (until VTS.Alm
returns).

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The state 2 is the fault state:

Fault 1: The frequency changed from 50Hz to 51Hz, the stepsize Delta=11mHz / dt=20ms
(d/dt=0.55Hz/s)

Fault 2: The frequency changed from 50Hz to 51Hz, the stepsize Delta=9mHz / dt=20ms
(d/dt=0.45Hz/s)

The test result:

Fault 1: The 81R1 should operate reliably;

Fault 2: The 81R1 should not operate reliably.

8.18.3.2 Operate time test

[81R1.t_Op] = 0.100 s

Using “State Sequencer” testing module with two states:

The state1 is the normal state:

Inject Ua/Ub/Uc with the rated positive-sequence voltage, f = 50Hz

Inject Ia/Ib/Ic with 0A

Trigger condition is set to timed trigger,the state duration = 5s (Should be larger than the
setting [VTS.t_DDO])
8
The state 2 is the fault state:

Fault 1: The frequency changed from 50Hz to 51Hz, the stepsize Delta=20mHz / dt=20ms
(d/dt=1Hz/s)

The test result:

The 81R1 should operate reliably, the operation error time ≤Max{70ms, 1%×[81R1.t_Op]}.

8.19 Reverse Power Protection (32R)

In this section, we take stage 1 as a testing example.

8.19.1 Settings List

Set the settings of 32R1 Protection as the following table.

No. Symbol Value No. Symbol Value


1 32R.U1_VCE 5.000 V 5 32R1.t_Op 0.100 s
2 32R.I1_CCE 0.100 A 6 32R1.En Enabled
3 32R.U2_VCE 8.000 V 7 32R1.Opt_Trp/Alm Trp
4 32R1.P_Set 0.200 pu

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8.19.2 Wiring Preparation

1. Connecting the tester voltage output Ua/Ub/Uc to the voltage input of 32R1 of the device.
Parallel the N of three phase and connect it back to the Un of tester.

2. Connecting the tester current output Ia/Ib/Ic to the current input of 32R1 of the device.
Parallel the N of three phase and connect it back to the In of tester.

3. Please set the tripping logic setting for 32R according to the configuration of PCS-931S,
and connect the corresponding binary output of 32R to the binary input 1 of tester.

4. If the protection function enabling signal and the protection function disabling signal are
configured, the protection function enabling signal should be energized and the protection
function disabling signal should be de-energized.

8.19.3 Function Test

8.19.3.1 Reverse Power Protection Test

[32R1.P_Set] = 0.2 pu

Using “State Sequencer” testing module with two states:

The state1 is the normal state:

8 Inject Ua/Ub/Uc with the rated positive-sequence voltage, f=50Hz

Inject Ia/Ib/Ic with 0A

Trigger condition is set to timed trigger, the state duration=11s (make sure the VTS.Alm is
canceled)

The state 2 is the fault state:

Inject Ua/Ub/Uc with the rated positive-sequence voltage

Fault 1: The angle of current Ia/Ib/Ic lag to the voltage by 180°, the amplitude=

([32R1.P_Set]+Max(5%×[32R1.P_Set], 0.01))/U××In

Fault 2: The angle of current Ia/Ib/Ic lag to the voltage by 180°, the amplitude=

([32R1.P_Set]-Max(5%×[32R1.P_Set], 0.01))/U××In

Where:

U× is per-unit value

The state termination using timeout or binary input, the duration =


1.01×[32R1.t_Op]+100ms

The test result:

Fault 1: The 32R1 should operate reliably;

Fault 2: The 32R1 should not operate reliably.

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8.19.3.2 Operate time test

[32R1.t_Op] = 0.100 s

Using “State Sequencer” testing module with two states:

The state1 is the normal state:

Inject Ua/Ub/Uc with the rated positive-sequence voltage, f=50Hz

Inject Ia/Ib/Ic with 0A

Trigger condition is set to timed trigger, the state duration=11s (make sure the VTS.Alm is
canceled)

The state 2 is the fault state:

Fault 1: The angle of current Ia/Ib/Ic lag to the voltage by 180°, the amplitude=

1.2 × [32R1.P_Set] / U× × In

The test result:

The 32R1 should operate reliably, the operation error time ≤Max{25ms, 1%×[32R1.t_Op]}.

8
The power setting is three phase power, which should calculate by the sum
of three phase active power.

8.20 Thermal Overload Protection (49)

In this section, we take 49P1 as a testing example.

8.20.1 Settings List


Set the settings of 49P1 Protection as the following table.

No. Symbol Value No. Symbol Value


1 49P1.Ib_Set 1A 6 49P1.Alpha_Cold 2.0
2 49P1.K_Trp 1.2 7 49P1.C_Disspt 1.0
3 49P1.K_Alm 1.1 8 49P1.En_Trp Enabled
4 49P1.t_Tau 0.1 min 9 49P1.En_Alm Disabled
5 49P1.K_T_Diff 30

8.20.2 Wiring Preparation

1. Connecting the tester voltage output Ua/Ub/Uc to the voltage input of 49P1 of the device.
Parallel the N of three phase and connect it back to the Un of tester.

2. Connecting the tester current output Ia/Ib/Ic to the current input of 49P1 of the device.
Parallel the N of three phase and connect it back to the In of tester.

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3. Please set the tripping logic setting for 49P1 according to the configuration of PCS-931S,
and connect the corresponding binary output of 49P1 to the binary input of tester.

4. If the protection function enabling signal and the protection function disabling signal are
configured, the protection function enabling signal should be energized and the protection
function disabling signal should be de-energized.

8.20.3 Thermal Overload Protection Test


Using “State Sequencer” testing module with two states:

The state1 is the normal state:

Inject Ua/Ub/Uc with the rated positive-sequence voltage

Inject Ia/Ib/Ic with 0A

Trigger condition is set to timed trigger, state duration =2s

The state 2 is the fault state:

Simulate overload fault with the voltage can set as same as state 1

Three phase current IF=(1.2~20)×[49P1.Ib_Set]×[49P1.K_Trp]

The trigger condition can be set to “binary input”.


8
The test result:

The 49P1 protection should operate reliably, and the operation time should be:

(IF − Max{1% × IF , 0.01 × In})Alpha


≤ 60 × Tau × ln
(IF − Max{1% × IF , 0.01 × In})Alpha − (I_Set)Alpha

And

(IF + Max{1% × IF , 0.01 × In})Alpha


≥ 60 × Tau × ln
(IF + Max{1% × IF , 0.01 × In})Alpha − (I_Set)Alpha

Where:

Tau = [49P1.t_Tau]

Alpha = [49P1.Alpha_Cold]

I_Set = [49P1.Ib_Set]×[49P1.K_Trp]

The heat accumulation of 49P1 protection should be 0 before the second


test.

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8.21 Undercurrent Protection (37)

8.21.1 Settings List

Set the settings of 37 Protection as the following table.

No. Symbol Value No. Symbol Value


1 37.I_Set 0.5 A 4 37.Opt_LogicMode CurrAndCBPos
2 37.t_Op 0.1 s 5 37.En Enabled
3 37.Opt_1P/3P 3P 6 37.Opt_Trp/Alm Trp

8.21.2 Wiring Preparation

1. Connecting the tester voltage output Ua/Ub/Uc to the voltage input of 37 protection of the
device. Parallel the N of three phase and connect it back to the Un of tester.

2. Connecting the tester current output Ia/Ib/Ic to the current input of 37 protection of the
device. Parallel the N of three phase and connect it back to the In of tester.

3. Please set the tripping logic setting for 37 according to the configuration of PCS-931S,
and connect the corresponding binary output of 37 to the binary input of tester.

4. Connect the binary output of tester to CB normally open position of PCS-931S to simulate
CB close position. 8
5. If the protection function enabling signal and the protection function disabling signal are
configured, the protection function enabling signal should be energized and the protection
function disabling signal should be de-energized.

8.21.3 Function Test


8.21.3.1 Current setting test

Using “State Sequencer” testing module with two states:

The state1 is the normal state:

Inject Ua/Ub/Uc with the rated positive-sequence voltage.

Inject Ia/Ib/Ic with 2×[37.I_Set].

Close Binary Output 1 of tester. Simulate CB close position.

Trigger condition is set to timed trigger, state duration =6s.

The state 2 is the fault state:

Keep voltage and Close Binary Output 1 of tester as same as state 1.

Simulate the three phase load is lost:

Fault 1: Three phase current = [37.I_Set]-Max{5%×[37.I_Set], 0.01×In} (larger 0.04In)

Fault 2: Three phase current = [37.I_Set]+Max{5%×[37.I_Set], 0.01×In} (larger 0.04In)

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The trigger condition can be set to binary input or timed trigger, and the state duration =
Max{1.01×[37.t_Op], [37.t_Op]+100ms}.

The test result:

Fault 1: The 37 protection should operate reliably.

Fault 2: The 37 protection should not operate reliably.

8.21.3.2 Operate time test

Using “State Sequencer” testing module with two states:

The state1 is the normal state:

Inject Ua/Ub/Uc with the rated positive-sequence voltage.

Inject Ia/Ib/Ic with 2×[37.I_Set].

Close Binary Output 1 of tester. Simulate CB close position.

Trigger condition is set to timed trigger, state duration =2s.

The state 2 is the fault state:

Keep voltage and Close Binary Output 1 of tester as same as state 1.

8 Simulate the three phase load is lost:

Fault 1: Three phase current = 0.5×[37.I_Set] (larger 0.04In).

The trigger condition can be set to binary input or timed trigger, and the state duration =
Max{1.01×[37.t_Op], [37.t_Op]+100ms}.

The test result:

The 37 should operate reliably, the operation error time ≤Max{25ms, 1%×[37.t_Op]}.

8.22 Breaker Failure Protection (50BF)

In this section, we take 50BF as a testing example.

8.22.1 Settings List


Set the settings of 50BF Protection as the following table.

No. Symbol Value No. Symbol Value


1 50BF.I_Set 1.000 9 50BF.En_t1 Enabled
2 50BF.3I0_Set 1.000 10 50BF.En_t2 Enabled
3 50BF.I2_Set 1.000 11 50BF.En_Ip Disabled
4 50BF.t_ReTrp 0.050 12 50BF.En_3I0_1P Disabled
5 50BF.t1_Op 0.150 13 50BF.En_3I0_3P Disabled
6 50BF.t2_Op 0.250 14 50BF.En_I2_3P Disabled

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7 50BF.En Enabled 15 50BF.En_CB_Ctrl Disabled


8 50BF.En_ReTrp Disabled 16 50BF.En_Alm_Init Disabled

8.22.2 Wiring Preparation

1. Connecting the tester voltage output Ua/Ub/Uc to the voltage input of 50BF of the device.
Parallel the N of three phase and connect it back to the Un of tester.

2. Connecting the tester current output Ia/Ib/Ic to the current input of 50BF of the device.
Parallel the N of three phase and connect it back to the In of tester.

3. According to the configuration of PCS-931S, set the output map of the 50BF and connect
the binary output 50BF.ReTrp3P, 50BF.op1 and 50BF.op2 with the trip binary input 1, 2
and 3 of tester.

4. Connecting the tester output 1/2 to the device input 50BF.ExtTrp3P and 50BF.ExtTrp_WOI
respectively

5. If the protection function enabling signal and the protection function disabling signal are
configured, the protection function enabling signal should be energized and the protection
function disabling signal should be de-energized.

8.22.3 Phase current criterion test


Modify the 50BF settings as follows: 8
[50BF.En_Ip] = Enabled

[50BF.En_3I0_3P] = Disabled

[50BF.En_I2_3P] = Disabled

Using “State Sequencer” testing module with two states:

The state1 is the normal state:

Inject Ua/Ub/Uc with the rated positive-sequence voltage

Inject Ia/Ib/Ic with 0A

Trigger condition is set to timed trigger, the state duration = 2s

The state 2 is the fault state:

Simulate the single phase grounding fault, the faulty phase voltage should be set between
0V~0.9Un

Simulate the Trp3P signal, initiate output 1 of the tester

Fault 1: The faulty phase current = 1.05×[50BF.I_Set]

Fault 2: The faulty phase current = 0.95×[50BF.I_Set]

The trigger condition can be set to binary input or timed trigger, and the state duration =
Max{1.01×[50BF.t2_Op], [50BF.t2_Op] +100ms}

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The test result:

Fault 1: The 50BF _t1/50BF _t2 should operate reliably;

Fault 2: The 50BF _t1/50BF _t2 should not operate reliably.

8.22.4 Zero-sequence Current Criterion Test

Modify the 50BF settings as follows:

[50BF.En_3I0_3P] = Enabled

[50BF.En_Ip] = Disabled

[50BF.En_I2_3P] = Disabled

Using “State Sequencer” testing module with two states:

The state1 is the normal state:

Inject Ua/Ub/Uc with the rated positive-sequence voltage

Inject Ia/Ib/Ic with 0A

Trigger condition is set to timed trigger, the state duration = 2s

The state 2 is the fault state:


8
Simulate the single phase grounding fault, the faulty phase voltage should be set between
0V~0.9Un

Simulate the Trp3P signal, initiate output 1 of the tester

Fault 1: The faulty phase current = 1.05×[50BF.3I0_Set]

Fault 2: The faulty phase current = 0.95×[50BF.3I0_Set]

The trigger condition can be set to binary input or timed trigger, and the state duration =
Max {1.01×[50BF.t2_Op], [50BF.t2_Op] +100ms}

The test result:

Fault 1: The 50BF _t1/50BF _t2 should operate reliably;

Fault 2: The 50BF _t1/50BF _t2 should not operate reliably.

8.22.5 Negative-sequence Current Criterion Test


Modify the 50BF settings as follows:

[50BF.En_I2_3P] = Enabled

[50BF.En_3I0_3P] = Disabled

[50BF.En_Ip] = Disabled

Using “State Sequencer” testing module with two states:

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The state1 is the normal state:

Inject Ua/Ub/Uc with the rated positive-sequence voltage

Inject Ia/Ib/Ic with 0A

Trigger condition is set to timed trigger, the state duration = 2s

The state 2 is the fault state:

Simulate the single phase grounding fault, the faulty phase voltage should be set between
0V~0.9Un

Simulate the Trp3P signal, initiate output 1 of the tester

Fault 1: The faulty phase current = 3×1.05×[50BF.I2_Set]

Fault 2: The faulty phase current = 3×0.95×[50BF.I2_Set]

The trigger condition can be set to binary input or timed trigger, and the state duration =
Max {1.01×[50BF.t2_Op], [50BF.t2_Op] +100ms}

The test result:

Fault 1: The 50BF _t1/50BF _t2 should operate reliably;

Fault 2: The 50BF _t1/50BF _t2 should not operate reliably.


8
8.22.6 50BF.52b Criterion Test

Modify the 50BF settings as follows:

[50BF.En_CB_Ctrl] = Enabled

Using “State Sequencer” testing module with two states:

The state1 is the normal state:

Inject Ua/Ub/Uc with the rated positive-sequence voltage

Inject Ia/Ib/Ic with 0A

Trigger condition is set to timed trigger, the state duration = 2s

The state 2 is the fault state:

Simulate the Trp3P signal, initiate output 1 of the tester

Inject the same current and voltage with status 1

Fault 1: CB is in closed position, 52b = 0

Fault 2: CB is in opened position, 52b = 1

The trigger condition can be set to binary input or timed trigger, and the state duration =
Max {1.01×[50BF.t2_Op], [50BF.t2_Op] +100ms}

The test result:

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Fault 1: The 50BF _t1/50BF _t2 should operate reliably;

Fault 2: The 50BF._t1/50BF _t2 should not operate reliably.

8.22.7 Three-phases Re-trip Test


Modify the 50BF settings as follows:

[50BF.En_ReTrp] = Enabled

[50BF.En_Ip] = Enabled

Using “State Sequencer” testing module with two states:

The state1 is the normal state:

Inject Ua/Ub/Uc with the rated positive-sequence voltage

Inject Ia/Ib/Ic with 0A

Trigger condition is set to timed trigger, the state duration = 2s

The state 2 is the fault state:

Simulate the single phase grounding fault, the faulty phase voltage should be set between
0V~0.9Un
8 Simulate the Trp3P signal, initiate output 1 of the tester

Fault 1: The faulty phase current = 1.05×[50BF.I_Set]

Fault 2: The faulty phase current = 0.95×[50BF.I_Set]

The trigger condition can be set to binary input or timed trigger, and the state duration =
Max{1.01×[50BF.t_ReTrp], [50BF.t_ReTrp] +100ms}

The test result:

Fault 1: The 50BF _Retrp should operate reliably;

Fault 2: The 50BF _Retrp should not operate reliably.

8.23 Broken Conductor Protection (46BC)

8.23.1 Settings List

Set the settings of 46BC Protection as the following table.

No. Symbol Value No. Symbol Value


1 46BC.I_Min 0.2 A 4 46BC.En Enabled
2 46BC.I2/I1_Set 0.300 5 46BC.Opt_Trp/Alm Trp
3 46BC.t_Op 1.000 s

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8.23.2 Wiring Preparation

1. Connecting the tester voltage output Ua/Ub/Uc to the voltage input of 46BC of the device.
Parallel the N of three phase and connect it back to the Un of tester.

2. Connecting the tester current output Ia/Ib/Ic to the current input of 46BC of the device.
Parallel the N of three phase and connect it back to the In of tester.

3. Please set the tripping logic setting for 46BC according to the configuration of PCS-931S,
and connect the corresponding binary output of 46BC to the binary input of tester.

4. If the protection function enabling signal and the protection function disabling signal are
configured, the protection function enabling signal should be energized and the protection
function disabling signal should be de-energized.

8.23.3 Function Test

8.23.3.1 Current setting test

Using “State Sequencer” testing module with two states:

The state1 is the normal state:

Inject Ua/Ub/Uc with the rated positive-sequence voltage.

Inject Ia/Ib/Ic with 0A. 8


Trigger condition is set to timed trigger, state duration =2s.

The state 2 is the fault state:

Keep voltage as same as state 1.

Simulate the single phase broken-conductor fault (three phase is positive-sequence):

The healthy phase current is Ip, the broken-conductor phase current is Ibc

I1 = 1/3×(2Ip+Ibc), I2 = 1/3×(Ip-Ibc), I2/I1>[46BC.I2/I1_Set]

Ibc< Ip×(1-2×[46BC.I2/I1_Set])/(1+[46BC.I2/I1_Set])

Fault 1:

The healthy phase current: Ip=1A (larger than 1.1×[46BC.I_Min]).

The broken-conductor phase current =

Ip×(1-2×([46BC.I2/I1_Set]+0.02))/(1+([46BC.I2/I1_Set]+0.02))

Fault 2:

The healthy phase current: Ip =1A (larger than 1.1×[46BC.I_Min]).

The broken-conductor phase current =

Ip×(1-2×([46BC.I2/I1_Set]-0.02))/(1+([46BC.I2/I1_Set]-0.02))

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Fault 3:

The healthy phase current = [46BC.I_Min]+Max{5%×[46BC.I_Min], 0.01×In}.

The broken-conductor phase current = 0A (I2/I1 should be larger than [46BC.I2/I1_Set]).

Fault 4:

The healthy phase current = [46BC.I_Min]-Max{5%×[46BC.I_Min], 0.01×In}.

The broken-conductor phase current = 0A (I2/I1 should be larger than [46BC.I2/I1_Set]).

The trigger condition can be set to binary input or timed trigger, and the state duration =
Max{1.01×[46BC.t_Op], [46BC.t_Op]+100ms}

The test result:

Fault 1: The 46BC should operate reliably

Fault 2: The 46BC should not operate reliably

Fault 3: The 46BC should operate reliably

Fault 4: The 46BC should not operate reliably

8.23.3.2 Operate time test

8 Using “State Sequencer” testing module with two states:

The state1 is the normal state:

Inject Ua/Ub/Uc with the rated positive-sequence voltage

Inject Ia/Ib/Ic with 0A

Trigger condition is set to timed trigger, state duration =2s

The state 2 is the fault state:

Keep voltage as same as state 1.

Simulate the single phase broken-conductor fault (three phase is positive-sequence):

The healthy phase current = 2×[46BC.I_Min].

The broken-conductor phase current = 0A (I2/I1 should be larger than [46BC.I2/I1_Set]).

The trigger condition can be set to binary input or timed trigger, and the state duration =
Max{1.01×[46BC.t_Op], [46BC.t_Op]+100ms}.

The test result:

The 46BC should operate reliably, the operation error time ≤Max{30ms, 1%×[46BC.t_Op]}.

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8.24 Pole Discrepancy Protection (62PD)

8.24.1 Settings List


Set the settings of 62PD Protection as the following table.

No. Symbol Value No. Symbol Value


1 62PD.3I0_Set 1.000 4 62PD.En Enabled
2 62PD.I2_Set 1.000 5 62PD.En_3I0/I2_Ctrl Enabled
3 62PD.t_Op 1.000 6 62PD.En_Init_Alm Disabled

8.24.2 Wiring Preparation

1. Connecting the tester voltage output Ua/Ub/Uc to the voltage input of 62PD protection of
the device. Parallel the N of three phase and connect it back to the Un of tester.

2. Connecting the tester current output Ia/Ib/Ic to the current input of 62PD protection of the
device. Parallel the N of three phase and connect it back to the In of tester.

3. Please set the tripping logic setting for 62PD according to the configuration of PCS-931S,
and connect the corresponding binary output of 62PD to the binary input of tester.

Connect the binary outputs of tester to CB normally close position of Phase A/ B/ C of


4.
PCS-931S to simulate three-phase breaker pole discrepancy condition. 8
5. If the protection function enabling signal and the protection function disabling signal are
configured, the protection function enabling signal should be energized and the protection
function disabling signal should be de-energized.

8.24.3 Function Test

8.24.3.1 Zero-sequence Current Criterion Test

Modify the 62PD settings as follows:

[62PD.En_3I0/I2_Ctr] = Enabled

[62PD.I2_Set] =50A

Using “State Sequencer” testing module with two states:

The state1 is the normal state:

Inject Ua/Ub/Uc with the rated positive-sequence voltage

Fault 1: Inject Ia/Ib/Ic with 1.05×[62PD.3I0_Set].

Fault 2: Inject Ia/Ib/Ic with 0.95×[62PD.3I0_Set].

Trigger condition is set to timed trigger, the state duration = 2s

The state 2 is the fault state:

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Ua/Ub/Uc are the same as state 1.

Inject Ia with 0 A . Ib and Ic are the same as state 1.

Initiating output 1 of the tester, simulate Phase A CB opened .

The trigger condition can be set to binary input or timed trigger, and the state duration =
Max {1.01×[62PD.t_Op], [62PD.t_Op] +100ms}

The test result:

Fault 1: The 62PD should operate reliably;

Fault 2: The 62PD should not operate reliably.

8.24.3.2 Negative-sequence Current Criterion Test

Modify the 50BF settings as follows:

[62PD.En_3I0/I2_Ctr] = Enabled

[62PD.3I0_Set] =50A

Using “State Sequencer” testing module with two states:

The state1 is the normal state:

8 Inject Ua/Ub/Uc with the rated positive-sequence voltage

Fault 1: Inject Ia/Ib/Ic with 1.05×3×[62PD.I2_Set].

Fault 2: Inject Ia/Ib/Ic with 0.95×3×[62PD.I2_Set].

Trigger condition is set to timed trigger, the state duration = 2s

The state 2 is the fault state:

Ua/Ub/Uc are the same as state 1.

Inject Ia with 0 A . Ib and Ic are the same as state 1.

Initiating output 1 of the tester, simulate Phase A CB opened .

The trigger condition can be set to binary input or timed trigger, and the state duration =
Max {1.01×[62PD.t_Op], [62PD.t_Op] +100ms}

The test result:

Fault 1: The 62PD should operate reliably;

Fault 2: The 62PD should not operate reliably.

8.24.3.3 Operate time test

Using “State Sequencer” testing module with two states:

The state1 is the normal state:

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Inject Ua/Ub/Uc with the rated positive-sequence voltage

Inject Ia/Ib/Ic with 2× [62PD.3I0_Set].

Trigger condition is set to timed trigger, state duration =2s.

The state 2 is the fault state:

Keep voltage as same as state 1.

Inject Ia with 0 A . Ib and Ic are the same as state 1.

Initiating output 1 of the tester, simulate Phase A CB opened .

The trigger condition can be set to binary input or timed trigger, and the state duration =
Max {1.01×[62PD.t_Op], [62PD.t_Op] +100ms}

The test result:

The 62PD should operate reliably, the operation error time ≤Max{30ms, 1%×[62PD.t_Op]}.

8.25 Stub Differential Protection (87STB)

Stub differential protection is mainly designed for one and a half breakers arrangement.

8.25.1 Setting List 8


Set the settings of Differential protection as the following table.
No. Setting Value No. Setting Value
1 87STB.I_Pkp 0.3 5 87STB.En Enabled
2 87STB.I_Alm 0.10 6 87STB.En_Diff_Alm Disabled
3 87STB.Slope 0.50 7 87STB.En_CTS_Blk Disabled
4 87STB.t_Op 0.030 8

8.25.2 Wiring Preparation

1. Connecting the tester voltage output Ua/Ub/Uc to the voltage input of the 87STB
protection . Parallel the N of three phase and connect it back to the “Un” of tester.

2. Connecting the tester current output Ia/Ib/Ic to the current input of the 87STB protection.
Parallel the N of three phase and connect it back to the “In” of tester.

3. Please connect the tripping connector to the binary input of tester.

4. Short-circuit the positive terminal of the DC power to the normally closed auxiliary contact
of line disconnector input of PCS931 to simulate line out of service.

5. If the protection function enabling signal and the protection function disabling signal are
configured, the protection function enabling signal should be energized and the protection
function disabling signal should be de-energized.

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8.25.3 Stub Differential Protection Test


The operation criterion is:
• •
|𝐼𝜑1 + 𝐼𝜑2 | > [87𝑆𝑇𝐵. 𝐼_𝑃𝑘𝑝]
{• • • •
|𝐼𝜑1 + 𝐼𝜑2 | > [87𝑆𝑇𝐵. 𝑆𝑙𝑜𝑝𝑒] × |𝐼𝜑1 − 𝐼𝜑2 |

Where:

• •
𝐼𝜑1 , 𝐼𝜑2 are secondary phase currents corresponding to both circuit breakers, are formed by phase

A, B, C

8.25.3.1 Pickup Current Setting of Stub Differential Protection Test

Using “State Sequencer” testing module with two states:

The state1 is the normal state:

Inject UA-N/UB-N/UC-N with the rated positive-sequence voltage

Inject IA1 /IB1 /IC1 and IA2 /IB2 /IC2 with 0A.

Short-circuit the positive terminal of the DC power to “87STB.89b_DS” input of PCS931


8 to Initiate Stub Differential Protection.

Trigger condition is set to timed trigger, state duration = 6s

The state 2 is the fault state:

Simulate the phase A grounding fault for example.

Keep voltage as same as state 1.

Inject IB1 /IC1 and IA2 /IB2 /IC2 with 0A.

Fault 1: IA1 = 87STB.I_Pkp + Max {5%×87STB.I_Pkp, 0.02In}

Fault 2: IA1 = 87STB.I_Pkp - Max {5%×87STB.I_Pkp, 0.02In}

The trigger condition can be set to “binary input or timed trigger”, and the state duration =
87STB.t_Op + 100ms

The test result:

Fault 1: The 87STB should operate reliably.

Fault 2: The 87STB should not operate reliably.

8.25.3.2 Operate Time Test

Using “State Sequencer” testing module with two states:

The state1 is the normal state:

Inject UA-N/UB-N/UC-N with the rated positive-sequence voltage

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Inject IA1 /IB1 /IC1 and IA2 /IB2 /IC2 with 0A.

Short-circuit the positive terminal of the DC power to “87STB.89b_DS” input of PCS931


to Initiate Stub Differential Protection.

Trigger condition is set to timed trigger, state duration = 6s

The state 2 is the fault state:

Simulate the phase A grounding fault.

Keep voltage as same as state 1.

Inject IB1 /IC1 and IA2 /IB2 /IC2 with 0A.

The faulty phase current IA1 = 2× [87STB.I_Pkp].

The trigger condition can be set to binary input or timed trigger, and the state duration =
87STB.t_Op + 100ms.

The test result:

The The 87STB should operate reliably, the operation error time ≤Max{30ms, 1%×
[87STB.t_Op]}.

8.25.3.3 Stub Differential characteristic Test

Short-circuit the positive terminal of the DC power to “87STB.89b_DS” input of PCS931 to Initiate
8
Stub Differential Protection.

1. Testing mode one: “State Sequencer” testing module.

According to the setting [87STB.I_Pkp](0.3A) and [87STB.Slope](0.5),we calculate a series of


threshold values that can simulate relay operation.

No. CB1 CT1(A) CB2 CT2(A) I_diff (A) I_res (A)


1 0.900 0.300 0.60 1.20
2 1.800 0.600 1.20 2.40
3 2.700 0.900 1.80 3.60

CB1 and CB2 represent the bus breaker and the tie breaker respectively.

Take Case No.1 as an example.

Using “State Sequencer” testing module with two states:

The state1 is the normal state:

Inject UA-N/UB-N/UC-N with the rated positive-sequence voltage

Inject IA1 /IB1 /IC1 and IA2 /IB2 /IC2 with 0A

Trigger condition is set to timed trigger, state duration = 6s

The state 2 is the fault state:

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Keep voltage as same as state 1.

Simulate the single-phase grounding fault, the phase angle between two CT1 and CT2 is
180°.

Fault 1: The faulty phase of CT1 current = 0.945A, the faulty phase of CT2 current =
0.3A.

Fault 2: The faulty phase of CT1 current = 0.855A, the faulty phase of CT2 current =
0.3A.

The trigger condition can be set to “binary input or timed trigger”, and the state duration =
87STB.t_Op + 100ms

The test result:

Fault 1: The 87STB should operate reliably.

Fault 2: The 87STB should not operate reliably.

According to the above table, complete the test from No.01 to No.03.

2. Testing mode two: “Stub Diff Operating Characteristic” testing module.

Test the Stub differential protection automatically by “Diff Operating Characteristic” module.

8 At first, configuring the “Differential Protection Parameters” of “Test Object”.

“Protected Object” of “Differential Protection Parameters”should be set as follows:

Choose the “Busbar” item, other parameters keep default.

“CT” of “Differential Protection Parameters”should be set as follows:

According to setting, set the CT ratio of the CT1 and CT2.

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“Protection Device” of “Differential Protection Parameters”should be set as follows:

Set “Ibias Calculation”,“Factor K1” and“Reference Current”,etc.

“Characteristic Definition” of “Differential Protection Parameters”should be set as follows:

Add the low slope characteristics line,and the high slope characteristics line.

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“Test View” should be set as follows:

Choose the “Search Test”→“Add Sweep...” →“Add Multiple”to add test items. Set the parameter
as the follow picture.Choose the faulty type as “L1-E”.

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8.26 Dead Zone Protection (50DZ)


8
8.26.1 Settings List

Set the settings of 37 Protection as the following table.

No. Symbol Value No. Symbol Value


1 50DZ.I_Set 1.000 3 50DZ.En Enabled
2 50DZ.t_Op 0.100 4 50DZ.En_Alm_Init Disabled

8.26.2 Wiring Preparation

1. Connecting the tester voltage output Ua/Ub/Uc to the voltage input of 50DZ protection of
the device. Parallel the N of three phase and connect it back to the Un of tester.

2. Connecting the tester current output Ia/Ib/Ic to the current input of 50DZ protection of the
device. Parallel the N of three phase and connect it back to the In of tester.

3. Please set the tripping logic setting for 50DZ according to the configuration of PCS-931S,
and connect the corresponding binary output of 50DZ to the binary input of tester.

4. Connect the binary output 1 of tester to the tripping signal input of PCS-931S to initiate
50DZ protection .

5. Short-circuit the positive terminal of the DC power to CB normally close position of Phase
A/ B/ C input of PCS931 to simulate three-phase breaker open condition.

6. If the protection function enabling signal and the protection function disabling signal are
configured, the protection function enabling signal should be energized and the protection

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8 Protection Function Test

function disabling signal should be de-energized.

8.26.3 Function Test

8.26.3.1 Phase current criterion test

Using “State Sequencer” testing module with two states:

The state1 is the normal state:

Short-circuit the positive terminal of the DC power to CB normally close position of Phase
A/ B/ C input of PCS931S to simulate three-phase breaker open condition.

Inject UA-N/UB-N/UC-N with the rated positive-sequence voltage.

Inject Ia/Ib/Ic with 0 A.

Trigger condition is set to timed trigger, the state duration = 2s

The state 2 is the fault state:

Keep voltage as same as state 1.

Simulate the single phase grounding fault.

Initiating output 1 of the tester, simulate the line protection trip.


8 Fault 1: The faulty phase current = 1.05×[50DZ.I_Set]

Fault 2: The faulty phase current = 0.95×[50DZ.I_Set]

The trigger condition can be set to binary input or timed trigger, and the state duration =
Max {1.01×[50DZ.t_Op], [50DZ.t_Op] +100ms}

The test result:

Fault 1: The 50DZ should operate reliably;

Fault 2: The 50DZ should not operate reliably.

8.26.3.2 Operate time test

Using “State Sequencer” testing module with two states:

The state1 is the normal state:

Short-circuit the positive terminal of the DC power to CB normally close position of Phase
A/ B/ C input of PCS931 to simulate three-phase breaker open condition.

Inject Ua/Ub/Uc with the rated positive-sequence voltage

Inject Ia/Ib/Ic with 0 A.

Trigger condition is set to timed trigger, state duration =2s.

The state 2 is the fault state:

Simulate the single phase grounding fault.

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Keep voltage as same as state 1.

The faulty phase current = 2×[50DZ.I_Set].

Initiating output 1 of the tester, simulate the line protection trip.

The trigger condition can be set to binary input or timed trigger, and the state duration =
Max {1.01×[50DZ.t_Op], [50DZ.t_Op] +100ms}

The test result:

The 50DZ should operate reliably, the operation error time ≤Max{30ms, 1%×[50DZ.t_Op]}.

8.27 Synchronism Check and Automatic Reclose (25/79)

In this section, we take 50/51P1 to initiate AR, please configure ‘50/51P1.op’ to initiate 79.Trp3P in
the configuration.

8.27.1 Settings List


Synchronism Check Settings

No. Setting Value No. Setting Value


1
2
25.Opt_ValidMode
25.En_SynChk
Setting
Enabled
11 25.df/dt_Set
12 25.phi_Diff_Set
1.00 Hz/s
15.00 °
8
3 25.En_DdChk Enabled 13 25.phi_Comp 0.00 °
4 25.U_UV 80.00 % 14 25.Opt_Mode_DdChk SynLvRefDd
5 25.U_OV 170.00 % 15 25.U_DdChk 30 V
6 25.f_UF 45.000 Hz 16 25.U_LvChk 40 V
7 25.f_OF 65.000 Hz 17 25.t_Reset 5s
8 25.Opt_U_SynChk Ub 18 25.t_Close_CB 80 ms
9 25.U_Diff_Set 10.00 V 19 25.En_f_Diff_Chk Enabled
10 25.f_Diff_Set 0.20 Hz 20 25.En_df/dt_Chk Enabled

Auto-Reclosure Settings

No. Setting Value No. Setting Value


1 79.Opt_RSYN_ValidMode Setting 19 79.t_WaitMaster 3.000
2 79.En_SynChk Disabled 20 79.t_SecFault 0.300
3 79.En_SynDd_RefDd Disabled 21 79.t_PersistTrp 0.200
4 79.En_SynLv_RefDd Disabled 22 79.t_Fail 0.200
5 79.En_SynDd_RefLv Disabled 23 79.t_PW_AR 0.120
6 79.En_NoChk Disabled 24 79.En_AddDly Disabled
7 79.Num 1 25 79.En_FailCheck Disabled
8 79.t_Dd_1PS1 0.800 26 79.En_PDF_Blk Disabled
9 79.t_Dd_3PS1 0.600 27 79.En_CutPulse Disabled
10 79.t_Dd_3PS2 0.600 28 79.En Enabled

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11 79.t_Dd_3PS3 0.600 29 79.Opt_Enable Setting


12 79.t_Dd_3PS4 0.600 30 79.En_CBInit Disabled
13 79.t_CBClsd 5.000 31 79.Opt_Priority None
14 79.t_CBReady 5.000 32 79.Opt_ValidMode Setting
15 79.t_Wait_Chk 5.000 33 79.En_1P Disabled
16 79.t_Reclaim 8.000 34 79.En_3P Enabled
17 79.t_DDO_BlkAR 5.000 35 79.En_1P/3P Disabled
18 79.t_AddDly 0.500 36

8.27.2 Wiring Preparation

1. Connecting the tester voltage output Ua/Ub/Uc to the voltage input of the device. Parallel
the N of three phase and connect it back to the “Un” of tester.
2. Enable the second group voltage output of tester, using as Usyn, connect it to Ux of the
device.
3. Connecting the tester current output Ia/Ib/Ic to the current input of the device. Parallel the
N and connect it back to the “In” of tester.
4. According to the configuration of PCS-931S, set the output map of the 79.Close and
connect the binary output with the trip binary input of tester. (In the Hardware Configuration
8 of Test Universe Software, set Binary Input 1 as Close)
5. Keep the CB closed, which means 52b = 0.
6. Keep 79.CB_Healthy = 1, without any blocking binary input initiated.(If these signals are
not configured, it will satisfy the demands as default)

7. If the protection function enabling signal and the protection function disabling signal are
configured, the protection function enabling signal should be energized and the protection
function disabling signal should be de-energized.

8.27.3 AR with Synchronism check


Change the settings as follows:

[79.En_SynChk] = Enabled.

[50/51P1.En] = Enabled, [50/51P1.I_Set] = 1A; [50/51P1.t_Op] = 0s

8.27.3.1 Voltage difference check test

Using “State Sequencer” testing module with four states:

The state1 is the normal state:

Inject UA-N/UB-N/UC-N with the rated positive-sequence voltage, Usyn with same Amplitude
and phase angle between UB-N

Inject IA /IB /IC with 0A

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Trigger condition is set to timed trigger, the state duration = 12s (the duration should be
greater than the VTS.t_DDO and make sure that 79.Ready = 1)

The state 2 is the fault state:

Simulate the single-phase grounding fault, the faulty phase voltage can set between
0V~0.9Un

The faulty phase current = 2×50/51P1.I_Set

The State Termination using Timeout, the duration = 100ms

The status 3 simulates CB trip state:

Inject UA-N/UB-N/UC-N = 0V, Usync = Un

Inject IA /IB /IC with 0A

The State Termination using Timeout, the duration = 79.t_Dd_3PS1

The status 4 simulates the waiting for AR

Inject Usync = Un, the same phase angle with UB-N

Fault 1: Inject UA-N/UB-N/UC-N with positive-sequence voltage, the amplitude is different


from Usyn by:
25. U_Diff_Set − max{1% × 25. U_Diff_Set, 0.1V} 8
Fault 2: Inject UA-N/UB-N/UC-N with positive-sequence voltage, the amplitude is different
from Usyn by:
25. U_Diff_Set + max{1% × 25. U_Diff_Set, 0.1V}

(Notice: the voltage amplitude in this status should be larger than 25.U_LvChk)

The trigger condition can be set to binary input or timed trigger, and the state duration =
79. t_Wait_Chk + 1s

The test result:

Fault 1: The 79.Close should operate reliably;

Fault 2: The 79.Close should not operate reliably.

8.27.3.2 Frequency difference check test

Using “State Sequencer” testing module with four states:

The state1 is the normal state:

Inject UA-N/UB-N/UC-N with the rated positive-sequence voltage, Usyn with same Amplitude
and phase angle between UB-N

Inject IA /IB /IC with 0A

Trigger condition is set to timed trigger, the state duration = 12s (the duration should be
greater than the VTS.t_DDO and make sure that 79.Ready = 1)

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The state 2 is the fault state:

Simulate the single-phase grounding fault, The faulty phase voltage can set between
0V~0.9Un

The faulty phase current = 2×50/51P1.I_Set

The State Termination using Timeout, the duration = 100ms

The status 3 simulates CB trip state:

Inject UA-N/UB-N/UC-N = 0V, Usync = Un

Inject IA /IB /IC with 0A

The State Termination using Timeout, the duration = 79.t_Dd_3PS1

The status 4 is waiting for AR

Inject Usync = Un, the same phase angle with UB-N

Fault 1:Inject UA-N/UB-N/UC-N with positive-sequence voltage, the frequency is different


from Usyn by:
25. f_Diff_Set − 0.01Hz

Fault 2: Inject UA-N/UB-N/UC-N with positive-sequence voltage, the frequency is different


8 from Usyn by:
25. f_Diff_Set + 0.01Hz

Inject IA /IB /IC with 0A

The trigger condition can be set to binary input or timed trigger, and the state duration =
79. t_Wait_Chk + 1s

The test result:

Fault 1: The 79.Close should operate reliably;

Fault 2: The 79.Close should not operate reliably.

8.27.3.3 Phase difference check test

Using “State Sequencer” testing module with four states:

The state1 is the normal state:

Inject UA-N/UB-N/UC-N with the rated positive-sequence voltage, Usyn with same Amplitude
and phase angle between UB-N

Inject IA /IB /IC with 0A

Trigger condition is set to timed trigger, the state duration = 12s (the duration should be
greater than the VTS.t_DDO and make sure that 79.Ready = 1)

The state 2 is the fault state:

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Simulate the single-phase grounding fault, the faulty phase voltage can set between
0V~0.9Un

The faulty phase current = 2×50/51P1.I_Set

The State Termination using Timeout, the duration = 100ms

The status 3 simulates CB trip state:

Inject UA-N/UB-N/UC-N = 0V, Usync = Un

Inject IA /IB /IC with 0A

The State Termination using Timeout, the duration = 79.t_Dd_3PS1

The status 4 is waiting for AR

Inject Usync = Un, the angle is the same as state 3.

Fault 1:Inject UA-N/UB-N/UC-N with positive-sequence voltage, the angle of UB-N is different
from Usyn by: 25. phi_Diff_Set + 2°

Fault 2: Inject UA-N/UB-N/UC-N with positive-sequence voltage, the angle of UB-N is different
from Usyn by: 25. phi_Diff_Set − 2°

Inject IA /IB /IC with 0A

The trigger condition can be set to binary input or timed trigger, and the state duration =
8
79. t_Wait_Chk + 1s

The test result:

Fault 1: The 79.Close should operate reliably;

Fault 2: The 79.Close should not operate reliably.

8.27.4 Dead Charge Check Test


Change the settings as follows:

[50/51P1.En] = Enabled, [50/51P1.I_Set] = 1A; [50/51P1.t_Op] = 0s

8.27.4.1 Live check for synchronization side and dead check for reference side
(SynLvRefDd)

[79.En_SynLv_RefDd] = Enabled

Using “State Sequencer” testing module with four states:

The state1 is the normal state:

Inject UA-N/UB-N/UC-N with the rated positive-sequence voltage, Usyn with same Amplitude
and phase angle between UB-N

Inject IA /IB /IC with 0A

Trigger condition is set to timed trigger, the state duration = 12s (should be greater than

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8 Protection Function Test

the setting VTS.t_DDO and make sure that 79.Ready = 1)

The state 2 is the fault state:

Simulate the single-phase grounding fault, the faulty phase voltage can set between
0V~0.9Un

The faulty phase current = 2×50/51P1.I_Set

Trigger condition is set to timed trigger, the state duration = 100ms

The status 3 is waiting for AR

Inject IA /IB /IC with 0A

Fault 1:

Inject Usync, the amplitude is

25. U_LvChk + max{1% × 25. U_LvChk, 0.1V}, same phase angle with UB-N.

Inject UA-N/UB-N/UC-N with positive-sequence voltage, the amplitude is

25. U_DdChk − max{1% × 25. U_DdChk, 0.1V}

Fault 2:

8 Inject Usync, the amplitude is

25. U_LvChk + max{1% × 25. U_LvChk, 0.1V}, same phase angle with UB-N.

Inject UA-N/UB-N/UC-N with positive-sequence voltage, the amplitude is

25. U_DdChk + max{1% × 25. U_DdChk, 0.1V}

Fault 3:

Inject Usync, the amplitude is

25. U_LvChk − max{1% × 25. U_LvChk, 0.1V}, same phase angle with UB-N.

Inject UA-N/UB-N/UC-N with positive-sequence voltage, the amplitude is

25. U_DdChk − max{1% × 25. U_DdChk, 0.1V}

Inject IA /IB /IC with 0A

Fault 4:

Inject Usync, the amplitude is

25. U_LvChk − max{1% × 25. U_LvChk, 0.1V}, same phase angle with UB-N .

Inject UA-N/UB-N/UC-N with positive-sequence voltage, the amplitude is

25. U_DdChk + max{1% × 25. U_DdChk, 0.1V}

The trigger condition can be set to binary input or timed trigger, and the state duration =

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8 Protection Function Test

79. t_Dd_3PS1 + 1s

The test result:

Fault 1: The 79.Close should operate reliably;

Fault 2&3&4: The 79.Close should not operate reliably.

8.27.4.2 Dead check for synchronization side and live check for reference side
(SynDdRefLv)

[79.En_SynDd_RefLv] = Enabled

First, change the setting: 25.Opt_Mode_DdChk = SynDdRefLv

Using “State Sequencer” testing module with four states:

The state1 is the normal state:

Inject UA-N/UB-N/UC-N with the rated positive-sequence voltage, Usyn with same Amplitude
and phase angle between UB-N

Inject IA /IB /IC with 0A

Trigger condition is set to timed trigger, the state duration = 12s (should be greater than
the setting VTS.t_DDO and make sure that 79.Ready = 1)

The state 2 is the fault state:


8
Simulate the single-phase grounding fault, the faulty phase voltage can set between
0V~0.9Un

The faulty phase current = 2×50/51P1.I_Set

Trigger condition is set to timed trigger, the state duration = 100ms

The status 3 is waiting for AR

Inject IA /IB /IC with 0A

Fault 1:

Inject Usync, the amplitude is

25. U_DdChk − max{1% × 25. U_DdChk, 0.1V}, same phase angle with UB-N

Inject UA-N/UB-N/UC-N with positive-sequence voltage, the amplitude is

25. U_LvChk + max{1% × 25. U_LvChk, 0.1V}

Fault 2:

Inject Usync, the amplitude is

25. U_DdChk − max{1% × 25. U_DdChk, 0.1V}, same phase angle with UB-N

Inject UA-N/UB-N/UC-N with positive-sequence voltage, the amplitude is

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8 Protection Function Test

25. U_LvChk − max{1% × 25. U_LvChk, 0.1V}

Fault 3:

Inject Usync, the amplitude is

25. U_DdChk + max{1% × 25. U_DdChk, 0.1V}, same phase angle with UB-N

Inject UA-N/UB-N/UC-N with positive-sequence voltage, the amplitude is

25. U_LvChk + max{1% × 25. U_LvChk, 0.1V}

Fault 4:

Inject Usync, the amplitude is

25. U_DdChk + max{1% × 25. U_DdChk, 0.1V}, same phase angle with UB-N

Inject UA-N/UB-N/UC-N with positive-sequence voltage, the amplitude is

25. U_LvChk − max{1% × 25. U_LvChk, 0.1V}

The trigger condition can be set to binary input or timed trigger, and the state duration =
79. t_Dd_3PS1 + 1s

The test result:

8 Fault 1: The 79.Close should operate reliably;

Fault 2&3&4: The 79.Close should not operate reliably.

8.27.4.3 Dead check for both the reference and the synchronization sides(SynDdRefDd)

[79.En_SynDd_RefDd] = Enabled.

Using “State Sequencer” testing module with four states:

The state1 is the normal state:

Inject UA-N/UB-N/UC-N with the rated positive-sequence voltage, Usyn with same Amplitude
and phase angle between UB-N

Inject IA /IB /IC with 0A

Trigger condition is set to timed trigger, the state duration = 12s (should be greater than
the setting VTS.t_DDO and make sure that 79.Ready = 1)

The state 2 is the fault state:

Simulate the single-phase grounding fault, the faulty phase voltage can set between
0V~0.9Un

The faulty phase current = 2×50/51P1.I_Set

Trigger condition is set to timed trigger, the state duration = 100ms

The status 3 is waiting for AR

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Inject IA /IB /IC with 0A

Fault 1:

Inject Usync, the amplitude is

25. U_DdChk − max{1% × 25. U_DdChk, 0.1V}, same phase angle with UB-N

Inject UA-N/UB-N/UC-N with positive-sequence voltage, the amplitude is

25. U_DdChk − max{1% × 25. U_DdChk, 0.1V}

Fault 2:

Inject Usync, the amplitude is

25. U_DdChk − max{1% × 25. U_DdChk, 0.1V}, same phase angle with UB-N

Inject UA-N/UB-N/UC-N with positive-sequence voltage, the amplitude is

25. U_DdChk + max{1% × 25. U_DdChk, 0.1V}

Fault 3:

Inject Usync, the amplitude is

25. U_DdChk + max{1% × 25. U_DdChk, 0.1V}, same phase angle with UB-N

Inject UA-N/UB-N/UC-N with positive-sequence voltage, the amplitude is


8
25. U_DdChk − max{1% × 25. U_DdChk, 0.1V}

Fault 4:

Inject Usync, the amplitude is

25. U_DdChk + max{1% × 25. U_DdChk, 0.1V}, same phase angle with UB-N

Inject UA-N/UB-N/UC-N with positive-sequence voltage, the amplitude is

25. U_DdChk + max{1% × 25. U_DdChk, 0.1V}

The trigger condition can be set to binary input or timed trigger, and the state duration =
79. t_Dd_3PS1 + 1s

The test result:

Fault 1: The 79.Close should operate reliably;

Fault 2&3&4: The 79.Close should not operate reliably.

8.27.5 Reclosing Numbers Control Test

Change the setting:

[79.Num] = 2.

[50/51P1.En] = Enabled, [50/51P1.I_Set] = 1A; [50/51P1.t_Op] = 0s.

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8 Protection Function Test

Using “State Sequencer” testing module with seven states:

The state1 is the normal state:

Inject UA-N/UB-N/UC-N with the rated positive-sequence voltage, Usyn with same Amplitude
and phase angle between UB-N

Inject IA /IB /IC with 0A

Trigger condition is set to timed trigger, the state duration = 12s (should be greater than
the setting VTS.t_DDO and make sure that 79.Ready = 1)

The state 2 is the fault state:

Simulate the single-phase grounding fault, the faulty phase voltage can set between
0V~0.9Un

The faulty phase current = 2×50/51P1.I_Set

Trigger condition is set to timed trigger, the state duration = 100ms

The status 3 is waiting for AR

Inject Usync = Un, the same phase angle, amplitude, and frequency with UB-N

Inject UA-N/UB-N/UC-N with the rated positive-sequence voltage


8 Inject IA /IB /IC with 0A

The trigger condition can be set to binary input or timed trigger, and the state duration =
79. t_Dd_3PS1(2) + 1s

(The voltage state of this status must match with synchronization settings mode.)

The status 4 is fault condition, the same as status 2

The status 5 is waiting for AR, the same as status 3

The status 6 is fault condition, the same as status 2

The status 7 is waiting for AR, the same as status 3

The test result:

The 79.Close should operate reliably in the first two faults, as to the third fault, the
79.Close should not operate after the 50/51P1 operated.

8.27.6 Operate time test

Connecting the tester output 1 to the device input 79.Trp3P

1. 79.t_Dd_3PS1

Change the settings as follows:

[79.En_NoChk] = Enabled

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8 Protection Function Test

Using “State Sequencer” testing module with three states:

The state1 is the normal state:

Inject UA-N/UB-N/UC-N with the rated positive-sequence voltage, Usyn with same amplitude
and phase angle between UB-N

Inject IA /IB /IC with 0A

Trigger condition is set to timed trigger, the state duration = 12s (should be greater than
the setting VTS.t_DDO and make sure that 79.Ready = 1)

The status 2 is simulating other protection trip condition

Simulate Trip3P signal, initiate the output1 of the tester

Trigger condition is set to timed trigger, the state duration = 50ms

The status 3 is waiting for AR

Usync = Un, same amplitude, frequency and phase angle between U B-N

Inject UA-N/UB-N/UC-N with the rated positive-sequence voltage

Inject IA /IB /IC with 0A

The trigger condition can be set to binary input or timed trigger, and the state duration =
79. t_Dd_3PS1 + 1s
8
The test result:

The 79.Close should operate reliably, the error of operation time≤ 1% × 79. t_Dd_3PS1 +
20ms

2. 79.t_Reclaim

Change the settings:

[79.En_NoChk] = Enabled , [79.Num] = 2.

Using “State Sequencer” testing module with six states:

The state1 is the normal state:

Inject UA-N/UB-N/UC-N with the rated positive-sequence voltage, Usyn with same amplitude
and phase angle between UB-N

Inject IA /IB /IC with 0A

Trigger condition is set to timed trigger, the state duration = 12s (should be greater than
the setting VTS.t_DDO and make sure that 79.Ready = 1)

The status 2 is simulating other protection trip condition

Simulate Trip3P signal, initiate the output1 of the tester

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8 Protection Function Test

Trigger condition is set to timed trigger, the state duration = 50ms

The status 3 is waiting for AR

Usync = Un, same amplitude, frequency, and phase angle between UB-N

Inject UA-N/UB-N/UC-N with the rated positive-sequence voltage

Inject IA /IB /IC with 0A

The trigger condition can be set to binary input or timed trigger, and the state duration =
79. t_Dd_3PS1(2) + 1s

The status 4 is normal condition

Inject UA-N/UB-N/UC-N with the rated positive-sequence voltage, Usyn with same amplitude
and phase angle between UB-N

Inject IA /IB /IC with 0A

Fault 1: The State Termination using Timeout, the duration = 79. t_Reclaim −
{1% × 79. t_Reclaim + 20ms}

Fault 2: The State Termination using Timeout, the duration = 79. t_Reclaim +
{1% × 79. t_Reclaim + 20ms}

8 The status 5 is simulating other protection trip condition, same as status 2

The status 6 is waiting for AR, same as status 3

The test result:

Fault 1: In the status 6, the second 79.Close should operate reliably;

Fault 2: In the status 6, the second 79.Close should not operate reliably.

3. 79.t_Wait_Chk

Change the setting:

[79.En_SynChk] = Enabled

Using “State Sequencer” testing module with five states:

The state1 is the normal state:

Inject UA-N/UB-N/UC-N with the rated positive-sequence voltage, Usyn with same amplitude
and phase angle between UB-N

Inject IA /IB /IC with 0A

Trigger condition is set to timed trigger, the state duration = 12s (should be greater than
the setting VTS.t_DDO and make sure that 79.Ready = 1)

The status 2 is simulating other protection trip condition

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Simulate Trip3P signal, intiate the output1 of the tester

Trigger condition is set to timed trigger, the state duration = 50ms

The status 3 is CB trip condition

Inject UA-N/UB-N/UC-N = 0V, Usync = Un

Inject IA /IB /IC with 0A

Trigger condition is set to timed trigger, the state duration = 79.t_Dd_3PS1

The status 4 is waiting for AR (unsatisfied with synchronism check)

Usync = Un, different amplitude, frequency, and phase angle with UB-N

Inject UA-N/UB-N/UC-N with the rated positive-sequence voltage

Inject IA /IB /IC with 0A

Fault 1: The State Termination using Timeout, the duration = 79. t_Wait_Chk − 0.2s

Fault 2: The State Termination using Timeout, the duration = 79. t_Wait_Chk + 0.2s

The status 5 is waiting for AR (satisfied with synchronism check)

Usync = Un, same amplitude, frequency, and phase angle between UB-N

Inject UA-N/UB-N/UC-N with the rated positive-sequence voltage


8
Inject IA /IB /IC with 0A

Trigger condition is set to timed trigger, the state duration = 1s

The test result:

Fault 1: The 79.Close should operate reliably;

Fault 2: The 79.Close should not operate reliably

4. 79.t_PersistTrp

Using “State Sequencer” testing module with three states:

The state1 is the normal state:

Inject UA-N/UB-N/UC-N with the rated positive-sequence voltage, Usyn with same amplitude
and phase angle between UB-N

Inject IA /IB /IC with 0A

Trigger condition is set to timed trigger, the state duration = 12s (should be greater than
the setting the VTS.t_DDO and make sure that 79.Ready = 1)

The status 2 is simulating other protection trip condition

Simulate Trip3P signal, intiate the output1 of the tester

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8 Protection Function Test

Fault 1: The State Termination using Timeout, the duration =

79. t_PersistTrp − {1% × 79. t_PersistTrp + 20ms}

Fault 2: The State Termination using Timeout, the duration =

79. t_PersistTrp + {1% × 79. t_PersistTrp + 20ms}

The status 3 is waiting for AR

Usync = Un, same amplitude, frequency, and phase angle between UB-N

Inject UA-N/UB-N/UC-N with the rated positive-sequence voltage

Inject IA /IB /IC with 0A

The trigger condition can be set to binary input or timed trigger, and the state duration =
79. t_Dd_3PS1 + 1s

The test result:

Fault 1: The 79.Close should operate reliably;

Fault 2: The 79.Close should not operate reliably.

8 8.28 Transfer Trip (TT)

8.28.1 Settings List

Set the settings of TT Protection as the following table.

No. Symbol Value No. Symbol Value


1 TT.t_Op 0.020 4 TT.En_BlkAR Disabled
2 TT.En Enabled 5 TT.En_CB_Ctrl Disabled
3 TT.En_FD_Ctrl Enabled

8.28.2 Wiring Preparation

1. Connecting the tester current output Ia/Ib/Ic to the current input of TT protection of the
device. Parallel the N of three phase and connect it back to the In of tester.

2. Please set the tripping logic setting for TT according to the configuration of PCS-931S,
and connect the corresponding binary output of TT to the binary input of tester.

3. Connect the binary output 1 of tester to the “TT.Init_3P” input of PCS-931S to initiate TT
protection .

4. If the protection function enabling signal and the protection function disabling signal are
configured, the protection function enabling signal should be energized and the protection
function disabling signal should be de-energized.

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8 Protection Function Test

8.28.3 Function Test


8.28.3.1 FD control criterion test

Change the settings as follows:

[FD.DPFC.I_Set] = 1A .

Using “State Sequencer” testing module with two states:

The state1 is the normal state:

Inject Ua-n/Ub-n/Uc-n with the rated positive-sequence voltage.

Inject Ia/Ib/Ic with 0 A.

Trigger condition is set to timed trigger, the state duration = 2s

The state 2 is the fault state:

Keep voltage as same as state 1.

Simulate the 3 phase fault.

Energize output 1 of the tester to initiate TT protection.

Fault 1: The faulty phase current = 1.05×[FD.DPFC.I_Set]/1.732, Inject Ia/Ib/Ic with the
positive-sequence current. 8
Fault 2: The faulty phase current = 0.95×[FD.DPFC.I_Set]/1.732, Inject Ia/Ib/Ic with the
positive-sequence current.

The trigger condition can be set to binary input or timed trigger, and the state duration =
Max {1.01×[TT.t_Op], [TT.t_Op] +100ms}

The test result:

Fault 1: The TT.t_Op should operate reliably;

Fault 2: The TT.t_Op should not operate reliably.

8.28.3.2 Operate time test

Using “State Sequencer” testing module with two states:

The state1 is the normal state:

Inject Ua/Ub/Uc with the rated positive-sequence voltage

Inject Ia/Ib/Ic with 0 A.

Trigger condition is set to timed trigger, state duration =2s.

The state 2 is the fault state:

Simulate the 3 phase fault.

Keep voltage as same as state 1.

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8 Protection Function Test

The faulty phase current = 2×[FD.DPFC.I_Set]/1.732. Inject Ia/Ib/Ic with the positive-
sequence current.

Energize output 1 of the tester to initiate TT protection.

The trigger condition can be set to binary input or timed trigger, and the state duration =
Max {1.01×[TT.t_Op], [TT.t_Op] +100ms}

The test result:

The TT should operate reliably, the operation error time ≤Max{5ms, 1%×[TT.t_Op]}.

8.29 Impedance-Based Fault Location (FL)

8.29.1 Settings List


Set the settings of the line as the following table.

No. Symbol Value No. Symbol Value


1 X1L 6.113 5 X0M 0.000
2 R1L 1.299 6 R0M 0.000
3 X0L 18.218 7 LineLength 100.00

8 4 R0L 3.872

Since the single-ended impendance based fault location uses a special


calculation model, in order to simplify the calculation, X1L, R1L and X0L,
R0L should be set to X1L/R1L=X0L/R0L.

8.29.2 Wiring Preparation

1. Connecting the tester voltage output Ua/Ub/Uc to the voltage input of FL of the device.
Parallel the N of three phase and connect it back to the Un of tester.

2. Connecting the tester current output Ia/Ib/Ic to the current input of FL of the device. Parallel
the N of three phase and connect it back to the In of tester.

3. If the protection function enabling signal and the protection function disabling signal are
configured, the protection function enabling signal should be energized and the protection
function disabling signal should be de-energized.

When PCS-931S adopts 2M communication rate, it can adopts double-


ended fault location method. Since double-ended fault location rely on
complex power system model calculations, it is difficult to obtain double-
ended data on site. Generally, double-ended fault location methods are not
tested on site. The following test takes single-ended fault location as an
example to illustrate.

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8 Protection Function Test

8.29.3 Function Test

According to the above line setting, the line impedance ZL and K0 can be obtained through
calculation:

ZL = 6.25 Ω.

𝑍0 − 𝑍1 3.872 + 18.218𝑗 − (1.299 + 6.113𝑗)


𝐾0 = = = 0.66
3 × 𝑍1 3 × (1.299 + 6.113𝑗)

𝑋1𝐿 6.113
𝐴𝑟𝑐𝑡𝑎𝑛 = 𝐴𝑟𝑐𝑡𝑎𝑛 = 78°
𝑅1𝐿 1.299

In the following, distance protection is taken as an example to describe single-ended impendance


based fault location.

8.29.3.1 Single phase ground fault with non resistance Test

Using “State Sequencer” testing module with two states:

The state1 is the normal state:

Inject UA-N/UB-N/UC-N with the rated positive-sequence voltage.

Inject Ia/Ib/Ic with 0 A.

Trigger condition is set to timed trigger, the state duration = 2s 8


The state 2 is the fault state

Simulate phase A grounding fault occurs at m×100% of the line.

The faulty phase voltage = 𝑚 × 𝐼∅ × (1 + 𝐾0 )𝑍𝐿 =m×5×( 1 + 0.66 )×6.25

= 51.875×m (V), 0 <m <1.

Inject faulty phase voltage with 51.875×m V.

Inject faulty current with 5A (𝐼∅ = 5𝐴) , the angle of faulty voltage leads the faulty current
𝑋
78 °(𝐴𝑟𝑐𝑡𝑎𝑛 𝑅1𝐿 ).
1𝐿

The trigger condition can be set to binary input or timed trigger, and the state duration =
Max {1.01×[21Li.ZG.t_Op], [21Li.ZG.t_Op] +100ms}

The test result:

The 21Li should operate reliably.

The Trip report display: Fault Location is (m±2.5%)×[LineLength] (km). Faulty_Phase: A.

8.29.3.2 Three phase fault with non resistance test

Using “State Sequencer” testing module with two states:

The state1 is the normal state:

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8 Protection Function Test

Inject UA-N/UB-N/UC-N with the rated positive-sequence voltage.

Inject Ia/Ib/Ic with 0 A.

Trigger condition is set to timed trigger, the state duration = 2s.

The state 2 is the fault state

Simulate 3 phase fault occurs at m×100% of the line.

The faulty phase voltage = m× 𝐼∅ × 𝑍𝐿 =m×5×6.25 = 31.25×m (V), 0 < m <1.

Inject faulty phase voltage with 31.25×m V.

Inject faulty current with 5A (𝐼𝑎𝑏𝑐 = 5𝐴), the angle of faulty voltage leads to the faulty
𝑋1𝐿
current 78°(𝐴𝑟𝑐𝑡𝑎𝑛 ).
𝑅1𝐿

The trigger condition can be set to binary input or timed trigger, and the state duration =
Max {1.01×[21Li.ZP.t_Op], [21Li.ZP.t_Op] +100ms}

The test result:

The 21L1 should operate reliably.

The Trip report display: Fault Location is (m±2.5%)×[LineLength] (km). Faulty_Phase:


8 ABC.

8.29.3.3 Single phase ground fault with large resistance test

Using “State Sequencer” testing module with two states:

The state1 is the normal state:

Inject UA-N/UB-N/UC-N with the rated positive-sequence voltage.

Inject Ia/Ib/Ic with 0 A.

Trigger condition is set to timed trigger, the state duration = 2s

The state 2 is the fault state

Simulate phase A grounding fault with large resistance occurs at m×100% of the line.

𝑋
𝑚×𝐼∅ ×( 1 + 𝐾0 )×𝑍𝐿 ×𝑆𝑖𝑛(𝐴𝑟𝑐𝑡𝑎𝑛𝑅1𝐿 )
1𝐿
The faulty phase voltage =
𝑆𝑖𝑛𝜃

𝑚×5×( 1 + 0.66 )×6.25×𝑆𝑖𝑛78°


= (V), 0 < m <1.
𝑆𝑖𝑛𝜃

𝑚×5×( 1 + 0.66 )×6.25×𝑆𝑖𝑛78°


Inject faulty phase voltage with V.
𝑆𝑖𝑛𝜃

Inject faulty current with 5A(𝐼∅ = 5𝐴). θ is the angle at which the faulty voltage leads the
faulty current.

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The trigger condition can be set to binary input or timed trigger, and the state duration =
Max {1.01×[21Li.ZG.t_Op], [21Li.ZG.t_Op] +100ms}

The test result:

The 21Li should operate reliably.

The Trip report display: Fault Location is (m±2.5%)×[LineLength] (km). Faulty_Phase: A.

8.29.3.4 Three phase fault with with large resistance test

Using “State Sequencer” testing module with two states:

The state1 is the normal state:

Inject UA-N/UB-N/UC-N with the rated positive-sequence voltage.

Inject Ia/Ib/Ic with 0 A.

Trigger condition is set to timed trigger, the state duration = 2s

The state 2 is the fault state

Simulate 3 phase fault with large resistance occurs at m×100% of the line.

𝑋
𝑚×𝐼∅ ×𝑍𝐿 ×𝑆𝑖𝑛(𝐴𝑟𝑐𝑡𝑎𝑛 𝑅1𝐿 ) 𝑚×5×6.25×𝑆𝑖𝑛78°
The faulty phase voltage =
𝑆𝑖𝑛𝜃
1𝐿
=
𝑆𝑖𝑛𝜃
(V), 8
0 < m <1.

𝑚×5×6.25×𝑆𝑖𝑛78°
Inject faulty phase voltage with V.
𝑆𝑖𝑛𝜃

Inject faulty current with 5A(𝐼𝑎𝑏𝑐 = 5𝐴), θ is the angle at which faulty voltage leads to the
faulty current.

The trigger condition can be set to binary input or timed trigger, and the state duration =
Max {1.01×[21Li.ZP.t_Op], [21Li.ZP.t_Op] +100ms}

The test result:

The 21Li should operate reliably.

The Trip report display: Fault Location is (m±2.5%)×[LineLength] (km). Faulty_Phase:


ABC.

8.30 VT Circuit Supervision (VTS)

8.30.1 Settings List

Set the settings of VT Circuit Supervision as the following table.

No. Symbol Value No. Symbol Value

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8 Protection Function Test

1 VTS.En Enabled 5 VTS.U1_Set 30.00


2 VTS.Opt_VT Bus 6 VTS.3U0_Set 8.00
3 VTS.t_DPU 1.500 7 VTS.U2_Set 4.00
4 VTS.t_DDO 1.000

8.30.2 Wiring Preparation

1. Connecting the tester voltage output Ua/Ub/Uc to the voltage input of the device. Parallel
the N of three phase and connect it back to the Un of tester.

2. If the function signal “VTS.Enable” and “VTS.Block” are configured, “VTS.Enable” must
be energized and “VTS.Block” must be de-energized.

8.30.3 Function Test


8.30.3.1 Failure of three-phase on VT

Using “State Sequencer” testing module with two states:

The state1 is the normal state:

Inject Ua/Ub/Uc with the rated positive-sequence voltage (Un)

Trigger condition is set to timed trigger, state duration = [VTS.t_DDO]+1s

8 The state 2 is the fault state:

Simulate failure of three-phase on VT:

Fault 1: Three phase voltage = 1.05×[VTS.U1_Set]

Fault 2: Three phase voltage = 0.95×[VTS.U1_Set]

The trigger condition can be set to “timed trigger”, and the state duration > [VTS.t_DPU].

The test result:

Fault 1: The alarm signal “VTS.Alm” should be issued reliably.

Fault 2: The alarm signal “VTS.Alm” should not be issued reliably.

8.30.3.2 Failure of single-phase or two-phase on VT

1. Distinguish VTS by residual voltage

Using “State Sequencer” testing module with two states:

The state1 is the normal state:

Inject Ua/Ub/Uc with the rated positive-sequence voltage (Un)

Trigger condition is set to timed trigger, state duration = [VTS.t_DDO]+1s

The state 2 is the fault state:

Simulate failure of single-phase on VT:

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8 Protection Function Test

Fault 1: The abnormal phase voltage = Un-1.05×[VTS.3U0_Set]

Fault 2: The abnormal phase voltage = Un-0.95×[VTS.3U0_Set]

(The voltage of other two phase keeps the same with that in stage 1.)

The trigger condition can be set to “timed trigger”, and the state duration > [VTS.t_DPU].

The test result:

Fault 1: The alarm signal “VTS.Alm” should be issued reliably.

Fault 2: The alarm signal “VTS.Alm” should not be issued reliably.

2. Distinguish VTS by negative-sequence voltage

Modify the VTS setting as follows:

[VTS.3U0_Set] = 100V

Using “State Sequencer” testing module with two states:

The state1 is the normal state:

Inject Ua/Ub/Uc with the rated positive-sequence voltage (Un)

Trigger condition is set to timed trigger, state duration = [VTS.t_DDO]+1s

The state 2 is the fault state:


8
Simulate failure of single-phase on VT:

Fault 1: The abnormal phase voltage = Un-1.05×3×[VTS.U2_Set]

Fault 2: The abnormal phase voltage = Un-0.95×3×[VTS.U2_Set]

(The voltage of other two phase keeps the same with that in stage 1.)

The trigger condition can be set to “timed trigger”, and the state duration > [VTS.t_DPU].

The test result:

Fault 1: The alarm signal “VTS.Alm” should be issued reliably.

Fault 2: The alarm signal “VTS.Alm” should not be issued reliably.

8.31 CT Circuit Supervision (CTS)

8.31.1 Settings List


Set the settings of CT Circuit Supervision as the following table.

No. Symbol Value No. Symbol Value


1 CTS.3I0_Set 0.1 A 4 CTS.t_DPO 1s
2 CTS.3U0_Set 30 V 5 CTS.En Enabled

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Date: 30 January 2021
8 Protection Function Test

3 CTS.t_DPU 1.25 s

8.31.2 Wiring Preparation

1. Connecting the tester voltage output Ua/Ub/Uc to the voltage input of the device. Parallel
the N of three phase and connect it back to the Un of tester.

2. Connecting the tester current output Ia/Ib/Ic to the current input of the device. Parallel the
N of three phase and connect it back to the In of tester.

3. If the function signal “CTS.Enable” and “CTS.Block” are configured, “CTS.Enable” must
be energized and “CTS.Block” must be de-energized.

8.31.3 Function Test


Using “State Sequencer” testing module with two states:

The state1 is the normal state:

Inject Ua/Ub/Uc with the rated positive-sequence voltage (Un)

Inject Ia/Ib/Ic with the positive-sequence current:

Fault 1: Ia/Ib/Ic = 1.05×[CTS.3I0_Set]

8 Fault 2: Ia/Ib/Ic = 0.95×[CTS.3I0_Set]

Trigger condition is set to timed trigger, state duration =10s

The state 2 is the fault state:

Simulate failure of single-phase on CT, the abnormal phase current = 0 A, the current of
other two phase and the voltage of three phase keeps the same with that in stage 1.

The trigger condition can be set to “timed trigger”, and the state duration > [CTS.t_DPU].

The test result:

Fault 1: The alarm signal “CTS.Alm” should be issued reliably.

Fault 2: The alarm signal “CTS.Alm” should not be issued reliably.

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9 Control Function Test

9 Control Function Test

Table of Contents

9.1 Switchgear Control Function .......................................................................... 9-1


9.1.1 Test Content and Purpose .................................................................................................... 9-1

9.1.2 Test Conditions ..................................................................................................................... 9-1

9.1.3 Testing Method ..................................................................................................................... 9-1

9.2 Voltage Selection ............................................................................................. 9-1


9.2.1 Test Content and Purpose .................................................................................................... 9-1

9.2.2 Test Conditions ..................................................................................................................... 9-1

9.2.3 Testing Method ..................................................................................................................... 9-2

9.3 Synchronism Check (25) ................................................................................. 9-7


9.3.1 Test Content and Purpose .................................................................................................... 9-7

9.3.2 Test Conditions ..................................................................................................................... 9-7

9.3.3 Testing Method ..................................................................................................................... 9-8 9


9.4 Interlocking Function ..................................................................................... 9-11
9.4.1 Test Content and Purpose ...................................................................................................9-11

9.4.2 Test Conditions ....................................................................................................................9-11

9.4.3 Testing Method ................................................................................................................... 9-12

List of Figures
Figure 9.2-1 Three Phase Busbar Voltage of 1 CB with 2 Busbars ....................................... 9-3

Figure 9.2-2 Configuration of Three Phase Busbar Voltage ................................................... 9-3

Figure 9.2-3 Single Phase Busbar Voltage of 1 CB with 2 Busbars ...................................... 9-4

Figure 9.2-4 Configuration of Single Phase Busbar Voltage .................................................. 9-4

Figure 9.2-5 Voltage wiring diagram of 3/2 CB......................................................................... 9-5

Figure 9.2-6 Configuration for busbar side CB (Busbar1 CB) ................................................ 9-6

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9 Control Function Test

9-b PCS-931S Line Differential Relay


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9 Control Function Test

9.1 Switchgear Control Function

The switchgear control function is mainly used to realize operation of primary equipment such as
circuit breaker (CB), disconnect switch (DS) and earthing switch (ES). This function can be divided
into remote control and local control according to the control source location. A remote control
mainly refers to remote control commands from substation automation system (SAS) or network
control center (NCC).

9.1.1 Test Content and Purpose


Verify that the output of the control is correct.

9.1.2 Test Conditions

When the device is in the remote-control mode, the control command may be sent via
communication protocol; when it is in the local control mode, the local operation may be performed
on the device LCD or panel handle.

If the test requires the operation of primary equipment, ensure that these devices have been out of
operation.

9.1.3 Testing Method

The one-to-one match closing or opening contact shall be closed as soon as the command received,
either the command is from remote or local.

If the switch needs to be closed or opened, check whether the corresponding interlock output that 9
allows operation.

9.2 Voltage Selection

The voltage selection function can be used to switch the reference and synchronization voltages
for the synchronism check function in double busbars and one-and-half circuit breakers scenarios,
or to switch three-phase voltages among double busbars used by protection calculations or
measurements.

9.2.1 Test Content and Purpose

In order to verify whether the voltage switching logic is correct, ensure that the voltage switching
logic works according to the designer’s intent.

9.2.2 Test Conditions

The voltage selection function can be used for the synchronism check function in one-and-half
circuit breakers arrangement scenario and for three-phase protection or measurement voltage
selection in double busbars scenario.

PCS-931S Line Differential Relay 9-1


Date: 30 January 2021
9 Control Function Test

⚫ The voltage input channels should be connected to the voltage selection function input
terminals in the page Project Node → IED Node → Program → Function_Logic →
UserPage_Meas_App*. Locate the functional input/output channels under the path: Variable
DB → Source or Destination → Function_Logic → Page: UserPage_VoltSel_CB** →
Component: CB**.VoltSel.

⚫ The relevant disconnectors position states should be inputted in the page Project Node →
IED Node → Program → Function_Logic → UserPage_VoltSel_CB**. Locate the binary
inputs under the path: Variable DB → Source → Function_Logic → Page: UserPage_DS**
→ Component: DS**.

9.2.3 Testing Method


9.2.3.1 Single Circuit Breaker with Double Busbars

9 For single circuit breaker with double busbars, the selection of appropriate voltage from both
busbars for synchronism check is required. The bus voltage to be switched can be either three
phase or single phase. The three phase voltages after switching is used as the reference voltage,
and single-phase voltage after switching is used as the synchronization voltage.

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9 Control Function Test

1. Reference voltage: three-phase busbar voltage

Busbar 1
Busbar 2

DS1 DS2

3VTs 3VTs

CB0 1

1VT

3CTs
*

1CT
*

Figure 9.2-1 Three Phase Busbar Voltage of 1 CB with 2 Busbars

The configuration in the configuration tool is shown in the figure below:

Figure 9.2-2 Configuration of Three Phase Busbar Voltage

Testing the switching function

UB1: UA-N/UB-N/UC-N = UB1

UB2: UA-N/UB-N/UC-N = UB2

Case 1: Close DS1 and open DS2;

Case 2: Open DS1 and close DS2;

Case 3: Close DS1 and close DS2;

Case 4: Open DS1 and open DS2.

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Date: 30 January 2021
9 Control Function Test

The test result:

Case 1: The reference voltage is displayed as UB1;

Case 2: The reference voltage is displayed as UB2;

Case 3&4: The device is alarm with the report “Alm_Invalid_Sel”, and the reference
voltage displayed by the device is the voltage of the previous state.

2. Synchronization voltage: single phase busbar voltage

Busbar 1
Busbar 2

DS1 DS2

1VT 1VT

CB0 1

3VTs

3CTs
*

1CT
*

9
Figure 9.2-3 Single Phase Busbar Voltage of 1 CB with 2 Busbars

The configuration in the configuration tool is shown in the figure below:

Figure 9.2-4 Configuration of Single Phase Busbar Voltage

Testing the switching function

UB1: UA-N = UB1, Take phase A as an example

UB2: UA-N = UB2

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9 Control Function Test

Case 1: Close DS1 and open DS2;

Case 2: Open DS1 and close DS2;

Case 3: Close DS1 and close DS2;

Case 4: Open DS1 and open DS2;

The test result:

Case 1: The synchronization voltage is displayed as UB1;

Case 2: The synchronization voltage is displayed as UB2;

Case 3&4: The device is alarm with the report “Alm_Invalid_Sel”, and the synchronization
displayed by the device is the voltage of the previous state.

9.2.3.2 One and a half Circuit Breaker

For a busbar side CB of one-and-half breakers arrangement in the application scenario of a


complete diameter, the selection of voltage from Line1_VT, Line2_VT and the other bus side VT is
the synchronization voltage to be synchronized with the reference voltage of local bus side.

For the tie CB of one-and-half breakers arrangement in the application scenario of a complete
diameter, the selection of voltage from Line1_VT & Bus1_VT and Line2_VT & Bus2_VT is the
reference voltage and synchronization voltage respectively to check synchronism for the closing
operation.

Busbar1
9
Bus1
CB
1VT
3VTs *
3CTs

DS1

*
3CTs

1VT Tie
CB

DS2

Bus2
CB

1VT
Busbar2

Figure 9.2-5 Voltage wiring diagram of 3/2 CB

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Date: 30 January 2021
9 Control Function Test

The configuration in the configuration tool is shown in the figure below:

Figure 9.2-6 Configuration for busbar side CB (Busbar1 CB)

1. Testing the switching function of the busbar side CB

UB1: UB-N = UB1

UB2: UB-N = UB2

UL1: UA-N/UB-N/UC-N = UL1

UL2: UB-N = UL2, can be either three phase or single phase.

Case 1: Close DS1;

Case 2: Open DS1, close DS2 and Tie CB;


9 Case 3: Open DS1 and DS2, close Bus2 CB and Tie CB;

Case 4: Except for the above three cases.

The test result:

Case 1: The reference voltage is displayed as UL1, the Syn voltage is UB1;

Case 2: The reference voltage is displayed as UL2, the Syn voltage is UB1;

Case 3: The reference voltage is displayed as UB2, the Syn voltage is UB1;

Case 4: The device is alarm with the report “Alm_Invalid_Sel”, and the reference and syn
voltage displayed by the device is the voltage of the previous state.

2. Testing the switching function of the Tie CB

UB1: UB-N = UB1

UB2: UB-N = UB2

UL1: UA-N/UB-N/UC-N = UL1

UL2: UB-N = UL2, can be either three phase or single phase.

Case 1: Close DS1, open DS2, and close Bus2_CB;

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9 Control Function Test

Case 2: Close DS2, open DS1, and close Bus1_CB;

Case 3: Close DS1 and DS2;

Case 4: Except for the above three cases.

The test result:

Case 1: The reference voltage is displayed as UL1, the Syn voltage is UB2;

Case 2: The reference voltage is displayed as UB1, the Syn voltage is UL2;

Case 3: The reference voltage is displayed as UL1, the Syn voltage is UL2;

Case 4: The device is alarm with the report “Alm_Invalid_Sel”, and the reference and syn
voltage displayed by the device is the voltage of the previous state.

9.3 Synchronism Check (25)

9.3.1 Test Content and Purpose

This section contains instructions on how to test synchrocheck, energizing check and synchronizing
function for single, double and 1½ breaker arrangements.

9.3.2 Test Conditions

9.3.2.1 Settings List

No. Setting Value No. Setting Value 9


1 25.Opt_ValidMode Setting 10 25.f_Diff_Set 0.20 Hz
2 25.En_SynChk Enabled 11 25.df/dt_Set 1.00 Hz/s
3 25.En_DdChk Enabled 12 25.phi_Diff_Set 15.00 °
4 25.U_UV 80.00 % 13 25.phi_Comp 0.00 °
5 25.U_OV 170.00 % 14 25.Opt_Mode_DdChk SynLvRefDd
6 25.f_UF 45.000 Hz 15 25.U_DdChk 30 V
7 25.f_OF 65.000 Hz 16 25.U_LvChk 40 V
8 25.Opt_U_SynChk Ub 17 25.t_Reset 5s
9 25.U_Diff_Set 10.00 V 18 25.t_Close_CB 80 ms

The setting [Opt_ValidMode] is selection of decision mode for synchronism


check. "Setting" means the mode depends on the setting values of
[CB**.25.En_SynChk] and [CB**.25.En_DdChk]; "Config" means the mode
depends on the corresponding input values of "in_syn_chk" and
"in_vol_chk" terminals.

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9 Control Function Test

9.3.2.2 Wiring Preparation

1. Connecting the tester voltage output Ua/Ub/Uc to the voltage input of the device. Parallel
the N of three phase and connect it back to the “Un” of tester.

2. Enable the second group voltage output of tester, using as Usync after volage switching,
connect it to Ux of the device.

3. If the protection function enabling signal and the protection function disabling signal are
configured, the protection function enabling signal must be energized and the protection
function disabling signal must be de-energized.

9.3.3 Testing Method


9.3.3.1 Testing the energizing Function

[25.f_Diff_Set] = 0.2Hz

Inject Usync = Un, the same phase angle with UB-N


Case 1: Inject UA-N/UB-N/UC-N with positive-sequence voltage, the frequency is different
from Usyn by:
25. f_Diff_Set − 0.01Hz
Case 2: Inject UA-N/UB-N/UC-N with positive-sequence voltage, the frequency is different
from Usyn by:
25. f_Diff_Set + 0.01Hz
The test result:
9 Case 1: The RSYN_OK should operate reliably;
Case 2: The RSYN_OK should not operate reliably.

The setting [25.U_UV], [25.U_OV], [25.f_UF], [ 25.f_OF] are the limit values
of voltage amplitude and frequency. If the voltage exceed the range of
settings, the device determines that as abnormal state and is not allowed to
synchronize.

9.3.3.2 Testing of synchrocheck functionality

1. Voltage Difference Check Test

[25.U_Diff_Set] = 10V

Inject Usyn = Un, the same phase angle with UB-N


Case 1: Inject UA-N/UB-N/UC-N with positive-sequence voltage, the amplitude is different
from Usyn by:
25. U_Diff_Set − max{1% × 25. U_Diff_Set, 0.1V}

Case 2: Inject UA-N/UB-N/UC-N with positive-sequence voltage, the amplitude is different


from Usyn by:

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Date: 30 January 2021
9 Control Function Test

25. U_Diff_Set + max{1% × 25. U_Diff_Set, 0.1V}

The test result:

Case 1: The RSYN_OK should operate reliably;

Case 2: The RSYN_OK should not operate reliably.

2. Phase Difference Check Test

[25.phi_Diff_Set] = 15 deg

Inject Usyn = Un, the same phase angle with UB-N


Case 1: Inject UA-N/UB-N/UC-N with positive-sequence voltage, the angle of UB-N is different
from Usyn by: 25. phi_Diff_Set + 2°
Case 2: Inject UA-N/UB-N/UC-N with positive-sequence voltage, the angle of UB-N is different
from Usyn by: 25. phi_Diff_Set − 2°

The test result:

Case 1: The RSYN_OK should operate reliably;

Case 2: The RSYN_OK should not operate reliably.

The setting [25.U_UV], [25.U_OV], [25.f_UF], [ 25.f_OF] are the limit values
of voltage amplitude and frequency. If the voltage exceed the range of
settings, the device determines that as abnormal state and is not allowed to
9
synchronize.

9.3.3.3 Testing of energizing check

1. Live Check for Synchronization Side and Dead Check for Reference Side(SynLvRefDd)

[Opt_Mode_DdChk] = SynLvRefDd

[25.U_DdChk] = 30V

[25.U_LvChk] = 40V

Inject Usync = Un, the same phase angle with UB-N


Case 1:
Usync = 25. U_LvChk + max{1% × 25. U_LvChk, 0.1V}, same phase angle with UB-N
Inject UA-N/UB-N/UC-N with positive-sequence voltage, the amplitude is
25. U_DdChk − max{1% × 25. U_DdChk, 0.1V}
Case 2:
Usync = 25. U_LvChk + max{1% × 25. U_LvChk, 0.1V}, same phase angle with UB-N
Inject UA-N/UB-N/UC-N with positive-sequence voltage, the amplitude is

PCS-931S Line Differential Relay 9-9


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9 Control Function Test

25. U_DdChk + max{1% × 25. U_DdChk, 0.1V}


Case 3:
Usync = 25. U_LvChk − max{1% × 25. U_LvChk, 0.1V}, same phase angle with UB-N
Inject UA-N/UB-N/UC-N with positive-sequence voltage, the amplitude is
25. U_DdChk − max{1% × 25. U_DdChk, 0.1V}

The test result:

Case 1: The RSYN_OK should operate reliably;

Case 2&3: The RSYN_OK should not operate reliably.

2. Dead Check for Synchronization Side and Live Check for Reference Side(SynDdRefLv)

[Opt_Mode_DdChk] = SynDdRefLv

[25.U_DdChk] = 30V

[25.U_LvChk] = 40V

Inject Usync = Un, the same phase angle with UB-N

Case 1:

Usync = 25. U_DdChk − max{1% × 25. U_DdChk, 0.1V}, same phase angle with UB-N
Inject UA-N/UB-N/UC-N with positive-sequence voltage, the amplitude is
9 25. U_LvChk + max{1% × 25. U_LvChk, 0.1V}

Case 2:

Usync = 25. U_DdChk − max{1% × 25. U_DdChk, 0.1V}, same phase angle with UB-N
Inject UA-N/UB-N/UC-N with positive-sequence voltage, the amplitude is
25. U_LvChk − max{1% × 25. U_LvChk, 0.1V}

Case 3:

Usync = 25. U_DdChk + max{1% × 25. U_DdChk, 0.1V}, same phase angle with UB-N
Inject UA-N/UB-N/UC-N with positive-sequence voltage, the amplitude is
25. U_LvChk + max{1% × 25. U_LvChk, 0.1V}

The test result:

Case 1: The RSYN_OK should operate reliably;

Case 2&3: The RSYN_OK should not operate reliably.

3. Dead Check for Both the Reference and the Synchronization Sides(SynDdRefDd)

[Opt_Mode_DdChk] = SynDdRefLv

[25.U_DdChk] = 30V

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9 Control Function Test

[25.U_LvChk] = 40V

Inject Usync = Un, the same phase angle with UB-N


Case 1:
Usync = 25. U_DdChk − max{1% × 25. U_DdChk, 0.1V}, same phase angle with UB-N
Inject UA-N/UB-N/UC-N with positive-sequence voltage, the amplitude is
25. U_DdChk − max{1% × 25. U_DdChk, 0.1V}
Case 2:
Usync = 25. U_DdChk − max{1% × 25. U_DdChk, 0.1V}, same phase angle with UB-N
Inject UA-N/UB-N/UC-N with positive-sequence voltage, the amplitude is
25. U_DdChk + max{1% × 25. U_DdChk, 0.1V}
Case 3:
Usync = 25. U_DdChk + max{1% × 25. U_DdChk, 0.1V}, same phase angle with UB-N
Inject UA-N/UB-N/UC-N with positive-sequence voltage, the amplitude is
25. U_DdChk − max{1% × 25. U_DdChk, 0.1V}

The test result:

Case 1: The RSYN_OK should operate reliably;

Case 2&3: The RSYN_OK should not operate reliably.

9.4 Interlocking Function 9


The interlocking function consists of a bay-level part and a station-level part. The interlocking is
delivery specific and is realized by bay-to-bay communication over the station bus. For that reason,
test the function in a system, that is, either in a complete delivery system as an acceptance test
(FAT/SAT) or as parts of that system.

9.4.1 Test Content and Purpose

In order to verify whether the interlock logic is correct, ensure that the interlock logic works
according to the designer’s intent.

9.4.2 Test Conditions

1. After finishing the Interlock logic, connecting it with “xxx.CILO.EnaOpn” and “xxx.CILO.EnaCls”
which is located in the “Destination” menu. In addition, an input is defined as “xxx.
in_CILO_Bypass”, for example, a panel switch or a remote command signal to release interlock
function.

2. Setting the associated lock settings.

3. The external input wiring is correct to ensure that the device input collection is normal.

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9 Control Function Test

9.4.3 Testing Method

Change the state of the relevant input to simulate the blocking condition, and determine whether
the logic blocking result is correct by setting the interlocking state value of the LCD liquid crystal
panel.

If the input of “xxx. in_CILO_Bypass” is on, the interlock function of the switch is released.

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10 Finish the Test

10 Finish the Test


After the tests are completed, remove all test or temporary shorting leads, etc.

If it has been necessary to disconnect any of the external wiring from the protection in order to
perform the wiring verification tests, it should be ensured that all connections are replaced in
accordance with the relevant external connection or scheme diagram.

If the configuration was changed for testing, the original configuration must be downloaded to
device.

Restore settings to their original value, if they were changed for testing purposes.

If the protection is in a new installation or the circuit breaker has just been maintained, the circuit
breaker maintenance and current counters should be zero.

If a test block is installed, remove the test plug and replace the cover so that the protection is put
into service.

It is necessary to exit the maintenance state before putting the device into operation. If 61850 ed2.0
LD mode is used to set the maintenance status, it needs to be controlled in SCADA to exit the
maintenance state.

Ensure that all event records, fault records, disturbance records and alarms have been cleared and
LEDs have been reset before leaving the device. Once secondary testing has been completed, it
should be checked that no self-supervision signals are activated continuously or sporadically.
Especially check the time synchronization system and communication signals, both station
communication and remote communication.
10

PCS-931S Line Differential Relay 10-1


Date: 30 January 2021
10 Finish the Test

10

10-2 PCS-931S Line Differential Relay


Date: 30 January 2021
Appendix A Glossary

Appendix A Glossary
The abbreviations adopted in this manual are listed as below.

BIM Binary Input Module


A
BOM Binary Output Module
"a" Contact is breaker auxiliary contact (ANSI
Standard Device Number 52A) that closes C
when the breaker is closed and opens when
the breaker is open. C37.94 IEEE/ANSI protocol used when
sending binary signals between IEDs
AC Alternating current
CB Circuit breaker
A/D converter Analog-to-digital converter
CID Configured IED Description
AI Analog input
COMTRADE Standard Common Format for
ANSI American National Standards Institute
Transient Data Exchange format for
AR Autoreclosing Disturbance recorder according to IEEE/ANSI
C37.111, 1999 / IEC 60255-24
ASDU Application Service Data Unit – An
ASDU can consist of one or more identical CPU Central Processing Unit
information objects. A sequence of the same
CRC Cyclic Redundancy Check
information elements, for example measured
values, is identified by the address of the CT Current Transformer
information object. The address of the
CTS Current Circuit Supervision
information object defines the associated
address of the first information element of the
D
sequence. A consecutive number identifies the
subsequent information elements. The number
DBDL Dead Bus Dead Line
A
builds on this address in integral increments
(+1). DBLL Dead Bus Live Line

DC Direct Current
B
DLLB Dead Line Live Bus
"b" Contact is breaker auxiliary contact (ANSI
DNP Distributed Network Protocol as per IEEE
Standard Device Number 52B) that closes
Std 1815-2012
when the breaker is open and opens when the
breaker is closed. DPFC Deviation of Power Frequency
Component–In case of a fault occurred in the
BFP Breaker failure protection
power system, the fault component could be
BI Binary Input analyzed into three parts: the power frequency
components before the fault, the power
BO Binary Output
frequency variables during the fault and the

PCS-931S Line Differential Relay 1


Date: 30 January 2021
Appendix A Glossary

transient variables during the fault. DPFC is the IRIG-B InterRange Instrumentation Group
power frequency variable during the fault. Time code format B

DSP Digital Signal Processor


L
DTT Direct Transfer Trip Scheme
LCD Liquid Crystal Display
E
LED Light-emitting Diode

EHV Extra High Voltage


M
EMC Electromagnetic Compatibility
MCB Miniature Circuit Breaker
F
MMS Manufacturing Message Specification

FL Fault Location MOV Metal-oxide Varistor

FR Fault Recorder
O
G
OLTC On-load Tap Changer

G.703 Electrical and functional description for OOS Out-of-Step


digital lines used by local telephone companies.
Can be transported over balanced and P
unbalanced lines
PD Pole Discrepancy
GIS Gas-insulated Switchgear
PDTT Permissive Direct Transfer Trip
GOOSE Generic Object-Oriented Substation
Event PL Programmable Logic

GPS Global Positioning System POTT Permissive Overreaching Transfer Trip


A PPM Pulse Per Minute
H
PPS Pulse Per Second
HMI Human-machine Interface
PRP Parallel Redundancy Protocol
HSR High-availability Seamless Redundancy
PUTT Permissive Underreaching Transfer Trip
HV High-voltage
R
HVDC High-voltage Direct Current

RMS Root Mean Square


I
RSTP Rapid Spanning Tree Protocol
ICD IED Capability Description
RTD Resistance Temperature Detector
IEC International Electrotechnical Commission
RTU Remote Terminal Unit
IED Intelligent Electronic Device

2 PCS-931S Line Differential Relay


Date: 30 January 2021
Appendix A Glossary

S to restore or analyze the performance, or an


electrical power system itself, over a certain
SA Substation Automation period of time.

SCADA Supervision, Control And Data SOTF Switch-Onto-Fault


Acquisition
STP Rapid Spanning Tree Protocol
SCD Substation Configuration Description
T
SCL Substation Configuration Description
Language
TCS Trip Circuit Supervision
SLD Single-line Diagram
TCP/IP Transmission Control Protocol over
SIR Source-to-line Impedance Ratio Internet Protocol

SNMP Simple Network Management


U
Protocol –An Internet standard protocol and
serves for the administration of nodes in an IP
UTC Coordinated Universal Time
network.

SNTP Simple Network Time Protocol – A W


protocol for the synchronization of clocks via
the Internet. With SNTP, client computers can WI Weak end infeed
synchronize their clocks via the Internet with a
time server. V
SOE Sequence of Events–An ordered, time-
VT Voltage transformer
stamped log of status changes at binary inputs
(also referred to as state inputs). SOE is used VTS Voltage Circuit Supervision

A list of function numbers used to represent electrical protection and control element. The device
function numbers used in this manual include the following:

21 Distance element 52 AC circuit breaker A


25 Synchronism-check element 59 Overvoltage element

27 Undervoltage element 67 Directional overcurrent element

32 Power element 68 Power swing blocking element

37 Undercurrent element 78 Out-of-step element

46 Phase-balance current element 79 Reclosing element

49 Thermal overload element 81 Frequency element

50 Instantaneous overcurrent element 85 Pilot element

51 Definite-time or inverse-time overcurrent 87 Differential element


element

These numbers are frequently used within a suffix letter to further designate their application. The

PCS-931S Line Differential Relay 3


Date: 30 January 2021
Appendix A Glossary

suffix letters used in this instruction manual include the following:

P Phase element

G Residual/Ground element

N Neutral/Ground element

Q Negative-sequence element

4 PCS-931S Line Differential Relay


Date: 30 January 2021

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