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Fen 2222222

The document provides an overview of transistors, detailing the two main types: bipolar junction transistors (BJTs) and field-effect transistors (FETs). It explains the structure and function of BJTs, including their biasing requirements and current flow, as well as the advantages and disadvantages of FETs, including JFETs and MOSFETs. Additionally, it discusses various transistor configurations and their operational characteristics.

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0% found this document useful (0 votes)
20 views11 pages

Fen 2222222

The document provides an overview of transistors, detailing the two main types: bipolar junction transistors (BJTs) and field-effect transistors (FETs). It explains the structure and function of BJTs, including their biasing requirements and current flow, as well as the advantages and disadvantages of FETs, including JFETs and MOSFETs. Additionally, it discusses various transistor configurations and their operational characteristics.

Uploaded by

uvieboyd
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Transistors

All of the complex electronic devices and systems developed or in use today, are outgrowths of
early developments in semiconductor transistors. There are two basic types of transistors:

(1) the bipolar junction transistor (BJT) and the


(2) field-effect transistor (FET)

Bipolar Junction Transistor (BJT)

The bipolar junction transistor is used in two broad areas of electronics: (1) as a linear amplifier
to boost an electrical signal and (2) as an electronic switch.

Basically, the bipolar junction transistor consists of two back-to- back P-N junctions
manufactured in a single piece of a semiconductor crystal. These two junctions give rise to three
regions called emitter, base and collector. The emitter, base and collector are provided with
terminals which are labelled as E, B and C. The two junctions are: emitter-base (E/B) junction
and collector-base (C/B) junction.

Figure 1

The symbols employed for PNP and NPN transistors are also shown in figure 1 (a) and 1 (b)
above. The arrowhead is always at the emitter (not at the collector) and in each case, its direction
indicates the conventional direction of current flow. For a PNP transistor, arrowhead points from
emitter to base meaning that emitter is positive with respect to base (and also with respect to
collector)* For NPN transistor, it points from base to emitter meaning that base (and collector as
well)* is positive with respect to the emitter.
1. Emitter
It is more heavily doped than any of the other regions because its main function is to supply
majority charge carries (either electrons or holes) to the base.

2. Base
It forms the middle section of the transistor. It is very thin (10–6 m) as compared to either the
emitter or collector and is very lightly-doped.

3. Collector
Its main function (as indicated by its name) is to collect majority charge carriers coming from the
emitter and passing through the base.

In most transistors, collector region is made physically larger than the emitter region because it
has to dissipate much greater power. Because of this difference, there is no possibility of
inverting the transistor i.e. making its collector the emitter and its emitter the collector. Figure 1
(c), shows the picture of C1815 (front and the back view) transistor.

Transistor Biasing
For proper working of a transistor, it is essential to apply voltages of correct polarity across its
two junctions. It is worthwhile to remember that for normal operation;

1. emitter-base junction is always forward- biased and


2. collector-base junction is always reverse-biased.
This type of biasing is known as FR biasing.
Figure 2

In Fig. 2, two batteries respectively provide the dc emitter supply voltage VEE and collector
supply voltage VCC for properly biasing the two junctions of the transistor. In Fig. 2 (a), Positive
terminal of VEE is connected to P-type emitter in order to repel or Push holes into the base.

The negative terminal of VCC is connected to the collector so that it may attract or pull holes
through the base. Similar considerations apply to the NPN transistor of Fig. 2 (b). It must be
remembered that a transistor will never conduct any current if its emitter-base junction is not
forward-biased.

Biasing Rules
For a PNP transistor, both collector and base are negative with respect to the emitter (the letter N
of Negative being the same as the middle letter of PNP). Of course, collector is more negative
than base [Fig .3 (a)]. Similarly, for NPN transistor, both collector and base are positive with
respect to the emitter (the letter P of Positive being the same as the middle letter of NPN). Again,
collector is more positive than the base as shown in Fig. 3 (b).

Figure 3 Figure 4

It may be noted that different potentials have been designated by double subscripts. The first
subscript always represents the point or terminal which is more positive (or less negative) than
the point or terminal represented by the second subscript. For example, in Fig .3 (a), the potential
difference between emitter and base is written as VEB (and not VBE) because emitter is positive
with respect to base. Now, between the base and collector themselves, collector is more negative
than base. Hence, their potential difference is written as VBC and not as VCB. Same is the case
with voltages marked in Fig. 4.

Transistor Currents
The three primary currents which flow in a properly-biased transistor are IE, IB and IC. In Fig. 5
(a) are shown the directions of flow as well as relative magnitudes of these currents for a PNP
transistor connected in the common-base mode. It is seen that again, IE = IB + IC

It means that a small part (about 1—2%) of emitter current goes to supply base current and the
remaining major part (98—99%) goes to supply collector current. Moreover, IE flows into the
transistor whereas both IB and IC flow out of it.
Fig. 5 (b) shows the flow of currents in the same transistor when connected in the common-
emitter mode. It is seen that again, IE = IB + IC

By normal convention, currents flowing into a transistor are taken as positive whereas those
flowing out of it are taken as negative. Hence, IE is positive whereas both IB and IC are negative.
Applying Kirchhoff's Current Law, we have:

IE + (–IB) + (–IC) = 0 or IE – IB – I C = 0 or IE = IB + IC

Figure 5

This statement is true regardless of transistor type or transistor configuration

Summary
The four basic guideposts about all transistor circuits are:
1. Conventional current flows along the arrow whereas electrons flow against it;
2. E/B junction is always forward-biased;
3. C/B junction is always reverse-biased;
4. IE = IB + IC.

Transistor Circuit Configurations


CB Configuration
In this configuration, emitter current IE is the input current and collector current IC is the output
current. The input signal is applied between the emitter and base whereas output is taken out
from the collector and base as shown in Fig. 6 (a).
The ratio of the collector current to the emitter current is called dc alpha ( dc) of a transistor
–I
dc* = C
IE

Figure 6

The negative sign is due to the fact that current IE flows into the transistor whereas IC flows out of
it. Hence, IE is taken as positive and IC as negative

IC = –  dc.IE

If we write dc simply as  **, then = CE

It is also called forward current transfer ratio (–hFB). In hFB, subscript F stands for forward and B
for common-base. The subscript d.c. on a signifies that this ratio is defined from dc values of IC
and IE.

The  of a transistor is a measure of the quality of a transistor; higher the value of , better the
transistor in the sense that collector current more closely equals the emitter current. Its value
ranges from 0.95 to 0.999. Obviously, it applies only to CB configuration of a transistor. As seen
below and Fig. 7.

IC =  IE. Now, IB = IE –  IE = (1 – ) IE

Figure 7

Incidentally, there is also an a.c.  for a transistor. It refers to the ratio of change in collector
current to the change in emitter current

−△𝐼𝐶
αac = △𝐼𝐸
It is also, known as short-circuit gain of a transistor and is written as – hfb. It may be noted that
upper case subscript ‘FB’ indicates dc value whereas lower case subscript ‘fb’ indicates ac value.
For all practical purposes, dc= ac= 

Example 57.1 Following current readings are obtained in a transistor connected in CB


configuration: IE = 2 mA and IB = 20 mA. Compute the values of  and IC.
Solution
IC = IE – IB = 2 x 10-3 - 20 x 10-6 = 1.98mA
α = IC/IE = 1.98/2 = 0.99

CE Configuration
Here, input signal is applied between the base and emitter and output signal is taken out
from the collector and emitter circuit. As seen from Fig. 6 (b), IB is the input current and
IC is the output current.
The ratio of the d.c. collector current to d.c. base current is called dc beta (dc) or just  of the
transistor.

  = –IC /–IB = IC /IB or IC= IB

Figure 8
It is also called common-emitter d.c. forward transfer ratio and is written as hFE. It is
possible for  to have as high a value as 500. While analysing ac operation of a
transistor, we use ac  which is given by ac = IC / IB.
It is also written as hfe. The flow of various currents in a CE configuration both for PNP and
NPN transistor is shown in Fig. 8. As seen IE = IB + IC = IB + IB = (1 + ) IB
Relation between  and 
𝐼 𝐼 𝛽 𝐼
β = 𝐼 𝐶 and α = 𝐼𝐶 therefore 𝛼 = 𝐼𝐸
𝐵 𝐸 𝐵

𝐼𝐶 𝐼𝐶 /𝐼𝐸 𝛼
Now 𝐼𝐵 = 𝐼𝐸 − 𝐼𝐶  β =𝐼 =𝐼 or  = 1−𝛼
𝐸 −𝐼𝐶 𝐸 /𝐼𝐸 −𝐼𝐶 /𝐼𝐸

Cross-multiplying the above equation and simplifying it, we get (1 – a) =  or  =  (1 +  ) or


 =  / (1 +  ) It is seen from the about 2 equations that 1 –  = 1/(1 +  )

CC Configuration
In this case, input signal is applied between base and collector and output signal is taken out from
emitter-collector circuit [Fig. 6 (c)].
Figure 9
Conventionally speaking, here IB is the input current and IE is the output current as shown in
Fig. 9. The current gain of the circuit is:
𝐼𝐸 𝐼 𝐼 𝛽 𝛽
= 𝐼𝐸 . 𝐼 𝐶 = 𝛼 = 𝛽/(1+𝛽) = (1 + 𝛽)
𝐼𝐵 𝐶 𝐵

𝐼𝐸 = 𝐼𝐵 + 𝐼𝐶 = 𝐼𝐵 + 𝛽𝐼𝐵 = (1 + 𝛽) 𝐼𝐵

 output current = (1 +  ) × input current.


2.0 Field-Effect Transistor (FET)
The acronym ‘FET’ stands for field effect transistor. It is a three-terminal unipolar solid-state
device in which current is controlled by an electric field as is done in vacuum tubes. Broadly
speaking, there are two types of FETs:

(i) Junction field effect transistor (JFET)

(ii) Metal-Oxide Semiconductor FET (MOSFET)

It is also called insulated-gate FET (IGFET). It may be further subdivided into:


1. Depletion-enhancement MOSFET i.e. DEMOSFET
2. Enhancement-only MOSFET i.e. E-only MOSFET

Both of these can be either P-channel or N-channel devices. The FET family tree is shown
below:

2.1. Junction FET (JFET)

Basic Construction: As shown in Fig. 2.1, it can be fabricated with either an N-channel or P-
channel though N-channel is generally preferred. For fabricating an N-channel JFET, first a
narrow bar of N-type semiconductor material is taken and then two P-type junctions are diffused
on opposite sides of its middle part [Fig. 2.1 (a)]. These junctions form two P-N diodes or gates
and the area between these gates is called channel. The two P-regions are internally connected
and a single lead is brought out which is called gate terminal. Ohmic contacts (direct electrical
connections) are made at the two ends of the bar-one lead is called source terminal S and the
other drain terminal D. When potential difference is established between drain and source,
current flows along the length of the ‘bar’ through the channel located between the two P-
regions. The current consists of only majority carriers which, in the present case, are electrons.
P-channel JFET is similar in construction except that it uses P-type bar and two N-type junctions.
The majority carriers are holes which flow through the channel located between the two N-
regions or gates.

Following FET notation is worth remembering:


Source: It is the terminal through which majority carriers enter the bar. Since carriers come from
it, it is called the source

Drain: It is the terminal through which majority carriers leave the bar i.e. they are drained out
from this terminal. The drain-to-source voltage VDS drives the drain current ID

Gate: These are two internally-connected heavily-doped impurity regions which form two P-N
junctions. The gate-source voltage VGS reverse-biases the gates

Channel: It is the space between two gates through which majority carriers pass from source-to-
drain when VDS is applied.

Schematic symbols for N-channel and P-channel JFET are shown in Fig. 2.1 (c). It must be kept
in mind that gate arrow always points to N-type material.

Figure 2.1
Advantages of FETs

FETs combine the many advantages of both BJTs and vacuum tubes. Some of their main
advantages are:
1. High input impedance,
2. Small size,
3. Ruggedness,
4. Long life,
5. High frequency response,
6. Low noise,
7. Negative temperature coefficient, hence better thermal stability,
8. High power gain,
9. A high immunity to radiations,
10. No offset voltage when used as a switch (or chopper),
11. Square law characteristics

Disadvantages

1. Small gain-bandwidth product,


2. Greater susceptibility to damage in handling them

2.2 MOSFET or IGFET

It could be further subdivided as follows:

(i) Depletion-enhancement MOSFET or DE MOSFET

This MOSFET is so called because it can be operated in both depletion mode and enhancement
mode by changing the polarity of VGS. When negative gate-to-source voltage is applied, the N-
channel DE MOSFET operates in the depletion mode. However, with positive gate voltage, it
operates in the enhancement mode. Since a channel exists between drain and source, ID flows
even when VGS = 0. That is why DE MOSFET is known as normally-ON MOSFET.

(ii) Enhancement-only MOSFET

As its name indicates, this MOSFET operates only in the enhancement mode and has no
depletion mode. It works with large positive gate voltages only. It differs in construction from
the DE MOSFET in that structurally there exists no channel between the drain and source.
Hence, it does not conduct when VGS = 0. That is why it is called normally-OFF MOSFET.

In a DE MOSFET, ID flows even when VGS = 0. It operates in depletion mode with negative
values of VGS. As VGS is made more negative, ID decreases till it ceases when VGS = VGS (off). It
works in enhancement mode when VGS is positive as shown in Fig. 2.2 (b).
Fig 2.2

Fig 2.3

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