School of Science
Question Bank
Digital logic Design
BSc.CS I Year I Semester
S.No QUESTIONS LEVEL OF MARKS
DIFFICULTY
UNIT-I
1. Convert the following numbers EASY 5
(i) (615)10 = ( )16
(ii) ((11001101.0101)2= ( )8
(iii) (0.8125)10= ( )2
(iv) (658.825)10= ( )8
(v) (4D.56)16= ( )2
2. Subtract (10101)2 from (10110)2 using 2’s complement. HARD 4
3. Perform the following Using BCD arithmetic (7129) 10 + HARD 4
(7711) 10
4. Subtract (111001)2 from (101011)2 using 1’s complement. MODERATE 3
5. Perform (-50)10 - (-10)10 in binary using the signed-2’s HARD 4
complement.
6. Obtain the 1’s and 2’s complement of the following EASY 5
binary numbers 1010101, 0111000, 0000001, 10000,
0000010
7. Represent (-17) and (-8) in 8-bit sign magnitude, 1’s MODERATE 3
complement and 2’s complement
8. Perform BCD subtraction 0011 1001 0101 - 0000 0101 MODERATE 4
0011
9. BAD = ----------(8) = ------------(2) EASY 2
10. Using 2’s compliment perform (-253) + (-167) HARD 4
UNIT-II
1. Differentiate between Excess 3 code and BCD code. EASY 4
2. Represent the decimal number 3452 in i) BCD ii) Excess- EASY 2
3.
3. Write a note on unit distance code and self EASY 4
complimentary code
4. Convert the following to binary and then to gray code MODERATE 4
(AB16)16.
5. State and prove the De Morgan’s Theorems. EASY 4
6. Using Boolean laws, reduce the given Boolean HARD 4
expression:
F(X, Y, Z) = X′Y + YZ′ + YZ + XY′Z
7. Reduce the Boolean expression: A = XY + X(Y+Z) + HARD 4
Y(Y+Z) using Boolean laws.
8. Use the axioms of Boolean algebra and properties to EASY 4
prove:
(A+B) (A′ + C) (B+C) = (A+B) (A′ + C)
9. Simplify P′Q + (PQ)′ + P′R′ +QR EASY 4
10. Simplify ((A+B)′+ (AB)′)′ + AB′ HARD 4
UNIT-III
1. Draw the logic gate diagram and truth table for OR gate EASY 4
and AND gate.
2. What are the universal gates. Implement AND and OR EASY 4
gate using NAND gate.
3. Realize the Boolean equation using logic gate diagram. EASY 8
F= A’BC+ A(B+C’) + C’(A+B)
4. Write the Boolean equation and truth table that MODERATE 8
corresponds with the following logic gate diagram.
5. Explain the functionality of exclusive gates. EASY 4
6. Design the circuit by Using NAND gates F= ABC’+ DE+ HARD 8
AB’D’
7. Which gate is also called as inverter and why? Implement EASY 4
inverter using NOR gate only.
8. Draw the logic gate diagram and truth table for the MODERATE 4
following Boolean equation.
F= (P’Q + PQ’ ) . (P’Q’+PQ)
9. Implement using multilevel NAND F = A(BC+D) + AC HARD 8
(B+D)
10. Implement X-OR gate using universal gates. MODERATE 4
UNIT-IV
1. Explain canonical and standard forms with examples. EASY 4
2. Implement the following functions in canonical SOP and MODERATE 8
POS forms
i)f (A, B, C, D) = A′B + BC + CD′ + ACD
ii) f (A, B, C, D) = (A + B′ + C) (A + D) (B′ + C′)
(A + B + C)
3. Simplify the Boolean expression using K-Map. HARD 8
F(A,B,C,D,)= ∑m(0,1,4,5,15,14, 11,13)
4. Simplify the Boolean equation using K-Map HARD 8
F(A,B,C,D) = ∑m(1,2,3,8,9,10,11,14) +d(7,15)
5. Simplify the Boolean expression using K-map and HARD 8
implement using logic gates
F(A,B,C,D) = ∑m(0,2,3,8,10,11,12,14)
6. Reduce the expression HARD 8
f(x,y,z,w)= πM(0,2,7,8,9,10,11,15) .d (3,4) using K-Map
7. Obtain the SOP expression for the function: HARD 8
F(A,B,C,D)= = ∑m(0,1,2,5,8,9,10).
8. Simplify the Boolean expressions to minimum number of EASY 8
literals using K-map
i)(A + B)(A + C’ )(B’ + C’)
ii) AB’+BC+A’C
9. Reduce the following equation using Quine-McCluskey HARD 8
method
F(A,B,C,D) = ∑m(0,1,3,4,5,7,10,13,14,15)
10. Reduce the following equation using tabulation method HARD 8
F(A,B,C,D) = ∑m(0,1,2,4,6,9,11,13,14)
UNIT-V
1. Give the difference between combinational and sequential EASY 4
circuits?
2. What are sequential circuits and types of sequential EASY 4
circuits?
3. Implement Full adder circuit using half adders? MODERATE 4
4. Design a combinational circuit with three input variables HARD 8
that will produce logic 1 output when more than one input
variables are logic 1.
5. Design full adder circuit and explain its operation using EASY 8
truth table?
6. Explain the principle of decoder logic circuit with neat MODERATE 8
diagram?
7. What is MUX? Design 4x1 MUX with its truth table? HARD 8
8. What is De-Multiplexer ? give the difference between de- EASY 4
multiplexer and decoder?
9. Define magnitude comparator and design 1 bit HARD 8
comparator?
10. What are Flip-flops ? Explain the types of flip-flops with MODERATE 8
their characteristic tables?
