Grass I 2007
Grass I 2007
TABLE I
FRONT-END CIRCUIT REQUIRED SPECIFICATIONS
Fig. 6. Detailed schematic of the developed interface circuit based on enhanced RCO.
The two-stage operational amplifier (op-amp) employed in to achieve the desired accuracy, i.e., 256 for a minimum
the integrator exhibits a DC gain of 60 dB and a unity-gain band- guaranteed 8-bit equivalent precision, as implemented in the re-
width of 280 MHz. By comparison of the output of the inte- ported interface system. As a consequence, if we need to mea-
grator with two constant boundary voltages and ( sure resistance values in the range of at least 2 decades cen-
V, set by design once more on the basis of tered around , over a single read-out scale, the minimum
system level simulations), by means of two high-speed con- number of bits for each of the two counter registers is given by
tinuous-time comparators 2 ns , the control sig-
nals for the switches that shunt the mirrored current are gener- (3)
ated. An additional flip-flop finally guarantees that comparators
switch alternately and feeds a counter, whose transition period More in detail, in the implemented circuit, an extra number of
is consequently directly proportional to the resistance value internal bits is employed for the oscillator-dependent counter to
: allow resistance measurement 3 decades below . Then, if
the applied value is lower than midrange, the slower of
(1)
the two counters reaching will be the reference one and the
measurement time is constant. By contrast, the slower counter
B. The Novel Frequency Measurement Technique will be the one controlled by the oscillator if the measured
is larger than midrange, leading to a measurement time propor-
The frequency measurement is carried out in the digital do-
tional to the resistance value itself. Therefore, the output digital
main using a novel principle. The implemented technique al-
word will be composed of 15 bits, which represent the value
lows to handle a dynamic range which is two times, in terms of
reached by the faster of the two counters during the measure-
decades, with respect to previously published frequency mea-
ment and by an additional bit which indicates if the converted
surement methods [20] [21]. This circuit works as follows. The
resistance value is either higher or lower than .
ratio between a reference counter, whose clock frequency is
set at the midrange of the given oscillator frequency interval
C. Available Front-End Circuit Resistance Value Measurement
and a counter, whose clock frequency
Ranges
is the output signal of the resistance dependent oscillator, repre-
sents the digitized value of . In order to extend the dynamic range of the system, three dif-
Therefore, the measured resistance value is given by ferent current scaling ratios ( 1:200, 1:20, 1:2) are avail-
able at the input of the Miller integrator by means of a pro-
(2) grammable set of current mirrors, allowing a full-range mea-
surement in terms of resistance value varying from 1 k to 1 G
where and indicate the reference and the oscillator by exploiting different overlapped scales. Programmability in
frequency-dependent counter values at the end of the conver- the integrator capacitance has also been introduced in order to
sion, respectively, is the logarithmical center of the scale, improve accuracy and conversion speed for the highest resis-
while and represent the front-end circuit gain and offset tance values, choosing a value for among two: pF or
contribution terms. These coefficients may be uncompensated pF. The nominal value for the reference external clock
in gas-sensing because they do not affect linearity in gas con- is 2.5 kHz, thus leading to a constant conversion time
centration extraction. The measurement ends when the slower for of 100 ms for every - combination, while
of the two counters reaches a given value which is sufficient for higher resistance values the time needed for conversion is,
GRASSI et al.: A 141-dB DYNAMIC RANGE CMOS GAS-SENSOR INTERFACE CIRCUIT WITHOUT CALIBRATION WITH 16-Bit DIGITAL OUTPUT WORD 1547
TABLE II
SUMMARY OF AVAILABLE FRONT-END CIRCUIT SUB-RANGES WITH stage Miller-compensated amplifier, whose topology is shown
f =
2.5 kHz. FOR GENERIC f : R ,R , AND R in Fig. 7. Low output resistance at the buffered value node
MUST BE NORMALIZED TO 2.5 kHz/f
is guaranteed by a nMOS (800/0.35) source follower which has
also the function of V-to-I conveyor and by the feedback, as
previously shown in Fig. 6.
Having low output resistance is in fact mandatory to meet
linearity specifications, in particular when the sensor draws
the highest current values. The developed buffer exhibits a
measured maximum distortion of only 0.3% in the 6-decade
for example, setting to 1:200 and pF, microsec- output current extended range of interest [1 nA–1 mA]. This
onds, if is expressed in Ohms, as reported in Table II. feature means a worst case SNDR performance of 50 dB
Notice that, as appears in Table II, not all sub-ranges over 6 decades of current values, i.e., 170 dB dynamic range
are symmetrical with respect to . In fact [15]. The highest relative measured output resistance value
these bounds, differently from the mentioned ge- 0.003 occurs when the sensor draws the
ometrical bounds, take also into account further physical limita- maximum current 1 mA 3 1k .
tions and allow over-ranging capabilities of the interface circuit. Thus, this boundary condition exhibits the maximum measured
The lower limit is typically given by the fact that the maximum distortion.
oscillator frequency is 2.5 MHz The employed amplifier achieves a DC-gain of 100 dB and
because of the comparator speed limitations and finite inte- a unity-gain bandwidth of 100 kHz, while consuming 2 mW.
grator op-amp bandwidth, while the maximum current to be Transistors reported in Fig. 7 are all 0.35- m CMOS standard
measured should be 1 mA k , due to the devices and dimensioned in order to minimize flicker noise
buffer linearity specifications, in order to fulfil gas-sensing without degrading the gain [15]. Therefore, the residual total
requirements. For example, in range (later called also mode) RMS noise across the biased sensor is always below 80 V
“01” the lower limit constraints are coincident since we have for every value of current drawn by the sensor, even in
2.5 MHz when 1 mA. The upper limit fast-acquisition mode (100 Hz), described in the last section.
in resistance measurable value comes instead when the cur-
rent lost towards the bulk from the input analog pad is no B. The Current Mirrors
longer negligible for the accuracy of interest: this happens The cascoded current mirrors of Fig. 6, embedded in the de-
for 1 G , which means in terms of sensor current, veloped interface circuit and operated in push-pull configura-
1 nA. tion in order to feed with alternate current the following Miller
integrator, have been designed to grant a maximum linearity
IV. INTERFACE CIRCUIT DESIGN AND OPERATING DETAILS error of 0.25% over 5 decades of current for all the three pos-
Additional details on the operating modes and on the perfor- sible programmable configurations . The state-of-the-art oscil-
mance of each block of the developed circuit will be briefly re- lator-based approach employing current mirrors [20] has been
ported in the following subsections. improved by using cascode configuration and by keeping con-
stant the voltage of at least the output of current mirrors by con-
A. The Voltage Reference Buffer in V-To-I Configuration necting such net to Miller integrator op-amp virtual ground.
The amplifier used for applying the bias voltage to the Current mirrors may also operate properly in the subthreshold
sensor is a low-noise pMOS input pair, high-gain (100 dB), two- region for currents down to 1 nA 1 G , with
1548 IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 42, NO. 7, JULY 2007
Fig. 10. Simplified block diagram of the implemented frequency measurement circuit.
E. The Embedded Digital Frequency Measurement and Each equivalent sample is obtained, for each sub-
Control Logic Circuit decade of a given scale, by means of an external 0.02% or
The frequency measurement logic developed, whose simpli- 0.2% precision CerMet resistor, called , connected at
fied block diagram is shown in Fig. 10, consists of two counters: one end to the buffered interface circuit pin and at
the clock of the first one is generated by the oscillator circuit and the other end to a precision voltage source . Sweeping
thus has a period proportional to the value of the under the voltage source output in the range [ 9 V; 0 V],
measurement, while the second counter is driven by an external we obtain an equivalent resistance value range of one decade:
reference clock. The measurement starts on the rising edge of [ ; ], while for extending the measurement
an external signal ENABLE, which initially resets both counter over more decades the CerMet resistor must be changed.
registers and unlocks integrator output. The measurement ends High-precision resistors of 10 k , 100 k , 1 M , 10 M ,
when the slower of the two counters reaches a defined value, i.e., 100 M , and 1 G values have been employed. The data
256, in the developed interface circuit. At this point, both acquisition is performed in an automated way: the chip pro-
counters are inhibited and a multiplexer updates the front-end totype, mounted on the board, is characterized by means of a
circuit digital output bus with the content of the faster counter developed Labview test environment, which executes about a
register, actually corresponding to the least significant 15 bits thousand measurements sweeping the equivalent value of
of the measured value, of which at least 8 are meaningful. by controlling the voltage source through a GPIB serial bus.
The most significant bit is instead the flag which indicates which Furthermore, the routine acquires the digitized values with a
has been the faster counter. Finally, an End Of Conversion signal logical analyzer, and generates an output data file to be analyzed
(EOC) is provided with an additional delay with respect to the in Matlab. For each scale, values higher than midrange
output data in order to facilitate external data acquisition. are stepped linearly, while values lower than
are stepped hyperbolically. We could say that, for higher
than midrange, the input resistance is simply stepped linearly,
V. DEVELOPED INTERFACE CIRCUIT CHARACTERIZATION while for lower than midrange it is the input conduc-
The proposed circuit, whose chip microphotograph (1.05 tance to be stepped linearly. This particular
0.35 mm is shown in Fig. 11, consumes less than 15 mW from shrewdness has been necessary due to the intrinsic behavior
a 3.3-V supply. of the novel frequency measurement technique, for which the
To characterize the interface circuit, mounted on a customized output digital code always results to be linear with respect to
test board, we applied at its terminals all needed bias voltages the faster among the two counters in the measurement. Before
and supplies, generated by commercial regulators, as shown in proceeding with the accurate linearity test of the developed
Fig. 12. Furthermore, emulated values for in the ranges front-end circuit, the following scope plots are reported in
and/or sub-ranges of interest have been connected to the chip Fig. 13 and Fig. 14, as an example of a qualitative evaluation
sensing input in order to process the digital converted values of the interface circuit behavior over a 5-decade range, actually
and retrieve the linearity performance of the read-out circuit. the full “10” range [10 k –1 G ]. These plots represent the
For each scale of interest, about 1 kSample of different syn- analog and digital output test signals (the triangular buffered
thesized resistor values are converted. integrator output waveform and the asynchronous latch output)
1550 IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 42, NO. 7, JULY 2007
Fig. 13. Integrator buffered output test signal and regenerated latch output test Fig. 14. Integrator buffered output test signal and regenerated latch output test
signal in mode “10” for R = 1 G , with one second scope persistence signal in mode “10” for R = 10 k , without scope persistence (f
(f 26 Hz), in order to underline noise contribution. 2.6 MHz).
for the highest and lowest resistance value of applied , exhibited an accuracy up to 0.8% over 5 decades in mode “01”
respectively. DR 141 dB , as shown in Fig. 16 and 0.4% over 4 decades
In Fig. 13, one second scope persistence was used, in order to in mode “00” DR 128 dB , as reported in Fig. 17, by setting
underline the noise contribution in time domain. Furthermore, the reference clock frequency to 2.5 kHz. We recall that
Fig. 15 represents the worst-case noise persistence histogram the conversion time for the two lower decades will result con-
plot (5000 acquisitions) of the front-end circuit digital output in stant and equal to 100 ms, while for the upper decades the time
mode “11” for applied resistance value G . needed will range in [100 ms–10 s] for every available scale.
Since in the plot the local quantization is equiva- Furthermore, an ad hoc, faster operating mode for this circuit
lent to LSB 391 k , the absolute error in resis- is available if the user is interested in a range of only
tance measurement for G , due to noise, is 2 decades, very useful in gas-sensor query once the baseline
ERR LSB 1.5 M , thus leading to a system value has been compensated by selecting the reference clock
worst-case noise sensitivity of 0.15%, taking into account that frequency to get , where is the sensor
maximum input resistances lead to maximum noise. resistance in the absence of gas, after choosing the best working
range.
A. Linearity Characterization Results Without Calibration For example, if the sensor resistance in absence of an oxi-
Linearity characterization was performed following the pro- dizing gas is M , setting the external clock to
cedure described above, and in particular, the front-end circuit 25 kHz, the conversion time will be constant and equal
GRASSI et al.: A 141-dB DYNAMIC RANGE CMOS GAS-SENSOR INTERFACE CIRCUIT WITHOUT CALIBRATION WITH 16-Bit DIGITAL OUTPUT WORD 1551
Fig. 15. Noise persistence histogram plot (5000 acquisitions) of the front-end Fig. 17. Relative error in resistance measurement over [1 k –5 M ] “00”
circuit digital output in mode “11” for applied resistance value R = 1G . without performing any calibration operation (3.8 decades).
Fig. 19. SNDR and DR in resistance measurement over [1 k –1 G ] per- Fig. 21. System transient response to NO in 30% R.H. wet air.
forming soft calibration.
Fig. 20. SNDR and DR in resistance measurement over [1 k –1 G ] per- Fig. 22. System transient response to methanol in 30% R.H. wet air.
forming hard calibration.
TABLE III
MEASURED INTERFACE CIRCUIT SPECIFICATION SUMMARY
results have been reported to validate the real effectiveness of [15] M. Grassi, P. Malcovati, and A. Baschirotto, “A 160 dB equivalent
the system. dynamic range auto-scaling interface for resistive gas-sensors arrays,”
IEEE J. Solid State Circuits, vol. 42, pp. 518–528, 2007.
[16] M. Grassi, P. Malcovati, and A. Baschirotto, “A 0.1% accuracy 100
ACKNOWLEDGMENT Ohm-20 MOhm dynamic range integrated gas-sensor interface circuit
Chemical measurements were carried out thanks to Dr. with 13 + 4 bit digital output,” in Proc. ESSCIRC, 2005, pp. 351–354.
[17] P. Malcovati, M. Grassi, F. Borghetti, V. Ferragina, and A. Baschirotto,
P. Siciliano’s group at CNR-IMM, Lecce, Italy. “Design and characterization of a 5-decade range integrated resistive
gas-sensor interface with 13-bit A/D converter,” in Proc. IEEE Sensors,
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[3] A. Baschirotto and P. Malcovati, “Technology-driven alternatives for Baschirotto, “A CMOS interface for a gas-sensor array with a 0.5%-
smart sensor interfaces,” in Sensors Update, H. Baltes, G. Fedder, and
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linearity over 500 k -to-1 G range and 2.5 C temperature control
accuracy,” in IEEE ISSCC Dig. Tech. Papers, 2006, pp. 294–295.
45–81. [21] M. Grassi, P. Malcovati, and A. Baschirotto, “Wide-range integrated
[4] D. Barrettino, M. Graf, S. Hafizovic, S. Taschini, C. Hagleitner, A. Hi- gas-sensor interface based on a resistance-to-number converter tech-
erlemann, and H. Baltes, “A single-chip CMOS micro-hotplate array nique with the oscillator decoupled from the input device,” in Proc.
for hazardous-gas detection and material characterization,” in IEEE IEEE ISCAS, 2006, pp. 4395–4398.
ISSCC Dig. Tech. Papers, 2004, pp. 312–313. [22] V. Ferragina, P. Malcovati, F. Borghetti, A. Rossini, F. Ferrari, N. Ratti,
[5] G. Sberveglieri, “Recent developments in semiconducting thin-film and G. Bertuccio, “Implementation of a novel read-out strategy based
gas-sensors,” Sensors and Actuators B, Chemical, vol. 23, no. 2–3, pp. on a wilkinson ADC for a 16 x 16 pixel X-ray detector array,” in Proc.
103–109, 1995. IEEE ISCAS, 2005, pp. 5569–5572.
[6] S. Capone and P. Siciliano, “Gas-sensors from nanostructured metal [23] P. Bastia, G. Bertuccio, F. Borghetti, S. Caccia, V. Ferragina, F. Ferrari,
oxides,” Encyclopedia of Nanoscience and Nanotechnology, vol. 3, pp. D. Maiocchi, P. Malcovati, D. Martin, A. Pullia, and N. Ratti, “An in-
769–804, 2004. tegrated reset/pulse pile-up rejection circuit for pixel readout ASIC’s,”
[7] R. M. Dowdeswell and P. A. Payne, “Odour measurement using con- in IEEE Nuclear Science Symp. Conf. Rec. (NSS ’04), 2004, vol. 3, pp.
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[8] E. Martinelli, G. Pennazza, C. Falconi, A. D’Amico, and C. Di Na-
tale, “Comparison between two alternative feature extraction methods Marco Grassi (S’04–M’06) graduated in electronic
for chemical sensor array,” in World Scientific AISEM Proc., 2003, pp. engineering from the University of Pavia, Italy, in
334–339. 2002, and pursued the Ph.D. degree in electronic
[9] A. Burresi, A. Fort, S. Rocchi, M. B. Serrano Santos, N. Ulivieri, and engineering at the same university in 2006. In 2001,
V. Vignoli, “Temperature profile investigation of SnO sensors for CO he worked at Texas Instruments Inc., Dallas, TX, as
detection enhancement,” IEEE Trans. Instrum. Meas., vol. 54, no. 1, an internship co-op in the Data Converters Group, and
pp. 79–86, 2005. in 2002 he joined the Integrated Microsystems Labo-
[10] “Interface and control circuits for high-selectivity gas-sensors operated ratory of the University of Pavia as a Ph.D. candidate.
with temperature pattern,” PRIN 2005092937, funded by Italian Gov- He participated in high-resolution and high-speed
ernment [Online]. Available: http://ims.unipv.it/prin05 mixed-signal circuits design and characterization.
[11] J. W. Gardner, E. L. Hines, and C. Pang, “Detection of vapours and Since 2004, his research activity mainly focused on
odours from a multisensor array using pattern recognition self-or- smart sensor interfaces, especially in terms of resistance measurement techniques
ganising adaptive resonant techniques,” Meas. Contr., vol. 29, pp. development for gas-sensors arrays. For this application in 2004, he designed and
172–178, 1996. characterized a prototype chip in the first national government funded project,
[12] A. Carpenter and S. Grossberg, “A massively parallel architecture for while in 2005–2006, he developed a second integrated solution for gas-sensors
a self organizing neural pattern recognition machine,” Comput. Vis. interfacing in a new national project and participated in European GOSPEL net-
Graph. Image Process, no. 37, pp. 116–165, 1987. work activities providing gas-sensors arrays interfacing solutions. In 2007, he
[13] M. Grassi, P. Malcovati, and A. Baschirotto, “An uncalibrated 141 dB worked on a large format X-ray detector read-out for a space applications chip
dynamic-range CMOS gas-sensor interface with 16-bit digital output,” and on the development of an integrated temperature profile synthesizer for gas
in Proc. ESSCIRC, 2006, pp. 235–238. sensors. He is now interested in healthcare and homeland safety with particular
[14] M. Grassi, P. Malcovati, and A. Baschirotto, “A high-precision wide- focus on elder people, working as a Post-Doctoral Researcher at the Electrical
range front-end for resistive gas-sensors arrays,” Sensors and Actua- Department of University of Pavia in the European NetCarity project. He is the
tors B: Chemical, Eurosensors XVIII Special Issue, vol. 111–112, pp. author of three papers in international journals and author of more than 10 pa-
281–285, 2005. pers presented at international conferences (with published proceedings).
1554 IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 42, NO. 7, JULY 2007
Piero Malcovati (M’95–SM’05) received the Laurea Andrea Baschirotto (M’95–SM’01) graduated in
degree (summa cum laude) in electronic engineering electronic engineering (summa cum laude) from
from University of Pavia, Italy, in 1991. In 1992, he the University of Pavia, Italy, in 1989. In 1994, he
joined the Physical Electronics Laboratory (PEL) at received the Ph.D. degree in electronics engineering
the Federal Institute of Technology in Zurich (ETH from the University of Pavia.
Zurich), Switzerland, as a Ph.D. candidate. He re- In 1994, he joined the Department of Electronics,
ceived the Ph.D. degree in electrical engineering from University of Pavia, as a Researcher (Assistant Pro-
ETH Zurich in 1996. fessor). In 1998, he joined the Department of Innova-
From 1996 to 2001, he was an Assistant Professor tion Engineering, University of Salento, Italy, as an
in the Department of Electrical Engineering of the Associate Professor. About his research activity, he
University of Pavia. Since 2002, he has been an Asso- founded and he is leading the Microelectronics Group
ciate Professor of electrical measurements at the same university. His research at University of Lecce, which is collaborating with several companies and re-
activities are focused on microsensor interface circuits and high-performance search institutions (including IMEC, Infineon, University of Pavia, RFDomus,
data converters. He has authored or co-authored more than 30 papers in interna- STMicroelectronics). His main research interests are in the design of CMOS
tional journals, more than 100 presentations at international conferences (with mixed analog/digital integrated circuits, in particular for low-power and/or high-
published proceedings), 5 book chapters, and 3 industrial patents. speed signal processing. He participated in several research collaborations, also
Dr. Malcovati was guest editor for the Journal of Analog Integrated Circuits funded by National and European projects. He is and has been responsible for
and Signal Processing for the special issue on IEEE ICECS 1999. He served as some national and regional projects for the design of ASIC. Since 1989, he
Special Session Chairman for the IEEE ICECS 2001 Conference, as Secretary has collaborated with several companies on the design of mixed-signal ASICs,
of the Technical Program Committee for the ESSCIRC 2002 Conference, and such as STMicroelectronics, Mikron, ACCO, ITC-IRST, IMEC, RFDomus (he
as Technical Program Chairman of the IEEE PRIME 2006 Conference. He was was in its Advisory Board), and Conexant. He has authored or co-authored
and still is a member of the scientific committees for several international con- more than 190 papers in international journals and presentations at interna-
ferences, including ESSCIRC, DATE, ECCTD, SENSORS, and PRIME. He is tional conferences and 6 book chapters, and holds 25 U.S. patents. In addi-
an associate editor of the Journal of Circuits, Systems, and Computers. tion, he has co-authored more than 120 papers within research collaborations
on high-energy physics experiments. He has long-term experience in microelec-
tronics for what concerns teaching, researching, and industrial designing. He has
been teaching regular academic courses since 1997. He organized the full ed-
ucational courses for electronics engineering (Bachelor, Master, and Ph.D.) at
the University of Salento. He has given industrial courses since 1996 (at Bosch,
STMicroelectronics, ITC-IRST, Conexant, and Mikron, among others). He is a
speaker at the MEAD Summer courses held at EPFL, Lausanne, Switzerland. He
has given short courses or tutorials at important conferences including ISSCC,
ISCAS, and PRIME.
Dr. Baschirotto was Associate Editor IEEE TRANSACTIONS ON CIRCUITS
SYSTEMS—PART II for the period 2000–2003, and of IEEE TRANSACTIONS ON
CIRCUITS SYSTEMS—PART I as an Associate Editor for the period 2004–2005.
He was the Technical Program Committee Chairman for ESSCIRC 2002
and the Guest Editor for the IEEE JOURNAL OF SOLID-STATE CIRCUITS for
ESSCIRC 2003. He was the General Chair of PRIME2006. He is a member
of the Technical Program Committees of several international conferences,
including ISSCC, ESSCIRC, and DATE.