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MIPS2C
programming from the machine up

Philip Machanick
MIPS2C: PROGRAMMING FROM THE MACHINE UP
First edition, 2015
Minor corrections: March 2017
Copyright © Philip Machanick 2014, 2015, 2016, 2017

Published by Philip Machanick in the RAMpage Research imprint

under an Attribution-NonCommercial 4.0 International (CC BY-NC
4.0) licence:
http://creativecommons.org/licenses/by-nc/4.0/
The quick summary: free to use however you like but not for
commercial purposes.

SPIM documentation: Appendix E is copyright to the author as

indicated on the first page and using this material does not imply
endorsement by James Larus of this book.

Picture credits: all illustrations are either by the author or from

public domain sources, as acknowledged in the text.

Author: Machanick, Philip, 1957-

Title: Mips2C: programming from the machine up / Philip Machanick
Edition: 1st ed.
Publisher: Grahamstown, South Africa : RAMpage Research, 2015.
ISBN: 978-0-8681048-7-4 (pbk.)
LoC classification : QA76

Last typeset 6 March 2017

Preface

W
HY THIS BOOK ? Some years ago I took part in a panel discussion
titled “Programming Early Considered Harmful” at the SIGCSE 2001
conference [Hitchner et al. 2001]. Once of those present was Yale
Patt, whom I had met briefly on a sabbatical at University of Michigan, where
he was at the time a professor working in computer architecture. His role
on the panel was to proselytise his book, Introduction to Computing Systems:
From bits & gates to C & beyond [Patt and Patel 2013], which introduced
programming from the low level up. I found the idea intriguing particularly as
I also was concerned with the problem that students tend to stick with the first
thing they learn. If my concern was correct, it should be better to start with the
programming model you want them to internalize, rather than start with machine-
level programming. Nonenetheless, I am always open to new ideas, and when the
opportunity presented itself to run a computer organization course followed by a
C course, I decided to try the idea for myself.
After reviewing the latest edition of Patt and Patel [2013], I saw a gap for a
treatment that focused more on assembly-level programming as it relates to C, and
less on the hardware. For any who disagrees, there is another book out there.
Another problem is that text books are becoming increasingly expensive.
Patt and Patel [2013] retails for over $150; the fifth edition of the classic
Computer Organization and Design: The Hardware/Software Interface [Patterson
and Hennessy 2014] lists at almost $90.
That takes me to another motivation for writing this book: affordability.
Where I live, South Africa, we are charged European prices for books. While
publishers do sometimes try to lower prices when we ask nicely, books are very
expensive in relation to earning power. We also have a significant fraction of
students from very low income groups. All of that motivates me to explore ways
of pushing cost down. One way I am doing that is by publishing this book with
a Creative Commons Attribution-NonCommercial license, which makes it free to

ii
 iii

copy for non-commercial purposes. Another way I aim to bring costs down is by
publishing using print on demand (PoD). The cost per book printed using PoD
publishing is higher than the cost per book of a large print run, but a large print
run is only economic if a significant fraction of the books is sold. By using PoD,
I can also cut out the overheads of a publisher, who has to make money out of
successful books to pay for warehouses full of unsuccessful titles.
How well does it work?
My students do this course after a year of object-oriented programming so
it is not in that sense a low-level first approach. They find it hard to break out
of calling functions “methods”, as an example of an entrenched habit. Overall
though my experience is that the approach works. To some extent starting with
a relatively high-level language with classes and objects makes it easy to code
things that provide tangible results. Taking a dive after that into the low level is a
bit discomforting, but so is any real learning.
A few thoughts on my approach.
Standard MIPS-based treatments generally follow a particular standard for
compiler calling conventions; I construct my call stack slightly differently for
two reasons. The first is I find my approach a bit easier to explain. The second is
to get across to students that the stack is not a fixed structure in memory, but the
consequence of conventions that you can change.
I try to avoid teaching things in a way that has to be undone later. Rather,
I use simplifications, then fill in the gaps. For example, I introduce templates
for coding statements into assembly language (such as if statements or for loops)
without taking into account all the requirements for generality, then add in those
requirements.
I use C as a “pseudocode” deliberately in the first part of the book, even though
C is clearly a real language, to create familiarity with the syntax. For students
with a background in a C-like language, this should not present a major issue.
For others, the “pseudocode” is mainly used in small examples and should be
understandable from the context.
My intent is to put students in a position to understand topics like compilers,
recursion and data structures by seeing what happens underneath. I think the
approach works, though the best test is whether graduates who have learnt this
way are able to work more efficiently and with more insight later in life.
Finally, I look forward to hearing from others who use this material. If you
choose to use the free version, your views will be just as valuable as if you pay
for a commercially published copy.
Contents

Preface ii

List of Figures viii

List of Tables xi

Definitions xii

From the Machine. . . 1

1 Introduction 2
1.1 Some Basics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
1.2 Machine Language versus High-Level Language . . . . . . . . . 6
1.3 Code Translation . . . . . . . . . . . . . . . . . . . . . . . . . . 9
1.4 Machine Instruction Sets . . . . . . . . . . . . . . . . . . . . . . 11
1.5 The Machine . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
1.6 Practicalities . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
1.7 Further Reading . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Exercises . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

2 Numbers and the Machine 20

2.1 Logic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
2.2 Numbers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
2.3 Numbers and Logic . . . . . . . . . . . . . . . . . . . . . . . . . 35
2.4 The Machine . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38
Exercises . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47

3 Assembly by Example 49
3.1 Instructions and their Formats . . . . . . . . . . . . . . . . . . . 49

iv
CONTENTS v

3.2 Memory access . . . . . . . . . . . . . . . . . . . . . . . . . . . 53

3.3 ALU operations . . . . . . . . . . . . . . . . . . . . . . . . . . . 61
3.4 Control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 68
3.5 Floating Point . . . . . . . . . . . . . . . . . . . . . . . . . . . . 74
Exercises . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 76

4 Memory and Functions 79

4.1 Calling functions . . . . . . . . . . . . . . . . . . . . . . . . . . 82
4.2 Global Variables . . . . . . . . . . . . . . . . . . . . . . . . . . . 92
4.3 Local Variables and the Call Stack . . . . . . . . . . . . . . . . . 97
4.4 Bigger Parameters . . . . . . . . . . . . . . . . . . . . . . . . . . 111
4.5 Recursion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 113
Exercises . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 120

5 Data Structures 123

5.1 Machine-Level Data . . . . . . . . . . . . . . . . . . . . . . . . 123
5.2 Arrays . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 126
5.3 Dynamic Data . . . . . . . . . . . . . . . . . . . . . . . . . . . . 143
5.4 Structured types . . . . . . . . . . . . . . . . . . . . . . . . . . . 150
5.5 Objects . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 160
5.6 Putting it all Together . . . . . . . . . . . . . . . . . . . . . . . . 168
Exercises . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 169

6 Performance 172
6.1 More at once . . . . . . . . . . . . . . . . . . . . . . . . . . . . 173
6.2 Memory Hierarchy and Performance . . . . . . . . . . . . . . . . 181
6.3 Input and Output . . . . . . . . . . . . . . . . . . . . . . . . . . 184
6.4 Energy and mobility . . . . . . . . . . . . . . . . . . . . . . . . 186
6.5 Wrap-up . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 187
Exercises . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 188

. . . to C 191

7 Structure of a C Program 192

7.1 Minimal C Program . . . . . . . . . . . . . . . . . . . . . . . . . 193
7.2 Program Files . . . . . . . . . . . . . . . . . . . . . . . . . . . . 194
7.3 Program File Contents . . . . . . . . . . . . . . . . . . . . . . . 196
7.4 Major Constructs . . . . . . . . . . . . . . . . . . . . . . . . . . 199
vi CONTENTS

7.5 Main Program Parameters . . . . . . . . . . . . . . . . . . . . . 208

7.6 Multifile Programs . . . . . . . . . . . . . . . . . . . . . . . . . 210
7.7 Further Reading . . . . . . . . . . . . . . . . . . . . . . . . . . . 212
Exercises . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 212

8 The UNIX Command Line 215

8.1 Command Line . . . . . . . . . . . . . . . . . . . . . . . . . . . 215
8.2 Programming . . . . . . . . . . . . . . . . . . . . . . . . . . . . 220
8.3 More Complex Commands . . . . . . . . . . . . . . . . . . . . . 224
8.4 Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 227
8.5 Further Reading . . . . . . . . . . . . . . . . . . . . . . . . . . . 228
Exercises . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 228

9 Simple C Examples 231

9.1 Simple functions and IO . . . . . . . . . . . . . . . . . . . . . . 231
9.2 More IO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 235
9.3 Bigger Examples . . . . . . . . . . . . . . . . . . . . . . . . . . 240
Exercises . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 245

10 More Interesting Problems 248

10.1 More Types . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 248
10.2 More on C File Layout . . . . . . . . . . . . . . . . . . . . . . . 251
10.3 Examples . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 252
10.4 Putting a program together . . . . . . . . . . . . . . . . . . . . . 270
10.5 More complex examples . . . . . . . . . . . . . . . . . . . . . . 275
10.6 Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 282
Exercises . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 282

Bibliography 285

A ASCII Character Set 287

B MIPS Register Conventions 291

C SPIM System Calls 293

D SPIM Call Stack 295

CONTENTS vii

E SPIM Background 298

E.1 SPIM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 299
E.1.1 Simulation of a Virtual Machine . . . . . . . . . . . . . . 300
E.1.2 SPIM Interface . . . . . . . . . . . . . . . . . . . . . . . 300
E.1.3 Surprising Features . . . . . . . . . . . . . . . . . . . . . 300
E.1.4 Assembler Syntax . . . . . . . . . . . . . . . . . . . . . 301
E.1.5 System Calls . . . . . . . . . . . . . . . . . . . . . . . . 303
E.2 Description of the MIPS R2000 . . . . . . . . . . . . . . . . . . 305
E.2.1 CPU Registers . . . . . . . . . . . . . . . . . . . . . . . 305
E.2.2 Byte Order . . . . . . . . . . . . . . . . . . . . . . . . . 308
E.2.3 Addressing Modes . . . . . . . . . . . . . . . . . . . . . 308
E.2.4 Arithmetic and Logical Instructions . . . . . . . . . . . . 309
E.2.5 Constant-Manipulating Instructions . . . . . . . . . . . . 311
E.2.6 Comparison Instructions . . . . . . . . . . . . . . . . . . 311
E.2.7 Branch and Jump Instructions . . . . . . . . . . . . . . . 312
E.2.8 Load Instructions . . . . . . . . . . . . . . . . . . . . . . 314
E.2.9 Store Instructions . . . . . . . . . . . . . . . . . . . . . . 314
E.2.10 Data Movement Instructions . . . . . . . . . . . . . . . . 315
E.2.11 Floating Point Instructions . . . . . . . . . . . . . . . . . 316
E.2.12 Exception and Trap Instructions . . . . . . . . . . . . . . 318
E.3 Memory Usage . . . . . . . . . . . . . . . . . . . . . . . . . . . 319
E.4 Calling Convention . . . . . . . . . . . . . . . . . . . . . . . . . 319
E.5 Input and Output . . . . . . . . . . . . . . . . . . . . . . . . . . 320

Index 323
List of Figures

1.1 Major components of the memory hierarchy and CPU . . . . . . . 14

1.2 Multilevel caches in a multicore deisign . . . . . . . . . . . . . . 15

2.1 A nand gate used to implement a not gate . . . . . . . . . . . . . 21

2.2 Logic gate symbols . . . . . . . . . . . . . . . . . . . . . . . . . 25
2.3 Exclusive or from nand gates . . . . . . . . . . . . . . . . . . . . 25
2.4 IEEE 754 32-bit floating point . . . . . . . . . . . . . . . . . . . 31
2.5 Half adder logic . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
2.6 Full adder logic block . . . . . . . . . . . . . . . . . . . . . . . . 36
2.7 Full adder logic circuit . . . . . . . . . . . . . . . . . . . . . . . 37
2.8 Four-bit adder block diagram . . . . . . . . . . . . . . . . . . . . 38
2.9 SPIM at launch . . . . . . . . . . . . . . . . . . . . . . . . . . . 41
2.10 SPIM user text segment at launch . . . . . . . . . . . . . . . . . . 41
2.11 SPIM upset about no main entry point . . . . . . . . . . . . . . . 43
2.12 SPIM user text segment: minimal program . . . . . . . . . . . . . 43
2.13 SPIM user text segment: for loop . . . . . . . . . . . . . . . . . . 44

3.1 MIPS common instruction formats . . . . . . . . . . . . . . . . . 50

3.2 MIPS load upper immediate instruction . . . . . . . . . . . . . . 52
3.3 SPIM data segment . . . . . . . . . . . . . . . . . . . . . . . . . 55
3.4 SPIM data segment: intialized . . . . . . . . . . . . . . . . . . . 56
3.5 SPIM text segment: loads from memory . . . . . . . . . . . . . . 56
3.6 Registers vs. RAM . . . . . . . . . . . . . . . . . . . . . . . . . 57
3.7 SPIM text segment: more efficient loads from memory . . . . . . 59
3.8 SPIM data before and after saving SP . . . . . . . . . . . . . . . 60
3.9 Sign-extending . . . . . . . . . . . . . . . . . . . . . . . . . . . 61
3.10 Effect of short loads . . . . . . . . . . . . . . . . . . . . . . . . . 62
3.11 SPIM data layout with a short data item . . . . . . . . . . . . . . 63

viii
LIST OF FIGURES ix

3.12 SPIM expansion of mulo pseudoinstruction . . . . . . . . . . . . 64

3.13 Force high halfword to contain only low halfword sign bit . . . . . 67
3.14 Loop templates . . . . . . . . . . . . . . . . . . . . . . . . . . . 69
3.15 if templates . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 71

4.1 Abstract stack example . . . . . . . . . . . . . . . . . . . . . . . 80

4.2 Conceptual memory layout . . . . . . . . . . . . . . . . . . . . . 81
4.3 Function call tree and register saving . . . . . . . . . . . . . . . . 83
4.4 Saving the return address . . . . . . . . . . . . . . . . . . . . . . 87
4.5 More general loop and if templates . . . . . . . . . . . . . . . . . 96
4.6 Data segment used so far . . . . . . . . . . . . . . . . . . . . . . 98
4.7 More detail of stack storage scheme . . . . . . . . . . . . . . . . 105
4.8 Minimal function call templates . . . . . . . . . . . . . . . . . . 106
4.9 Stack frame: minimal example with two words for variables . . . 108
4.10 More general function templates . . . . . . . . . . . . . . . . . . 112
4.11 Data segment used so far (stack) . . . . . . . . . . . . . . . . . . 113
4.12 Call tree for running a Fibonacci example . . . . . . . . . . . . . 115
4.13 Stack frame at two stages of the Fibonacci program . . . . . . . . 120

5.1 Extracting a character by shifting and masking . . . . . . . . . . . 125

5.2 Indexing elements of 4 bytes . . . . . . . . . . . . . . . . . . . . 135
5.3 Conceptual view of a switch . . . . . . . . . . . . . . . . . . . . 139
5.4 More templates: switch, break and continue . . . . . . . . . . . 140
5.5 Switch as seen in SPIM . . . . . . . . . . . . . . . . . . . . . . . 142
5.6 Linked list . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 143
5.7 Minimal malloc implementation . . . . . . . . . . . . . . . . . . 144
5.8 Before and after SBRK . . . . . . . . . . . . . . . . . . . . . . . . 147
5.9 Initialized heap: nothing allocated . . . . . . . . . . . . . . . . . 148
5.10 Simple list example . . . . . . . . . . . . . . . . . . . . . . . . . 155
5.11 Implementation of an object . . . . . . . . . . . . . . . . . . . . 163
5.12 Data segment used so far (stack) . . . . . . . . . . . . . . . . . . 168

6.1 The benefits of a better algorithm . . . . . . . . . . . . . . . . . . 172

6.2 The pipeline concept . . . . . . . . . . . . . . . . . . . . . . . . 174
6.3 Timing of determining branch outcome . . . . . . . . . . . . . . 177
6.4 Amdahl’s Law . . . . . . . . . . . . . . . . . . . . . . . . . . . . 179
6.5 Locality variations . . . . . . . . . . . . . . . . . . . . . . . . . 182
x LIST OF FIGURES

7.1 C preprocessor and compiler . . . . . . . . . . . . . . . . . . . . 195

7.2 Stack and local variable . . . . . . . . . . . . . . . . . . . . . . . 198
7.3 Syntax of major C features . . . . . . . . . . . . . . . . . . . . . 199
7.4 level syntax of C statements . . . . . . . . . . . . . . . . . . . . 201
7.5 Common forms of C expressions . . . . . . . . . . . . . . . . . . 202
7.6 C loops . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 208
7.7 Definition in a header file . . . . . . . . . . . . . . . . . . . . . . 210

8.1 One flavour of Linux graphical file browser . . . . . . . . . . . . 216

8.2 After launching nano . . . . . . . . . . . . . . . . . . . . . . . . 221

9.1 How scanf updates a variable in memory . . . . . . . . . . . . . 234

10.1 Binary tree example . . . . . . . . . . . . . . . . . . . . . . . . . 253

10.2 Quicksort recursion . . . . . . . . . . . . . . . . . . . . . . . . . 258
10.3 Mergesort recursion and merges . . . . . . . . . . . . . . . . . . 260
10.4 How argc and argv are passed in and represented in memory . . 268
10.5 Source files for make example . . . . . . . . . . . . . . . . . . . 273
10.6 Source files for make example: incorrect main program . . . . . . 273
10.7 Dependences of object files and executable for make example . . . 274
10.8 Bitsort first pass . . . . . . . . . . . . . . . . . . . . . . . . . . . 277

E.1 MIPS R2000 CPU and FPU . . . . . . . . . . . . . . . . . . . . 305

E.2 The Status register. . . . . . . . . . . . . . . . . . . . . . . . . 307
E.3 The Cause register. . . . . . . . . . . . . . . . . . . . . . . . . . 307
E.4 Layout of memory. . . . . . . . . . . . . . . . . . . . . . . . . . 318
E.5 Layout of a stack frame. The frame pointer points just below the
last argument passed on the stack. The stack pointer points to the
last word in the frame. . . . . . . . . . . . . . . . . . . . . . . . 319
E.6 The terminal is controlled by four device registers, each of which
appears as a special memory location at the given address. Only a
few bits of the registers are actually used: the others always read
as zeroes and are ignored on writes. . . . . . . . . . . . . . . . . 321
List of Tables

1.1 ASCII encoding example . . . . . . . . . . . . . . . . . . . . . . 5

1.2 Binary and Decimal Units . . . . . . . . . . . . . . . . . . . . . 18

2.1 Nand truth table . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

2.2 And and Or truth table . . . . . . . . . . . . . . . . . . . . . . . 22
2.3 De Morgan’s Law truth table . . . . . . . . . . . . . . . . . . . . 24
2.4 And, Or, Xor truth table . . . . . . . . . . . . . . . . . . . . . . . 24
2.5 2’s complement examples . . . . . . . . . . . . . . . . . . . . . . 29
2.6 Half adder truth table . . . . . . . . . . . . . . . . . . . . . . . . 35
2.7 Full adder truth table . . . . . . . . . . . . . . . . . . . . . . . . 37
2.8 Register conventions . . . . . . . . . . . . . . . . . . . . . . . . 45

5.1 Sizes of standard C basic types . . . . . . . . . . . . . . . . . . . 124

7.1 C operators . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 203

9.1 Common formats for printf. . . . . . . . . . . . . . . . . . . . 236

A.1 ASCII encoding . . . . . . . . . . . . . . . . . . . . . . . . . . . 287

A.2 ASCII non-printing character encoding . . . . . . . . . . . . . . . 290

B.1 Register conventions including floating point . . . . . . . . . . . 291

C.1 SPIM system calls . . . . . . . . . . . . . . . . . . . . . . . . . . 293

E.1 System services. . . . . . . . . . . . . . . . . . . . . . . . . . . . 304

E.2 MIPS registers and the convention governing their use. . . . . . . 306

xi
Definitions

A
absolute address – Address that can be used directly. See also address, relative address.
absolute path – A path from the root of the file system, in UNIX designated by starting with “/”.
See also system path, relative path, path.
abstraction – The principle of hiding all but the most essential details.
activation record – See stack frame.
actual parameter – See parameter.
address – Number signifying position relative to the start of main memory (RAM); usually
numbered in bytes. See also absolute address, relative address, pointer.
ALU – See arithmetic-logic unit.
Amdahl’s Law – A version of the speedup formula that emphasises the sequential fraction.
architecture – A consistent design that allows a range of implementations, each running the same
code subject only to available resources (memory, speed, connected devices). The Intel
IA32 architecture for example runs the same 32-bit instruction set across many designs
going back to the 80386, also called Intel386, i386, or 386, going back to 1985.
argument – See parameter: term used in C-family languages for the value passed in.
arithmetic-logic unit (ALU) – component of CPU that decodes and executes instructions.
array – Data structure: elements accessed by (usually) integer index; in C, all elements are the
same type and an array is represented by the address of (pointer to) the first element.
ASCII – American Standard Code for Information Interchange – a 7-bit, extended to 8 bits, code
for representing characters. See also Appendix A.
assembler – A program that translates assembly language to machine code. See also assembly
language.
assembler directive – An instruction to an assembler that does not generate code. See also
assembler.
assembly language – A symbolic representation of machine code that mostly translates directly to
machine code instructions. See also assembler, pseudoinstruction, assembler directive.
B
bias – A way of representing positives and negatives where a bias has to be subtracted from the
number to represent its true value. In IEEE floating point, the exponent is represented this
way (bias = 127). Also called offset or excess.
big endian – Ordering of smaller items like bytes within a word that starts at the high-order (big)
end of the word, so bytes within a word appear in memory in order 0,1,2,3. See also little
endian, endianness.

xii
 xiii

bit – Binary digit (0 or 1 in a number represented in base 2).

boolean algebra – Rules for arithmetic with true (1) and false (0) values.
branch delay slot – The instruction immediately after a branch that is executed whether the branch
is taken or not. See also delayed branch.
branch instruction – Changes flow of control conditionally; encodes a condition and also has a
target address. A branch is taken if the condition is true. The address is usually relative.
See also jump instruction, delayed branch.
bytecode – A machine instruction set designed to be portable, usually interpreted or translated to
actual machine code.
C
cache – A fast memory that is used to fake the effect of the entire memory being faster than a
reasonably affordable memory technology. Decisions as to what is in a faster layer are
made in hardware. The fastest cache is integrated into the CPU in recent designs, and is
the highest-level or level 1 (also: L1 cache). There can be 1 or more lower levels of cache,
usually in current designs integrated into the CPU chip, numbered L2, . . .
CISC – See complex instruction set computer.
compiled – Translated with significant changes in amount and style of code from a high-level
language to a lower-level language (usually machine code.
complement – In logic, inversion of all bits. See also two’s complement.
complex instruction set computer (CISC) – Any design that does not fit the RISC definition.
For example, with variable instruction lengths, instructions that only work with specific
registers and instructions that do arithmetic or logic on memory contents.
complexity – Growth rate of time or extra space needed by an algorithm expressed as the largest
term of a function of size of data N. See also space complexity, time complexity, complexity
class.
complexity class – Classification of a function in terms of its growth rate based on the largest term.
See also complexity.
constant pool – Region of memory containing constant values such as strings. See also heap,
stack, globals.
conditional – A C operator that given a boolean value selects between two alternatives. Written
bool ? alt1 : alt2 .
contradiction – In logic, any formula that is false for all values of variables (or in a logic circuit,
all inputs). See also tautology.
coprocessor – An auxiliary processor outside the main logic path. See also floating-point unit,
graphics processing unit.
core – In designs with multiple CPUs on a chip (multicore), each CPU is called a core. Cores
often share the lowest-level on-chip cache.
CPU – See processor.
D
declaration – In C, the place where the type of a program construct (function, type or variable) is
known but does not require runtime resources. See also definition.
definition – In C, the place where a program construct (function or variable) requires runtime
resources. See also declaration.
xiv DEFINITIONS

delayed branch – A branch instruction that executes the following instruction whether the branch
is taken or not. See also branch delay slot.
De Morgan’s Laws – In logic, rules to redistribute negation over and and or.
digit signal processor (DSP) – A specialized CPU that is designed for efficient digit-analog
conversion as in audio or video.
dispatch table – Table of addresses that can be used in a jump or similar instruction to direct to
code based on an index. See also jump table.
DRAM – See dynamic random access memory.
DSP – See digit signal processor.
dynamic instruction count – Count of instructions executed in a particular run of a program. See
also static instruction count.
dynamic linking – Linking that is delayed until a program runs. See also linker, library, static
linking, executable file, object file.
dynamic random access memory (DRAM) – RAM usually implemented with a capacitor storing a
bit that needs to be refreshed periodically to maintain its value: relatively inexpensive, but
not as fast as SRAM.
E
embedded system – A computer that is part of another machine or device.
endianness – Intel architectures are little-endian; MIPS can be either. See also little endian, big
endian.
excess – See bias.
executable file – A file that can be run directly. See also linker, object file.
F
floating point – Computer representation of numbers that can include fractions. Most CPUs
that support floating point have a separate set of registers for floating point values. The
IEEE 754 standard defines a range of different sizes of floating-point numbers and includes
concepts like representing ±∞ and not a number (or NaN).
floating-point unit (FPU) – Component of a CPU that handles floating-point instructions, usually
with its own register set. See also coprocessor.
formal parameter – See parameter.
FPU – See floating-point unit.
frame pointer – Register to keep track of the start of the current stack frame. MIPS machine code
convention: register 30 ($fp or $30). Some compilers do not use a frame pointer (if you
know the size of the stack frame, you can work out everything you need from the stack
pointer).
function (procedure, subroutine) – Unit of code that can be invoked with a return address to return
to the point immediately after invocation; optionally can include parameters passed in, local
variables and a return value. In object-oriented languages, a method is the same thing with
added features: the ability to reference a specific object, and the possibility of finding a
different version of the method by inheritance.
G
garbage collector – Recovers memory no longer accessible by a program, usually when memory
starts to fill up. See also heap, managed-memory language – not a feature of C.
gate – Elementary logic function implemented in hardware. See universal gate.
 xv

general-purpose computing on graphics processing units (GPGPU) – Using a GPU to speed up

non-graphics computation.
GPGPU – See general-purpose computing on graphics processing units.
GPU – See graphics processing unit.
graphics processing unit (GPU) – Component of a CPU that handles graphics instructions,
sometimes on a separate chip. See also coprocessor.
H
hard real time – A real-time requirement that if not met means system failure. See also real time,
soft real time.
heap – Region of memory containing dynamically allocated and deallocated data (also the name
of a data structure). See also globals, stack, constant pool.
hexadecimal (hex) – Base 16 – convenient for representing binary numbers since grouping bits in
4s starting from the low end of the number converts directly to hex.
high-level language (HLL) – A language designed for human convenience of programming, not
close to the machine. See also assembly language.
HLL architecture – Machine instruction set designed to be closer to a high-level language than
traditional machine code.
I
IEEE 754 – See floating point.
ILP – See instruction-level parallelism.
immediate operand – An operand value encoded into the instruction. See also operand.
infix notation – Function names are written between operands, as in arithmetic expressions. See
also postfix notation.
inheritance – Ability in object-oriented languages to derive a new class from a parent class with
the option to reuse or override methods of the parent class – not a feature of C (can be built
up laboriously in machine code).
instruction count – See static instruction count, dynamic instruction count.
instruction issue – Transition of an instruction to the execute stage (or first execute stage, with a
deeper pipeline).
instruction-level parallelism (ILP) – Increasing CPU throughput by overlapping execution of
instructions.
instruction set architecture (ISA) – Instruction set as seen by the programmer or compiler.
interpreted – Executed line-by-line, as opposed to compiled.
interrupt – Event that breaks the sequence of execution, often resulting in use of a jump table to
find an interrupt handler. See also interrupt handler, interrupt vector, jump table.
interrupt handler – Code invoked to handle an interrupt. Generally must be short to minimise
backing up other interrupts.
interrupt vector – Sequential (possibly with gaps) locations to which control transfers on an
interrupt, with one location for each type of interrupt.
ISA – See instruction set architecture.
issue – See instruction issue.
J
JIT – see just in time compiler.
xvi DEFINITIONS

jump instruction – Changes flow of control unconditionally; a jump and link instruction stores the
return address. The address may be immediate or from a register but is usually absolute.
See also branch instruction.
jump table – Table of jump instructions that can be used to transfer control code based on an index.
See also interrupt, dispatch table.
just in time (JIT) compiler – A compiler that translates to machine code immediately before the
particular code is needed; sometimes used as an alternative to interpreting bytecode.
L
L1, L2, etc. – First, second, etc., levels e.g. of a cache hierarchy in which L1 is the fastest and
closest to the CPU.
label – A name used in assembly language to mark a location in memory (an instruction or a
location where a constant has been placed; in SPIM’s assembly language, a label has a “:”
after its name where it is defined.
library – Precompiled code available to link into programs. See also linker, dynamic linking, static
linking.
linker – A program that combines separately compiled files. See also object file, library.
little endian – Ordering of smaller items like bytes within a word that starts at the low-order (little)
end of the word, so bytes within a word appear in memory in order 3,2,1,0. See also big
endian, endianness.
load – An instruction that copies memory contents to a register (in MIPS, there are different load
instructions for different sizes and types of operand, e.g., lw loads a word into an integer
register). See also store.
locality – The principle that a program uses a small subset of memory at a time. See also spatial
locality, temporal locality.
M
machine code – Instructions that are directly interpreted by hardware with no further translation.
See also assembly language.
macro – Named text that can be substituted into other text by use of its name. Macros can also
have parameters; distinguished from functions in that they have no clear existence at run
time.
make – A UNIX utility that uses a Makefile (capital “M” optional) containing dependence rules
and actions to resolve failed dependences.
managed-memory language – A language in which inaccessible dynamically allocated data space
is automatically. See also garbage collector.
memory leak – A program not written in a managed-memory language starts to run out of memory
because the program does not correctly deallocate dynamic data when it is no longer
accessible.
method – not a feature of C or machine code (directly – you can make up a similar concept with
some effort) – see function.
MIPS – A RISC processor architecture common in embedded devices.
multicore – See core.
N
null pointer – A pointer value that represents no memory location, usually a zero. See also pointer.
O
 xvii

object file – A compiled portion of a program that must be combined with other files to make an
executable file. See also linker.
one’s complement (1’s complement) – A way of representing integer negatives, by inverting all bits.
Not widely used since unlike two’s complement, it has a wasted value with zero represented
two ways, as all 0s or all 1s.
offset – See bias.
opcode – Part of an instruction that signifies what operation it performs (in MIPS, modified by
function bits).
operand – In a MIPS instruction or C expression, value to be used or in MIPS a destination for
computed value. See also immediate operand, register, infix notation.
operator – A built-in function with a special symbol, usually in infix notation, such as + or *.
P
parameter – value passed in to a function. In the function definition, called a formal parameter
and in the call, an actual parameter. In C, a formal parameter is called a parameter, and an
actual parameter an argument.
path – Sequence of directory names, in UNIX separated by “/”. See also system path, relative
path, absolute path.
pipeline – Organization of instruction execution overlapping sequential instructions. See also stall.
pointer – A value that contains a memory address. See also null pointer, reference.
pop – Remove an item from the top of a stack, adjusting the stack pointer back an item. See also
stack, push.
portable – Designed to run on more than one machine, possibly very different machines.
postfix notation – Function names are written after an operand, as in arithmetic expressions. See
also infix notation.
procedure – See function: a name used in older languages including Pascal.
processor – Logic unit that interprets instructions and includes the fastest layers of memory,
registers and caches. Also called central processing unit (CPU). See also core, arithmetic-
logic unit.
program counter (PC) – Register to keep track of the current instruction being executed. On
MIPS, it always is a multiple of 4 since instructions are word-aligned. Advances by 4 each
instruction, unless a flow control instruction changes it (jump or branch).
pseudoinstruction – An instruction in assembly language that is not a real machine instruction but
translates to one or more real machine instructions. See also assembler.
push – Add an item onto the top of a stack, advancing the stack pointer. See also stack, pop.
R
RAM – See random access memory.
random access memory (RAM) – Any memory that has an addressing scheme that equally allows
any item to be accesses without e.g., a delay to make that region accessible.
real time – A requirement that a task be done by a time deadline. See also hard real time, soft real
time.
recursion – See recursion.
reduced instruction set computer (RISC) – An architecture in which all memory accesses are via
loads (copy to a register) or stores (copy a register to memory), all arithmetic and logic
is through registers, and instructions have relatively simple formats without variations in
xviii DEFINITIONS

instruction length. Also has a large set of general-purpose registers (MIPS has 32 integer
registers, though register zero –$zero or $0 – is hardwired to zeroes and register 31 – $ra
or $31 – is hardwired as the return address register). See also CISC.
reference – Slightly disguised pointer in languages with a higher-level approach than C.
register – Extra-fast memory designed into the CPU logic; usually a very limited number. Register
addresses are usually hard-coded into instructions for speed. See also spill registers, frame
pointer, stack pointer, program counter, reduced instruction set computer.
relative address – Address that must be added to a given location (usually the PC). See also
address, absolute address.
relative path – Path in UNIX starting with anything but “/”, relative to the current working
directory. See also system path, path, absolute path, working directory.
return address – Usually the address of the next instruction after a call instruction (e.g., jump and
link, jal). The MIPS architecture stores the return address in register 31 ($ra or $31, but
you can overrule this with the jalr instruction, which encodes a return address register).
RISC – See reduced instruction set computer.
S
shell – In UNIX-like systems, the environment where you run programs including a scripting
language.
short-circuit evaluation – Evaluation usually of logical or boolean expressions that stops as soon
as the answer is known.
sign bit – A bit used to signify negative (usually 1) or positive (usually 0). See also two’s
complement and signed magnitude.
signed magnitude – A way of representing integer negatives, by using the same bit representation
for a negative and positive, except the sign bit is 1 for a negative. Used in IEEE floating
point. See also two’s complement.
spatial locality – The principle that a program tends to use memory close to each other. See also
locality, temporal locality.
soft real time – A real-time requirement that if not met can be handled by a fallback option like a
drop in quality. See also real time, hard real time.
space complexity – Complexity expressed in terms of extra space needed by an algorithm over and
above the initial data. See also time complexity, complexity class.
t ore
speedup – After a change, tbea ffter . See also Amdahl’s Law.
spill registers – Save registers to RAM, usually on a function call.
SRAM – See static random access memory.
stack – At hardware level, a region of memory used to represent the state of function calls including
local variables, values that have to be saved across calls, parameters and the return address.
See also push, pop, heap, globals, constant pool, spill registers.
stack frame (activation record) – Contents of the stack representing the state of one particular
function call.
stack pointer – Register to keep track of the top of the stack. In MIPS machine code, by convention,
this is register 29 ($sp or $29). See also frame pointer.
static definition – In C: function or variable with a name only visible in one compiled source file.
static instruction count – Count of the number of instructions in a program. See also dynamic
instruction count.
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