‫جامعة الكوفة‬

‫كلية الهندسة‬
‫قسم الهندسة الكهربائية‬

Power Electronics
Lecture Notes

Hur Jedi
Electrical Engineering Department
University of Kufa, Iraq

First Semester
2024/2025
Lecture no. 9 Power Electronics 2024-2025

DC-DC Buck Power Converter

A DC-to-DC buck converter is an electronic circuit that converts a source of direct current (DC) from
one voltage level to another as shown in Fig. 1.

VI + VO
+
VI
DC/DC VO
- Load
-
ωt Converter ωt

Fig. 1. Block diagram of DC-DC buck converter.

Introduction
DC-DC buck power converter is popular in many applications particularly in electronic devices and
electric cars. Buck converter performs power conversion by step-down the input signal voltage. The
principle operation of converter is discussed. In addition, the effect of duty cycle of the switch on the output
voltage is considered. Next, designing parameter values are determined, such as minimum value of
inductance, minimum value of capacitance and the range of duty cycle that makes the circuit works as step
down.

Applications:
- Switched-Mode Power Supply (SMPS).
- Electric Vehicles (EV.)
- Smart lighting.

pg. 2
Lecture no. 9 Power Electronics 2024-2025

Analysis of DC-DC Buck Power Converter

It is used to reduce the input voltage level at the output side of the inverter. The schematic of
converter is shown in Fig. 2.
+ vL -
IO
vGS L
S
C +
+ RL VO
VII D
- -

Fig. 2. Schematic of DC-DC buck converter.

The analysis of buck converter is based on the switching states of S [MOSFET, IGBT,…..] and the diode D.
The pulse width modulator is presented to support the MOSFET with gate to source voltage vGS. The
idealized waveforms of the converter are shown in Fig. 3.

vGS

DT ωt
T
iD
IO

VL
0 +
-
iL
I(max)

I (min) ∆iL IO

iS IO

Fig.3. Idealized waveform of buck converter.

pg. 3
Lecture no. 9 Power Electronics 2024-2025

A- Mode 1, switch S closed, diode D open

In this mode, the switch S is closed and the diode D is reverse biased (open). The equivalent mode
of the converter is shown in Fig. 4.
+ vL -
IO
S L iC
iL
D +
+ RL VO
VII -
- C

Fig. 4. Equivalent circuit when switch is closed and diode is open.

The inductor voltage is the difference of input voltage and the output voltage

𝑑𝑖𝐿
𝑉𝐿 = 𝑉𝐼 − 𝑉𝑂 = 𝐿
𝑑𝑡

𝑑𝑖𝐿 𝑉𝐼 − 𝑉𝑂
=
𝑑𝑡 𝐿

𝐷𝑇
𝑉𝐼 − 𝑉𝑂 𝑉𝐼 − 𝑉𝑂
∆𝑖𝐿 = ∫ 𝑑𝑡 = ( ) 𝐷𝑇 … … … … … … (1)
0 𝐿 𝐿

B- Mode 2, switch S open, diode D closed

When the switch S is open, the diode D becomes forward-biased to carry the inductor current. The
voltage across the inductor equals the output voltage across the resistor R.

𝑑𝑖𝐿
𝑉𝐿 = −𝑉𝑂 = 𝐿
𝑑𝑡

𝑑𝑖𝐿 𝑉𝑂
=−
𝑑𝑡 𝐿

𝑇 (1−𝐷)𝑇
−𝑉𝑂 −𝑉𝑂 𝑉𝑂
∆𝑖𝐿 = ∫ 𝑑𝑡 = ∫ 𝑑𝑡 = − (1 − 𝐷)𝑇 … … … … … … (2)
𝐷𝑇 𝐿 0 𝐿 𝐿

pg. 4
Lecture no. 9 Power Electronics 2024-2025

Steady-state operation requires that the inductor current at the end of switching cycle is the same as the
beginning. It means net charging in one period is equal to:

(∆𝑖𝐿 )closed + (∆𝑖𝐿 )open = 0

By using (1) and (2),

𝑉𝐼 − 𝑉𝑂 𝑉𝑂
( ) 𝐷𝑇 − (1 − 𝐷)𝑇 = 0
𝐿 𝐿

The output voltage can be expressed as

𝑉𝑂 = 𝐷𝑉𝐼

The average current in the inductor and the output resistance is same. Therefore,

𝑉𝑂
𝐼𝐿 = 𝐼𝑂 =
𝑅𝐿
The maximum and minimum of the inductor current are

∆𝑖𝐿 1 1−𝐷
𝐼(max) = 𝐼𝐿 + = 𝑉𝑂 ( + ) , … … … (3)
2 𝑅𝐿 2𝐿𝑓

and

∆𝑖𝐿 1 1−𝐷
𝐼(min) = 𝐼𝐿 − = 𝑉𝑂 ( − ) … … … (4)
2 𝑅𝐿 2𝐿𝑓

Since I(min) = 0 in the boundary between the continuous and discontinuous currents, the minimum

inductance can be determined as

1 1−𝐷
𝐼(min) = 0 = 𝑉𝑂 ( − )
𝑅𝐿 2𝐿𝑓

The minimum inductance that requires to keep in Continuous Current Mode (CCM) is

(1 − 𝐷)𝑅𝐿
𝐿(min) =
2𝑓

pg. 5
Lecture no. 9 Power Electronics 2024-2025

Since the buck converter works under PWM, the efficiency of the converter is high, i.e. 95%, 97%.
𝑃𝑂 𝑉𝑂 𝐼𝑂
𝜁= = .
𝑃𝐼 𝑉𝐼 𝐼𝐼
To design the capacitor C, it assumed that the capacitance is high to keep the output voltage is constant.
The capacitor current and voltage waveforms are shown in Fig. 5.

iC
∆Q ∆iL/2
0 +
- - ωt
DT T
VC T/2
Vr VO

0
ωt

Fig. 5. Charging and discharging of capacitor C.

𝑄 = 𝐶𝑉𝑂

Δ𝑄 = 𝐶Δ𝑉𝑂
where,

Δ𝑉𝑂 = 𝑉𝑟

Vr: peak-to-peak ripple voltage across the capacitor C.

Δ𝑄
𝑉𝑟 = … … … . . (5)
𝐶
The change in charge ∆Q is the area of triangle above the time axis.

𝐷𝑇 Δ𝑖𝐿 𝐷𝑇Δ𝑖𝐿
Δ𝑄 = ( )= … … … (6)
2 2 4

pg. 6
Lecture no. 9 Power Electronics 2024-2025

Sub (5) in (6)

𝐷𝑇Δ𝑖𝐿
𝑉𝑟 = … … . . (7)
4𝐶
where,

𝑉𝑂
Δ𝑖𝐿 = (1 − 𝐷)𝑇 … … (8)
𝐿
sub (8) in (7)
𝐷𝑇 𝑉𝑂 𝑉𝑂 (1 − 𝐷)𝐷
𝑉𝑟 = (1 − 𝐷)𝑇 =
4𝐶 𝐿 4𝐿𝐶𝑓 2
The capacitance of the DC-DC converter can be given as

(1 − 𝐷)𝐷
𝐶=
𝑉
4𝐿𝑓 2 (𝑉𝑟 )
𝑂

Normally,

𝑉𝑟
≤ 1%
𝑉𝑂

Example:

Design a buck converter to meet the following specifications: VI = 28 V, VO = 12 V, IO = 5 A, f = 100 KHz, and

Vr/VO ≤ 1%.

Solution

The value of output resistance is

𝑉𝑂 12
𝑅𝐿 = = = 2.4 Ω
𝐼𝑂(ave) 5

The duty cycle is

𝑉𝑂 12
𝐷= = = 0.428
𝑉𝐼 28
pg. 7
Lecture no. 9 Power Electronics 2024-2025

The minimum inductance of the converter can be calculated as

(1 − 𝐷)𝑅𝐿 (1 − 0.428) ∗ 2.4

𝐿(min) = = = 6.864 μH.
2𝑓 2 ∗ 100 ∗ 103
Pick the inductance value L = 10 µH.

The capacitor of the converter can be obtained as

(1 − 𝐷)𝐷 (1 − 0.428) ∗ 0.428

𝐶= = = 61.2 μF
𝑉 −6 (100 ∗ 103 )2 ∗ 0.01
4𝐿𝑓 2 (𝑉𝑟 ) 4 ∗ 10 ∗ 10 ∗
𝑂

where,

𝑉𝑟
= 0.01
𝑉𝑂
pick the capacitance value C = 70 µF.

The schematic of boost converter is shown as below

+ vL -
IO
vGS L
S
C +
+ RL VO
VII D
- -

The gate-source voltage is utilized to supply the MOSFET S, which is used as a switch in the converter. The
value of vGS depends on the type of transistor. It can be found from datasheet.

vGS
0.428 0.572
T ωt
DT
1

pg. 8