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PG411 A01

GP104 - 8GB GDDR5, 256b, 256Mx32

1
Tall DVI-D + DP + DP + DP/HDMI + DP 1

TABLE OF CONTENTS
Page Description Page Description

1 Table of Contents 26 PS: FBVDD

2 Block Diagram 27 PS: NVVDD_OVR8
3 PCI Express 28 PS: Blank Page
4 MEMORY: GPU Partition A/B 29 PS: NVVDD Phase 1-4
5 MEMORY: FBA[31:0] 30 PS: NVVDD Phase 5 & 6
2 2

6 MEMORY: FBA[63:32] 31 PS: Blank Page

7 MEMORY: FBB[31:0] 32 PS: Dynamic Power Balance Phases
8 MEMORY: FBB[63:32] 33 PS: Dynamic Power Balance Logic
9 MEMORY: GPU Partition C/D 34 PS: NV3V3, NV12V
10 MEMORY: FBC[31:0] 35 PS: Inputs, Filtering, and Monitoring
11 MEMORY: FBC[63:32] 36 PS: Shutdown and Sequencing
12 MEMORY: FBD[31:0] 37 PS: 12V Current Steering PSI Control and LED
13 MEMORY: FBD[63:32] 38 MECH: Bracket/Thermal
14 GPU PWR and GND
15 GPU Decoupling
3 3

16 IFPAB DVI-D-DL
17 IFPE DP
18 IFPEF DP
19 IFPC HDMI 2.0/DP
20 IFPD DP
21 MIOA/B Interface and Frame Lock
22 MISC1; Fan, Thermal, JTAG, GPIO, Stereo
23 MISC2: ROM, XTAL, Straps
24 PS: 1V8, 1V8_AON
25 PS: 5V, PEX_VDD
4 4

5 5

NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY

ASSEMBLY <ASSEMBLY_DESCRIPTION> SANTA CLARA, CA 95050, USA

PAGE DETAIL Table of Contents

ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
NV_PN 600-1G411-BASE-100
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL PCB REV 1G411-A01 PAGE 1 OF 38
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS. BOM REV A DATE 29-MAR-2016

A B C D E F G H
 A B C D E F G H

Page2: Block Diagram

1 1

Power Supply PEX_12V Finger

NVVDD-PH1 DYNAMIC OPTION

Power Supply
NVVDD-PH2 EXT_12V 2x4
(NORTH)
Power Supply
NVVDD-PH3
2-WAY SLI
DP

2 2

QD:EXT_12V 2x4
Power Supply
(EAST)
NVVDD-PH4

MEM C MEM C MEM B

MEM D Power Supply
LO HI LO
NVVDD-PH5
HI
QD:DP
HDMI/

MEM B Power Supply

MEM D FB X32 NVVDD-PH6
HI
LO
3 3

GP104 MEM A
DP

LO
Power Supply PEX_12V Finger
5V Switcher
MEM A
PEX_12V 2x4 PWR
Power Supply
DVI-D

HI
FBVDD
DP

4
QD:STEREO PEX_VDD PEX_3V3 Finger
4

POWERED BY 3V3 or 5V

QUADRO OPTIONS SHOWN IN YELLOW

and prefix "QD:"
Fan

5 5

NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY

ASSEMBLY <ASSEMBLY_DESCRIPTION> SANTA CLARA, CA 95050, USA

PAGE DETAIL Block Diagram

ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
NV_PN 600-1G411-BASE-100
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL PCB REV 1G411-A01 PAGE 2 OF 38
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS. BOM REV A DATE 29-MAR-2016

A B C D E F G H
 A B C D E F G H

Page8: MEMORY: FBB Partition 63..32

4,7 FBB_DBI[7..0]
BI
FBB_DBI0
0
FBB_DBI1
1
FBB_DBI2
1 2
FBB_DBI3
1
3
FBB_DBI4
4
FBB_DBI5
5
FBB_DBI6
6
FBB_DBI7
7

4,7 FBB_EDC[7..0]
BI
FBB_EDC0
0
FBB_EDC1
1
FBB_EDC2
2
FBB_EDC3
3
FBB_EDC4
4
FBB_EDC5
5
FBB_EDC6 4,7 FBB_CMD[31..0]
6
FBB_EDC7
IN M6C
7 M6B @memory.u_mem_sd_ddr5_x32(sym_6):page8_i89
@memory.u_mem_sd_ddr5_x32(sym_5):page8_i87 BGA170
COMMON
BGA170
COMMON FBVDD
Normal
FBB_CMD19 G3 J1
19 RAS MF_VSS/SOE*
FBB_CMD16 L3
16 CAS add 1k to VSS
FBB_CMD26 L12 B10 C10
26 WE VSS VDD
FBB_CMD31 G12 B5 C5
31 CS VSS VDD
D10 VSS VDD D11
FBB_CMD23 J4 G10 G1
23 ABI VSS VDD
2
G5 VSS VDD G11 2
FBB_CMD21 H4 H1 G14
21 A0_A10 VSS VDD
FBB_CMD20 H5 H14 G4
20 A1_A9 VSS VDD
FBB_CMD29 H11 K1 L1
29 A2_BA0 VSS VDD
FBB_CMD30 H10 K14 L11
30 A3_BA3 VSS VDD
FBB_CMD28 K11 L10 L14
28 A4_BA2 VSS VDD
FBB_CMD27 K10 L5 L4
27 A5_BA1 VSS VDD
4,7 FBB_D[63..0] FBB_CMD24 K5 A6_A11 P10 VSS VDD P11 FBVDD
BI 24
FBB_CMD25 K4 T10 R10
25 A7_A8 VSS VDD
FBB_CMD22 J5 T5 R5
22 RFU_A12 VSS VDD

A1 VSSQ VDDQ B1
M6D M6A
A12 VSSQ VDDQ B12
@memory.u_mem_sd_ddr5_x32(sym_1):page8_i11 @memory.u_mem_sd_ddr5_x32(sym_3):page8_i33
BGA170 BGA170 A14 VSSQ VDDQ B14
COMMON COMMON A3 VSSQ VDDQ B3
FBB_CMD18 J2 C1 D1
NORMAL NORMAL 18 RESET VSSQ VDDQ
FBB_CMD17 J3 C11 D12
17 CKE VSSQ VDDQ
FBB_D32 A4 FBB_D48 V11 C12 D14
32 DQ0 48 DQ16 VSSQ VDDQ
FBB_D33 A2 FBB_D49 V13 FBB_CLK1 J12 C14 D3
33 DQ1 49 DQ17 4
IN CLK VSSQ VDDQ
FBB_D34 B4 FBB_D50 T11 FBB_CLK1* J11 C3 E10
34 DQ2 50 DQ18 4
IN CLK VSSQ VDDQ
FBB_D35 B2 FBB_D51 T13 C4 E5
35 DQ3 51 DQ19 VSSQ VDDQ
FBB_D36 E4 FBB_D52 N11 E1 F1
36 DQ4 52 DQ20 R768 R765 VSSQ VDDQ
FBB_D37 E2 FBB_D53 N13 E12 F12
37 DQ5 53 DQ21 40.2ohm 40.2ohm VSSQ VDDQ
FBB_D38 F4 FBB_D54 M11 E14 F14
38 DQ6 54 DQ22 1% 1%
VSSQ VDDQ
FBB_D39 F2 FBB_D55 M13 E3 F3
39 DQ7 55 DQ23 0402 0402 VSSQ VDDQ
COMMON COMMON F10 VSSQ VDDQ G13
FBB_EDC4 C2 FBB_EDC6 R13 F5 G2
EDC0 EDC2 VSSQ VDDQ
FBB_DBI4 D2 FBB_DBI6 P13 FBB_CLK1_CM H13 H12
DBI0 DBI2 VSSQ VDDQ
A10 SNN_FBB_VREFD_3 V10 SNN_FBB_VREFD_4 SNN_FBB_RFU7 A5 H2 H3
VREFD VREFD NC_RFU_A5 VSSQ VDDQ
SNN_FBB_RFU8 V5 K13 K12
C710 NC_RFU_V5 VSSQ VDDQ
x32 x16 x32 x16 K2 VSSQ VDDQ K3
3 FBB_D40 FBB_D56 10nF 3
A11 DQ8 NC
V4 DQ24 NC
M10 VSSQ VDDQ L13
40 56 16V
FBB_D41 A13 FBB_D57 V2 M5 L2
41 DQ9 NC 57 DQ25 NC 10% VSSQ VDDQ
FBB_D42 B11 FBB_D58 T4 N1 M1
42 DQ10 NC 58 DQ26 NC X7R VSSQ VDDQ
FBB_D43 B13 FBB_D59 T2 0402 N12 M12
43 DQ11 NC 59 DQ27 NC VSSQ VDDQ
FBB_D44 E11 FBB_D60 N4 COMMON N14 M14
44 DQ12 NC 60 DQ28 NC VSSQ VDDQ
FBB_D45 E13 FBB_D61 N2 N3 M3
45 DQ13 NC 61 DQ29 NC VSSQ VDDQ
FBB_D46 F11 FBB_D62 M4 R1 N10
46 DQ14 NC 62 DQ30 NC VSSQ VDDQ
FBB_D47 F13 FBB_D63 M2 R11 N5
47 DQ15 NC 63 DQ31 NC GND VSSQ VDDQ
R12 VSSQ VDDQ P1
FBB_EDC5 C13 FBB_EDC7 R2 FBB_VREFC J14 R14 P12
EDC1 GND EDC3 NC 7
IN VREFC VSSQ VDDQ
FBB_DBI5 D13 FBB_DBI7 P2 R3 P14
DBI1 NC DBI3 NC VSSQ VDDQ
R761 121ohm FBB_ZQ_2B J13 ZQ R4 VSSQ VDDQ P3
FBB_WCK45 D4 FBB_WCK67 P4 C124 0402 COMMON V1 T1
4 WCK01 4 WCK23 1% VSSQ VDDQ
IN IN 820pF
4 FBB_WCK45* D5 WCK01 4 FBB_WCK67* P5 WCK23 J10 SEN V12 VSSQ VDDQ T12
IN IN 50V
V14 VSSQ VDDQ T14
10%
X7R V3 VSSQ VDDQ T3
0402
COMMON

GND GND

GND

4 FBVDD 4

C723 C137 C115 C141 C130 C702 C135 C715 C734 C119
1uF 1uF 1uF 1uF 1uF 1uF 1uF 1uF 1uF 1uF
6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V
10% 10% 10% 10% 10% 10% 10% 10% 10% 10%
X6S X6S X6S X6S X6S X6S X6S X6S X6S X6S
0402 0402 0402 0402 0402 0402 0402 0402 0402 0402
COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON
FBVDD

GND
C726 C728 C707 C718 C705 C716 C698 C687
1uF 1uF 1uF 1uF 1uF 1uF 1uF 1uF
6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V
10% 10% 10% 10% 10% 10% 10% 10%
FBVDD
X6S X6S X6S X6S X6S X6S X6S X6S
0402 0402 0402 0402 0402 0402 0402 0402
COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON

C155 C696 C148 C152 C689 C684 C681 C156 C675 C674 C732
10uF 10uF 10uF 10uF 10uF 10uF 22uF 22uF 22uF 22uF 22uF
4V 4V 4V 4V 4V 4V 4V 4V 4V 4V 4V
20% 20% 20% 20% 20% 20% 20% 20% 20% 20% 20%
GND
X6S X6S X6S X6S X6S X6S X6S X6S X6S X6S X6S
0603 0603 0603 0603 0603 0603 0603W 0603W 0603W 0603W 0603W
COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON

5 5
GND

NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY

ASSEMBLY <ASSEMBLY_DESCRIPTION> SANTA CLARA, CA 95050, USA

PAGE DETAIL MEMORY: FBB[63:32]

ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
NV_PN 600-1G411-BASE-100
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL PCB REV 1G411-A01 PAGE 8 OF 38
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS. BOM REV A DATE 29-MAR-2016

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