SREE DATTHA GROUP OF INSTITUTIONS
DEPARTMENT OF COMPUTER SCIENCE AND ENGINEERING & ALLIED BRANCHES
B. Tech II Year I Semester II-Mid-Term Examinations
Course Code: Branch: CS &DS Subject: Digital Electronics
PART-B -- SET- I
NAME: _____________________ Roll No. _________________
Branch & Section: _______________
Answer all questions. All questions carry equal marks. Marks: 20 X 0.5=10 Time: 20mins
I. Chose the correct alternative:
1. Which of the following gives the correct number of multiplexers required to build a 32 x 1
multiplexer?
a) Two 16 x 1 mux b) Three 8 x 1 mux c) Two 8 x 1 mux d) Three 16 x 1 mux
2. What is/are the crucial function/s of memory elements used in the sequential circuits?
a) Storage of binary information b) Specify the state of sequential c) both a & b d) None
3. Why do we require hamming codes?
a) Error Correction b) Encryption Only c) Decryption d) Bit Stuffing
4. The behavior of synchronous sequential circuit can be predicted by defining the signals
a) Discrete instants of time b) continuous instants of time
c) Sampling instants of time d) at any instant of time
5. Ring shift and Johnson counters are ____________
a) Synchronous Counters b) Asynchronous Counters
c) True Binary Counters d) Synchronous and True Binary Counters
6. Why the D-flip-flops do receives its designation or nomenclature as 'Data Flip-flops?
a) Its capability to receive data from flip-flop b) its capability to store data in flip-flop
c) Its capability to transfer the data into flip-flop d) none of this
7. In a multiplexer, the selection of a particular input line is controlled by ___________
a) Data Controller b) Selection Lines c) Logic Gates d) Both a & b
8. What will be the output from a D flip – flop if the clock is low and D = 0?
a) 0 b) 1 c) No change d) Toggle between 0 and 11
9. What is the bit storage binary information capacity of any flip-flop?
SREE DATTHA GROUP OF INSTITUTIONS
a) 1 bit b) 2 bits c) 16 bits d) infinite bits
10. A 4-bit shift register that receives 4 bits of parallel data will shift to the ________ by
________ position for each clock pulse.
a) Right,One b) Right, two c) Left, one d) left, three
II. Fill in the blanks
1. The characteristic equation of D-flip-flop implies that ____
2. A decoder converts’ n’ inputs to __________ outputs.
3. The BCD number 101011 has _______ priority.
4. On a positive edge-triggered S-R flip-flop, the outputs reflect the input condition when _____
5. In J-K flip-flop, “no change” condition appears when ___________
6. Ripple counters are also called ____________
7. A modulus-10 counter must have ________ no of flip-flops
8. The full form of SIPO is ___________
9.. A 4-bit counter has a maximum modulus of ____________
10. If a RAM chip has n address input lines then it can access memory locations up to
_________
Course Coordinator Subject Faculty HOD
SREE DATTHA GROUP OF INSTITUTIONS
DEPARTMENT OF COMPUTER SCIENCE AND ENGINEERING & ALLIED BRANCHES
B. Tech II Year I Semester II-Mid-Term Examinations
Course Code: Branch: CSIT and CSBS Subject: Digital Electronics
PART-B -- SET- II
NAME: _____________________ Roll No. _________________
Branch & Section: _______________
Answer all questions. All questions carry equal marks. Marks: 20 X 0.5=10 Time: 20mins
Chose the correct alternative:
1. When does a negative level triggered flip-flop in Digital Electronics changes its state?
a) When the clock is negative b) When the clock is positive
c) When the inputs are all zero d) When the inputs are all one
2. In a multiplexer, the selection of a particular input line is controlled by ___________
a) Data Controller b) Selection Lines c) Logic Gates d) Both a & b
3. What will be the output from a D flip – flop if the clock is low and D = 0?
a) 0 b) 1 c) No change d) Toggle between 0 and 1
4. What is the bit storage binary information capacity of any flip-flop?
a) 1 bit b) 2 bits c) 16 bits d) infinite bits
5. A 4-bit shift register that receives 4 bits of parallel data will shift to the ________ by
________ position for each clock pulse.
a) Right, One b) Right, two c) Left, one d) left, three
6. Which sequential circuits generate the feedback path due to the cross-coupled connection
from output of one gate to the input of another gate?
a) Synchronous b) Asynchronous c) Both d)None
7. What is/are the crucial function/s of memory elements used in the sequential circuits?
a) Storage of binary information b) Specify the state of sequential c) both a & b d) None
8. Why do we require hamming codes?
a) Error Correction b) Encryption Only c) Decryption d) Bit Stuffing
9. The behavior of synchronous sequential circuit can be predicted by defining the signals
a) Discrete instants of time b) continuous instants of time
SREE DATTHA GROUP OF INSTITUTIONS
c) Sampling instants of time d) at any instant of time
10.Ring shift and Johnson counters are ____________
a) Synchronous Counters b) Asynchronous Counters
c) True Binary Counters d) Synchronous and True Binary Counters
II. Fill in the blanks
1. Ripple counters are also called ____________
2. A modulus-10 counter must have ________ no of flip-flops
3. The full form of SIPO is ___________
4. A 4-bit counter has a maximum modulus of ____________
5. If a RAM chip has n address input lines then it can access memory locations up to_________
6. A decoder converts n inputs to __________ outputs.
7. The BCD number 101011 has _______ priority.
8. On a positive edge-triggered S-R flip-flop, the outputs reflect the input condition when _____
9. In J-K flip-flop, “no change” condition appears when ___________
10. The characteristic equation of D-flip-flop implies that ____
Course Coordinator Subject Faculty HOD
