Spring 2015 Week 3 Module 15
Digital Circuits and
Systems
Multiplexer Based Design
Shankar Balachandran*
Associate Professor, CSE Department
Indian Institute of Technology Madras
*Currently a Visiting Professor at IIT Bombay
Universality of Multiplexer
s
Should get NOT, OR, AND
w0 0
f
w1 1
x A A
1 B 0
0 0 0
x’ A+B AB
0
1 1 1 B 1
NOT OR AND
Mux Based Design 2
Implementing XOR
B
0
A B
Mux Based Design 3
Example w w1
2
w1 f
w2
1 0 0 0
0
0 1 1
1
1 f
1 0 1
1 1 0 0
Implementation using a 4-to-1 multiplexer
w2 w1 f
w2 f
w2
0 0 0 w1
0
0 1 1
1 w1 w1
1 0 1 f
1 1 0
Modified truth table Circuit
Example
2
w3 w2 w1 f
w3 w2 f
0 0 0 0
0 0 0
0 0 1 0 w1 w2
0 1 w3
0 1 0 0 w1
1 0
0 1 1 1 1 1 1 0
1 0 0 0 w1
f
1 0 1 1
1
1 1 0 1
1 1 1 1 (b) Circuit
(a) Modified truth table
Using a Variable as MUX Data Input
It is possible to implement an (n+1)-variable function
using a 2n:1 MUX
In addition to the constants 0 and 1, one variable or its
complement is connected to the data inputs.
Example: Use a 4:1 MUX to implement z a ,b, c 3,5, 6, 7
Use c as a MUX data input, i.e., a and b are select inputs..
z bc
00 01 11 10 z b z a , b , c a b c a b c a b c a b c
a a 0 1
0 0 0 1 0 0 0 c c a b c a b c a b c a b
OR
1 0 1 1 1
1 c 1 c m1 c m 2 c m3 c m3
c m1 c m 2 m3 c c
0
c c m1 c m 2 1 m3
c z (a,b,c)
0 m0 c m1 c m 2 1 m3
1
a b
Mux Based Design 6
Example: MUX Based Logic
Example: Implement the function f a ,b, c 1,2, 4,7
using 4:1 MUX.
Use variable a as MUX data input, i.e., b and c are select inputs.
f a , b , c 1 , 2, 4, 7
abc abc abc abc
am1 am2 am0 am3
Mux Based Design 7
MUX Based Logic: Generalized Method
To implement an (n+1)-variable function using a 2n:1 MUX
we use n variables as select (control) inputs.
Each combination formed using these n variables
selects exactly two rows of the truth table
(2 rows => exactly one of 4 possible values).
Truth table to multiplexer mapping:
I1 I2 … In In+1 F
… 0 0 0 1 1
1 0 1 0 1
select 0 I n1 I n1 1
inputs
Mux Based Design 8
Example: MUX Based Logic Design
a b c d F
0 0 0 0 1
0 0 0 1 1
1
0 0 1 0 0
0 0 1 1 1
d
1 D0
d D1
0 1 0 0 0
0 0 D2
0 1 0 1 0 1 D3 8:1
out
d D4 MUX F
0 1 1 0 1 d D5
1 d D6
0 1 1 1 1
d D7
1 0 0 0 1 s2 s1 s0
d
1 0 0 1 0
1 0 1 0 0
a b c
d
1 0 1 1 1
1 1 0 0 1
d
1 1 0 1 0
1 1 1 0 1
d
1 1 1 1 0
Mux Based Design 9
Example:
a b c d F
0 0 0 0 1
1 F
0 0 0 1 1 bc
0 0 1 0 0 a 00 01 11 10
d
0 0 1 1 1
1 0 1 0
0 1 0 0 0
0 0 1 d 1 0
0 1 0 1 0
1 1 1 0
0 1 1 0 1
0 1 1 1 1
1 1 0 1 1
1 0 0 0 1
1 d d d d
d 0
1 0 0 1 0 1 0 0
1 0 1 0 0
d
1 0 1 1 1 K-map cell entry
1 1 0 0 1
d F0 value of F when d=0
1 1 0 1 0
1 1 1 0 1
d F1 value of F when d=1
1 1 1 1 0
Mux Based Design 10
Three Input XOR = w3w2w1
w3 w2 w1 f
0 0 0 0
0 0 1 1
w2 w1 w2
0 1 0 1 w3
0 1 1 0 w1
1 0 0 1 f
1 0 1 0
w2 w1
1 1 0 0
1 1 1 1
Mux Based Design 11
Three Input Majority Function
w3 w2 w1 f
0 0 0 0 w3 f
0 0 1 0 w2w1
0
0 1 0 0
1 w2 + w1
0 1 1 1
1 0 0 0
1 0 1 1
1 1 0 1
1 1 1 1
w3
w2
w1
f
Shannon’s Expansion Theorem
F x1 , x 2 ,, x i ,, x n x i F x1 , x 2 ,, 0,, x n
x i F x1 , x 2 ,,1,, x n
out s D0 s D1
F x1 , x 2 ,, 0,, x n D0 2:1
out F x1 , x 2 ,, x i ,, x n
MUX
F x1 , x 2 ,,1,, x n
D1
S
xi
Mux Based Design 13
Example: Use of Shannon’s Expansion
Implement F w, x , y , z w x x y w z x z
w x y x z w x x y z x z w x y x z w x z
w x y z x 0 w x 1 x z
w x y 1 y z x 0 w x 1 x z
{ y z}
1 D0
x y x z
out
2:1
z D1
s D0
out
2:1
0 D1
s
y D0
F w , x , y , z
out
2:1
D1
1 D0 s
out
2:1
z D1
s
x z w
x
Mux Based Design 14
Demultiplexer
Demultiplexer is an inverse of a multiplexer – it connects
one input to one-of-2n outputs using an n-bit select input
© ptb/dkb (January 19, 2015) Mux Based Design 15
End of Week 3: Module 15
Thank You
Mux Based Design 16
