CSE 212s: Computer Organization

Chapter 2
Instructions: Language of the Computer
Sheet

1. Show the single MIPS instruction or minimal sequence of instructions for this C
statement:

b = 25 | a;

Assume that a corresponds to register $t0 and b corresponds to register $t1.

2. Some computers have explicit instructions to extract an arbitrary field from a 32-bit
register and to place it in the least significant bits of a register. The figure below shows
the desired operation:

31 j i 0
field
31 – j bits j – i bits i + 1 bits

31 0
0... 0000 field
32 – (j - i) bits j – i bits

Find the shortest sequence of MIPS instructions that extracts a field for the constant
values i = 5 and j = 22 from register $t3 and places it in register $t0. (Hint: It can be done
in two instructions.)

3. MIPS chooses to simplify the structure of its instructions. The way we implement complex
instructions through the use of MIPS instructions is to decompose such complex
instructions into multiple simpler MIPS ones. Show how MIPS can implement the
instruction swap $rs, $rt, which swaps the contents of registers $rs and $rt. Consider the
case in which there is an available register that may be destroyed as well as the case in
which no such register exists.

4. Repeat Exercise 3, but apply your solution to the instruction load with increment
l_incr $rt, Address ($rs), a variant of the lw instruction, which increments the index
register after loading word from memory.

5. Compile the C-Language statement y += x + 1048581; into MIPS assembly code. Assume
that integer variables x and y are stored in registers $s0 and $s1, respectively.

Sheet Page 1 of 5
Ain Shams University, CSE Department CSE 212s: Computer Organization

6. Check the correctness of the sequence of actual MIPS assembly instructions for each of
the pseudoinstructions below. For each incorrect sequence, give a counterexample (Ù^nÚ
`\Ş
\ ¤
\ ]°\f è\ ) and provide a correct sequence. Note: big refers to a specific number that
requires 32 bits to represent. bigupper and biglower are the upper and lower two bytes
of big, respectively.

li: load immediate lw: load word

li $s4, big lw $s3, big($s2)
lui $s4, bigupper lui $at, bigupper
addi $s4, $s4, biglower add $s2, $s2, $at
lw $s3, biglower($s2)

7. For each pseudoinstruction in the following table, produce a minimal sequence of actual
MIPS instructions to accomplish the same thing. You may need to use $at for some of the
sequences. In the following table, big refers to a specific number that requires 32 bits to
represent and small to a signed number that can fit in 16 bits.

No. Pseudoinstruction What it accomplishes

a) move $t1, $t2 $t1 = $t2
b) clear $t0 $t0 = 0
c) li $t1, small $t1 = small
d) li $t2, big $t2 = big
e) addi $t0, $t2, big $t0 = $t2 + big
f) lw $t5, big($t2) $t5 = Memory [$t2 + big]
g) beq $t1, small, L if ($t1 == small) goto L
h) beq $t2, big, L if ($t2 == big) goto L
i) ble $t4, $t5, L if ($t4 <= $t5) goto L
j) bgt $t4, $t5, L if ($t4 > $t5) goto L
k) bge $t4, $t5, L if ($t4 >= $t5) goto L

8. Add comments to the following MIPS code and describe in one sentence what it
computes. Assume that $a0 and $a1 are used for the input and both initially contain the
integers a and b, respectively. Assume that $v0 is used for the output.

add $t0, $zero, $zero

loop: beq $a1,$zero, finish
add $t0, $t0, $a0
addi $a1, $a1, -1
j loop
finish: addi $t0, $t0, 100
add $v0, $t0, $zero

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Ain Shams University, CSE Department CSE 212s: Computer Organization

9. The following program tries to copy words from the address in register $a0 to the address
in register $a1, counting the number of words copied in register $v0. The program stops
copying when it finds a word equal to 0. You do not have to preserve the contents of
registers $v1, $a0, and $a1.This terminating word should be copied but not counted.

addi $v0, $zero, 0 # Initialize count

loop: lw $v1, 0($a0) # Read next word from source
sw $v1, 0($a1) # Write to destination
addi $a0, $a0, 4 # Advance pointer to next source
addi $a1, $a1, 4 # Advance pointer to next destination
beq $v1, $zero, loop # Loop if word copied != zero

There are multiple bugs in this MIPS program; fix them and turn in a bug-free version.

10. Using the MIPS program in Exercise 9 (with bugs intact), determine the instruction format
for each instruction and the decimal values of each instruction field.

11. What are the addressing modes of each of the following MIPS instructions: bne, j, lui, nor,
ori, sll, slt, sw.

12. Disassemble the following MIPS machine code (listed in hexadecimal) to a MIPS assembly
code segment. Decompile the obtained MIPS code segment to a C code segment. List
assumed register placement in a table.

8E 68 00 20 02 48 40 20 00 14 48 80 01 33 48 20 AD 28 00 00

13. Consider the following C-language code segment:

i = 0;
sum = 0;
do
sum += A[i++];
while (i < n);
i = 0;

Assume i, sum, and n are stored in registers $s0, $s1, and $s2, respectively and A is an
array of integers with base stored in register $s3. You can use register $t0 for any
temporary calculations.

a) Draw a flowchart for the above code segment.

b) Write a MIPS assembly code equivalent to the above code segment.
c) What is the static size of the assembly code you write in Part (b) in Bytes?

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Ain Shams University, CSE Department CSE 212s: Computer Organization

14. The following code fragment processes two arrays and produces an important value in
register $v0. Assume that each array consists of 2500 words indexed 0 through 2499, that
the base addresses of the arrays are stored in $a0 and $a1, respectively, and their sizes
(2500) are stored in $a2 and $a3, respectively. Add comments to the code and describe
in one sentence what this code does. Specifically, what will be returned in $v0?

sll $a2, $a2, 2

sll $a3, $a3, 2
add $v0, $zero, $zero
add $t0, $zero, $zero
outer: add $t4, $a0, $t0
lw $t4, 0($t4)
add $t1, $zero, $zero
inner: add $t3, $a1, $t1
lw $t3, 0($t3)
bne $t3, $t4, skip
addi $v0, $v0, 1
skip: addi $t1, $t1, 4
bne $t1, $a3, inner
addi $t0, $t0, 4
bne $t0, $a2, outer

15. Consider the following MIPS assembly code segment.

add $s0, $zero, $zero

Loop: add $t1, $s0, $s1
lb $t2, 0 ($t1)
add $t3, $s0, $s2
sb $t2, 0 ($t3)
beq $t2, $zero, Exit
addi $s0, $s0, 1
j Loop
Exit:

Registers $s1 and $s2 hold hexadecimal memory addresses 1000 and 1010, respectively.
Memory contents at hexadecimal addresses 1000—1003 are shown in the table below.

Memory address Content

(hexadecimal) (hexadecimal)
1000 50
1001 60
1002 70
1003 00

a) What are the static and dynamic sizes of the above MIPS code segment (in number
of instructions)?
b) Decompile the above MIPS assembly code segment to a C-language code segment.
List assumed register placement in a table.

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Ain Shams University, CSE Department CSE 212s: Computer Organization

16. Consider the following C-language program. Functions main(), calculate(), evaluate(), and
square() are placed starting at locations 60010, 70010, 80010, and 90010, respectively in
memory. Integer variables c, d, and i are stored in registers $s0, $s1, and $s2,
respectively. Assume that register $s0, $s1, and the stack pointer ($sp) are initialized with
the values 6, 9, and 800010, respectively. Show stack contents (in decimal) when the stack
is at its maximum size while executing the given code. Do not write register names. Write
only numerical contents. Use X for unknown values.

main () { int evaluate (int a, int b) {

int i = calculate(2,5); int c = square(a) + b;
… return c;
… }
}
int square (int u) {
int calculate (int x, int y) { int d = u * u;
return(evaluate (x+y,8)); return d;
} }

17. For the following C code:

a = b + c;
b = a + c;
d = a – b;

Write an equivalent assembly language program in each of the following architectural

styles (assume all variables are initially in memory):

a) Accumulator
b) Memory-memory
c) Stack
d) Load-store

18. For each code sequence in Exercise 17, calculate the instruction bytes fetched and the
memory data bytes transferred (read or written). Use the following assumptions about
all four instruction sets:

• The opcode is always 1 byte (8 bits).

• All memory addresses are 2 bytes (16 bits).
• All data operands are 4 bytes (32 bits).
• All instructions are an integral number of bytes in length.
• There are no optimizations to reduce memory traffic.

Which architecture is most efficient as measured by code size? Which architecture is

most efficient as measured by total memory bandwidth required (code + data)? If the
answers are not the same, why are they different?

Chapter 2 Sheet Page 5 of 5