Ribadiya Niravkumar S.
Education
Description 2023 - 2025
Motivated M.E. student specializing in L.D. College of Engineering
VLSI Design, adept in semiconductor M.E. VLSI Design
8.95 CPI (First Year)
technologies, circuit design, and
memory implementations. Passionate 2019 - 2023
about driving VLSI innovation, with Government Engineering College Bhuj
strong proficiency in CAD tools and B.E. Electronics & Communication
HDL languages. Skilled in problem- 8.52 CGPA
solving and collaborative teamwork.
Eager to contribute to dynamic roles in 2017 - 2019
the VLSI industry, bringing enthusiasm Shri Swaminarayan Gurukul Vidhyalaya Rajkot
and a commitment to excellence. HSC ( Science, Group A (PCM), GSEB)
56.46%
Dedicated to continuous learning and
professional development. 2016 - 2017
Shree Vivekananda Vidhyalaya Jetpur
Languages
SSC (GSEB)
75%
Professional Course
English Hindi Gujarati July 2024 - Present
Artronics Pvt. Ltd.
Advance Analog IC Design
Hobbies Feb 2023 - Sept 2023
Maven Silicon Softech Pvt. Ltd.
Vedas & Technical Blogs Reading Advance VLSI Design & Verification
Exploring a Nature
Spiritual Activities
Volunteering Contact Details
Meditation
Gardening
8320377556
[email protected] Niravkumar S Ribadiya
Strength Technical Tools
Learns from mistake
Time management Cadence Virtuoso :- Analog IC Design
Leadership Matlab :- Digital Signal Processing, Signal & System, DIVP
Teamwork Arduino IDE :- IoT (ESP8266), DE(Ardiuno UNO)
Creative Modelsim :- Simulation of Digital Circuit (Verilog)
Honest Quartus Prime :- Design Digital Circuit (Verilog)
Helpful
Synopsys VCS :- Verification & Coverage of Digital Circuit
(SV & UVM)
Non VLSI Skills Cisco Packet Tracer :- Computer Network
Business Analysis Pycharm :- Python Programming Language
Strategy Planning Optisys :- Fiber Optic Communication
Finance Planning
Digital Marketing
Legal Guidance VLSI Skills
Achievement & Extra HDL :- Verilog
Activities HVL :- System Verilog
TB Methodology :- UVM
1st Rank in Inter-collage Verification Methodologies :-
Debate competition at Constraint Random Coverage Driven Verification
Regional Science Center BHUJ Assertion Based Verification - SVA
KACHCHH.
Protocols :- AXI, AHB, UART, I2C, SPI
Completed 1 Year course of Operating System :- Linux
IPDC associated with BAPS
Gandhinagar from GEC Bhuj. EDA Tools :- Synopsys VCS
- Cadence Virtuoso
Volunteered for educational - ModelSim and Quartus Prime
outreach programs, taught - NG Spice and LT Spice
electronics and python to - QFlow (GDSII Generation)
unprivileged student in the
region of Kathiyawar. Domains :- ASIC/FPGA front-end Design and Verification
- Analog/Mixed Signal CMOS Circuit Design
Completed Know your self - Memory Design
spiritual program by IYF-Bhuj
(ISKCON Youth Forum - Bhuj) Core skills :-
Digital
Attended ISRO organized - RTL Design using Synthesizable constructs of Verilog,
Events at IIRS Dehradun & SAC Simulation & Synthesis, FSM based design, Assertion Based
Ahemdabad Verification using System Verilog Assertions, Code Coverage &
Functional Coverage, Static Timing Analysis
Topper of the Class in Final
Year of B.E. Analog & Mixed Signal
- MOSFET Fundamentals, Single stage Amplifier, Current Mirror,
Attended 1 Week FDP with Title Differential Amplifier, Bandgap Reference
of Silicon Chip Design from
Circuit to System via STTP Memory
program of AICTE at SCET - Introductory SRAM & DRAM operations, NVM fundamentals &
Surat. NEM Basics
Advance Analog IC Design
Router 1x3 Design & Verification
Core Skills:
Expertise in RC filters, single-stage amplifiers, and current mirrors for analog circuits.
Proficient in MOSFET fundamentals, including advanced concepts of MOSFET structures.
Hands-on experience in schematic design and simulation of analog circuits using Cadence Virtuoso.
EDA Tools:
Skilled in utilizing Cadence Virtuoso for schematic design and analysis.
Experience:
Designed and simulated RC filter circuits, single-stage amplifiers, current mirrors, Differential Amplifier
and Bandgap Reference using Cadence Virtuoso.
Conducted extensive simulations to validate circuit performance, including DC analysis, AC analysis,
and transient response.
Applied theoretical knowledge of CMOS circuit design in practical scenarios using advanced EDA
tools.
Domains:
Analog CMOS Circuit Design
Mixed-Signal CMOS Circuit Design
Projects:
Implemented and analyzed the performance of MOSFET-based single-stage amplifiers.
Implemented and analyzed the performance of Band Gap Reference
Declaration
I do hereby, declare that all the information provided above are true to the best of my
knowledge and belief.
Date :
Place : Ribadiya Niravkumar S.
