Whole
Whole
Dan Xiao
A thesis submitted to
The University of New South Wales
for the degree of Doctor of Philosophy
I hereby declare that this submission is my own work and to the best of my knowledge
it contains no material previously published or written by another person, nor material
which to a substantial extent has been accepted for the award of any other degree or
diploma at UNSW or any other educational institution, except where due
acknowledgment is made in the thesis. Any contribution made to the research by others,
with whom I have worked at UNSW or elsewhere, is explicitly acknowledged in the
thesis. I also declare that the intellectual content of this thesis is the product of my own
work, except to the extent that assistance from others in the project’s design and
conception or in style, presentation and linguistic expression is acknowledged.
Signed…………………………….
Dan Xiao
ii
ACKNOWLEDGMENTS
I would also like to thank the laboratory staffs in the group of Power electronics and
Drives for their logistical support. Special acknowledgment is given to Dr. Karanayil V.
Baburaj for his help on providing laboratory and software support. I also thank Mr.
Gilbert Foo and Dr. Jun Zhang for their helpful discussion and valuable suggestions on
sensorless DTC scheme for IPM synchronous motor drives.
Last but not least, I would like to thank my wife, Wei Gao and my parents for their
financial and spiritual support during my PhD study.
iii
ABSTRACT
This thesis focuses mainly on improving the performance of direct torque control
(DTC) for matrix converter driven interior permanent magnet synchronous machine
(IPMSM) drive. Although DTC does not require continuous rotor position information,
the rotor speed is required for speed feedback of the speed controller. If the rotor speed
can be estimated from the measured variables for DTC, it not only eliminates the cost of
the speed sensor, but also increases the reliability of the drive. Therefore, speed
sensorless control and extraction of accurate rotor position information for reliable
sensorless operation of a direct torque controlled IPM synchronous motor fed by a
matrix converter (MC) over a wide speed range, including zero speed, are major
concerns in the thesis.
A modified hysteresis direct torque control (HDTC) for the matrix converter was
proposed and implemented on the developed laboratory prototype of matrix converter,
which allows great reduction of input current harmonics without any adverse effect on
the output performance or increasing the complexity of the system, in comparison with
the classical DTC scheme. The good performance of the proposed DTC using an
adaptive observer for speed and flux estimations has been verified by extensive
experiments.
The associated problems with HDTC have also been investigated in this thesis. A direct
torque and flux control (DTFC) scheme based on ISVM for MC-fed IPMSM drive was
proposed to solve the problems, which features low torque and flux ripples and
sinusoidal input/output currents while maintaining a constant switching frequency. The
iv
unity input power factor and fast dynamics were achieved with the input power factor
correction and the overmodulation strategies respectively.
However, at extremely low speed, including zero speed, sensorless DTFC MC drives
was still not achievable using the conventional adaptive flux observer. A modified
adaptive flux observer has been presented in this thesis for the sensorless DTFC
IPMSM MC drive. Inserting a speed correction term makes the adaptive observer robust
to the stator resistance variation as well as the load disturbance. Combined with HF
signal injection technique, the observer is capable of handling full-load at low speeds
including standstill. Experimental verification has been carried out, confirming the
improvement and effectiveness especially at very low speed and standstill with full load
compared with the conventional observer. To achieve a wide speed sensorless
operation, a changeover algorithm using a speed-dependent weighting function was
implemented for smooth transitions from zero to the switchover speed at which the
adaptive observer alone can accomplish reliable speed and flux estimations.
The abovementioned studies on the DTC technique combined with the advantages of
matrix converters for IPM machine drives are applicable to many other types of
machines. It is evident that the high-performance direct torque controlled matrix
converter drive without any position or speed sensors and without any current
controllers is an attractive and viable candidate for sensorless drives and potentially an
alternative to VSI drives.
v
CONTENTS
ACKNOWLEDGMENTS iii
ABSTRACT iv
CONTENTS vi
LIST OF FIGURES x
LIST OF TABLES xviii
LIST OF SYMBOLS xix
CHAPTER 1 INTRODUCTION
1.1 Introduction 1
1.2 Static AC/AC Power Frequency Converter-Indirect and Direct Converters 2
1.2.1 Comparison between Matrix Converter and VSI 2
1.2.2 Direct AC/AC Power Converter 5
1.3 Matrix Converter Application 6
1.4 Project Scope 9
1.5 Thesis Outline 10
References 12
vi
CHAPTER 3 MODULATION STRATEGIES
3.1 Introduction 49
3.2 Duty-cycle Matrix Approach 51
3.2.1 Alesina-Venturini Modulation (AV Method) 51
3.2.2 Optimum AV Method 51
3.2.3 Scalar Modulation Method 52
3.3 Space Vector Approach 53
3.3.1 Direct Space Vector Modulation 53
3.3.2 Indirect Space Vector Modulation (ISVM) 56
3.4 A Modified Indirect Space Vector Modulation 64
3.4.1 Theory of the Modified ISVM 64
3.4.2 Simulation and Experimental Verification 67
3.5 Conclusion 75
References 76
vii
5.4 An Improved HDTC for Matrix Converters 104
5.5 Sensorless HDTC of Matrix Converter Fed IPMSM 108
5.5.1 Adaptive Observer in Estimated Rotor Reference Frame 110
5.5.2 Speed Adaptation Mechanism 111
5.5.3 Observer Gain Selection 113
5.5.4 Input Power Factor Correction 116
5.5.5 Simulation Results 117
5.5.6 Experimental Results 119
5.6 Comparison of the Two HDTC Schemes for Matrix Converter Fed IPM
Synchronous Machine 128
5.6.1 Numerical Simulation Results 130
5.6.2 Experimental Results 133
5.7 Conclusion 141
References 142
viii
7.1 Conclusions of This Thesis 203
7.2 Suggestions for Future Work 205
ix
LIST OF FIGURES
Figure 1−1 Diode rectifier-PWM VSI converter 3
Figure 1−2 PWM rectifier-PWM VSI converter 3
Figure 1−3 Topology configuration of a z-source direct matrix converter 7
Figure 1−4 Three-to-one matrix converter 7
Figure 1−5 AC/DC bidirectional rectifier combined with z-source network
for ISA 7
Figure 1−6 Two-stage matrix converter 8
Figure 1−7 H-bridge based multi-level matrix converter 8
Figure 2−1 Simplified 3×3 matrix converter 18
Figure 2−2 One typical double-sided switching pattern 18
Figure 2−3 Possible implementations of a bi-directional switch with discrete
semiconductor devices 19
Figure 2−4 Matrix converter modules using IGBTs and diodes 20
Figure 2−5 Matrix converter modules using Reverse Blocking IGBTs 21
Figure 2−6 Possible single-stage LC filter configurations 22
Figure 2−7 Schematic of a two-phase to single phase matrix converter 26
Figure 2−8 Switching diagram of the four-step voltage based commutation
strategy between two bidirectional switch cells 28
Figure 2−9 Switching diagram of the four-step current direction based
commutation strategy between two bidirectional switch cells 31
Figure 2−10 Switching diagram of two-step commutation between two
bidirectional switch cells based on current threshold 32
Figure 2−11 Switching diagram of two-step commutation without inter-switch
commutation 33
Figure 2−12 Switching diagram of proposed two-step hybrid commutation
based on current direction and threshold 37
Figure 2−13 Three phase (input) to single phase (output) matrix converter 37
Figure 2−14 Diagram of the Finite State Machine of four-step current
commutation for one output phase x of matrix converter 38
Figure 2−15 Diagram of the Finite State Machine of hybrid current commutation
x
for one output phase X of matrix converter 39
Figure 2−16 Comparison of output current THD with four-step commutation
and the proposed current commutation 41
Figure 2−17 Output current (ch4: 2A/div), current threshold (ch1: 2V/div) and
current direction (ch2: 5V/div) waveforms of two commutations at
35V and 25Hz output voltage 42
Figure 2−18 Output current (ch4: 5A/div), current threshold (ch1: 2V/div), and
current direction (ch2: 5V/div) waveforms of proposed hybrid
commutation at 70V and 25Hz output voltage 43
Figure 2−19 A quarter cycle of output current (ch4), current threshold (ch1: 2V/div)
and current direction (ch2: 5V/div) waveforms of proposed hybrid
commutation 44
Figure 3−1 Direct SVM of output voltage vector and input current
displacement angle 53
Figure 3−2 Equivalent circuit of matrix converter for indirect modulation 56
Figure 3−3 Input vector modulation in the rectifier stage using ISVM 57
Figure 3−4 Output vector modulation in the inverter stage using ISVM 61
Figure 3−5 Switch states of equivalent circuit and its real circuit for vector
pair V1 − I1 63
Figure 3−6 Input vector hexagons and sector definitions for two ISVM schemes 65
Figure 3−7 Output current, voltage, input current and relevant harmonic
spectrums 69
Figure 3−8 Output current 2A/div, 2ms/div, and relevant harmonic spectrum,
12.8dBm/div, 2 kHz/div, of two modulation schemes at 40 Hz,
m=0.5 70
Figure 3−9 Output voltage 250V/div, 2ms/div, and relevant harmonic spectrum
16.2dBm/div, 2 kHz/div, of two modulation schemes at 40Hz,
m=0.5 70
Figure 3−10 Input voltage and input current, 100V/div, 2A/div, 2ms/div, and
harmonic spectrum, 15.2dBm/div, 2kHz/div, of two modulation
schemes at 40Hz, m=0.5 70
xi
Figure 3−11 Output current 2A/div, 2ms/div, and relevant harmonic spectrum,
12.8dBm/div, 2 kHz/div, of two modulation schemes at 40 Hz,
m=0.4 71
Figure 3−12 Output voltage 250V/div, 2ms/div, and relevant harmonic spectrum,
16.2dBm/div, 2 kHz/div, of two modulation schemes at 40Hz,
m=0.4 71
Figure 3−13 Input voltage and current, 100V/div, 1A/div, 2ms/div, and harmonic
spectrum, 15.2dBm/div, 2kHz/div, of two modulation schemes
at 40Hz, m=0.4. 71
Figure 3−14 Output current 2A/div, 2ms/div, and relevant harmonic spectrum,
12.8dBm/div, 2 kHz/div, of two modulation schemes at 40Hz,
m=0.3 72
Figure 3−15 Output voltage 250V/div, 2ms/div, and relevant harmonic spectrum,
16.2dBm/div, 2 kHz/div, of two modulation schemes at 40Hz,
m=0.3 72
Figure 3−16 Input voltage and input current, 100V/div, 2A/div, 2ms/div, and
harmonic spectrum, 15.2dBm/div, 2 kHz/div, of two modulation
schemes at 40Hz, m=0.3 72
Figure 3−17 Comparison of output current THD under modified and
conventional modulations 73
Figure 3−18 Comparison of input current THD under modified and
conventional modulations 74
Figure 4−1 Block diagram of experimental setup for matrix converter fed IPM
synchronous machine 79
Figure 4−2 Layout of hardware setup 81
Figure 4−3 Photograph of the matrix converter prototype 81
Figure 4−4 Signal flow diagram of the control system 82
Figure 4−5 Flow chart of PWM synchronization interrupt service routine 83
Figure 4−6 Optimized sequence of switching states in sector pair (1, I) 84
Figure 4−7 Block diagram of the logic control unit in FPGA (i=a,b,c; J=A,B,C) 85
Figure 4−8 Generation of double-sided switching pulses for the vectors by 4
PWMs 86
xii
Figure 4−9 Determination of commutation commencement with a switching
signal edge detector 87
Figure 4−10 Schematic of input voltage measurement and overvoltage
protection 92
Figure 4−11 Schematic of output current measurement with over-current
protection, direction and threshold detection 92
Figure 4−12 Schematic of modified desaturation detector 93
Figure 5−1 Block diagram of HDTC IPM synchronous motor VSI drive 97
Figure 5−2 An ideal circuit of a 2-level VSI fed three phase AC machine 97
Figure 5−3 Eight voltage space vectors generated by a 2-level VSI 98
Figure 5−4 Control of the stator flux vector by applying appropriate voltage
vectors 100
Figure 5−5 Classical HDTC for matrix converter IPMSM drives 102
Figure 5−6 Input vectors and their representation in the time domain 103
Figure 5−7 Proposed HDTC for matrix converter IPMSM drives 106
Figure 5−8 Input current vectors and voltage vectors for modified HDTC 106
Figure 5−9 Proposed sensorless HDTC for matrix converter IPMSM drives 109
Figure 5−10 Block diagram of the proposed adaptive observer 113
Figure 5−11 Correcting angle vs. output power ratio for IPFC 116
Figure 5−12 Transient response of proposed sensorless HDTC at 1000rpm with
successive rated load reversals (Simulation) 118
Figure 5−13 Estimation errors of proposed sensorless HDTC at 1000rpm with
successive rated load reversals (simulation) 119
Figure 5−14 Estimation errors under speed reversal at 100rpm with no load
(simulation) 120
Figure 5−15 Smooth transient between high and low speed regions using speed-
dependent hysteresis comparator and vector selection criteria at a
speed reversal from 1000rpm to −1000rpm without load
(experiment) 121
Figure 5−16 Transient response of proposed HDTC at 1000rpm with successive
rated load reversals (experiment) 122
Figure 5−17 Input current (5A/div), phase voltage (50V/div), torque (5 Nm/div)
xiii
and stator current (2A/div) of proposed HDTC at 1000rpm under
rated load reversal 123
Figure 5−18 Reversal speed operation of proposed HDTC at ±100rpm under
75% rated load (experiment) 124
Figure 5−19 Steady-state full-load operation at 100rpm (experiment) 125
Figure 5−20 Steady-state performance of the proposed HDTC at 50rpm, 3.5N⋅m 126
Figure 5−21 Torque, stator flux, stator currents and input currents of proposed
HDTC at 1200 rpm, under 5 N⋅m load (simulation) 127
Figure 5−22 Torque, stator flux, stator currents and input currents of classical
HDTC at 1200 rpm, under 5 N⋅m load (simulation) 128
Figure 5−23 Input and output currents and their harmonic spectrums of two
HDTC schemes 129
Figure 5−24 Input current (5A/div), phase voltage (50V/div), torque (5 Nm/div)
and stator current (2A/div) of classical HDTC at 600rpm under
rated load reversal 130
Figure 5−25 Input current (2A/div), phase voltage (50V/div), torque (5 Nm/div)
and stator current (2A/div) of the proposed HDTC at 600rpm under
rated load reversal without IPFC 131
Figure 5−26 Input current (2A/div), phase voltage (50V/div), torque (5 Nm/div)
and stator current (2A/div) of proposed HDTC at 600rpm with
IPFC 132
Figure 5−27 Steady-state performance of the classical HDTC at 100 rpm, under
rated load 133
Figure 5−28 Steady-state performance of the proposed HDTC at 100rpm, under
rated load 134
Figure 5−29 Input current and stator current of the classical HDTC with their
harmonic spectrums, 20dB/div, at 500 rpm under rated load 135
Figure 5−30 Input current and stator current of the proposed HDTC with their
harmonic spectrums, 20dB/div, at 500 rpm under rated load 136
Figure 5−31 Comparison of output quality of two HDTC schemes from 100 to
1200rpm and 0 to 6 N⋅m (experiment) 138
xiv
Figure 5−32 Comparison of input quality of two HDTC schemes from 100 to
1200rpm and 0 to 6 N⋅m (experiment) 139
Figure 5−33 Performance comparisons at 1000, 600 and 200rpm (experiment) 140
Figure 6−1 The stator and rotor flux linkages in different reference frames 148
Figure 6−2 Block diagram of a typical PI control structure of stator flux loop 150
Figure 6−3 Block diagram of a typical PI control structure of torque loop 152
Figure 6−4 Overmodulation represented in space vector hexagons and time
domain 154
Figure 6−5 Block diagram of the DTFC-ISVM MC IPMSM drive with
adaptive SMO 156
Figure 6−6 Performance of DTFC of MC IPMSM drive at successive load
reversals 157
Figure 6−7 Performance of sensorless control at successive load reversals 158
Figure 6−8 Performance of input currents of MC at successive load reversals
at 500 rpm 160
Figure 6−9 Experimental setup of IPMSM MC drive system 161
Figure 6−10 Performance of SMO under successive load reversals at 1000 rpm 162
Figure 6−11 Current errors of SMO under successive load reversals at 1000 rpm 163
Figure 6−12 Comparison of torque reversal responses of DTFC-ISVM with
overmodulation and classical HDTC (experiment) 164
Figure 6−13 Comparison of input current (5A/div, 100V/div) and stator current
(2A/div) with their harmonic spectrums, 20dB/div, at 500 rpm
under full load 165
Figure 6−14 Performance comparison of input and output currents under
modulation mode 1 and mode 0 at 100rpm 3N·m (experiment) 166
Figure 6−15 Comparison of position errors among 80%, nominal and varying Lq 168
Figure 6−16 Permanent magnet motor model in different reference frames 168
Figure 6−17 Block diagram of demodulation scheme to extract the error
signal and PI mechanism to obtain the correction term 172
Figure 6−18 Block diagram of DTFC-ISVM MC IPMSM drive with combined
observer 173
Figure 6−19 Block diagram of the combined adaptive observer 173
xv
Figure 6−20 Performance of DTFC with the modified SMO at 1000rpm with
full load reversal (experiment) 175
Figure 6−21 Performance of the modified SMO at 1000rpm with full load
reversal (experiment) 176
Figure 6−22 DTFC performance at stator resistance step change to 158% rated
value with correction term at 200rpm with 63% rated load
(experiment) 177
Figure 6−23 SMO performance at stator resistance step change to 158% rated
value with correction term at 200rpm with 63% rated load
(experiment) 178
Figure 6−24 Current errors at stator resistance step change to 158% rated value
with correction term at 200rpm with 63% rated load (experiment) 179
Figure 6−25 Mismatched stator resistance effect on SMO at 200rpm with 63%
rated load (experiment) 180
Figure 6−26 Mismatched stator resistance effect on the DTFC performance at
200rpm with 63% rated load (experiment) 181
Figure 6−27 Current error of original SMO with mismatched stator resistance at
200rpm with 63% rated load (experiment) 182
Figure 6−28 Performance of modified SMO due to 3.4Ω increase in stator
resistance at 50rpm with 3.5N⋅m (experiment) 183
Figure 6−29 Current error of original SMO with mismatched stator resistance at
50rpm with 3.5N⋅m (experiment) 184
Figure 6−30 Low speed performance of combined SMO under rated load torque
at 20rpm reversal reference (experiment) 185
Figure 6−31 Performance of DTFC-ISVM under rated load torque steps at low
speed reference (experiment) 186
Figure 6−32 Performance of DTFC-ISVM at successive step speeds 100, 300, 0
and −100rpm with a sudden 3.5Nm load impact (experiment) 187
Figure 6−33 Performance of sensorless control at successive step speeds 100,
300, 0 and −100rpm with a sudden 3.5Nm load impact (experiment) 188
Figure 6−34 Performance of DTFC-ISVM under rated load torque steps at zero
speed reference (experiment) 189
xvi
Figure 6−35 Performance of SMO under rated load torque steps at zero speed
reference 190
Figure 6−36 Input current (1A/div), voltage (50V/div), torque (5Nm/div), stator
current (2A/div) at standstill full load reversal without IPFC
(20ms/div) 191
Figure 6−37 Input current (1A/div), voltage (50V/div), torque (5Nm/div), stator
current (2A/div) at standstill full load reversal with IPFC
(20ms/div) 192
Figure 6−38 Input current (1A/div), voltage (50V/div), torque (5Nm/div), stator
current (2A/div) at 600rpm full load reversal without IPFC 193
Figure 6−39 Input current (1A/div), voltage (50V/div), torque (5Nm/div), stator
current (2A/div) at 600rpm full load reversal with IPFC 194
Figure 6−40 Input current (5A/div), voltage (50V/div), torque (2Nm/div), stator
current (2A/div) at 1000rpm full load reversal without IPFC 195
Figure 6−41 Input current (2A/div), voltage (50V/div), torque (2Nm/div), stator
current (2A/div) at 1000rpm full load reversal with IPFC 196
Figure 6−42 Input and stator currents with their harmonic spectrums, 20dB/div,
at 50 rpm under rated load 197
Figure 6−43 Input and stator currents with their harmonic spectrums, 20dB/div,
at 200 rpm under rated load 198
Figure 6−44 Input and stator currents with their harmonic spectrums, 20dB/div,
at 1000 rpm under 3.5N·m load 199
Figure A−1 The equivalent circuit of PM synchronous motor in dq-reference
frame A-2
Figure A−2 Rotor structure of IPMSM used in the thesis A-2
Figure A−3 Measured line-to-line back emf of the prototype motor at 734 rpm A-3
Figure A−4 Circuit connection for inductance measurement of IPMSM A-6
Figure A−5 Measured self-inductance of IPMSM A-7
Figure A−6 Determination of D of the two machines A-9
Figure A−7 Determination of J of the DC motor and the IPM motor A-9
xvii
LIST OF TABLES
Table 2−1 Switching configurations for four-step commutation scheme 40
Table 3−1 Switching Configurations of matrix converter used in Direct SVM 54
Table 3−2 Selection of switching configurations for each combination of
output and input vector sectors 55
Table 3−3 Sequence of switching combinations in U-shape, N-shape or
inversed shapes 63
Table 4−1 Switching states for commutation in steady state 89
Table 4−2 Switching states for commutation in the transition 90
Table 5−1 Selection table for HDTC of VSI IPMSM drive 101
Table 5−2 Switching Table for Classical HDTC ( i = 0 or 1; j = 1...6; k = 1...6 ) 103
xviii
LIST OF SYMBOLS
v instantaneous voltage, V
i instantaneous current, A
vab , vbc , vca input line-line voltages of matrix converter, V
M ab , M bc , M ca Mutual Inductances, H
J rotor inertia
D friction coefficient
p derivative
P number of pole pairs
T electromagnetic torque, N⋅m
λS stator flux linkage, Wb
m modulation index
d duty cycle of a particular space vector
ϕin input displacement angle, rad or degree
xix
δ load angle between stator flux vector and rotor, rad or degree
θ re rotor position (electrical)
TS , ΔT sampling period, µs
Superscripts
max maximum value
^ estimated value
~ estimation error
* reference or required value
- space vector or active low
Subscripts
ref reference value
dq values in the rotor reference frame
xy values in the stator flux reference frame
αβ values in the stationary reference frame
a , b, c input phase of converter
A, B, C output phase of converter
DC DC value
o output values of matrix converter
in input values of matrix converter
k,k + 1 kth (current) and k+1 (next) sampling interval
Abbreviations
AC alternating current
ADC analog-to-digital converter
AV Alesina-Venturini
BDS bi-directional switch
BPF band-pass filter
xx
BSO branch switch over
CSR current source rectifier
DAC digital-to-analog converter
DC direct current
DMOSFET depletion metal-oxide-silicon field-effect transistor
DSP digital signal processor
DTC direct torque control
DTFC direct torque and flux control
EKF extended Kalman filter
EMF electromagnetic force
FCC forced commutated cycloconverter
FFT fast Fourier transform
FOC field oriented control
FPGA field programmable gate array
FRD fast recovery diodes
FSM finite state machine
HDTC hysteresis direct torque control
HF high frequency
IC integrated circuit
IGBT insulated gate bipolar transistor
I/O input/output
IPF input power factor
IPFC input power factor correction
IPM interior permanent magnet
IPMSM interior permanent magnet synchronous machine
ISVM indirect space vector modulation
ITAE integral of time multiplied by the absolute of the error
LPF low-pass filter
MC matrix converter
MTBF mean time between failures
NCC naturally commutated cycloconverter
PCB printed circuit board
PCI peripheral controller interface
PI proportional and integral
xxi
PLL phase-locked loop
PM permanent magnet
PMDC permanent magnet direct current
PWM pulse-width modulation
RB-IGBT reverse blocking insulated gate bipolar transistor
R&D research and development
RMS root mean square
RPM revolutions per minute
SMO sliding mode observer
SVM space vector modulation
THD total harmonic distortion
VSI voltage source inverter
xxii
Chapter 1 Introduction
CHAPTER 1 INTRODUCTION
1.1 Introduction
This chapter gives a brief overview on AC/DC/AC and AC/AC power frequency
conversion structures and introduces the matrix converter. A matrix converter is a forced
commutated converter which directly connects each input phase to each output phase
without any intermediate dc-link using an array of fully-controlled bi-directional switches
and constructing a variable-voltage variable-frequency output by piecing together selected
segments of a fixed-voltage fixed-frequency input [1].
Since it was firstly introduced in 1976 and improved by Venturini and Alesina in 1980 and
1989 [2], [3], matrix converter (MC) has increasingly received interest as a viable
alternative to the conventional pulse-width-modulation voltage-source inverter (PWM-VSI)
due to a number of advantages, such as inherent bidirectional power-flow capability, the
sinusoidal input/output waveforms, and controllable input power factor. Furthermore, the
absence of bulky dc-link capacitors for energy storage allows longer lifetime, higher
integration capability and higher reliability for extreme temperatures and critical
volume/weight applications. These attractive properties and the progress of the power
electronics device technology have motivated further exploration of the matrix converter.
This chapter also covers an overview of the applications of matrix converter, including
unified power flow controller, wind energy conversion system, and adjustable speed AC
drives. Unfortunately, such drawbacks as the complicated modulation and commutation
techniques are obstacles for matrix converter to take the place of the mature and well
established technology in the power conversion market. However, the achievements made
1
Chapter 1 Introduction
by researchers and the increasing demand of the market for higher reliability, higher power
density and cost reduction has convinced the industry to invest in the matrix converter
technology in recent years [4]−[10].
This thesis will focus on the application of the matrix converter to interior permanent
magnet synchronous motor drives or AC drives over a wide speed range, including
standstill. Finally, the reasons and the aims of the research work for this thesis as well as
the outline of the thesis are presented.
In general, AC/AC power conversion is to transform the fixed frequency AC supply into a
variable frequency variable voltage source such as required by the AC motor in variable
speed applications. AC/AC converter topologies can be classified into two main categories,
indirect and direct power conversion schemes, depending on the way that the internal
power transfers.
The indirect conversion system consists of two or more stages with an intermediate DC-
link. The most common indirect scheme is the two-stage AC/DC/AC power conversion as
shown in Figure 1−1. Firstly, the AC power supply is converted to a DC power by means
of a rectifier circuit. Secondly, the DC voltage is converted back to an AC output with
variable frequency and variable voltage by an inverter circuit. A constant dc link voltage is
very important for this kind of converters which is achieved by putting one or a group of
filter capacitors across the dc input terminals of the inverter, because the modulation
algorithm of the inverter is referred to this DC voltage. But it has some drawbacks. The
mains currents drawn by this very cost-effective and reliable diode-bridge rectifier contain
a large amount of harmonics due to their largely non-sinusoidal wave shape. This results in
the distortion of the input voltages, not friendly to the sensitive equipments connected to
the same supply. Additional harmonic losses in the utility, a low power factor and a
2
Chapter 1 Introduction
significant ripple current stress on the dc-link capacitor caused by this have raised a great
problem to the utility power quality and serious concerns in the past years. Furthermore,
this kind of rectifier does not allow reverse current during a regenerative braking of the
motor. In order to avoid DC bus reaching destructive voltage level, when the motor changes
its current direction and acts as a generator due to a sudden speed drop or reverse, the
generated energy has to be damped to and dissipated in a braking resistor by heat [11], [12].
Va Ia IA
Vb I b C DC VDC IB
Vc I c IC
IA
CDC VDC IB
IC
3
Chapter 1 Introduction
Difficulties that are encountered with the VSI circuit fed by a diode rectifier are its
incapability of regeneration power back to the supply and its undesirable input quality.
Therefore, an increasingly popular way to overcome its limitations is to use the so-called
back-to-back converter where the diode rectifier is replaced by a PWM rectifier which
shown in Figure 1−2. The back-to-back converter is considered as one of the most
competitive alternatives to matrix converter because it has the same desirable functionality
for AC to AC power conversion applications, in terms of input quality and bidirectional
power flow capabilities. To be accepted by the market, matrix converter should surpass the
performance of this competitor in terms of cost, size and reliability. Comparisons between
matrix converter and back-to-back converter have been made in the literature [13]−[16]. In
[13], the comparison of these two kinds of converters is done for an induction motor drive,
part count, semiconductor losses, input filter design and protection aspect being discussed.
It has been clearly emphasized that the matrix converter realizes lower switch losses than
the voltage-source converter in the high real power conversion. A further reduction of
current rating of the matrix converter is allowed. The matrix converter requires slightly less
passive component and ratings [13]. The factor of voltage stress taken into account, the
predicted reliability of the matrix converter is actually slightly better than the back-to-back
converter solution employed by evaluating the “mean time between failures (MTBF)” [14].
Despite the higher number of devices, the matrix converter solution offers the potential for
a substantial increase in power density due to the reduction in the size of the energy storage
elements within the circuit topology [14]. Taking into account the thermal strength of the
switches, the matrix converter performs better than the back-to-back converter at low
output frequency range where the matrix converter switches are equally stressed. This
results in a better exploitation of the current capability of the switches resulting in matrix
converter’s higher overload capability for the drive systems [16].
Besides the contribution to the elimination of the large DC-bus capacitors which by far has
the shortest lifetime in power electronic converters, the matrix converter behaves better
than the conventional VSI due to its almost zero dead time. The inherent problem of AC
converters is the converter non-linearity, especially the dead time resulting in zero-current
clamping. The problem is exacerbated by the low-speed condition in which the output
4
Chapter 1 Introduction
voltages of converter are small and therefore affected by converter dead-time and device
voltage drops. Despite several methods proposed to reduce or compensate such
nonlinearity, a matrix converter is a promising alternative to overcome it. Its behaviour can
be almost completely linear with promising achievements for sensorless speed control [17].
Based on the comparisons above, the MC is obviously superior in applications in which the
small size/weight and/or high switching frequency are required. It realizes lower losses
than the VSC in applications where high real power must be converted from ac to ac. The
limited voltage transfer ratio of the MC can be addressed better when integrated motor and
converter applications are considered [13].
Direct static AC/AC power frequency converters basically consist of an array of switches
connected directly between the input and output terminals without any intermediate DC
link. The best-known of single stage AC/AC conversion is the cycloconverter which
usually uses phase-controlled thyristors due to their easy phase commutation. The
cycloconverters are categorized into naturally commutated and forced commutated
cycloconverter (NCC and FCC). In NCC, the output voltage at different frequency is
constructed with segments of the input voltage waveforms by modulating the firing angle
of the thyristors. The switches are turned off naturally by the input voltages in NCC. The
lack of energy storage element within the topology circuit brings NCC several advantages
such as simple and compact power circuit and substantial increase in power density. Half
controlled switches restrict the applications of NCC due to the low output frequency, the
lower input/output voltage transfer ratio, and the poor input power factor [18].
The matrix converter is considered as a new type of FCC which overcomes the limitations
of NCC. The converters can be controlled by more sophisticated modulation algorithms by
introducing fully-controlled semiconductor devices with self-turn-off independent of
voltages. Any input can be connected to any output side terminal at any time depending on
the modulation strategy. The modulation is executed at high switching frequency allowing
the continuously variable output frequency, even higher than the input frequency. The input
5
Chapter 1 Introduction
power factor, the output performance and the input/output voltage transfer ratio to be
improved compared to NCC.
Matrix converter is generally referred to as the direct power converter between m input
phases and n output phases. Different number of input and output lines and their
waveforms result in several forms of matrix converters, besides the well-known three-to-
three matrix converter. The main application of matrix converter is in the adjustable speed
drive system [19], [20]. High-performance control strategies, such as vector control and
direct torque control (DTC), originally developed for VSI can be implemented in the matrix
converter drives [21], [22]. The low volume, sinusoidal input/output waveforms, inherent
four-quadrant operation capability and lack of the limited-lifetime electrolytic capacitors
qualify the matrix converter for the integrated motor drive application. It is not possible to
build a traditional inverter within the same space envelope of the original machine over a
certain power level due to the volume of the DC link capacitors [9], [23].
The application of matrix converter to wind energy conversion system continues to grow.
Since future environment friendly generator systems may operate at variable speeds, matrix
converters are required to convert variable-voltage, variable-frequency input into fixed-
voltage and frequency-output [24]−[27]. The applications of matrix converter in power
quality improvement have been reported in [28], [29], where the matrix converter was used
as a unified power flow controller and input quality compensator respectively. The matrix
converter can operate in current source mode by using a novel switching strategy [30].
Inserting a three-phase Z-source network (Figure 1−3) to the input side of a matrix
converter can increase the voltage transfer ratio to one by controlling shoot-through zero
interval and the proposed switching technique [31].
6
Chapter 1 Introduction
sinusoidal input currents and DC output voltage for high power DC drives [34]. The buck
rectification mode of the matrix z-source converter for automobile integrated starter
alternator system is also an application of this topology [35]. The difference is that a
relatively high voltage AC generator acts as the AC source and batteries are included in the
DC load, as shown in Figure 1−5. The simplest form of matrix converter is the single-phase
controlled rectifier [36], [37].
Va
S1 L1
C2
Vb C1
S2 L2
C3
Vc S3
L3
= p LF
+
r
LL
a
y b
N
c CF
b RL
AC Source _
n
DC Load
Figure 1−5. AC/DC bidirectional rectifier combined with Z-source network for ISA.
7
Chapter 1 Introduction
S1 S3 S5
ia iA
va
ic iB
vb
C DC
ib iC
vc
S2 S4 S6
ia ib ic Q1 D1 D2 Q2
Q3 D3 D4 Q4
iA
iB
iC
8
Chapter 1 Introduction
Three kinds of multi-level matrix converters were proposed to improve waveform quality
or increase the power handling capacity [42]. A diode clamped multi-level technique is
applied to the two-stage matrix converter to improve the output quality. It consists of a
four-quadrant current source rectifier and a neutral-point-clamped three-level VSI [43]. In a
similar way to the flying capacitor based multi-level technique, six flying capacitors are
used to create three extra middle voltage levels from the AC supply [44]. H-bridge based
multi-level matrix converter, shown in Figure1−7, can increase the voltage conversion ratio
as well as the voltage rating of the converter [45], [46].
The sensorless direct torque and stator flux control of IPM synchronous motors fed by
matrix converters over a wide speed range including at very low speeds and standstill is the
main concern of this thesis.
A new hybrid current-sign based commutation is proposed to reduce the commutation time
of matrix converters without any inner-switch commutation problem, which occurs within
the threshold band of current. A modified ISVM is investigated and evaluated by means of
total harmonic distortion (THD) of input and output waveforms.
One of the problems associated with the classical hysteresis DTC for matrix converter is
the significant harmonic content of the input current. A modified HDTC is proposed to
reduce the harmonic distortion of the input current by using a different switching strategy.
9
Chapter 1 Introduction
Then a sensorless HDTC is presented by using an adaptive sliding mode flux observer
implemented in the estimated rotor reference frame.
The drawbacks of the classical HDTC are the errors in stator flux estimation, poor low
speed performance, high ripples in torque, stator flux and currents and variable switching
frequency behavior. In order to overcome these outstanding problems, a direct torque and
flux controller for the matrix converter IPM motor drive using Indirect Space Vector
Modulation (ISVM). The adaptive flux observer is augmented by a speed-dependent high
frequency (HF) signal injection method at low and zero speeds.
In summary, the main objective of this project is to investigate and implement a high-
performance sensorless DTFC IPMSM MC drive over a wide range.
Chapter 1 gives a brief introduction and comparison of AC/AC direct converter and
AC/DC/AC converter.
Chapter 2 presents the fundamentals of matrix converters and the possible implementations
of the bidirectional switch. Such practical issues as input filter design and protection
methods are also briefly investigated. Current commutation strategies are reviewed and
discussed in detail. It focuses on the proposed hybrid current commutation strategy for the
bidirectional switches, which relies on the output current direction. The performance
improvement on the output current is verified by experimental results.
10
Chapter 1 Introduction
Chapter 4 presents the experimental prototype hardware of the matrix converter used in the
drive system. The switching signals are generated in an FPGA chip from the 5 PWMs and
sector information provided by DS1104. Current commutation is implemented for the
bidirectional switches by a finite state machine (FSM).
Chapter 5 reviews the classical hysteresis direct torque control for matrix converter-fed
drive. A modified HDTC strategy is proposed for matrix converter drive allowing the
reduction of the harmonic content of the input current without any adverse effect on the
output side. Chapter 5 also deals with the sensorless control for the modified HDTC matrix
converter drive using an adaptive sliding mode flux observer. The adaptive observer is
implemented in the estimated rotor reference frame. Adaptation law for the rotor speed and
position estimates are derived from the Lyapunov stability analysis. The simulation and
experimental results show that the proposed observer is able to deliver accurate estimations
of speed and position. The input current quality is investigated by means of THD to verify
the effectiveness of the proposed method in the sensorless control.
Chapter 6 presents a sensorless direct torque and flux (DTFC) controller for an IPM motor
in order to overcome the drawbacks of the hysteresis DTC. Two PI controllers are utilized
to achieve independent closed-loop control of both the torque and stator flux linkage. The
output voltage vector and input current vector are synthesised using the multi-mode indirect
space vector modulation (ISVM) strategy. The proposed strategy significantly suppresses
the ripples in the torque and stator flux as well as input and output currents whilst
maintaining a constant switching frequency and unity input power factor. The fast response
of the classical HDTC is entirely preserved by using an over-modulation strategy. The
simulation and experiments are carried out to compare the performance of the ISVM DTFC
scheme with that of the classical HDTC. A speed correction term is introduced to the
observer to correct the direction of the estimated stator flux due to the stator resistance
variation. The correction term is obtained via PI mechanism of d-axis current estimation
error. Chapter 6 also investigates the feasibility of the HF signal injection algorithm to
enhance the flux estimation of the DTFC-ISVM IPM synchronous machine drive at very
low speeds include standstill. The rotor position information is extracted from the HF
component of the q-axis current in the estimated reference frame while an HF pulsating
11
Chapter 1 Introduction
voltage is injected into the d-axis. Extensive experiments are carried out to validate the
combined observer based sensorless DTFC approach.
Chapter 7 finally gives the conclusions drawn from the thesis and some suggestions for the
future work.
References
12
Chapter 1 Introduction
[11] H. Ertl and J. W. Kolar, “A constant output current three-phase diode bridge rectifier
employing a novel “electronic smoothing inductor”,” IEEE Trans. Ind. Electron., vol.
52, no. 2, pp. 454–461, Apr. 2005.
[12] L. Li, K. Smedley, and T. Jin, “A new three-phase rectifier for regenerative braking
application,” in Proc. IEEE PESC’07, pp. 2854–2860, Jun. 2007.
[13] S. Bernet, S. Ponnaluri, and R. Teichmann, “Design and loss comparison of matrix
converters and voltage-source converters for modern AC drives,” IEEE Trans. Ind.
Electron., vol. 49, no. 2, pp. 304–314, Apr. 2002.
[14] P. W. Wheeler, J. C. Clare, L. D. Lillo, K. J. Bradley, M. Aten, C. Whitley and G.
Towers, “A comparison of the reliability of a matrix converter and a controlled
rectifier-inverter,” Conf. on EPE’05, pp. P.1–P.7, Sep. 2005.
[15] S. M. A. Cruz and M. Ferreira, “Comparison between back-to-back and matrix
converter drives under faulty conditions,” Conf. on EPE’09, pp. 1–10, Sep. 2009.
[16] D. Casadei, G. Grandi, C. Rossi, A. Trentin, and L. Zarri, “Comparison between
back-to-back and matrix converters based on thermal stress of the switches,” in Proc.
IEEE ISIE, vol. 2, pp. 1081–1086, May, 2004.
[17] D. Saltiveri, G. Asher, M. Sumner, M. Arias, and L. Romeral, “Application of the
matrix converter for the sensorless position control of permanent magnet AC
machines using high frequency injection,” Conf. on EPE’05, pp. P.1–P.10, Sep. 2005.
[18] B. Ozpineci and L. M. Tolbert, “Cycloconverters,” Department of Electrical and
Computer Engineering, University of Tennessee-Knoxville, Knoxville. [Online].
Available: http://www.uv.es/emaset/descargas/cycloconvertertutorial.pdf, [Accessed:
Jan. 31, 2010].
[19] F. Blaabjerg and P. Thoegersen, “Adjustable speed drives−future challenges and
applications,” Conf. on IPEMC’04, vol. 1, pp. 36−45, Aug. 2004.
[20] R. W. G. Bucknall, K. Doherty, and N. A. Haines, “The matrix converter: the
ultimate electric drive technology,” Trans. on IMarE, vol. 109, Part 2, pp. 161−183,
1997.
[21] P. W. Wheeler, J. Clare, L. Empringham, M. Apap, K. Bradley, C. Whitley, and G.
Towers, “A matrix converter based permanent magnet motor drive for an aircraft
actuation system,” Conf. on IEMDC’03, vol. 2, pp. 1295−1300, Jun. 2003.
[22] K. B. Lee and F. Blaabjerg, “A novel unified DTC-SVM for sensorless induction
motor drives fed by a matrix converter,” Conf. on IAS’05, vol. 4, pp. 2360−2366, Oct.
2005.
[23] P. W. Wheeler, J. C. Clare, M. Apap, L. Empringham, K. J. Pickering, and D.
Lampard, “A fully integrated 30 kW motor drive using matrix converter technology,”
Conf. on EPE’05, pp. P.1−P.9, Sept. 2005.
[24] H. Nikkhajoei and R. H. Lasseter, “Power quality enhancement of a wind-turbine
generator under variable wind speeds using matrix converter,” Conf. on PESC’08, pp.
1755−1761, Jun. 2008.
13
Chapter 1 Introduction
14
Chapter 1 Introduction
15
Chapter 2 Fundamentals and commutation issues of matrix converter
2.1 Introduction
The purpose of this chapter is to give a brief review of the main aspects concerning three-
phase to three-phase matrix converter operation and basic issues of this topology. It is
worth noting that this direct input-output connecting configuration by a 3×3 matrix of bi-
directional switches is just one of the possible matrix converter topologies [1], [2]. It begins
with the study of the matrix converter topology and the practical implementation of bi-
directional switches, followed by some other practical issues like input filter and
protections. The current commutation strategies including current and voltage controlled
commutations are investigated. Finally, a new hybrid current controlled commutation
method is presented and its effectiveness and improvement are verified by the experimental
results.
The general matrix converter is defined as a single stage converter which consists of a
matrix of m×n bidirectional power switches to directly connect an m-phase voltage source
to an n-phase load. Typically, a 3×3 matrix converter, shown in Figure 2−1, has attracted
the highest practical interest because it connects a three-phase voltage source, a standard
AC-mains, with a three-phase load, a standard motor. The corresponding mathematic
16
Chapter 2 Fundamentals and commutation issues of matrix converter
model of matrix converter can be expressed as (2−1) and (2−2), where each element in the
instantaneous transfer matrix corresponds the status of each switch cell of the matrix
converter circuit in Figure 2−1.
ªi (t )in ,a º ª S (t ) aA S (t ) aB S (t ) aC º ªi (t )o , A º
« » « « »
«i (t )in ,b » = « S (t )bA S (t )bB S (t )bC » «i (t )o ,B » (2−2)
»
«i (t ) » «¬ S (t )cA S (t )cB S (t ) cC »¼ «¬i (t )o ,C »¼
¬ in ,c ¼
Since matrix converter is a voltage-fed system at the input and a current-fed at the output,
the following two requirements must be fulfilled at any time expressed as (2−3): an output
must be connected all the time to a single input line to avoid output current interruption and
short circuit between input phases. Figure 2−2 shows a typical switching sequence in the
double-sided style in each control period.
Generally, the digital control algorithm is executed in every sampling period which is
normally the same as the switching period. Therefore, the instantaneous mathematic model
is not applicable and the duration time of each switch closed in a sampling period should be
found out by the control algorithm. Considering that the switching frequency is much
higher than either input or output frequency, an output of variable amplitude and variable
frequency can be generated by modulating the duty cycle functions in the low frequency
transfer matrix. The instantaneous model is replaced by (2−4) and (2−5), defining the duty
cycle function miJ (t ) of switch SiJ as miJ (t ) = tiJ / T , where tiJ is the closed time of the
corresponding switch and T is sampling period. All the modulation strategies aim to find
17
Chapter 2 Fundamentals and commutation issues of matrix converter
the solutions to the low-frequency transfer matrix in the mathematic model which is
discussed in detail in the next chapter.
18
Chapter 2 Fundamentals and commutation issues of matrix converter
Figure 2−3. Possible implementations of a bi-directional switch with discrete semiconductor devices.
19
Chapter 2 Fundamentals and commutation issues of matrix converter
Reverse Blocking IGBT (RB-IGBT). The RB-IGBT can block both forward and reverse
voltage in its off state but only forward current is allowed in its on state. So two such RB-
IGBTs are connected in anti-parallel to construct a BDS in a matrix converter.
Integrated power module leads to a very compact converter. The circuit layout is improved
and the stray inductance is minimized. The first all-in-one matrix module, as shown in
Figure 2−4(a), has been developed by Eupec using IGBTs connected in the common
collector configuration, seen in Figure 2−4(c) [5], [6]. An up-to 360kVA single output
phase module, as shown in Figure 2−4(b), is designed by Semelab for higher rating
application [7]. Mitsubishi has developed a full matrix converter or single phase power
circuit in a single package, as shown Figure 2−5, by simply placing every two RB-IGBTs
in anti-parallel [8]. This arrangement has the potential for substantial efficiency
improvement as well as a more compact circuit.
(a) Eupec EconoMAC three-phase module (b) Semelab one-phase matrix module
ER ES ET
R
S
T
G R1 G R2 G R3 G S1 G S2 G S3 G T1 G T2 G T3
G W1 G U2 G V3 G U1 G V2 G W3 G V1 G W2 G U3
W
V
U
EU EV EW
20
Chapter 2 Fundamentals and commutation issues of matrix converter
(a) One output phase RB-IGBT module (b) Three phase RB-IGBT module
The input filter acts as an interface between the matrix converter and AC mains to prevent
the undesired harmonic content from injecting into the AC mains. Although multi-stage
topology is preferable in order to achieve higher attenuation at the switching frequency, the
single-stage LC filter is the best alternative considering cost, size and complexity [9], [10].
Figure 2−6 shows several possible configurations of single-stage LC filters. The design of
the LC input filter has to take the following requirements into account [10].
An input filter has a cut-off frequency lower than the switching frequency of the converter.
The resonant frequency of the filter has to be positioned between the fundamental and the
switching frequency where no unwanted harmonic components exist. This restricts the
range of the product of inductance and capacitance.
21
Chapter 2 Fundamentals and commutation issues of matrix converter
1
fn < f0 = < fS , (2−6)
2π L f ⋅ C f
where L f and C f are the inductance and capacitance of the input filter and f n , f 0 and f S
are the fundamental frequency of the power grid, resonant and switching frequencies.
The second requirement is to maximize the power factor for a given minimum output
power [10]. At given output power, the displacement angle between the filter input current
and corresponding line-to-neutral voltage is proportional to the filter capacitance as can be
seen in (2−7). Thus, in order to maintain high input power factor in the whole operation
region the capacitor size has to be minimized. This typically translates into an upper limit
for filter capacitance [11].
Po min
C f max = ⋅ tan ϕ min , (2−7)
3ωnU n2
where Po min is the minimum power level where the displacement angle ϕ min reaches its
limit and U n . ωn are the rated input phase voltage and angular frequency of the power grid,
respectively. For a 380V/50Hz, 7.5kW matrix converter, the filter capacitance should not
be larger than 8.5µF in order to obtain 0.85 power factor at 10% rated power. In practical
experimental prototype, 6.6µF per phase is selected.
The input filter design has to consider different power density of film capacitors and iron
(a) Simple LC filter (b) Series damping resistors (c) Parallel damping resistors
22
Chapter 2 Fundamentals and commutation issues of matrix converter
chokes to minimize the volume and weight of the input filter [11].
S L ωn ⋅ L f ⋅ I n
2
1 §P ·
= = ⋅¨ n ¸¸ , (2−8)
SC ωn ⋅ C f ⋅U n ( 3 ⋅ ω ⋅U 2 ) ¨© C f
2 2
¹
0 n
The last but not the least requirement is to minimise the filter inductor voltage drop at rated
current in order to avoid a reduction in the voltage transfer ratio [11].
2
ΔU §I ·
= 1 − 1 − (ωn ⋅ L f )
2
⋅ ¨ n ¸ = 1 − 1 − l 2f , (2−9)
Un © Un ¹
where ΔU is the voltage drop due to the input filter and l f is the filter inductance in p.u..
Usually the cut-off frequency requirement is the preferred criterion to determine the
product of inductance and capacitance. One of other criteria is to fix the capacitance or
inductance. The filter inductance is 1.5mH when the cut-off frequency 1.6kHz is selected.
In order to reduce the level of oscillating energy accumulating in the filter inductor during
transients, parallel damping resistors are used in parallel with the filter inductors [12]−[14].
The optimum damping resistor 47Ω/5W is selected to get a damping factor [12] 0.16 for
the fixed filter capacitance (6.6µF) and inductance (1.5mH).
Similar to any other static converters, the matrix converter needs to be prevented from
failure under fault conditions. Such faults may result in over-voltage, over-current and even
short-circuit which might be destructive to its semiconductor devices. Over-current
protection needs to monitor the current by resistor sensing or current transducer. When the
detected current reaches the over-current protection level, the converter will be
immediately shut down by turning off all the switches or reduce the motor current to zero
23
Chapter 2 Fundamentals and commutation issues of matrix converter
Furthermore, the matrix converter is more sensitive and susceptible to disturbances due to
the lack of DC link energy storage elements and freewheeling paths. An over-voltage may
be caused by such disturbances as voltage spikes due to faulty commutation or parasitic
inductance, forced shutdown of the converter due to the over-current or short-circuit
failure, and possible over-voltage originated by input line perturbations. Therefore,
protection issues exist in both the grid and the motor side of matrix converter. A straight
and simple solution is to connect a capacitor clamp circuit to the input and output terminals
via two three-phase fast recovery diode bridges. A new clamp configuration uses six diodes
from the bidirectional switches and six extra diodes to achieve the same purpose as the
previous one [16]. But it requires a special arrangement of placing three common emitter
BSDs in the switch matrix with three more isolated power supplies for gate drives. An
alternative strategy replaces the clamp circuit by varistors and extra voltage suppressors to
protect each IGBT [17]. Bidirectional power zener diode provides fast clamping action
without aging problem of varistors. Since the stand-off voltage of a single power zener
diode nowadays has not reached the voltage levels in many standard industrial applications,
this method is suitable for low voltage stress applications. A solution to soft shutdown
without using a clamp circuit has been proposed by adding extra shutdown switching states
and paths in the commutation process [15].
According to the modulation algorithm, when output has to be commutated from one input
phase to another, two basic rules must be obeyed; one is that input terminals should never
be short circuited, the other is that any output phase must never be open for an inductive
load. That means no two bi-directional switches are switched on at any instant and not all
are turned off at any instant for each output phase. Therefore a reliable current
24
Chapter 2 Fundamentals and commutation issues of matrix converter
commutation between switches is crucial for matrix converters to operate safely without
causing the hazard of a short circuit or a large overvoltage. In order to determine the proper
switching sequence of the devices, either input line voltage signs or output current direction
is required to implement the commutation. According to the information that it relies on,
the commutation strategies can be classified into three categories, namely current direction
based, input voltage based and current and voltage signs based commutations. The
commutation strategies can be also classified according to the number of switching states
or the number of step delays involved in each commutation.
There are two simple commutation methods proposed for the diode bridge arrangement or
the real bidirectional switch, called dead-time commutation and overlap commutation
respectively. Either of them requires undesired extra bulky components to minimize the
hazard of power circuit, which compromises the volumetric advantage and increase losses
of matrix converter [3], [18], [19]. For these reasons, many commutations have been
attempted and found to overcome these drawbacks and applicable to practical bidirectional
switch.
25
Chapter 2 Fundamentals and commutation issues of matrix converter
2–7(a) and (b). The current direction shown in Figure 2–7 is defined as positive current.
The switches connected to the output line are called positive switches in the thesis allowing
conducting this positive current. The negative current can flow in the negative switches.
In steady state, both positive and negative switches in the active BDS are turned on
allowing both directions of current flow. In the transition, there are two freewheeling
devices within the commutating bi-directional switches, allowing the positive current to flow
outward from the lower input phase and negative current inward to the higher input phase
[19]. In Figure 2–7(b), assuming Va > Vb , switch SaA1 is a freewheeling device as well as a
positive switch and SbA2 is the freewheeling device as well as a negative switch. The voltage
sign is reversed and so are the freewheeling switches. Once the freewheeling devices have
26
Chapter 2 Fundamentals and commutation issues of matrix converter
been identified, the switching sequential steps for the commutation between any two input
lines can be staggered as follows.
The freewheeling switch of the incoming BDS is always turned off at the first step. The
non-freewheeling device of the outgoing BDS is switched off at the second step followed
by gating the other non-freewheeling device of the incoming BDS at the third step. The
load current has now commutated from the outgoing to the incoming phase. Another steady
state will be set up after the freewheeling switch of the outgoing BDS is turned off at the
last step. The switching diagram is shown in Figure 2–8(a) and (b). The actual output
current commutation instant is highlighted in the switching state diagram.
It has to be noted that the identification of freewheeling devices relies on the sign of the
voltage rather than that of the output current, but the actual output current commutation
takes place either at the second or the third step during the process depending on the output
current direction. In the case of commutation from SaA to SbA under positive line voltage,
when SbA2 is turned on, SbA2 and DbA1 are reverse biased and block the voltage Va − Vb .
The positive current is still carried by SaA2 . The current commutation doesn’t commence
until SaA2 is turned off when the reverse bias ends. If the negative current is required to
transfer from SaA to SbA , the load current is fed to Va through SaA1 and DaA2 at the first two
steps when SaA2 is turned off followed by turning on SbA2 , because neither of them can
carry negative current. But when SbA1 is gated at the third step, the transfer of output
current takes place because SbA1 remains forward bias in the process. In the similar way,
the current commutation instant under negative line voltage can be analysed and found.
It is worth noting that during such a commutating instant, the current transfer occurs when
a single switch is being turned on or off. Consequently, turn-off loss occurs in the forward
bias switch while no turn-on losses occurs in the reverse bias switch since it is turned on at
zero current.
A semi natural two-step commutation strategy, based on the input voltage measurement has
been proposed and implemented in [21]. Freewheeling switches in the commutating BDSs
27
Chapter 2 Fundamentals and commutation issues of matrix converter
are kept on to provide paths for both output current directions at every moment, either in
steady states or transitional states. The major states in the four-step commutation is eliminated
and replaced by the states with four switches on.
SaA Va > Vb
SbA
SaA1 Va < Vb
SaA2
SbA1
SbA2
T1 T2 T3 T4
$
IL < 0 IL > 0
SaA1
SaA2
IL < 0 IL > 0 "
SbA1
SbA2
Va < Vb
Va > Vb ##
SaA SbA
IL > 0 IL < 0 SbA SaA
##
##
IL > 0 IL < 0
" SaA SbA
" !
Figure 2–8. Switching diagram of the four-step voltage based commutation strategy
between two bidirectional switch cells.
28
Chapter 2 Fundamentals and commutation issues of matrix converter
Although the number of steps is halved and so is the commutation time compared to the
four-step staggered commutation strategy with a consequent positive effect on the
converter performance, it makes the commutation complicated with more different
switching states involved.
It is noted that the precise detection of voltage sign is critical at zero crossing of phase-to-
phase voltages between the involved BDSs, since the poorly selected switching sequence
during a commutation process will short circuit the commutating phases [23]. An extra
hardware sign detector can be used at the expense of converter cost increase which is not
desired. In order to completely remove the risk of a short circuit, there are several
possibilities to manage the commutation in the critical area. The simplest way is to prohibit
a critical commutation sequence until the voltages differ enough from each other. Little
effect can be observed on the output because the voltages are very close. But the shape of
the input current is distorted because the expected switching states are not executed.
Current direction information can help in most of cases except the situations in which both
signs are unsure. As a result, the prohibition has to be turn to. Another effective way is to
take the place of a critical sequence by two uncritical sequences. Two extra sequences is
inserted between the critical one which commutates to the remaining third phase and then
back to the desired target phase. The insertion of two extra sequences increases the number
of switchings and thus the switching losses. The output voltage and input current will be
affected in a critical area, especially at low output voltage. To avoid the disadvantages due
to the insertion of extra undesired sequences, a better solution is proposed in [23]. The
sequence of switching configurations is properly selected and zero switching configuration
is located between the critical switching configurations. In this way the critical
commutation is avoided without affecting input-output modulation performance or
increasing the losses except that the zero switching has to be used even though it actually
doesn’t need. A modified modulation or an over-modulation is not allowed.
29
Chapter 2 Fundamentals and commutation issues of matrix converter
freewheeling paths turned on in this method. The direction of the output current flowing
through the commutating BDS is the control object. A simplified commutation circuit
shown in Figure 2–7 is helpful to explain this strategy.
In four-step current based commutation, both of the IGBTs in the active BDS are turned on
in steady states to allow both directions of current flow. Figure 2–9(a) shows the timing
diagram of two commutations taking place in output current zero crossing area, where the
output current is transferred between BDS SaA and SbA . There are three time delays for the
first three steps, since the last turned-on switch would be turned off first in next
commutation process. It would not cause any hazard even if it failed to be turned on before
the new commutation commenced. The actual commutation instants are marked in the
switching states diagram shown in Figure 2–9(b). It can be seen that they occur either at the
second or third step depending on the voltages connected to the two commutating BDSs.
The following explanation assumes a positive load current in the direction shown in Figure
2–7(a) and initial steady state that BDS SaA is closed. When a commutation to SbA is
required, the current direction is used to determine which device in the active BDS is idle
without conducting current, SaA1 in this case. The command to turn it off is then sent out
immediately. After a short time to complete turn-off, SbA2 is turned on. If Va < Vb , the
current is transferred from S aA2 to SbA2 at this point. The turn-on losses occur in SbA2 and
DbA1 during the current commutation, while no switching losses are incurred in BDS SaA
due to zero current turn-off of both SaA1 and S aA2 . It is different from the commutation
condition when Va > Vb . The transfer will take place when the outgoing device S aA2 is
being turned off instead. And BDS SbA is free of switching losses while turn-off of S aA2
incurs losses. The fact that one of BDSs has switching losses, the other doesn’t, accounts
for the term semi-soft commutation. At last, the remaining device in the incoming BDS
SbA1 is turned on to allow current reversal. The delay between each switching event is
determined by the device switching characteristics and gate drive propagation delays.
It can be noticed that there are two idle switches operated during the commutation process
which create two additional steps. Reduction of the number of steps, i.e. a faster
30
Chapter 2 Fundamentals and commutation issues of matrix converter
commutation process, can decrease the limit to the minimum time interval for which an
output phase can be connected to an input phase and hence the width of the control
discontinuity within the linear operating region of the matrix converter. Consequently, two
$
Va > Vb Va < Vb
SaA1
SaA2
"
Va > Vb Va < Vb SbA1
SbA2
IL < 0
IL > 0 ##
Va < Vb Va > Vb SaA SbA
SbA SaA
##
##
Va < Vb Va > Vb
" SaA SbA
" !
Figure 2–9. Switching diagram of the four-step current direction based commutation
strategy between two bidirectional switch cells.
31
Chapter 2 Fundamentals and commutation issues of matrix converter
Va > Vb Va < Vb
SaA1
SaA2
Va > Vb Va < Vb SbA1
I L < −ΔI Z SbA2
IL < 0
SaA SbA
Va < Vb Va > Vb
32
Chapter 2 Fundamentals and commutation issues of matrix converter
current based commutation is never to operate the non-conducting IGBTs during the
commutation process. In steady states only the carrying current IGBT is closed in the target
BDS. There is a potential problem in the critical area where the current is close to zero. It is
difficult to get a precise sign of the current without adding additional hardware. One of the
solutions is to insert a dead zone at zero crossing point where no commutation is allowed
after turning on the non-conducting IGBT of the target BSD for reverse current. The
current transfers between the two IGBTs of the same BDS without changing the input
phase, which is called “Inter-Switch Commutation” [24]. The normal operation isn’t
resumed until the current exceeds this problematic area. A small predefined threshold
value ΔI Z determines the width of the inter-switch commutation area. When the current
is over the positive threshold, only the positive switches, S aA 2 and SbA 2 are gated. When
a commutation from S aA to SbA is required, the incoming positive IGBT SbA 2 is gated a
short time before the outgoing positive IGBT S aA2 is turned off. Similarly, when the
output current is lower than the negative threshold, only the negative current conducting
IGBTs, S aA1 and SbA1 , are operated during the commutation process. When the output
current falls within the threshold band, inter-switch commutation will be performed.
Va > Vb Va < Vb
SaA1
SaA2
Va > Vb Va < Vb
SbA1
IL < 0 SbA2
IL ≈ 0
SaA SbA
IL > 0 SbA SaA
Va < Vb Va > Vb
SaA SbA
Va < Vb Va > Vb
33
Chapter 2 Fundamentals and commutation issues of matrix converter
But the prohibition of phase commutation within the threshold will degrade output current
and voltage to some extent, which are even poorer when the current measurement has a big
offset or out of control when the output current is too small to exceed the threshold. The
dead-time commutation can be applied to enhance the threshold commutation. The two
devices of the outgoing switch are turned off followed by the incoming switch turned on a
short time later. There is transitional state with all switches open. This is not desired
because the output current is interrupted during the dead time when the output current
threshold value is big in high rating converters.
The current direction and threshold rely on the accuracy of the current transducer output
which is necessary in the matrix converter control system. The inter-switch commutation
area can be minimized by a significantly improved current direction detection coupled with
the gate drive level intelligence for independent management of the current commutation.
The current sign is detected by monitoring the polarity of the voltage drop of each IGBT
within every BDS. This information is calculated by the active gate drive circuit and passed
on to all the gate drivers attached to the IGBTs on the same output phase through a
communication loop. A potential hazard is avoided with a simple dead time commutation
when the current is about to reverse. It does not unduly distort the current waveforms,
because the dead time is so short ( ≈250 ns) and breaking a current at the zero crossing does
not cause significant overvoltage [4], [25]. In Figure 2–11, the modified switching diagram
is shown. The inter-switch commutation is eliminated from the state diagram and phase
commutation at zero crossing point is allowed in two steps with a short dead-time
depending on the propagation delay.
Although this improved two-step commutation strategy performs fast and safe
commutations, it needs to monitor the collector-emitter voltages with gate drive level
circuit. It also requires more isolation circuit like optocoupler between the decision unit and
current detection unit. It does increase the cost of the converter and the propagation delay
of current direction passing in the communication loop.
34
Chapter 2 Fundamentals and commutation issues of matrix converter
Figure 2–12 shows the switching diagram of the proposed commutation strategy
considering the commutations between the first two input phases of one output circuit in
Figure 2–13. There are three situations to be considered in terms of four-step commutation,
two-step commutation and transitional commutation between them. When the current is
over the threshold level, black arrows pointed states will be processed in sequence. The
upper states are for negative current including two steady states and one transitional state in
which only the negative switches are gated. The lower states are for positive current. When
the commutated current is within the threshold band but still positive, the remaining lower
states will be involved in commutation sequences following the pink arrow paths. Since
they have different states involved in the commutation sequence, the transition between the
35
Chapter 2 Fundamentals and commutation issues of matrix converter
two-step and four-step execution should be taken into account, in which there exist three
cases.
• Case 2: Commutation is required in the transition when the current is crossing the
threshold and is about to exceed the threshold. The regular four-step commutation
will be executed without the last step to turn on the non-conducting device because
the current direction is surely either positive or negative.
• Case 3: Commutation is required in the transition when the current is crossing the
threshold and is about to located within the threshold band. The first of four steps of
the regular commutation is omitted because the non-conduction device is never
turned on before by the previous commutation.
A commutation strategy can be clearly represented by finite state machine (FSM) for the
case of three input phases and one output line in Figure 2−13. Figure 2−14 shows the
diagram of FSM of the four-step current-controlled commutation. The switching
combinations corresponding to three steady states, one zero state and fifteen transition
states used in four non-commutation loops and twelve commutation loops are given in
Table 2−1. The input of FSM includes timer-finished bit, current direction bit and
commutation command to connect one of the phases to the output line and the output is
switching signal for individual device. It can be seen that commutation command contains
one and only one active bit which indicates the incoming phase to be commutated. Three
timers are used to create step delays during the commutation process. The value depends on
the turn-on and turn-off time of the device and the level of the current to be commutated if
a variable step length is used. The completion signal of the current commutation is sent out
36
Chapter 2 Fundamentals and commutation issues of matrix converter
Va > Vb Va < Vb
I L < −ΔI Z
SaA1
SaA2
Va > Vb Va < Vb SbA1
SbA2
IL < 0
IL > 0
SaA SbA
SbA SaA
Va < Vb Va > Vb
SaX1 SaX2
Va
DaX1 DaX2
SaX
SbX1 SbX2 IL
Vb
' D bX1 D bX2
SbX %&
ScX1 ScX2
Vc
DcX1 DcX2
ScX
Figure 2–13. Three phase (input) to single phase (output) matrix converter.
37
Chapter 2 Fundamentals and commutation issues of matrix converter
Comparing to the four-step commutation strategy in Figure 2−14, the proposed hybrid
commutation scheme does not increase the complexity of hardware, as the threshold can be
also determined by the measuring current software. As shown in Figure 2−15, the
Sa S S
b cT
C2
C1
Sa S
T
c
S
2
b TC b Sc T
S
a Sc
S
C1
S b
S a
S a Sb ScTC1 S a Sb ScTC 2
S cT C2
S aS b
S a Sb ScTC 2 S a Sb ScTC1
TC 1
S bS c
cD
cD
b cD
b cD
S a Sb ScTC 3
Sa
a Sb S
a Sb S
C3
Sa S S
Sa S S
b cT
C1
or S
or S
Sc T
Sa S S
b
Sa S
S a Sb S c
S a Sb S c
C2
cT
bS
Sa S
TC 3
S S cD
S S cD
TC 3
S aS bS c
D
D
S a S bS c
or S a b
or S a b
S aS bS c
S aS bS c
S a Sb ScTC1 S a Sb ScTC 2
or S a Sb Sc D
S a Sb S c D
S a Sb ScTC 3
S a Sb ScTC 2 S a Sb ScTC1
S a Sb ScTC1
S a Sb ScTC 2
C2
Sc T
S a Sb S c
C1
Sc T
b
Sa S
b
Sa S
Sa S
b Sc T
RESET
C3
S a Sb ScTC 2
OC or
Sa Sb ScTC1
S cT C
1
Sa S S aS b
b Sc D
or
S a Sb Sc
S a Sb S
S cT C
2
c D S b
Sa
Figure 2–14. Diagram of the Finite State Machine of four-step current commutation for one
output phase x of matrix converter.
38
Chapter 2 Fundamentals and commutation issues of matrix converter
modification to FSM is just to add more possibilities, as there are two more bits included in
the input indicating the current changing with respect to the threshold. It is divided into
positive current commutations and negative ones. States, paths and commands inside the
iL > 0
iL < 0
iL≈
0
Figure 2–15. Diagram of the Finite State Machine of hybrid current commutation for one
output phase X of matrix converter.
39
Chapter 2 Fundamentals and commutation issues of matrix converter
+
S a , Sb , S c $$
TC1 , TC 2 , TC 3 #
D
OC 12 $
ENDX 3 ##
red circle are for the current flowing outward from input to output. Inside is for the
reversed current from output to input. The following explanation assumes that the load
current is positive and even bigger than the threshold and that the current is required to be
transferred from phase a to phase b. Initially, positive switch S aX 2 of BDS is closed and
current flows from voltage source a to the load through it. Once the FSM unit gets the
commutation command “010111”, SbX 2 is turned on immediately. After a short delay by
timer 2, the steady state S6 is reached. If the current is smaller than the negative threshold,
the switching sequence is changed to S2−S3-S4 instead of S8−S7−S6 with only negative
switches gated. It is easy to derive the sequence between other phases in the same way. If
there is no commutation, the FSM remains in the steady states S2, S4 and S12 for negative
40
Chapter 2 Fundamentals and commutation issues of matrix converter
current and in S6, S8 and S10 for positive current. If the current is within the threshold
band, the last two bits of the received command are both zeros. The steady states in orange
circle should be added in the regular four-step commutation sequences. When the current is
about to exceed the threshold, the idle switch of the active BDS S aX 1 is turned off
immediately preparing for the prospective two-step commutation. The FSM will stay in the
Four-step commutation
20 Proposed commutation
15
THD(%)
10
0 10
70 20
60 50 z)
40 30
30
n cy (H
Volta g 20 que
e(V) 10 40 Fre
6
THD(%)
0
10
20
Fre20
que
n cy( 30 40
)
Hz) g e( V
60 Volt a
40
Figure 2–16. Comparison of output current THD with four-step commutation and the
proposed current commutation
41
Chapter 2 Fundamentals and commutation issues of matrix converter
Figure 2–17. Output current (ch4: 2A/div), current threshold (ch1: 2V/div) and current
direction (ch2: 5V/div) waveforms of two commutations at 35V and 25Hz output voltage.
42
Chapter 2 Fundamentals and commutation issues of matrix converter
steady state will be changed from S1 to S8 for positive current or to S2 for negative current
by turning on the redundant switch preparing for four-step commutation within the
threshold. The total delay time of four-step commutation should be set the same as that of
Figure 2–18. Output current (ch4: 5A/div), current threshold (ch1: 2V/div), and current
direction (ch2: 5V/div) waveforms of proposed hybrid commutation at 70V and 25Hz
output voltage.
43
Chapter 2 Fundamentals and commutation issues of matrix converter
two-step commutation, since no much switching time is needed for several tens of million
ampere current. As a result, the minimum applying time of a switching configuration is
decreased by one half. That means the control continuity can reach even smaller vectors.
Figure 2–19. A quarter cycle of output current (ch4), current threshold (ch1: 2V/div) and
current direction (ch2: 5V/div) waveforms of proposed hybrid commutation.
44
Chapter 2 Fundamentals and commutation issues of matrix converter
In the thesis, two commutation strategies are implemented (see Chapter 4 for experimental
set-up) to confirm the improvement of the new hybrid current controlled commutation
scheme which can be seen in Figure 2-16. In Figure 2-16(a), the Total Harmonic
Distortions (THDs) of two schemes are compared. It can be obviously identified that the
THD of output current under regular four-step scheme is higher than that of the proposed
scheme over the whole testing range of frequency and voltage. It is also noted that the
THDs for both schemes are increased with the output voltage dropping, as the applied
durations for active switching configurations reduce. How much the new method improves
the output current is illustrated in Figure 2−16(b). The lower the output voltage is, the more
improvement is achieved except that there is a 4% drop around 10V due to the more steps
of four-step commutation at this current level. Figure 2−17 to Figure 2−18 show the
comparison of the output current with proposed commutation and that of four-step
commutation at 35V, 25Hz and 70V, 25Hz output voltages respectively. The current
direction and threshold signals against the current waveform imply the different
commutation conditions and methods. When they are logic-high, two-step positive current
commutation is performed. When the threshold falls to logic-low, four-step dominates the
commutation. When both fall to logic-low the two-step negative commutation is activated.
Comparing two current waveforms with their relevant harmonic spectrums, the current with
four-step scheme has more distortions with higher amplitude of two dominant harmonic
components at 5kHz and 10 kHz which is related to the switching frequency. Figure 19
shows the smooth transition between the two schemes.
2.6 Conclusion
This chapter highlights some interesting features of the matrix converter, such as simple
and compact power circuit, sinusoidal input and output currents, operation with unity
power factor for any load and inherent regeneration capability. However, there were still
some potential problems preventing its commercial exploitation. During the past two
decades, several solutions have been found on input filter design, overvoltage protection
and realization of BDS. New power modules for matrix converter application have been
45
Chapter 2 Fundamentals and commutation issues of matrix converter
designed and manufactured by some companies [5]−[8]. The BDS commutation issue was
solved by multi-step commutation strategies [21]−[23].
In this chapter, several commutation strategies based on either the relative magnitude of the
commutating voltages or the direction of the output current have been reviewed and
discussed. A new hybrid current-based commutation strategy has been presented. This
strategy executes a general four-step commutation and relies on the sign of the
commutating load current within a preset threshold band close to zero-crossing current. The
output current direction is ensured over the positive or negative threshold, so a two-step
current commutation process is performed. The advantage of the proposed new strategy,
compared to four-step strategies, is that a faster commutation process is achieved and thus
the distortion of the output caused by the pulse width limit and commutation delay is
attenuated. Furthermore, the two-step commutation can be reduced to a single step
commutation by omitting time delay before turning off and four-step reduced to three-step
by merging the second and third step into one, considering the property that the turn-off
delay time is greater than the turn-on delay of nearly all power semiconductor devices
under all possible operating conditions. Some details on implementation of this strategy on
a programmable logic device have been given by finite state machine diagram. The
comparison between the proposed strategy and four-step commutation strategy is made by
means of output current THDs. The improvement has been confirmed by the experimental
results.
References
46
Chapter 2 Fundamentals and commutation issues of matrix converter
47
Chapter 2 Fundamentals and commutation issues of matrix converter
48
Chapter 3 Modulation strategies
3.1 Introduction
The original control theory of matrix converter proposed by Gjugyi in the middle of 1970s
was mathematically verified by Alesina and Venturini at the beginning of 1980s. The low
frequency modulation duty-cycle matrix was firstly introduced to replace the switching
function provided that the switching frequency is sufficiently high, referred as the AV
method. Although the maximum voltage transfer ratio of this algorithm is limited to 0.5,
the full control of the output voltage and the input power factor has been achieved [1].
Alesina and Venturini gave a general solution of matrix for n×p converters and investigated
the case of three-to-three matrix converter. By the end of 1980s, an improvement on
maximum transfer ratio has been made by adding common mode voltages into the target
outputs by these two researchers. It was proved that the theoretically achievable maximum
ratio of the three-to-three matrix converter is 0.866 (or 3 / 2 ). The maximum ratio of this
optimum AV method is achieved by redistributing the zero switching states with all output
lines connected to the same input line.
The scalar modulation algorithm by Roy and April [2] is typical of a number of
modulations which uses the instantaneous ratio of specific input phase voltages to generate
the active time of the matrix switch. The scalar modulation is valid at theoretical transfer
ratio with adjustable input power factor independent of load displacement factor. The main
disadvantage of this algorithm is that it relies on accurate knowledge of the three-phase
input voltages because of the way that three variable subscripts are assigned to the input
49
Chapter 3 Modulation strategies
phases [3]. Based on the duty-cycle matrix approach, Holmes worked out an elegant
mathematical expression of the unified modulation and investigated it for voltage and
current source inverters [4], [5].
A comprehensive discussion of the SVM and its relationship to other methods is provided
in another paper by Casadei et al [8]. This duty-cycle space vector based modulation
technique, owing to the intrinsic two degrees of freedom, represents the general solution to
the modulation problem of matrix converters and is considered as the best solution
allowing the highest voltage transfer ratio and the optimized switching pattern through a
suitable use of zero configurations [8].
A novel loss reduced modulation strategy is derived from the direct SVM and assessed on
the basis of harmonic flux [12], [13]. In this thesis, the principle of the modified
modulation is demonstrated in detail using Indirect SVM theory, quite easily understood.
The performance is evaluated on the basis of Total Harmonic Distortion (THD).
In the following sections, the abovementioned modulation strategies are further discussed.
50
Chapter 3 Modulation strategies
This strategy allows the control of the output voltages and input power factor based on the
duty-cycle matrix approach. The computation of nine duty cycles in the transfer matrix in
(2−1) and (2−2) can be expressed in terms of input and target output voltages by the
following equation assuming the unity input power factor [1], [3].
tiJ 1 ª 2vi vJ º
miJ = = 1 + 2 » ( i = a, b, c; J = A, B, C ) , (3−1)
T 3 «¬ Vim ¼
where Vim is the magnitude of the input voltage, vi and vJ represent the specific input
voltage and target output voltage. Considering the constraint maJ + mbJ + mcJ = 1 , six duty
An injection of a third harmonic of input and output voltages in the reference output
voltages (3−2) can fit the output voltage within the input voltage envelope with a voltage
transfer ratio up to 0.866 [3], [14].
ª 2π º 1 1
vJ = Vom sin «ωot + ( k − 1) » − Vom sin ( 3ωot ) + Vim sin ( 3ωint ) for k = 1, 2,3 (3−2)
¬ 3 ¼ 6 4
where Vom is the magnitude of the reference output voltage and ωin , ωo are the angular
frequencies of input and output voltages.
The formal solution including the input displacement factor control in [14] can be simply
described as (3−3) for the real-time application [3], as the unity input power factor is
required.
51
Chapter 3 Modulation strategies
tiJ 1 ª 2vi vJ 4q º
miJ = = «1 + 2 + sin(ωin t + β i )sin(3ωin t ) » , (3−3)
T 3¬ Vim 3 3 ¼
where q = Vom / Vim is the transfer ratio and β i = 0, 2π / 3, 4π / 3 is the phase angle of
It is noted that the input power factor is controlled by inserting a phase shift between the
measured input voltages and vi into (3−3) at the expense of maximum voltage ratio. And
the injected third harmonic addition just moves the common point of output voltage
waveforms with respect to the neutral point of the input voltage. However, it doesn’t have
any effect on the output line-to-line voltages and neither on the load currents since there is
no neutral connection between the input and load [3].
The motivation behind scalar modulation is usually given as the perceived complexity of
the Venturini method [3]. The active times for the three switches associated with the
required output voltage rely on measuring of instantaneous input voltages and assigning K-
L-M variable subscripts to the input phases according to the rules below [2].
• Rule 1: At any instant, assign subscript “M” to the input which has a polarity
different from the other two.
• Rule 2: Assign subscript “L” to the smaller (in absolute value) one of the two
remaining phases. The third input is assigned by subscript “K”.
The duty cycles are given by (3−4) and the corresponding output voltage is then expressed
by (3−5).
(vJ − vM )vL (v − v )v (v − v ) v
mLJ = 2
, mKJ = J M2 K , mMJ = J M2 M for J = A, B, C (3−4)
1.5Vim 1.5Vim 1.5Vim
52
Chapter 3 Modulation strategies
In the similar way to optimum AV method, common mode addition is superposed over the
target output voltage to achieve 0.866 transfer ratio. The modulation duty cycles can also
be expressed in the similar form (3−6).
1 ª 2v v 2 º
miJ = «1 + i 2 J + sin(ωin t + β i ) sin(3ωin t ) » (3−6)
3¬ Vim 3 ¼
It is noted that the only difference from the AV method is that the last term is prorated with
voltage ratio in AV method but fixed at maximum value in the scalar method [2].
In direct SVM algorithm, the instantaneous input current displacement angle, as well as the
output voltage vector, is taken as reference quantity at each sampling period, as shown in
Figure 3-1. The control of input displacement factor can be achieved by controlling the
input current phase angle β i , as the input voltage phase angle is known by measurement.
2π 3 π 2
ωi ≠ 0
vo ωo ≠ 0 ii
αo βi
7π 6 −π 6
4π 3
Figure 3-1. Direct SVM of output voltage vector and input current displacement angle.
53
Chapter 3 Modulation strategies
Switch
A B C v AB vBC vCA ia ib ic vo αo ii βi
Config
+1 a b b vab 0 −vab iA −iA 0 2 / 3 ⋅ vab 0 2 / 3 ⋅ iA −π / 6
−1 b a a −vab 0 vab −iA iA 0 −2 / 3 ⋅ vab 0 −2 / 3 ⋅ iA −π / 6
+2 b c c vbc 0 −vbc 0 iA −iA 2 / 3 ⋅ vbc 0 2 / 3 ⋅ iA π /2
−2 c b b −vbc 0 vbc 0 −iA iA −2 / 3 ⋅ vbc 0 −2 / 3 ⋅ iA π /2
+3 c a a vca 0 −vca −iA 0 iA 2 / 3 ⋅ vca 0 2 / 3 ⋅ iA 7π / 6
−3 a c c −vca 0 vca iA 0 −iA −2 / 3 ⋅ vca 0 −2 / 3 ⋅ iA 7π / 6
+4 b a b −vab vab 0 iB −iB 0 2 / 3 ⋅ vab 2π / 3 2 / 3 ⋅ iB −π / 6
−4 a b a vab −vab 0 −iB iB 0 −2 / 3 ⋅ vab 2π / 3 −2 / 3 ⋅ iB −π / 6
+5 c b c −vbc vbc 0 0 iB −iB 2 / 3 ⋅ vbc 2π / 3 2 / 3 ⋅ iB π /2
−5 b c b vbc −vbc 0 0 −iB iB −2 / 3 ⋅ vbc 2π / 3 −2 / 3 ⋅ iB π /2
+6 a c a −vca vca 0 −iB 0 iB 2 / 3 ⋅ vca 2π / 3 2 / 3 ⋅ iB 7π / 6
−6 c a c vca −vca 0 iB 0 −iB −2 / 3 ⋅ vca 2π / 3 −2 / 3 ⋅ iB 7π / 6
+7 b b a 0 −vab vab iC −iC 0 2 / 3 ⋅ vab 4π / 3 2 / 3 ⋅ iC −π / 6
−7 a a b 0 vab −vab −iC iC 0 −2 / 3 ⋅ vab 4π / 3 −2 / 3 ⋅ iC −π / 6
+8 c c b 0 −vbc vbc 0 iC −iC 2 / 3 ⋅ vbc 4π / 3 2 / 3 ⋅ iC π /2
−8 b b c 0 vbc −vbc 0 −iC iC −2 / 3 ⋅ vbc 4π / 3 −2 / 3 ⋅ iC π /2
+9 a a c 0 −vca vca −iC 0 iC 2 / 3 ⋅ vca 4π / 3 2 / 3 ⋅ iC 7π / 6
−9 c c a 0 vca −vca iC 0 −iC −2 / 3 ⋅ vca 4π / 3 −2 / 3 ⋅ iC 7π / 6
01 a a a 0 0 0 0 0 0 0 − 0 −
02 b b b 0 0 0 0 0 0 0 − 0 −
03 c c c 0 0 0 0 0 0 0 − 0 −
The duration of the selected switching configurations, known as vector duty-cycles, are
calculated in (3-7) to (3-11) [6], [7]. The vector duty-cycles are then assigned to four active
and up to three zero configurations selected from Table 3-1. The procedure of converting
vector duty-cycles into active switching configuration duty-cycles is accomplished
according to Table 3-2. For instance, sector pair of (I, 1) or (IV, 4) determines that the
active switching configurations +9, -7, -3, and +1 are to be used in the synthesis of vectors.
Zero configurations are applied to complete the cycle period. There are three zero
54
Chapter 3 Modulation strategies
Table 3-2 Selection of switching configurations for each combination of output and input
vector sectors
configurations available in Table 3-1. Different ways to utilize the three zero configurations
define different switching patterns, which are characterized by different behaviours in
terms of the ripple in input and output quantities.
d 0 = 1 − ( d1 + d 2 + d 3 + d 4 ) (3-11)
55
Chapter 3 Modulation strategies
where αo and βi are the output voltage and input current phase angles with respect to the
displacement angle, and q = vo / vin is the voltage transfer ratio. The following angle
π π π π π π
− < αo < , − < βi < and − < ϕi < (3-12)
6 6 6 6 2 2
The motivation behind indirect modulation is to derive a control algorithm for matrix
converter from the known PWM strategies for conventional converters. By imaginatively
splitting the matrix converter into rectifier stage and inverter stage as shown in Figure 3-2,
the input current vector and output voltage vector are synthesized independently and then
the two modulation results are combined to complete the modulation for the entire matrix
converter [9]−[11]. In this way, it is easier to understand and implement the modulation
algorithm, since the PWM methods for rectifier and inverter are well established. Moreover
it is possible to apply many control algorithms for PWM inverter fed motors straightway to
matrix converter drives with sinusoidal input current and instantaneous input power factor
control.
Up
I DC +
S1 S3 S5 S7 S9 S11
ia iA
va
ib iB
vb U pn
ic iC
vc
S2 S4 S6 S8 S10 S12
I DC -
Un
56
Chapter 3 Modulation strategies
The rectifier stage in the equivalent circuit in Figure 3-2 can be assumed to be a stand alone
current source rectifier (CSR) to provide a constant virtual dc-link voltage, U pn , loaded by
ªv º
ªU p º ª S1 S3 S5 º « a »
«U » = « S v
S6 »¼ « b »
(3-13)
¬ n¼ ¬ 2 S4
«¬ vc »¼
ªia º ª S1 S2 º
«i » = « S ªI º
« b» « 3 S 4 »» « dc + » (3-14)
I
«¬ ic »¼ «¬ S5 S6 »¼ ¬ dc − ¼
To avoid an open circuit at the dc link or short circuit at input lines, the rectifier switches,
S1 S6 , can only have nine allowable switching combinations with a single switch closed
respectively from the top and bottom three. The nine combinations can be divided into six
active input current vectors I1 I 6 and three zero vectors with the closed switches
connected to the same phase. The possible switch states and the relevant current space
vectors are shown in Figure 3-3(a). The magnitude of the current vector is 2 / 3I DC + and
I3
vb th
)
+1 I k +1
(k
I4 I2
dδ I δ
I in* Vin*
θ in* va
ϕin
θ *
in I in*
I5 I1
k th
dγ I γ
vc
I6 Ik
(a) Input current vector hexagon (b) Synthesis of input current vector
Figure 3-3. Input vector modulation in the rectifier stage using ISVM.
57
Chapter 3 Modulation strategies
For instance, the modulation requires vector I1[ab] , which implies that S1 and S4 are
closed to create U pn with va and vb at this instant. Its vector magnitude and phase angle
2π 4π
2§ j j ·
I1 = ¨ ia + ib ⋅ e 3 + ic ⋅ e 3 ¸
3© ¹
2π 4π
2§ j j ·
= ¨ I DC − I DC ⋅ e 3 + 0 ⋅ e 3 ¸ (3-15)
3© ¹
π
2 −j
= I DC ⋅ e 6
3
Based on the space vector modulation theory, the reference input current vector I in* is
synthesized by employing the adjacent switching vectors Iγ and Iδ for durations of dγ and
dδ respectively. The input currents are considered constant during a short switching
interval TS which is much shorter than that for the fundamental frequency of the currents.
The active vectors are selected according to the location of the input current vector in the
hexagon in a complex plane as shown in Figure 3-3(a). According to the law of sines
applied to triangle ΔOAB in Figure 3-3(b), the following equations are obtained.
dδ I δ dγ I γ I in*
= = (3-16)
sin ∠BOA sin ∠OBA sin ∠OAB
58
Chapter 3 Modulation strategies
where current modulation index mC = I in* / I DC is between zero and one, the relative input
voltage vector position inside the corresponding sector θin* = θin − π / 3 ⋅ trunc(θin / π / 3) . The
average virtual dc-link current is deduced on the basis that dc power flow is equal to output
power at any instant.
3 Vo*
I dc = I o ⋅ cos(ϕ out )
2 U pn
3
I dc = I o mV cos(ϕout ) (3-20)
2
where I o , Vo* are the magnitude of output current and voltage, ϕ out is the load
displacement angle and mV is the voltage modulation index. The rectifier stage has to
generate a dc-link voltage from the input voltages and draw sinusoidal input currents by
synchronizing the input current vector with the input voltage vector with an adjustable
displacement angle. For instance, assuming the input current vector in sector I, the
relationship between input and dc-link can be described as follows.
ª va º
ªU p º § ª1 0 0 º ª1 0 0º · « »
«U » = ¨ d γ «0 1 0» + d δ « 0 0 1 » ¸ « vb » (3-21)
¬ n¼ © ¬ ¼ ¬ ¼¹ v
«¬ c »¼
ªia º § ª1 0 º ª1 0 º ·
«i » = d ⋅ I + d ⋅ I = ¨ d ¸ ªI º
¨ γ ⋅ « 0 1» + dδ ⋅ «0 0» ¸ ⋅ « dc + » (3-22)
« b» γ 1 δ 2 « » « »
«¬ 0 1 »¼ ¹¸ ¬
¨ I dc − ¼
«¬ ic »¼ © «¬0 0»¼
It can be seen that the modulation for the entire matrix converter can be deduced by
working out the relationship between the output and the dc-link in VSI stage. Considering
the inverter part of the equivalent circuit as a conventional voltage source inverter by a
virtual dc-link, the conventional SVM for VSI is straightway applied to the inverter stage.
In the exactly same way as SVM-VSI to synthesize the target output voltage as shown in
Figure 3-4, the duty cycles of the adjacent active vectors are calculated by
59
Chapter 3 Modulation strategies
where θo* is the reference output voltage angle referring to the bisecting line of the
corresponding sector. The voltage modulation index defines the desired voltage transfer
ratio as
3 ⋅ Vo*
mV = , 0 ≤ mV ≤ 1 (3-25)
U pn
The averaged virtual dc-link voltage can be found based on the power flow equation since
there is no energy storage and ideal switches are assumed in the converter.
3 * I in
U pn = Vin ⋅ cos(ϕ in )
2 I dc
2 Vo*
mV mC = (3-26)
3 cos(ϕ in ) Vin*
where ϕin is the input displacement angle between input voltage and current vectors. In
order to get a maximum transfer ratio, rectifier stage usually operates under unity input
power factor and the maximum modulation index. The dc-link voltage is simply related to
the magnitude of input phase voltage.
3 *
U pn = Vin (3-27)
2
For instance, when the output voltage vector is located in sector 1, the mean value of the
output voltages and dc-link current in a short instant can be written as follows.
60
Chapter 3 Modulation strategies
ªiA º
ª I dc + º § ª1 0 0º ª1 1 0 º · « »
« I » = ¨ dα «0 1 1 » + d β « 0 0 1 » ¸ « iB » (3-28)
¬ dc − ¼ © ¬ ¼ ¬ ¼¹ i
«¬ C »¼
ªvA º § ª1 0º ª1 0º ·
« v » = d ⋅V + d ⋅ V = ¨ d ⋅ «0 1» + d ¸ ªU º
¨ α « ⋅ 1 0» ¸ ⋅ « p »
« (3-29)
« B» α 1 β 2 » β « » Un
«¬ vC »¼ ¨
© «
¬ 0 1»
¼ «¬0 1»¼ ¹¸ ¬ ¼
The modulation algorithm for the nine-switch matrix converter is finally deduced by
merging the two independent space vector modulations into one. By substituting the virtual
dc-link voltages, U p and U n , obtained from the CSR modulation into VSI modulation
equation, the relationship between the input and output can be established. Taking it as an
example that both current and voltage are in the first sector, the output voltages and input
currents can be expressed by input voltages and output currents respectively as (3−30) and
(3−31) substituting (3−21) into (3−29) and (3−28) into (3−22). Figure 3-5 shows the
graphical switch states of the equivalent circuit and the corresponding physical BDS states
of the original matrix converter when both input and output vectors are in the first sector. It
is just one of the four active states involved in this modulation sequence, which is applied
for a duty cycle dα d γ . In this way, the indirect SVM for the entire matrix converter can be
obtained by employing the inverter SVM sequentially with two virtual DC-link amplitudes.
V3 V2 Vk +1
+ 1 th
)
VO*
(k
d β Vβ
θ *
o
VO*
V4 V1
k th
θ o* dα Vα
Vk
V5 V6
(a) Output voltage vector hexagon (b) Synthesis of output voltage vector
Figure 3-4. Output vector modulation in the inverter stage using ISVM.
61
Chapter 3 Modulation strategies
The DC-link is established by the input line voltages determined by the two input current
vectors Iγ and Iδ applied during dγ and dδ for rectifier SVM, respectively. Therefore,
two output voltage vectors Vα and Vβ are applied to synthesize the desired output voltage
when the first current vector Iγ is applied. Two vector pairs Vα − Iγ and Vβ − I γ are
created and applied in the first duration dγ TS . Similarly, two new vector pairs Vα − Iδ and
Vβ − I δ are created and applied in the second duration dδ TS when the second current vector
Iδ is applied. There are four duty cycles for the four new active vector pairs, corresponding
to four active switching states selected from Table 3-3, applied to realize ISVM for the
matrix converter. To minimize the number of commutations, the sequence follows a U-
shape when the sum of current and voltage sectors is even. Otherwise, an inverted U-shape
is followed. For an arbitrary sector location of output and input vectors, the duty cycles of
the combined active vectors are now derived from the products of the vector duty cycles
((3-18) to (3-19)) in rectifier and inverter stages and substituting (3-26) into the results.
Zero vectors (3-36) are used to complete the sampling period TS .
ªvA º § ª1 0º ª1 0º · ª va º
« v » = ¨ d ⋅ «0 1» + d ¸ § ª1 0 0º ª1 0 0 º · « »
⋅ «1 0» ¸ ⋅ ¨ dγ «0 1 0» + dδ «0 0 1» ¸ « vb »
« B» ¨ α « » β « » ¬ ¼ ¬ ¼¹ v
«¬ vC ¼» ©¨ «¬0 1¼» ¸ ©
¬«0 1¼» ¹ «¬ c »¼
ªvA º § ª 1 0 0º ª1 0 0º ª1 0 0º ª 1 0 0 º · ª va º
«v » = ¨ d d « 0 1 0» + d d «1 0 0» + d d «1 0 0» + d d «0 0 1» ¸ « v »
« B» ¨ α γ « » β γ « » β δ « » α δ « »¸ « b »
«¬ vC »¼ ¨© «¬0 1 0»¼ «¬0 1 0»¼ «¬0 0 1 »¼ «¬0 0 1 »¼ ¹¸ «¬ vc »¼
ªvA º ª va º ª va º ª va º ª va º
«v » = d d «v » + d d «v » + d d «v » + d d «v » (3-30)
« B» α γ « b» β γ « a» β δ « a» α δ « c»
¬« vC ¼» ¬« vb ¼» ¬« vb ¼» ¬« vc ¼» ¬« vc ¼»
ªia º § ª1 0 º ª1 0 º · ªiA º
«i » = ¨ d ¸ § ª1 0 0º ª1 1 0 º · « »
⋅ « 0 1» + d δ ⋅ «0 0» ¸ ⋅ ¨ dα « + dβ «0 0 1» ¸ «iB »
« b» ¨ γ
¨
« » « »
¸ © ¬ 0 1 1 »¼ ¬ ¼¹ i
¬« ic ¼» © «¬0 0¼» ¬« 0 1 ¼» ¹ «¬ C »¼
62
Chapter 3 Modulation strategies
ªia º § ª1 0 0 º ª1 1 0 º ª1 1 0 º ª1 0 0 º · ª i A º
«i » = ¨ d d «0 1 1» + d d «0 0 1» + d d «0 0 0» + d d « 0 0 0 » ¸ «i »
« b» ¨ α γ « » β γ « » β δ « » α δ « »¸ « B »
«¬ ic »¼ ¨© «¬0 0 0»¼ «¬0 0 0»¼ «¬0 0 1»¼ «¬0 1 1 »¼ ¹¸ «¬iC »¼
*
2 Vo sin(π / 3 − θin* + ϕin )sin(π / 3 − θo* )
dαγ = dα ⋅ d γ = (3-32)
3 Vin cos(ϕ in )
*
2 Vo sin(θin* − ϕ in )sin(π / 3 − θo* )
dαδ = dα ⋅ dδ = (3-33)
3 Vin cos(ϕ in )
SaA
SbA
S1 S3 S5 S7 S9 S11
ScA
SaB
SbB
ScB
S2 S4 S6 S8 S10 S12 SaC
SbC
ScC
Figure 3-5. Switch states of equivalent circuit and its real circuit for vector pair V1 − I1 .
63
Chapter 3 Modulation strategies
*
2 Vo sin(θin* − ϕ in )sin(θo* )
d βδ = d β ⋅ dδ = (3-34)
3 Vin cos(ϕ in )
*
2 Vo sin(π / 3 − θin* + ϕin )sin(θo* )
d βγ = d β ⋅ d γ = (3-35)
3 Vin cos(ϕ in )
It is obvious that the output voltage vector Vo* and the input current displacement angle ϕin
are known as reference quantities at any cycle period. As illustrated by Figure 3-3(b), the
control of input power factor can be achieved by controlling the phase angle of input
current vector since the input voltage phase angle is imposed by the supply voltages.
Usually, the input current vector is adjusted to lag the input voltage to compensate the
effect of the input filter capacitor currents on the input power factor.
The conventional ISVM has been demonstrated in the last section. The basis of this
technique is to use a combination of the two adjacent vectors and zero vector to produce the
reference vector. A modified space vector modulation was firstly proposed to reduce the
switching losses and applicable whenever the output voltage reference is below half the
input voltage [12]. The main idea of the modified ISVM is to make use of active vectors
with 120˚ phase difference in the rectifier stage as shown in Figure 3-6(b). As shown in
Figure 3-6, the input sector is redefined and the corresponding medium line–to–line
voltages used within each of the sectors are indicated by the bold lines, contrary to the
conventional ISVM utilizing the two maximum line–line voltages in each sector. Since the
current modulation index for rectifier stage is 1/ 3 instead of 1, the modulation is
applicable whenever the output voltage reference is less than half of the input voltage. This
modulation method has been adopted in this thesis to improve the low speed performance
of the MC-fed IPMSM drive.
64
Chapter 3 Modulation strategies
The procedure for deriving the duty-cycle functions for the modified space vector
modulation approach is almost similar to the procedure in the conventional space vector
modulation. The modulation for the inverter is exactly the same as conventional scheme.
The modification is made only to the rectifier modulation. The derivation of the modified
duty-cycle function is given below.
The input vector sector angle used in the modified rectifier modulation is defined as
where ωin t is the input voltage phase angle and input phase a ( va = Vam sin(ωint ) ) is taken as
va vb vc va
I2
dδ I δ
Vin
vab vac vbc vba vca vcb vab vac
ϕ in *
vcb
I
θin* in
dγ I γ
I1
(a) Conventional ISVM utilizing maximum line-to-line voltages.
va vb vc va
I3 I2
Vin* I in*
dδ I δ
vab v vab vbc vbc vca vba vca vab vcb vab
cb vac
ϕ in vca vcb vbc
vac vba vac
θin*
I1
dγ I γ
Figure 3-6. Input vector hexagons and sector definitions for two ISVM schemes.
65
Chapter 3 Modulation strategies
It is noted that the modulation functions at any time instant are limited by the constraint
that duty cycles for the vectors including zero vector should be between zero and one.
Taking the constrain (3-41) into account, the maximum current modulation index mC in
(3-39) and (3-40) for linear modulation is 1/ 3 at θin* = π / 6 in (3-42) rather than one in
the conventional ISVM.
1
mC ≤ , 0 ≤ θin* ≤ π / 3 (3-42)
3 cos(θ − π / 6)
*
in
Multiplying (3-39) and (3-40) by (3-23) and (3-24) respectively, the duty cycles for the
modified modulation strategy can be derived for an arbitrary sector location of output
voltage and input voltage vectors.
*
2 Vo cos(θin* − ϕ in )sin(π / 3 − θo* )
dαγ = dα ⋅ dγ = (3-43)
3 Vin cos ϕin
*
2 Vo cos(π / 3 − θin* + ϕin )sin(π / 3 − θo* )
dαδ = dα ⋅ d δ = (3-44)
3 Vin cos ϕin
66
Chapter 3 Modulation strategies
*
2 Vo cos(π / 3 − θin* + ϕ in )sin θo*
d βδ = d β ⋅ dδ = (3-45)
3 Vin cos ϕ in
*
2 Vo cos(θin* − ϕin )sin(θo* )
d βγ = d β ⋅ d γ = (3-46)
3 Vin cos ϕ in
Similarly, considering the constraint of the duty cycle ranges, the boundary between linear
modulation and over modulation occurs at a modulation index of 0.577. Hence, the
maximum output reference voltage for the modified space-vector approach is limited to
half of the input voltage.
In the similar way to the conventional ISVM, properly selected sequence can minimize the
number of branch switch overs (BSOs) per switching period for the double-sided
modulation and thus reduce the switching losses. And also by inserting proper switching
configurations of zero vectors between two active vectors on both sides of sequence, only
one commutation occurs at each BSO. The optimum switching sequence is either in the
shape of “N” or inverted “N” given in Table 3-3.
The output performance improvement is evaluated by means of the harmonics of the output
line-line voltage and output current. Figure 3-7 shows the output current, line-to-line
voltage and input current waveforms with their frequency spectrums for conventional and
modified ISVM schemes. It can be seen that harmonics are introduced at integer multiples
of the switching frequency 6.25 kHz and at the side bands of all these frequencies. The
harmonic content depends on the modulation scheme used. The Total Harmonic Distortions
(THDs) of output waveforms, including current and line-line voltage, of the modified
scheme are less than those of the conventional ISVM. However, the input current is a little
more distorted using the modified ISVM, because the 120˚ vectors are not the optimum to
synthesize the input current.
67
Chapter 3 Modulation strategies
The extensive experiments have been carried out with a three-phase RL load to confirm the
effectiveness of the modified ISVM on the output performance improvement. Figures 3-8,
3-9 and 3-10 show experimental waveforms for the conventional and proposed ISVM. The
converter operates in the modified modulation region (m=0.5) at 40Hz output frequency.
Switching frequency is 6.25 kHz at which there is the dominant harmonic in the output
current, voltage and input current as shown in their FFT analysis. The modified method
improves output performance as can be seen from the FFT comparisons of output voltages
and output currents of the two methods. The harmonic component in the output current at
6.25kHz is reduced from −28.3dBm to −37.6dBm by modified ISVM scheme and that of
the output line-to-line voltage reduced by 10dBm. However, the input current is distorted
due to the modified vector synthesis method in the rectification stage, in which the
harmonic is −19.2dBm compared to −23dBm of conventional scheme. The same
conclusion can be drawn from the conditions where the different output voltage magnitudes
are applied as shown in Figures 3-11 to 3-13 (m=0.4) and Figures 3-14 to 3-16 (m=0.3).
This result is clearly emphasized in Figure 3-17 and Figure 3-18. Figure 3-17(a) shows the
output current THD of both the conventional and the modified schemes. A better
performance of the modified scheme is observed over all the operating range within the
modulation index 0.5. It can be seen from the THD difference between them in Figure
3-17(b) that the improvement is getting more apparent as the modulation index declines,
though harmonics in output current of both modulations increase. There are two turning
points at about 45Hz and 30 Hz between which the improvement is getting smaller to the
minimum amount 0.45% with the frequency increasing. At frequencies higher than 25Hz,
the rate of THD difference is not as big as in the other regions. On the other hand, the input
current performance of the modified scheme is deteriorated compared to that of the
conventional scheme. As shown in Figure 3-18(a), the input current THD of either method
doesn’t depend on the output frequency, varying with the output voltage level. It is also
observed that it reaches its maximum point at about index 0.3 and drops faster in the range
of lower index than the higher index. The THD difference between these two strategies is
shown in Figure 3-18(b). The input current is distorted most at modulation index 0.4 and
less with the output voltage reduced.
68
Chapter 3 Modulation strategies
3 3
2 2
Mag (% of Fundamental)
4 4
3 3
2 2
1 1
0 0
0 2000 4000 6000 8000 10000 12000 0 2000 4000 6000 8000 10000 12000
Frequency (Hz) Frequency (Hz)
400
200 200
0 0
-200 -200
-400 -400
0.04 0.06 0.08 0.1 0.12 0.14 0.16 0.04 0.06 0.08 0.1 0.12 0.14 0.16
Time (sec) Time (sec)
Fundamental (40Hz) = 86.7 , THD= 30.72% Fundamental (40Hz) = 86.28 , THD= 22.27%
70 70
60 60
Mag (% of Fundamental)
Mag (% of Fundamental)
50 50
40 40
30 30
20 20
10 10
0 0
0 2000 4000 6000 8000 10000 12000 0 2000 4000 6000 8000 10000 12000
Frequency (Hz) Frequency (Hz)
1 1
Input current (A)
0.5 0.5
0 0
-0.5 -0.5
-1 -1
0.04 0.06 0.08 0.1 0.12 0.14 0.04 0.06 0.08 0.1 0.12 0.14 0.16
Time (sec ) Time (s ec )
Fundamental (50Hz) = 0.641 , THD= 12.04% Fundamental (50Hz) = 0.6356 , THD= 19.84%
10
12
Mag (% of Fundamental)
Mag (% of Fundamental)
8
10
6 8
6
4
4
2
2
0 0
0 2000 4000 6000 8000 10000 12000 0 2000 4000 6000 8000 10000 12000
Frequenc y (Hz) Frequency (Hz)
69
Chapter 3 Modulation strategies
70
Chapter 3 Modulation strategies
+45
,6(+745
(-6) #
(6+745
71
Chapter 3 Modulation strategies
+45
(/6* #
,6(+745 (6+745
72
Chapter 3 Modulation strategies
8 Conventional
6
THD(%)
2 Modified
0.1
0 0.2
50 0.3 x
40 e
0.4 Ind
Frequen30
cy(Hz) 20 10
3.5
2.5
THD(%)
1.5
0.1
1
0.2
0.5
0.3
ex
0
Ind
50 0.4
40
30
Frequency(H 20
z) 0.5
10
Figure 3–17. Comparison of output current THD under modified and conventional
modulations.
73
Chapter 3 Modulation strategies
30
THD(%)
20
10
0
50
40
Fr
Modified
eq
30 Conventional 0.1
ue
0.2
nc
20
y(
0.3
Hz
0.4
Index
)
10 0.5
15
10
THD(%)
0
0.5 50
0.4 40
30 z )
Ind 0.3 (H
ex
20 uen cy
0.2 q
Fre
0.1 10
Figure 3–18. Comparison of input current THD under modified and conventional
modulations.
74
Chapter 3 Modulation strategies
3.5 Conclusion
Two main categories of matrix converter modulation strategies have been reviewed,
namely the duty-cycle matrix approach and space vector modulation approach. The duty-
cycle matrix approach including AV and scalar modulations, has been used to derive the
duty cycle of individual switch cell directly from the input voltages and desired output
voltages. The calculation is straightforward but the computation load is large.
The loss reduced ISVM is only one of them which modifies the input vector synthesis in
the rectifier stage. The advantages of this new modulation strategy are that the harmonic
content of the output voltages and currents are reduced and, additionally, the switching
losses are decreased since the medium line-line voltages are utilized. A disadvantage of the
proposed modulation strategy is that the harmonic current spectrum on the input side of the
converter is changed. And also the new scheme is applicable in the condition that output
voltage is lower than 0.5 of the input voltage or even lower with input displacement angle
correction. However, it is possible to use this modulation method to improve the
performance for the low output range. Since the output side becomes more important in
motor control system, it can be used to enhance the standard ISVM for high performance
control of the matrix converter drives to improve output performance of the low speed
operation. Results in Chapter 6 will highlight the advantages of using this modulation.
Chapter 4, which follows, describes hardware implementation of a 3×3 matrix converter
using the abovementioned ISVM strategy.
75
Chapter 3 Modulation strategies
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converters,” in Proc. IEEE PESC, vol. 2, pp.1102-1107, Jun. 2001.
[13] L. Helle, K. B. Larsen, A.H. Jorgensen, S. Munk-Nielsen, and F. Blaabjerg,
“Evaluation of modulation schemes for three-phase to three-phase matrix
converters,” IEEE Trans. on Ind. Electron., vol. 51, no. 1, pp. 158–171, Feb. 2004.
76
Chapter 3 Modulation strategies
77
Chapter 4 Development of a matrix converter prototype
4.1 Introduction
Since there is no matrix converter commercially available, the first experimental setup of a
matrix converter prototype has been built up to verify the proposed control strategies in this
thesis. The new hybrid current commutation and the modified ISVM strategy presented in
Chapter 2 and Chapter 3 have been implemented on this laboratory prototype. The
experimental results shown in the following chapters are also achieved on a 230V, four-
pole, 0.97kW IPM synchronous machine driven by the same matrix converter prototype in
both motoring and generating modes. Figure 4−1 shows a block diagram of the laboratory
prototype. It consists of power stage, main control unit, logic processing unit and analog
electronic stage.
The power stage of the matrix converter is realized with 18 IGBTs (IXER35N120D1,
1200V, 32A at 90°C), each with built-in fast recovery diode (FRD). Each of nine BDSs is
made up of two common-collector connected IGBTs without any snubber across it. They
are clamped by clips mounted on the top of a sufficient heat-sink and arranged in three
groups, each of which is connected with the one of the output phases. Three double-layered
PCB boards with ordinary one oz copper thickness are used to construct the power-switch
78
Chapter 4 Development of a matrix converter prototype
network including the diode bridge, braking IGBT and clamp capacitor for the shoot-
through operation. To minimize the effect of parasitic inductance and better decouple the
input side of matrix converter from the input line inductance, the filter capacitor is split into
three groups of 2.2μF each per phase connected directly to the pin of the input IGBT. In
this way, each IGBT in the input side has a filter capacitor used for decoupling as well.
Three input power planes distribute each input to three lines connecting to the three input
IGBTs in each output phase power board. The voltage transducers are mounted in the input
Sij (i = a, b, c; j = A, B, C )
va va vb vc
vA
vb
vB
vc
vC
Figure 4−1. Block diagram of experimental setup for matrix converter fed IPM
synchronous machine.
79
Chapter 4 Development of a matrix converter prototype
power plane board and the input filter inductors with damping resistors are wired between
the AC supply and the distributing board.
To make easy replacement of devices, the power stage boards, the gate driver boards and
the control board from the bottom up are connected by PCB connectors. The gate driver
boards are located as close as possible to the power board so as to achieve minimum
distance between the gate-drive output and the IGBT emitter. The physical layout of the
setup is shown in Figure 4−2 and a photograph of the hardware is shown in Figure 4−3.
The control system of the matrix converter is constituted by dual digital signal processors
for drive control and modulation strategies and a programmable logic device for BDS
commutation. The structure and signal flow of the entire control system is shown in Figure
4−4. In the sensor and signal conditioning stage, the three-phase input voltages, stator
currents and a dc clamp voltage are measured by voltage and current transducers
respectively and conditioned within ±10V which is the input range of ADCs. The
conditioned signals are also provided to the voltage comparators for protections and zero-
crossing detection. The level conversion is used to convert comparator output to 5V and
3.3V (FPGA) logic level. It is implemented with a DMOSFET ZVN4206A whose drain
and source are connected to the logic supply (5V or 3.3V) and digital ground respectively.
The damping switch signal goes to the gate driver straightway. Other signals join the logic
computation in the FPGA-based commutation board. The ISVM pulses generated by the
DSP control board, combined with sector codes, are decoded to switching signals for the
nine BDSs. The current level codes determine the step length of current commutation.
The dSPACE DS1104 R&D control board is used as the main digital processing platform.
The DS1104 board is a real-time control system based on a 603 PowerPC floating-point
processor running at 250 MHz with a slave-DSP subsystem based on TMS320F240 DSP
microprocessor. This configuration provides a highly flexible and rapid development tool
for testing the complicated control strategy for AC drives. The master processor provides
intensive and fast calculation and communicates with the host computer via PCI. It is easy
80
Chapter 4 Development of a matrix converter prototype
892
892
Figure 4−2. Layout of hardware setup.
81
Chapter 4 Development of a matrix converter prototype
for this configuration to tune parameters and watch waveforms online with the aid of the
development software ControlDesk. Digital I/Os, ADCs, DACs and incremental encoder
interface on the master DSP are interfaced with the external circuits, such as logic devices,
transducer signal conditioning and position sensor. The salve DSP running at 20MHz is just
used to generate vector pulses for ISVM and provide them to the decoder in FPGA.
The main control unit performs the control algorithm in the following steps in each
sampling cycle, given in Figure 4−5. Firstly, three phase input voltages, clamp voltage,
stator currents of IPMSM and armature current of DC machine are measured and converted
to digital quantities. According to the instantaneous values of the input voltages, master
DSP determines the location of the input vector including the sector code and sector angle.
The measured stator currents are transformed from the stator to the rotor reference frame.
That is the start of the drive control algorithm. The stator voltage can be estimated by using
the input voltages and the duty cycles in the last cycle. The speed is estimated according to
the adaptation mechanism and the position is derived from the integration of the estimated
speed. The estimation of the stator flux and electromagnetic torque are done by adaptive
Schop
oc _ iA
oc _ iB dir _ iA
oc _ iC dir _ iB SaA1 SaA2 SaB1 SaB2 SaC1 SaC2
ov _ va SbA1 SbA2 SbB1 SbB2 SbC1 SbC2
ov _ vb dir _ iC ScA1 ScA2 ScB1 ScB2 ScC1 ScC2
ov _ vc
iA iB iC
va vb vc
82
Chapter 4 Development of a matrix converter prototype
observer in the estimated rotor reference frame. And a cascade control algorithm for the
IPMSM drive is executed using the estimated values as feedbacks. Two hysteresis
comparators are used for the HDTC and the required voltage vector is selected from the
switching table. Two PI controllers used for DTFC generate the desired voltage
components in the stator flux reference frame. The voltages are transformed to stator
reference frame for ISVM. So the step in the dotted block is not required by the hysteresis
DTC but by the ISVM DTFC.
83
Chapter 4 Development of a matrix converter prototype
The duty cycles for the vectors are calculated according to the ISVM theory referred in
chapter 3. In order to implement an optimum switching strategy, the switching states are
rearranged in a “U” or “N” shape sequence described in chapter 3. Figure 4−6 shows the
optimized switching sequence in “U” shape when both input and output vectors are in the
first sector. The armature current of DC machine is regulated to carry out a four-quadrant
load test, the generated energy damped to a braking resistor to keep the DC voltage of the
H-bridge constant. Finally, the duty cycles of PWMs and states of digital I/Os are updated
according to the current sector codes and current levels before ISR returns to the main
routine.
The logic control unit manages the multi-step current commutation for BDSs. Besides, in
order to save the DSP logic computation load, it translates the four PWMs from DSP into
nine double-sided symmetrical switching pulses for the BDSs. The decoder is followed by
nine edge detectors each of which is implemented by two D flop-flips. The entire
sequential and combinational logic-operation tasks are carried out by an
TM
ACEX EP1K100-1 FPGA device. The block diagram of the FPGA-based logic control
Ts
(T1 + T2 + T3 + T4 ) / 2 (T1 + T2 + T3 + T4 ) / 2
Ts − T1 − T2 − T3 − T4
(T1 + T2 + T3 ) / 2 (T1 + T2 + T3 ) / 2
(T1 + T2 ) / 2 (T1 + T2 ) / 2
T1 / 2 T1 / 2
Figure 4−6. Optimized sequence of switching states in sector pair (1, I).
84
Chapter 4 Development of a matrix converter prototype
As shown in Figure 4−7, there are five groups of input signals to the decoder including
sector codes, PWMs, system reset, DTC mode and protection signals. The four PWMs are
converted to five pulses for the ISVM vectors. P5 is used as a triggering signal. Different
converting logics are applied for the odd and even sector code summations given by Figure
4−8. The combinational-logic operation involves the sector codes as well as the converted
vector pulses. Any of over-current, short-circuit, over-voltage and system reset will forcibly
shut down the converter. The logic equation for one of the nine BDSs is given by (4−1).
The result is the switching signal of the BDS S aA connecting input phase a with output A.
S aA = {Pαγ [( Sci1 + Sci 2)( Svo1 + Svo 2 + Svo6) + ( Sci 4 + Sci5)( Svo1 + Svo 2 + Svo6)]
+ Pβγ [( Sci1 + Sci 2)( Svo1 + Svo5 + Svo6) + ( Sci 4 + Sci5)( Svo1 + Svo5 + Svo6)]
+ Pβδ [( Sci1 + Sci 6)( Svo1 + Svo5 + Svo6) + ( Sci3 + Sci 4)( Svo1 + Svo5 + Svo6)] (4−1)
+ Pαδ [( Sci1 + Sci6)( Svo1 + Svo2 + Svo6) + ( Sci3 + Sci 4)( Svo1 + Svo2 + Svo6)]
( )
+ P0 ( Sci3 + Sci 6)} ovc + ovv + scc RESET
where Pαγ , Pβγ , Pβδ , Pαδ and P0 are the converted vector pulses, Sci1 to Sci 6 and Svo1 to
Svo6 are the sector codes of input current and output voltage vectors, ovc , ovv , scc and
ovvi ovci
cmmd A
SiA SiA1 SiA2
SiA
cmmd B
SiB SiB SiB1 SiB2
cmmd C
SiC SiC SiC1 SiC2
dir _ i j
Figure 4−7. Block diagram of the logic control unit in FPGA (i=a,b,c; J=A,B,C).
85
Chapter 4 Development of a matrix converter prototype
RESET are protection signals and system reset. Other switching signals can be derived
from the similar equations with different sector code combinations.
The switching signal edge detector is composed of two flip-flops and a data latch with
enable-input, as shown in Figure 4−9. Since the commutations of three output phases
operate independently of each other and they use the same switching signal edge detectors,
only one phase detector is explained in this section. According to the fundamentals of the
matrix converter, the commutation is required from one input phase to another when the
switching signal of the active BDS connecting the original phase goes from logic-high to
(Tαγ + Tβγ + Tβδ ) / 2 (Tαγ + Tβγ + Tβδ ) / 2 (Tβγ + Tαγ + Tαδ ) / 2 (Tβγ + Tαγ + Tαδ ) / 2
P3
(Tαγ + Tβγ + Tβδ + Tαδ ) / 2 (Tαγ + Tβγ + Tβδ + Tαδ ) / 2 (Tβγ + Tαγ + Tαδ + Tβδ ) / 2 (Tβγ + Tαγ + Tαδ + Tβδ ) / 2
P4
TS / 2 TS / 2
P5
Pβγ P1 XOR P2
Pβδ P2 XOR P3
Pαδ P3 XOR P4
P0 "0" XOR P4 = P4
Tαγ Tβγ Tβδ Tαδ Tαδ Tβδ Tβγ Tαγ Tβγ Tαγ Tαδ Tβδ Tβδ Tαδ Tαγ Tβγ
T0 T0
2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2
TS TS
Figure 4−8. Generation of double-sided switching pulses for the vectors by 4 PWMs.
86
Chapter 4 Development of a matrix converter prototype
logic-low and at the same time the switching signal of the one connecting the target phase
goes from logic-low to logic-high in the normal operation. At start-up, only the target BDS
is to be switched on. In order to determine the original and the target phases and the
moment of the commutation, the changing of the switching signals has to be
instantaneously known. It can be done by an edge detector. When there is no commutation
command, the outputs of the flip-flops for each BDS should be the same. Otherwise, they
are different. Taking the BDS S aX as an example, D (0), D (1) is “00” or “11” implies no
commutation for phase a and S aX is kept in the original state. “10” means commutation is
required from phase a to another phase. “01” means commutation demands the output to be
connected back to the phase a. Therefore, the main function of the flip-flops is to hold the
switching states until the next clock cycle and compare them with the next switching states.
The enable input of the first flip-flop is to inhibit the minor commutation and maintain the
SaX S(k)
aX S(k-1)
aX
SbX S(k)
bX S(k-1)
bX
ScX S(k)
cX S(k-1)
cX
CMMD X CMMD(k)
X
CMMD (k-1)
X
dir _ iX
87
Chapter 4 Development of a matrix converter prototype
present states irrespective of the incoming switching signal SaX during the commutation
being processed. In this way, the switching state will reflect the real state of the BDS for
the right operation in the next commutation. The flip-flops for CMMDX are used for the
hybrid commutation. The states of them provide the clues to the commutation cases
including transition, two-step and four-step. For more detail refer back to Chapter 2.
The nine-bit D-type latch with enable-input is used to latch the commutation command
codes including the current direction information until the current commutation process
ends. At rising edge of the clock, it updates the sates from the edge detector and then at
falling of the clock, the states propagate through the latch to the finite state machine. If
there is no processing commutation or current changing the direction, the latch is
transparent, which means states propagate directly from the input to the output
synchronized at effective clock edge as the enable-input is on all the time in this condition.
The core of the logic control unit is the current commutation implemented by Finite State
Machine (FSM), also called Synchronous State Machine. The previously described
combinational logic functions are serving the FSM. All the inputs provided by the latch,
current level codes and the outputs of the timers are used to generate the finite number of
states each with the corresponding outputs. The states, outputs and corresponding
commutation situations are given by Table 4−1 and Table 4−2 with a fixed-step length.
Variable step length can be implemented considering the current level as a prescaler in the
compare register of the timer. The step length depends on the preset value in the compare
register.
There are 12 states in each commutation status: four-step, two-step, four-to-two, two-four
transition and pre-commutation. The pre-commutation is just to allow or inhibit the reverse
current path preparing for the prospective commutation mode when there is no
commutation happening. Turning off the non-conducting IGBT of the active BDS will turn
off the redundant current path for the incoming two-step mode. On the other hand, turning
on the redundant IGBT will allow current in both directions for the incoming four-step
88
Chapter 4 Development of a matrix converter prototype
mode. There is one more state S0 occurring at no commutation when the switching signals
are kept the same while the outputs of edge-detector and latch are being updated. At the last
step of commutation, the first bit of the ISM output, endX , notifies the other circuits of the
completion of the commutation, connected to their enable inputs.
A divide-by-two clock is used as the system clock, synchronous to the source clock which
is provided by a 52.5MHz on-board crystal oscillator. The predefined compare register
89
Chapter 4 Development of a matrix converter prototype
Q (k-1)
aX Q (k) (k-1)
aX Q bX Q (k) (k-1)
bX Q cX Q(k) (k-1) (k)
cX Q mdX Q mdX
SaX
SaX ScX
ScX
SaX
SbX SaX
SbX
SbX
SbX ScX
ScX
SaX
ScX SaX
ScX
SbX
ScX SbX
ScX
SaX
SaX ScX
ScX
SaX
SbX SaX
SbX
SbX
SbX ScX
ScX
SaX
ScX SaX
ScX
SbX
ScX SbX
ScX
90
Chapter 4 Development of a matrix converter prototype
To implement ISVM strategy for matrix converter, the input voltages are measured using
the LEM voltage transducer and necessary signal conditioning and voltage clamp circuit to
meet the input range of ADCs on DS1104, as shown in Figure4−10. And also an
overvoltage monitor is done by a voltage comparator. In the ASD application, the output
currents are measured as well using three compact ASIC based current transducers by LEM
shown in Figure 4−11. Two window comparators are implemented by LM293 for the over-
current protection and hybrid commutation. The output of transducer is unipolar and the
offset of it can be compensated by tuning the reference voltage of the bipolar-converting
amplifier OPA2277A in Figure 4−11. Ideally it is set to 2.5V which is the mid point of
unipolar output of the transducer. To cancel out the offset, it varies from 2.5V at the
expense of the maximum measuring range.
Like all other power electronic applications, power devices in the matrix converter need to
be protected from the failure under fault conditions such as short circuit and overload. All
protecting schemes require either sensing the collector current or monitoring the collector
to emitter voltage. Since monitoring the saturation voltage is a faster and less expensive
way, it has been widely used in protection circuit incorporated in driver ICs. However,
unfortunately the trip voltage reference is fixed in some ICs and not accessible to change
according to the application rating and device characterestics. It is impossible to implement
an overload protection. Besides, it doesn’t allow importing a negative voltage into the
driver circuit from the detecting pin which leads to damaging the driver or even the whole
system, as it is normally designed for VSI and DC/DC converter applications. In AC/AC
conversion, the reverse blocking devices are frequently operated in reverse voltage
conditions. Therefore, the original protecting circuit cannot be used straightway. In
practical circuit, the high voltage fast recovery diode D1 connected to IGBT’s collector is
replaced by a bidirectional voltage blocking circuit to monitor IGBT’s collector to emitter
voltage vCE as shown in Figure 4−12. Two zener diodes and a current-limiting resistor are
91
Chapter 4 Development of a matrix converter prototype
used to clamp vCE within the range of power supply of the gate driver. The comparison is
made between monitored vCE and a tunable protection threshold by a high speed
comparator LM311. The output logic level is boosted to the power supply of the driver in
=+; =+;
7 *7-
=+; (7(
>(/)
1;;
>(/)
(7
+;
7 +;
=+;
=4 =+;
=+; ,. 9<3
R1 (+7!@ 1<((--
7
=4 = 1<((--
;(+< > :/6; * -
+;
4 ? RM
+;
+7 7
+;
4
VREF = 2.5V
±IP RIM
±IS
92
Chapter 4 Development of a matrix converter prototype
order to trip the internal comparator when the IGBT turns on into a short circuit or overload
condition. The function of the comparator is the level conditioning between the clamp
circuit and voltage detecting pin of the driver IC.
Figure 4−12 shows a block diagram of the modified desaturation detector. This input
resistor needs to be large to minimize the power dissipation, 50kΩ selected in the thesis.
The breakdown voltage of the zener diode is selected higher than trip voltage but 1V lower
than the supply voltage. In this circuit, the IGBT collector to emitter voltage vCE is
monitored by a pair of zener diodes. When the IGBT is in off state, vCE is equal to the line
to line voltage which may be higher than the zener breakdown voltage. The zener diodes
clamp the voltage at the driver supply voltage while the main voltage is dropped across the
current limiting resistor. The output of external comparator LM311 is pulled up to the
positive gate driver supply VCC , and so is the non-inverting input of internal comparator.
However, the gate drive does react to this trip signal in off-state because it is blocked by an
AND logic gate. When the IGBT turns on, the zener diode voltage is pulled down to the
VCC (+16V)
Dz2
Dz1
VEE ( −9V)
VCC
D1
tTRIP VTRIP
RG
93
Chapter 4 Development of a matrix converter prototype
IGBT’s vCE with a negligible drop across the resistor. During a normal on-state condition,
vCE is less than the preset threshold at non-inverting input of LM311 and the output of the
internal comparator is low. If the IGBT turns on into an over current or a short circuit, the
high current will cause vCE to rise above the trip level which implies a desaturation
detected. The shutdown command is derived from a logical AND of driver’s input signal
and the desaturation. A delay circuit is already included after the comparator output in the
driver to avoid the fault shutdown during IGBT turn-on transition. A delay is set,
depending on the turn-on time of IGBT, so that vCE has enough time to fall below the
threshold during normal turn on switching.
4.6 Summary
This chapter has briefly presented the design and development of a laboratory prototype of
three-phase to three-phase matrix converter. The power stage is built up with 18 IGBTs
each with built-in FRD. The two IGBT modules are connected via a common collector to
construct a BDS. Input filter is a single-stage LC filter with 1.6 kHz cut-off frequency and
damping resistance. Better decoupling of input side of the matrix converter from the input
inductances is obtained by putting each 2.2µF filter capacitor as close as possible to each
IGBT on input side. Both Hysteresis DTC and ISVM DTFC schemes are implemented by
DS1104 R&D controller. The switching signals are generated by a series of combinational
logic operations in FPGA. The commutation demand is determined by an edge detector
which is composed of D-type flip-flops and latch. Finally a hybrid current commutation is
realized by FSM in FPGA. In order to design universal gate drivers for matrix converter,
the modification is made in the IGBT collector to emitter voltage detector to allow negative
monitored voltage. The modified gate driver can be used for normal IGBT, RB-IGBT and
real BDS coming in the future.
This matrix converter was used for sensorless DTC of an IPMSM drive with hysteresis
control which is described in Chapter 5 and DTFC with ISVM in Chapter 6.
94
Chapter 5 Hysteresis direct torque control (HDTC) for matrix converter drives
5.1 Introduction
The direct torque control (DTC) has been developed in the last two decades [1]−[5]
since it was initially proposed for induction machines by Takahashi and Noguchi in
1986 [6]. The basic principle of DTC is to apply an appropriate voltage switching
vector directly to the motor at each cycle according to the stator flux linkage and
electromagnetic torque errors and position of the motor flux vector. This high-dynamics
and high performance control concept has been accepted by the industry for low voltage
drives, which is considered as an attractive alternative to DC servo drives [7]. As
compared to the widely accepted field oriented control (FOC), DTC has the advantages
of faster dynamics on torque and flux regulation, robustness to parameter variations,
simplicity by elimination of current controllers and PWM generators which are required
by the FOC schemes. Furthermore, DTC is an inherently sensorless algorithm. The
coordinate transformation and position feedback are eliminated since the control is
performed in the stationary reference frame.
DTC for matrix converters is an extension of the classical DTC for VSI, combining the
advantages of both DTC and matrix converter. Applying one switching configuration at
any cycle period is to maintain the stator flux and torque errors within the specified
hysteresis bands under the constraint of unity input power factor and drawing sinusoidal
input currents from the mains. The control of the input displacement angle is also
achieved by a third hysteresis comparator in addition to the ones for the torque and flux,
as matrix converter can generate more vectors suitable for torque and flux control.
There are two switching configurations equivalent to each VSI vector selected by DTC
95
Chapter 5 Hysteresis direct torque control (HDTC) for matrix converter drives
scheme. However, those two switching configurations have different effects on input
displacement angle, one for current leading voltage and the other for current lagging.
Such redundancy gives the opportunity to control a further variable for matrix converter
in addition to flux and torque in VSI-DTC scheme. However, the classical DTC also has
some disadvantages, such as unsustainable control at very low speed, inherent variable
switching frequency, and higher ripples in stator currents, torque and flux which imply
higher losses and noise in the machine. As for the input quality, the input currents are
distorted with high harmonic components scattered around the resonance frequency of
the input filter because either leading or lagging vector occupies the whole control
period, updating the switching states only once in the next period after the output of any
of the three hysteresis comparators changes state. These drawbacks become more
obvious when the sampling period is not sufficiently small.
In this chapter, the application of classical DTC on the IPM synchronous machine fed
by the matrix converter is investigated in detail. It then presents a novel DTC scheme
for matrix converter drives allowing substantial reduction of input current harmonics,
without any adverse effect on the drive performance or increase of the complexity of the
system. The emphasis is placed on removing the position sensor from the IPM
synchronous motor drive to enhance the robustness and reliability of the drive system.
The comparison between the classical HDTC and proposed HDTC for matrix converter
fed IPMSM machine is carried out by both simulations and experiments. Since both
torque and flux are controlled based on hysteresis control concept, this type of DTC is
referred to as hysteresis direct torque control, HDTC for short, in the thesis.
For better clarity, HDTC for matrix converters will be demonstrated following the
review of HDTC for conventional two-level VSI. Figure 5−1 illustrates the HDTC
scheme for IPM synchronous machine fed by a two-level VSI which can be idealized by
the circuit shown in Figure 5−2. The torque and flux controllers are two-level hysteresis
comparators. When the estimated torque drops below the reference value one half of
hysteresis bandwidth, a new switching state is selected to increase the torque and vice
96
Chapter 5 Hysteresis direct torque control (HDTC) for matrix converter drives
versa. The same logic applies to the stator flux control. The status of torque and flux
comparators determines the appropriate voltage vector which is created by VSI to be
applied to the IPM motor. The selection policy is made to restrict the flux linkage and
torque errors within specified hysteresis bands and to achieve a fast dynamic response.
This can be obtained by considering the position of the stator flux linkage vector,
available switching vectors and desired torque and stator flux linkage.
For a three-phase motor with balanced sinusoidally distributed stator windings, the
stator voltage vector vS in stationary αβ reference frame can be represented as
Figure 5−1. Block diagram of HDTC IPM synchronous motor VSI drive.
Sa Sb Sc
Vdc
A C
B α
Figure 5-2. An ideal circuit of a 2-level VSI fed three phase AC machine.
97
Chapter 5 Hysteresis direct torque control (HDTC) for matrix converter drives
2
vS = (v A + vB ⋅ e j 2π / 3 + vC ⋅ e j 4π / 3 ) (5−1)
3
where v A , vB and vC are the instantaneous values of motor’s phase voltages. The non-
linearity effects of the inverter such as dead-time, forward voltage drop of the power
devices are not taken into account in the idealized two-level and three-phase VSI. The
terminal voltages at A, B and C are determined by the switching status of three ideal
switches, Sa , Sb and Sc which can only be either closed or open. The instantaneous
output voltage vector generated by the ideal VSI can be written as
vS ( Sa , Sb , Sc ) = Vdc ( Sa (t ) + Sb (t ) ⋅ e j 2π / 3 + Sc (t ) ⋅ e j 4π / 3 )
2
(5−2)
3
where Vdc is the DC-link voltage and amplitude of active vectors is 2Vdc / 3 . There are
eight combinations of the states of Sa , Sb and Sc , i.e. eight voltage vectors including
two zero vectors, as shown in Figure 5−3. The six non-zero voltage space vectors (V1-
V6) are located 60o apart from each other and two zero voltage vectors (V0 (000), V7
(111)) are in the origin.
The relationship between the voltage, current and stator flux vectors of an AC machine
in the stationary Įȕ reference frame is given by
d λS
vS = + RS iS (5−3)
dt
β
V3 is applied
V2 (110)
y
V3 (010)
V3y
V4 (011) x
V3x
V0 (000) V1 (100) α
V7 (111)
V5 (001)
V6 (101)
98
Chapter 5 Hysteresis direct torque control (HDTC) for matrix converter drives
Assuming the voltage drop RS iS across the stator resistance RS small to be ignored, the
stator flux linkage λS is driven in the direction of the stator voltage vector vS within a
short sampling period ΔT .
ΔλS ≅ vS ΔT (5−4)
It implies that the stator flux variation depends on the magnitude and duration of the
applied voltage vector, i.e. 2Vdc / 3 and ΔT . Hence, the amplitude of the stator flux
linkage can be regulated by applying a set of voltage vectors which are radial positive,
radial negative, forward positive, forward negative, backward positive, backward
negative and zero vectors.
The relationship between the electromagnetic torque and the load angle for an IPMSM
is governed by [13]
3PλS
T= ª 2λ f Lq sin δ − λS ( Lq − Ld )sin 2δ º¼ (5−5)
4 Ld Lq ¬
Equation (5−5) indicates that the torque is regulated by varying the load angle į, which
is between the stator flux and rotor flux, while the amplitude of the stator flux linkage is
kept constant. Since the mechanical time constant is much larger than the electrical time
constant, the change in į is achieved by driving the stator flux vector forward or
backward to the rotor, which in turn is determined by the sequence of the voltage
vectors mentioned before. In a word, any stator voltage vector determines a torque
variation on the basis of two contributions: the variation of the stator flux magnitude
and phase angle with respect to rotor flux.
The voltage vector plane can be divided into six sectors θ1 − θ 6 , each covering 60° area
and having an active vector in the middle as shown in Figure 5−4. In each sector, four
adjacent vectors are switched to minimize the switching frequency. Depending on the
direction of the rotating stator flux vector, two voltage vectors may be selected to
increase or decrease the amplitude of the stator flux linkage respectively. For example,
voltage vectors v2 and v3 are selected to increase and decrease the amplitude of λS
99
Chapter 5 Hysteresis direct torque control (HDTC) for matrix converter drives
Based on the analysis above, the six-vector switching table for torque and stator flux
control can be developed and given in Table 5−1. Cλ and CT are the outputs of the flux
and torque hysteresis controllers respectively. Output state “1” implies that the
estimated value is one-half bandwidth smaller than its reference value and vice versa.
The sector numbers provide the approximate location of the stator flux linkage with a
resolution of 60° electrical in the stationary reference frame.
ȕ
v4 v3
v4 v5 v4 v3
θ3 θ2
v3 v2
v5 v2
v6
θ4 v4 v1 v3 Į
v5
θ1
v6 v2
v5
θ5 θ6
v2 v1
v6 v1
v6 v1
Figure 5−4. Control of the stator flux vector by applying appropriate voltage vectors.
100
Chapter 5 Hysteresis direct torque control (HDTC) for matrix converter drives
( Cλ , CT ) CT θ1 θ2 θ3 θ4 θ5 θ6
It has been proved that the stable torque control can be realized if the stator flux
reference and load angle variation range are properly set by fulfilling the requirements
in (5−6) and (5−7) [8]. For a specified λS , there is a maximum load angle δ max
§ a − a 2 + 8λ 2 ·
δ max = cos −1 ¨ S
¸ (5−6)
¨ 4 λS ¸
© ¹
Lq
a= λf (5−7)
Lq − Ld
As a summary, to ensure a stable control system, the load angle and stator flux linkage
must be controlled such that δ < δ max in (5−6) and λS < a in (5−7) at all times.
The direct torque control (DTC) scheme for matrix converter induction motor drives
was initially proposed in [9]. Only one switching configuration is applied to maintain
the torque and stator flux error within the hysteresis bands at each sampling time under
the constraint of unity input power factor. Imagining the matrix converter as a two-stage
transformation converter based on ISVM theory, the principle of the basic HDTC for
matrix converter, as shown in Figure 5−5, can be explained as a hysteresis torque and
101
Chapter 5 Hysteresis direct torque control (HDTC) for matrix converter drives
flux control by selecting one of the six active and two zero voltage vectors generated by
the virtual DC-link voltage in the inverter stage and a hysteresis input power factor
(IPF) control by applying one of the input current vectors in the rectifier stage. The
DTC in the inverter stage is exactly the same as that in VSI except that there is no real
DC-link voltage but an imaginary one generated by the applied input vector in the
rectifier stage. The IPF control is realized by the third hysteresis comparator other than
the ones for the torque and flux control. It is not an instantaneous control of input
displacement angle ϕin . The average of sine value of the input displacement angle is
chosen as the third variable, indicated by < sin ϕin > . The unity IPF can be achieved by
setting the reference of this IPF comparator zero and maintaining < sin ϕin > close to
zero.
The estimation of the input displacement angle requires the knowledge of both input
voltage and input current phase angles. The stator flux is estimated from the integration
of the back-emf of the machine to avoid requiring continuous position information.
CT
T*
Tˆ
θˆS
λ*
s
CA
λˆs
CΨ
Io
sin(θ in* − θˆin )
λˆs Vo
Vin
Tˆ
Io
θˆin I in Io
sin(θ − θˆi )
i
*
θin*
Vin
102
Chapter 5 Hysteresis direct torque control (HDTC) for matrix converter drives
λS I in
Vk +1− 6i VZ Vk + 5− 6i I j +1− 6i
θˆin
Vk + 2 − 6i VZ Vk + 4 − 6i I j −6i
Therefore, stator voltages and currents need to be known. Like in VSI, re-construction
of stator voltage vector using measured input voltages is free from PWM pulses.
Therefore, the input voltages and stator currents of the motor are actually measured,
while the input currents and the stator voltages are calculated on the basis of the low-
frequency transfer matrix.
As shown in Figure 5−5, the instantaneous input displacement angle between the input
phase voltage and corresponding input current can be derived from the measured input
voltages and estimated input currents. The average value is obtained applying a low-
pass filter (LPF) to its sine value, fed back to the IPF comparator. The control of IPF is
possible because there are two input current vectors having different directions in each
sector in the rectifying stage. Figure 5−6 shows the two current vectors in each sector
can be represented by two line-to-line voltages with the maximum magnitude. For
example, when the input voltage vector is in sector I, either input current vector I1 (ab)
or I 2 (ac) can be selected to maintain ϕin close to zero. The duration of the input vector
is the entire sampling period in the classical HDTC, i.e. d = 1 or d = 0 . If the estimated
< sin ϕin > is positive and output of the comparator Cϕ = 1 , which means the input
d⋅
Iγ vca
I1 BC ;
Figure 5−6. Input vectors and their representation in the time domain.
103
Chapter 5 Hysteresis direct torque control (HDTC) for matrix converter drives
current vector I in* is lagging the voltage vector Vin , the current vector I 2 (ac) has to be
applied. On the contrary, I1 (ab) is applied when Cϕ = 0 . Each applied vector in the
short sampling period creates a virtual DC-link voltage by one of the line-to-line
voltages as seen in Figure 5−6. This virtual DC voltage generates any desired imaginary
non-zero VSI voltage vectors. Combining the opportune voltage vector selected from
Table 5−1 and input current vector from a table of switching vectors versus IPF
comparator output, given by Table 5−2, the most suitable switching configuration of
matrix converter is obtained to keep the estimated stator flux and torque tracking the
reference value and still maintain the input current in phase with the corresponding
phase voltage. The final switching table for matrix converter is given in Table 5−3.
As mentioned before, in the classical HDTC for matrix converter drives, the selected
switching configuration compensates the instantaneous errors in the torque and flux
under constraint of unity input power factor. The last requirement of the input side of
the matrix converter is dependent on the average value of sine calculation ( < sin ϕin > )
which is obtained by applying a low-pass filter to its instantaneous value. The low-pass
filtered value doesn’t immediately or fully reflect the status of displacement angle
because of the time delay and wave smoothing. This may lead to the wrong hysteresis
comparator action and hence selecting the opposite current vector. Furthermore, the
rectifier stage just provides six fixed-direction input current vectors. As the converter
doesn’t update the switching state until any of the three hysteresis comparators changes
its output state, only one current vector is applied during the whole period. In other
104
Chapter 5 Hysteresis direct torque control (HDTC) for matrix converter drives
Table 5−4. Switching table for modified HDTC, d = sin(π / 3 − θˆin ) / cos(π / 6 − θˆin ) .
Vk +1− 6 i / VZ VZ / Vk + 5 − 6i (1 − d ) • I j +1− 6i
θˆin
Vk + 2 − 6i / VZ VZ / Vk + 4 − 6 i d • I j − 6i
words, the minimum duration of each input current vector depends on the sampling
period rather than the resolution of the DSP timer and in some conditions the same
current vector is applied even for multiple periods. As a result, at any instant time, the
input current vector can not be controlled exactly in phase with the input voltage vector.
Moreover, the input currents are distorted with high harmonics scattered around the
resonance frequency of the input filter which is lower than the switching frequency.
This resonance phenomenon is related to the control period. Although several modified
DTC schemes have been presented to reduce torque and flux ripples using small voltage
vectors [10], [11], these methods require a more complicated switching table without
any improvement on the input quality. In order to construct the small voltages, the input
power factor control capability is affected without using the optimized input current
vectors. A polygonal flux modulation was proposed to improve the drive side.
However, with respect to the input side, it is also a rough synthesis of the input current
vector based on the hysteresis band control concept [12]. The distortion of the input
current can be reduced with the smaller control period. However, it requires much faster
processor and hardware which increase the cost of system.
In this section, a modified HDTC scheme for matrix converter drive, as shown in Figure
5−7, is proposed to improve the quality of input currents without affecting the
performance of the drive. As shown in Figure 5−8, two adjacent input current vectors
are applied in each sampling period to implement an instantaneous unity input power
factor control. The duty cycles of the input vectors are derived from SVM in the
rectifier stage. The duty cycles of active and zero vectors in SVM are calculated as:
I in sin(60 − θˆin + ϕ in )
d svm
= ⋅ (5−8)
cos(ϕin )
k
Ik
105
Chapter 5 Hysteresis direct torque control (HDTC) for matrix converter drives
| I in | sin(θˆin − ϕin )
+1 =
d ksvm ⋅ (5−9)
| I k +1 | cos(ϕin )
+1 = 1 − cos(30 − θ in + ϕ in ) / cos(ϕ in )
ˆ
d 0svm = 1 − d ksvm − d ksvm (5−10)
where ϕin is the input displacement angle for input power factor correction, θˆin is the
input voltage vector angle referring to the bisecting line of the corresponding sector k.
θˆS
ω̂ > ωΔ
CT
T* ω̂ < −ωΔ va
vb
T̂ vc
ω̂ ≤ ωΔ
CA
λs*
λˆs
Io
Vin θ − ϕin
*
in
d
Vin
λˆs
T̂
Io
I in δk
λˆS ( k )
Vk +3 VZ δ k δ k +1 Vk k th sector
θˆin k th sector λˆr ( k +1)
d ms
t λˆr ( k )
k
•I
k Vk + 4 Vk +5 ω>0
Ik
Figure 5−8. Input current vectors and voltage vectors for modified HDTC.
106
Chapter 5 Hysteresis direct torque control (HDTC) for matrix converter drives
The duty cycles for the proposed HDTC can be calculated with (5−11) and (5−12) by
prorating the duration of the zero vector in (5−10) to the active vectors. The synthesized
input current vector points to and moves along the green DTC track rather than the blue
SVM incircle shown in Figure 5−8. Obviously, the modified HDTC has faster dynamics
than SVM DTC.
+1 ⋅ d 0
d ksvm svm
sin(θˆin − ϕin )
d mst
k +1 =d svm
k +1 + svm = (5−12)
d k + d ksvm +1 cos(30 − θˆin + ϕin )
As a consequence, two switching configurations are applied for different time intervals
in each cycle according to the position of the synthesized input vector. The switching
table is given by Table 5−4, where j , k are the sector numbers of input voltage vector
and stator flux vector respectively and i is used to adjust the vector subscript number in
between one and six. The input voltage vector angle, which is also required in the
classical HDTC method, is used to calculate the duty-cycles of the two current vectors.
The comparator, low-pass filter and the estimator for the input power factor control in
classical HDTC are all omitted. Therefore, the modified HDTC doesn’t increase the
complexity of the system but simplifies IPF control.
It is also worth noting that zero vectors are also utilized to change the load angle in the
switching table. In order to achieve good performance in the whole speed range, a
speed-dependent torque comparator and vector selection criteria are introduced since
the contribution of rotating rotor flux to the load angle cannot be neglected at high
speed. At high positive speed, an active forward voltage vector is applied to increase the
torque while a zero vector is selected to decrease it. At low positive speed, a forward or
backward voltage vector is applied to regulate the torque without applying any zero
vectors. Figure 5−8 shows the stator flux in kth sector is regulated by applying Vk +1 ,
Vk + 2 and VZ ,. VZ is utilized to decrease the torque when the rotor is rotated clockwise
or decrease the torque when it is anticlockwise, since the load angle is changed when
stator flux comes to a stop and rotor flux continues to move. Zero-vector switching
configuration is selected from “aaa”, “bbb” and “ccc” to minimize the number of
commutations according to the applied configuration in the previous cycle.
107
Chapter 5 Hysteresis direct torque control (HDTC) for matrix converter drives
DTC itself is essentially a sensorless control scheme. However, for speed control, a
speed feedback signal is still needed. Usage of an encoder for stable operation at low
speeds seems to negate the benefits of the DTC. In addition, the presence of this
position sensor increases the cost while reducing the reliability of the system. Moreover,
the inability to accurately estimate the stator flux at low speeds is its main drawback. In
the recent years, many researchers have proposed several solutions to this problem.
They can be broadly classified into open-loop back-emf based estimators [8], [13],
closed-loop observers based on advanced models [14]−[18] and high frequency (HF)
signal injection, exploiting the saliency property of an IPMSM [19]−[22]. Most of them
(except the latter) fail to deliver satisfactory performance at very low speeds. HF signal
injection technique has been used to solve the problems at low and zero speeds, which
is not applicable to hysteresis control methods. All of them have been proposed for VSI
drives. On the contrary, a few researches on sensorless controlled matrix converter
drives have been reported and verified by experiments [23]−[26].
108
Chapter 5 Hysteresis direct torque control (HDTC) for matrix converter drives
is worth noting that it increases the number of commutations in each PWM period by
four and the losses as well. It becomes even worse when there are more vectors
requiring the extension because the delay time is much larger than the minimum
commutation time, which normally occurs at zero and low frequency operation.
In this section, an adaptive sliding mode flux observer [27], [28] in the rotating (d-q)
reference frame for HDTC IPM machine driven by a matrix converter is presented. The
observer simultaneously estimates the stator flux linkage, rotor speed and position.
Compared to the open-loop estimator, the sliding mode observer (SMO) has better
dynamic behavior, robustness to parameter variations and high accuracy estimation
ability, equivalent to the Extended Kalman Filter (EKF) but requiring much less
computation time as it is much simpler. Figure 5−9 shows the proposed sensorless
HDTC IPMSM matrix converter drive system with modified switching pattern and
adaptive observer stator flux observer.
ω̂ > ωΔ θˆS
CT
T* ω̂ < −ωΔ va
vb
Tˆ vc
ω̂ ≤ ωΔ
CA
λs*
λˆs
Io
Vin θ − ϕin
*
in
θˆre d
λˆ
S
λˆd , λˆq vˆd , vˆq Vin
Tˆ id , iq
id , iq dq Io
θˆre ωˆ re abc
Figure 5−9. Proposed sensorless HDTC for matrix converter IPMSM drives.
109
Chapter 5 Hysteresis direct torque control (HDTC) for matrix converter drives
The IPMSM can be modeled in the rotor (d-q) reference frame with the d-axis oriented
along the permanent magnet flux.
d λd
vd = Rsid + − ωreλq
dt
(5−13)
dλ
vq = Rsiq + q + ωreλd
dt
where id and iq are the stator current components, RS is the stator resistance and ωre is
the electrical angular speed of the rotor. The stator flux components are
λd = Ld id + λ f
(5−14)
λq = Lqiq
where Ld , Lq and λ f are the dq-axis inductances and the permanent magnet flux,
respectively.
Substituting (5−13) into (5−14), the mathematical model of IPMSM can be derived.
§ RS ·
¨ − ωre ¸ §R ·
§ λd · Ld § λd · § vd · ¨ S ⋅ λ f ¸
¨¨ ¸¸ = ¨ ¸ + + Ld
RS ¸ ¨© λq ¹¸ ¨© vq ¹¸ ¨¨
(5−15)
¸
© λq ¹ ¨ −ωre − ¸
¨ Lq ¹¸ © 0 ¹
©
Assuming rotor orientation, the stator currents id , iq are taken as the outputs. Based on
the machine model (5−14) and (5−15), the adaptive model of the observer is defined by
§ Rs ·
§ λˆ · ¨ − L ωˆ re ¸ ˆ
§ λ · § vd · § s λ f ·
R
¨ d¸=¨ d ¸ d
¨ ¸+ ¨+ Ld ¸ + KS + sign (S) (5−16)
¨ λˆ ¸ ¨ Rs ¸ ¨ λˆq ¸ ¨© vq ¸¹ ¨¨ ¸
¸
© q ¹ ¨ −ωˆ re − ¸© ¹ © 0 ¹
© Lq ¹
§ 1 ·
λ
§ λˆd · §¨ f ·
0 ¸
§ id · ¨ Ld
ˆ
¸
¨ ¸=¨ ¸¨ ¸ − L (5−17)
¨ˆ ¸ 1 ¸ ¨ λˆq ¸ ¨¨ d ¸
© iq ¹ ¨¨ 0 © ¹ © 0 ¸
© Lq ¹¸ ¹
110
Chapter 5 Hysteresis direct torque control (HDTC) for matrix converter drives
where the superscript ^ denotes estimated values and K and are feedback gains of
the observer.
§k −k2 · §φ 0 ·
K=¨ 1 ¸ , =¨ 1 ¸ (5−18)
© k2 k1 ¹ © 0 φ2 ¹
The observer uses both linear and nonlinear feedback terms to increase the robustness
of the observer while ensures the close loop observer dynamics. The sliding hyperplane
S is defined on the basis of the stator current errors.
§ S1 · § id − iˆd · § 1/ Ld 0 · § λd − λˆd ·
S=¨ ¸=¨ ¸=¨ ¨ ¸
1/ Lq ¹¸ ¨ λq − λˆq ¸
(5−19)
© S2 ¹ ¨© iq − iˆq ¹¸ © 0 © ¹
Subtracting (5−16) from (5−15), the estimation error dynamics of the state variables is
obtained.
§ λ · §R · § λˆd · § vd · § s λ f
R ·
§ λd · § vd · ¨ s ⋅ λ f ¸−A
ˆ ¨ ¸ − ¨ ¸ − ¨ Ld ¸ − KC § λd · − sign(S)
¨ ¸ = A ¨ ¸ + ¨ ¸ + Ld
d
¨
¨ λ ¸ ¨ ¸ ¨ λˆ ¸ © vq ¹ ¨¨ ¸ ¨ ¸¸
© q¹ © λq ¹ © vq ¹ ¨ 0 ¸ © q¹ ¸ © λq ¹
© ¹ © 0 ¹
§ λ · § λˆ ·
¨ d ¸ − sign (S)
= ( A − KC) ¨ d ¸ + A (5−20)
¨λ ¸ ¨ λˆq ¸
© q¹ © ¹
§ − RS / Ld ωre · §1/ Ld 0 ·
=§ 0 ω re ·
A=¨ ¸, C=¨ ¸ and A ¨ ¸.
© −ωre − RS / Lq ¹ © 0 1/ Lq ¹ © −ω re 0 ¹
In order to derive the adaptive scheme, the following nonnegative Lyapunov function
candidate is considered.
1 T ω re 2
V= ( + )≥0 (5−21)
2 γ1
where γ 1 > 0 . Assuming that the rotor angular speed is constant within a sampling
interval, the derivative of it is zero. Therefore,
111
Chapter 5 Hysteresis direct torque control (HDTC) for matrix converter drives
ω ωˆ
V = T + re (ω re − ωˆ re ) = T − re ω re (5−22)
γ1 γ1
§ λˆq ·
λ = ( A - KC)λ + ωre ¨
¸ − sign (S) (5−23)
¨ −λˆ ¸
© d¹
§ λˆ · ωˆ
V = λT ( A - KC)λ + λT ωre ¨ q ¸ − λT sign (S) − re ωre
¨ −λˆ ¸ γ1
© d¹
ωˆ
= T ( A - KC) + ω re (λˆqλd − λˆd λq − re ) − T Csign ( ) (5−24)
γ1
From the Lyapunov stability theorem, the system is global asymptotic stable if V < 0 .
Thus, the following conditions are required, where the first one is used to obtain the
speed-adaptation law.
ωˆ re
λˆqλd − λˆd λq − =0 (5−25)
γ1
From (5−25), the following adaptation law for the rotor speed can be deduced.
( )
ωˆ re = λˆqλd − λˆd λq / γ 1 (5−28)
In order to improve the dynamic behavior of the speed estimation, a proportional term is
added [27]. It becomes a PI estimator.
where K smoP and K smoI are the proportional and integral gains of PI mechanism. The
estimated speed ωˆ re obtained from the adaptive scheme is used to correct the adaptive
model of the observer straightway and close the speed control loop as the feedback after
112
Chapter 5 Hysteresis direct torque control (HDTC) for matrix converter drives
being low-pass filtered. The estimated position is the integral of the estimated speed
before the low-pass filter. The block diagram of the adaptive observer is shown in
Figure 5−10. The stator voltages are not measured but reconstructed, free from PWM
pulses, using measured input voltages with duty cycle and sector information. And then
the reconstructed stator voltages and measured stator currents are transformed into the
rotor reference frame with the estimated position.
With the estimated flux components obtained from the observer, the magnitude of the
estimated stator flux linkage and electromagnetic torque are then given by
3
(
Tˆ = P λˆd iq − λˆqid
2
) (5−31)
Since and C are positive diagonal matrices, the inequation (5−27) is always true.
According to the Lyapunov direct method above, the observer gain matrix K has to be
selected so that the first term of (5−24) is negative semidefinite and thus to guarantee its
stability at any operation point [28]. This condition stipulates that the eigenvalues of
u in uS iS
e− jθre
ˆ
d
id , iq
id , iq
C
θˆre
λd , λq
− jθˆ ωˆ re
e re
λˆd , λˆq
vˆd , vˆq iˆd , iˆq
113
Chapter 5 Hysteresis direct torque control (HDTC) for matrix converter drives
( A - KC) are in the left-half plane, since T ( A - KC) ( is nonsingular) has the same
eigenvalues as ( A - KC) .
The classical approach to observer gain selection is to place the observer poles
proportionally to the motor poles such that the observer errors decrease faster than the
motor transients [27]. But this approach is susceptible to noise. The problem can be
circumvented by a new pole-placement technique [28]. In the new method, the poles of
the motor are shifted to the left in the complex plane while the imaginary parts of poles
remain the same. This amplifies the contribution of slower eigenvalue and thus
improves the error convergence rate. Nevertheless, the improvement can be observed on
the noise immunity of the observer because the other pole, already having a large
magnitude is less amplified [29]. This approach is adopted in this thesis.
It can be shown that the poles of the machine are the eigenvalues of A and are the roots
of the following characteristic equation.
§ 1 1 · R2
s 2 + Rs ¨ + ¸ s + S + ωre2 = 0 (5−32)
¨L ¸
© d Lq ¹ Ld Lq
On the other hand, the poles of the observer are governed by the eigenvalues of
§k −k2 ·
( A − KC) and are the roots of (5−33), defining K = ¨ 1 .
© k2 k1 ¹¸
§ 1 1 · (R + k ) § k ·§ k ·
2
s + ( RS + k1 ) ¨ + ¸ s + S 1 + ¨ ωre + 2 ¸ ¨ ωre + 2 ¸ = 0
2
(5−33)
¨L ¸ Ld ¹ ©¨ Lq ¹¸
© d Lq ¹ Ld Lq ©
where p o1, 2 (ω re ) and p1, 2 (ω re ) are the observer and machine poles respectively and
k >0.
The sum of the observer roots is 2k smaller than that of motor but the imaginary parts
of the roots are identical. Thus the following equations are obtained.
114
Chapter 5 Hysteresis direct torque control (HDTC) for matrix converter drives
§ 1 1 · § 1 1 ·
( pm1 + pm 2 ) − ( po1 + po 2 ) = − RS ¨¨ + ¸ + ( RS + k1 ) ¨ + ¸ = 2k
¸ ¨ ¸
(5−35)
© Ld Lq ¹ © Ld Lq ¹
2 2
§ RS RS · § RS2 · § RS + k1 RS + k1 · ª ( RS + k1 )2 § k ·§ k ·º
+ ¸¸ − 4 ¨¨ + ωre ¸ = ¨
2
+ − 4« + ¨ ωre + 2 ¸ ¨ ωre + 2 ¸ »
¨¨ Ld Lq ¸ ¨ Lq ¹¸
¸
Ld ¹ ©¨ Lq ¹¸ »¼
© ¹ © Ld Lq ¹ © Ld ¬« Ld Lq ©
(5−36)
Ld Lq
k1 = 2k (5−37)
Ld + Lq
ª 2§ Ld Lq · § Ld Lq · L2d + L2q + Ld Lq º
1
( d q ) re
2
k2 = ± L + L ω 2
+ 16 « k ¨¨ 1 − ¸¸ ¨¨ 1 + ¸ + kR »
«¬ © Ld + Lq ¹ © Ld + Lq ¹¸ Ld + Lq
S
2 »¼
−
1
2
( Ld + Lq ) ωre (5−38)
To guarantee the both poles of the observer have negative real parts, the second term on
the right side of (5−36) has to be negative. This can be ensured if k2 is selected having
the same sign as ωre , since the first term is bigger than the second one in (5−38).
ª 2§ Ld Lq · § Ld Lq · L2d + L2q + Ld Lq º
1
(L + Lq )
2
k2 = sign (ωre ) ω + 16 « k ¨ 1 −
2
¸¸ ¨¨ 1 + ¸ + kRS »
¨ Ld + Lq ¹¸
¬« © Ld + Lq ¹ © Ld + Lq
d re
2 ¼»
−
1
2
( Ld + Lq ) ωre (5−39)
It is noted that k2 is related to the rotor speed. Since the actual speed ωre is not
where φ1 , φ2 > 0 . Large values of φ1 and φ2 increase the robustness of the observer but
may generate unwanted chattering. Small positive values are assigned to the gain
= φ1I for the nonlinear feedback term, so that 0 < φ1 , φ2 < 1 is practical for a real
drive.
115
Chapter 5 Hysteresis direct torque control (HDTC) for matrix converter drives
One of the effects of input filter capacitors of matrix converter causes the input current
to lead the input phase voltage even though IPF reference is set to one. Without the
input displacement factor correction, i.e. ϕin = 0 in the duty cycles (5−8)−(5−10), the
actual IPF is less than one. This leading angle decreases with increasing the output
power. It also depends on the size of filter capacitors, but the input filter has to fulfill
the cut-off frequency and be selected with respect to the rated power level. In order to
have unity IPF when the matrix converter operates whether at rated output power or
lower, the IPF corrector ϕin should be adjusted according to the power level. In this
way, the input current vector is forced to lag the input voltage vector by subtracting the
correcting angle from the reference angle θin* so that the actual IPF is unity. The
correcting angle varies as a function of the output power which can be calculated with
the product of estimated speed and torque. The function can be represented by a 4-order
polynomial as given in Figure 5−11. The correcting angle for the generating mode is
just the minus value at the same point.
A Simulink model has been built to confirm the validity of the proposed sensorless
1.2
y = 3.3388x4 - 9.8174x3 + 10.534x2 - 5.3044x +
1.283
1
0.8
phi_in (rad)
0.6
0.4
0.2
0
0 0.5 1
power ratio (Po/Pn)
Figure 5−11. Correcting angle vs. output power ratio for IPFC.
116
Chapter 5 Hysteresis direct torque control (HDTC) for matrix converter drives
Table 5−5. Parameters of the HDTC drive used in simulation and experiment.
HDTC scheme for matrix converter fed IPM synchronous machine. A three-phase L-C
(1.5mH-19.8DF/phase) configuration with damping parallel resistor (47/phase) has
been chosen for the input filter. The parameters of the IPM motor under investigation
are given by Table A−1 in Appendix A. The control parameters used in the simulations
and experiments are listed in Table 5−5. The sampling period is 60Ds which is limited
by the maximum switching frequency of the gate drive (20kHz) and the execution time
of the ISR (about 50Ds) with DS1104. The bandwidths of the flux and torque
comparators have been set to 1% and 5% of the rated values respectively, considering
both switching losses and ripples. PI gains have been settled by online manual tuning.
The torque dynamics is shown in Figure 5−12 and Figure 5−13. A square-wave rated
load torque was applied to the shaft at 1000rpm. The load torque is first changed
stepwise from zero to −6N⋅m at 0.6s and reversed every 0.4s respectively. As seen from
Figure 5−12, the swift speed recovery occurs with about 300rpm overshooting or
undershooting because of the suddenly reversed load torque. The reference flux value is
0.55Wb. The torque and flux ripples are quite small 0.4N⋅m and 0.02Wb respectively.
These ripples are undesirable because they generate unwanted noise and cause extra
losses in the stator. From the estimation errors shown in Figure 5−13, the estimated
speed tracks the actual speed very well at both transient and steady-state while the
electrical position error is less than 2º in steady-state and 6º at transient. Hence, the
adaptive observer has excellent load disturbance rejection capability.
117
Chapter 5 Hysteresis direct torque control (HDTC) for matrix converter drives
Figure 5−14 shows the performance of the drive system under speed reversal condition
between −100rpm and +100rpm, confirming that the adaptive observer is able to deliver
accurate estimation at the low speed. The speed estimation error is bounded within
40rpm during transients and converges to zero in steady-state. The position error is
approximately 4º in steady-state and 10º at transient. The corresponding stator current
estimation errors converge to zero in the steady-state after a transient error as can be
seen in Figure 5−14.
1500
Speed (rpm)
1000
500
0.9 1 1.1 1.2 1.3 1.4 1.5 1.6
6
Torque (N•m)
3
0
-3
-6
0.57
Flux (Wb)
0.55
0.53
4
Stator currents (A)
-2
-4
0.9 1 1.1 1.2 1.3 1.4 1.5 1.6
Time (sec)
118
Chapter 5 Hysteresis direct torque control (HDTC) for matrix converter drives
A 7.5kW matrix converter is developed for testing the drive as described in Chapter 4.
The control board consists of a DS1104 R&D board and an ACEX 1K development
board for current commutation. The control parameters and sampling period of the
control system are the same as those used in the simulation given by Table 5−5. In order
to investigate the performance in both motoring and generating situations, the matrix
converter feeds a 230 V four-pole 0.97 kW IPM synchronous motor mechanically
coupled with a permanent magnet DC machine. The PMDC machine is used as a
dynamometer to load the IPM motor and driven by an H-bridge DC/DC converter. The
1500
Speed (rpm)
1000
Estimated Actual
500
0.4 0.6 0.8 1 1.2 1.4 1.6 1.8 2
60
Speed error
30
0
-30
-60
0.4 0.6 0.8 1 1.2 1.4 1.6 1.8 2
180
Position (deg)
-180
0.4 0.6 0.8 1 1.2 1.4 1.6 1.8 2
20
Position error
-20
0.4 0.6 0.8 1 1.2 1.4 1.6 1.8 2
0.5
current error(A)
id error iq error
-0.5
0.4 0.6 0.8 1 1.2 1.4 1.6 1.8 2
Time (sec)
119
Chapter 5 Hysteresis direct torque control (HDTC) for matrix converter drives
armature current of DC machine is regulated to carry out a four-quadrant load test. The
generated energy is damped to a braking resistor to keep the DC voltage of the H-bridge
constant during generating mode.
Figure 5−15 shows the speed dynamics of the proposed HDTC scheme in the forward
and reverse operations with ±1000 rpm square-wave reference. It is noted that a smooth
and stable zero crossing of the speed is obtained. From 0.665s to 0.735s is the low
100
Speed (rpm)
0
Estimated
-100
Actual
0.4 0.6 0.8 1 1.2 1.4 1.6 1.8
60
Speed error
30
0
-30
-60
0.4 0.6 0.8 1 1.2 1.4 1.6 1.8
180
Position (deg)
-180
0.4 0.6 0.8 1 1.2 1.4 1.6 1.8
20
Position error
-20
0.4 0.6 0.8 1 1.2 1.4 1.6 1.8
0.5
id error
current error(A)
iq error
0
-0.5
0.4 0.6 0.8 1 1.2 1.4 1.6 1.8
Time (sec)
Figure 5−14. Estimation errors under speed reversal at 100rpm with no load
(simulation)
120
Chapter 5 Hysteresis direct torque control (HDTC) for matrix converter drives
speed range within ±300rpm, where six backward or forward active vector is selected,
instead of zero vector, to regulate the load angle and thus the torque. In high and
medium speeds, the effect of zero vector on the torque control will be considered, which
is that zero vector reduces the load angle at high positive speeds while increases the
load angle at high negative speeds.
The torque reversal dynamics is verified by loading the PMDC machine with successive
rated load reversals at 1000rpm, as illustrated in Figures 5−16 and 5−17. The
experimental results agree well with the simulations. The estimated speed from the
SMO tracks the actual speed very well at both transient and steady-state, ±60rpm
-600
0.6 0.62 0.64 0.66 0.68 0.7 0.72 0.74 0.76 0.78 0.8
-4
Est. Ref.
Torque (N•m)
-6
-8
0.6 0.62 0.64 0.66 0.68 0.7 0.72 0.74 0.76 0.78 0.8
0.58
Flux (Wb)
0.55
0.52
Est. Ref.
0.6 0.62 0.64 0.66 0.68 0.7 0.72 0.74 0.76 0.78 0.8
Stator current (A)
4
2
0
-2
-4
0.6 0.62 0.64 0.66 0.68 0.7 0.72 0.74 0.76 0.78 0.8
Time (sec)
Figure 5−15. Smooth transient between high and low speed regions using speed-
dependent hysteresis comparator and vector selection criteria at a speed reversal from
1000rpm to −1000rpm without load (experiment).
121
Chapter 5 Hysteresis direct torque control (HDTC) for matrix converter drives
estimation error reducing to zero immediately after the transition. The position
estimation error is small, approximately 8º electrical during transients and 3º in the
steady-state. Clearly, the adaptive observer has excellent load disturbance rejection
capability at high speeds.
The input and output performance of matrix converter under rated load disturbance is
illustrated in Figure 5−17, confirming the inherent bidirectional power-flow capability
of the matrix converter. It can be seen from Figure 5−17(a) that the input current has
1500
speed (rpm)
Estimated Actual
1000
500
0 0.5 1 1.5 2 2.5 3
speed error
60
-60
0 0.5 1 1.5 2 2.5 3
180
(elec. degree)
position
-180
0 0.5 1 1.5 2 2.5 3
20
(elec. degree)
position error
-20
0 0.5 1 1.5 2 2.5 3
1
current error(A)
i d error iq error
-1
0 0.5 1 1.5 2 2.5 3
Time (sec)
Figure 5−16. Transient response of proposed HDTC at 1000rpm with successive rated
load reversals (experiment)
122
Chapter 5 Hysteresis direct torque control (HDTC) for matrix converter drives
180° phase difference from the corresponding input phase voltage during regenerative
braking while they are in phase during motoring operation after a short transient
process, as shown in Figure 5−17(b). It also indicates that the matrix converter is either
Figure 5−17. Input current (5A/div), phase voltage (50V/div), torque (5 Nm/div) and
stator current (2A/div) of proposed HDTC at 1000rpm under rated load reversal.
123
Chapter 5 Hysteresis direct torque control (HDTC) for matrix converter drives
drawing electric power from the AC mains to DC machine or feeding generative power
back to the mains with nearly sinusoidal waveforms and at unity input power factor. It
is noted that both input and stator current waveforms are sinusoidal immediately after
the torque reversal command.
The low-speed reversal between −100rpm and +100rpm with 75% load is depicted in
Figure 5−18. The estimated and actual speed and position, current, speed and position
estimation errors are shown. The estimated position and speed follow the actual
speed (rpm)
100 Estimated
Actual
0
-100
0 1 2 3 4 5
60
speed error
-60
0 1 2 3 4 5
180
(elec. degree)
position
-180
20 0 1 2 3 4 5
(elec. degree)
position error
-20
0 1 2 3 4 5
1
current error(A)
i d error i q error
-1
0 1 2 3 4 5
Time (sec)
Figure 5−18. Reversal speed operation of proposed HDTC at ±100rpm under 75%
rated load (experiment).
124
Chapter 5 Hysteresis direct torque control (HDTC) for matrix converter drives
150
speed (rpm)
Estimated Actual
100
50
0 0.5 1 1.5 2 2.5
60
speed error
-60
0 0.5 1 1.5 2 2.5
20
(elec. degree)
position error
-20
0 0.5 1 1.5 2 2.5
1
current error(A)
id error iq error
-1
0 0.5 1 1.5 2 2.5
7
Troque (N•m)
5
0 0.5 1 1.5 2 2.5
0.56
Flux (Wb)
0.55
0.54
2
0
-2
-4
0 0.5 1 1.5 2 2.5
Time (sec)
125
Chapter 5 Hysteresis direct torque control (HDTC) for matrix converter drives
values respectively very closely even during the transients. The transient errors are
bigger during positive acceleration than the negative acceleration. But after a short time
0.4s, the speed error converges to zero and position and current errors reduce very close
to zero in the steady-state.
126
Chapter 5 Hysteresis direct torque control (HDTC) for matrix converter drives
errors are quite small, confirming the effectiveness of sensorless control strategy at low
speeds. The flux and torque ripples are within ±1% and ±2.5% of the rated value, which
implies that the drive performance is not compromised by using proposed HDTC.
The input current and stator current waveforms and their corresponding harmonic
spectrums at 50rpm with 3.5N⋅m load are shown in Figure 5−20. It can be noted that the
input current is sinusoidal with the high harmonic components scattered from
fundamental to 3kHz and centered around the resonance frequency of the input filter.
6
Torque(N•m)
0
0 0.02 0.04 0.06 0.08 0.1 0.12 0.14 0.16 0.18 0.2
0.57
Stator flux(Wb)
0.55
0.53
0 0.02 0.04 0.06 0.08 0.1 0.12 0.14 0.16 0.18 0.2
4
Stator currents(A)
-2
-4
0 0.02 0.04 0.06 0.08 0.1 0.12 0.14 0.16 0.18 0.2
4 200
Phase voltage(V)
Input current(A)
2 100
0 0
-2 -100
-4 -200
0 0.02 0.04 0.06 0.08 0.1 0.12 0.14 0.16 0.18 0.2
Time(sec)
Figure 5−21. Torque, stator flux, stator currents and input currents of proposed HDTC
at 1200 rpm, under 5 N⋅m load (simulation).
127
Chapter 5 Hysteresis direct torque control (HDTC) for matrix converter drives
Since the output power is far from the rated power, the effect of input capacitor on the
displacement angle is obvious without IPFC. The output current is sinusoidal with high
order harmonic content.
6
Torque(N•m)
0
0 0.02 0.04 0.06 0.08 0.1 0.12 0.14 0.16 0.18 0.2
0.57
Stator flux(Wb)
0.55
0.53
0 0.02 0.04 0.06 0.08 0.1 0.12 0.14 0.16 0.18 0.2
4
Stator currents(A)
-2
-4
0 0.02 0.04 0.06 0.08 0.1 0.12 0.14 0.16 0.18 0.2
4 200
Phase voltage(V)
Input current(A)
2 100
0 0
-2 -100
-4 -200
0 0.02 0.04 0.06 0.08 0.1 0.12 0.14 0.16 0.18 0.2
Time(sec)
Figure 5−22. Torque, stator flux, stator currents and input currents of classical HDTC
at 1200 rpm, under 5 N⋅m load (simulation).
128
Chapter 5 Hysteresis direct torque control (HDTC) for matrix converter drives
In the previous section, a novel sensorless HDTC scheme for matrix converter drive is
presented and verified by simulations and experiments. Being a new scheme, what is
the advantage or improvement of the proposed HDTC over the classical HDTC? This
section will answer this question by comparing both the steady-state and dynamic
performances of the proposed HDTC with those of the classical HDTC in simulation
FFT window: 2 of 12.5 cycles of selected signal FFT window: 2 of 15 cycles of selected signal
4 4
Input current (A)
0 0
-2 -2
-4 -4
0.18 0.185 0.19 0.195 0.2 0.205 0.21 0.215 0.18 0.185 0.19 0.195 0.2 0.205 0.21 0.215
Time (sec) Time (s)
Fundamental (50Hz) = 2.381 , THD= 14.30% Fundamental (50Hz) = 2.466 , THD= 24.53%
15
8
Mag (% of Fundamental)
Mag (% of Fundamental)
6 10
4
5
2
0 0
0 500 1000 1500 2000 0 500 1000 1500 2000
Frequency (Hz) Frequency (Hz)
FFT window: 2 of 8 cycles of selected signal FFT window: 2 of 12 cycles of selected signal
4 4
S tator current (A)
2 2
0 0
-2 -2
-4 -4
0. 06 0.07 0. 08 0.09 0.1 0.06 0.07 0.08 0.09 0.1
Time (sec) Time (sec)
Fundamental (40Hz) = 3. 046 , THD= 4.87% Fundamental (40Hz) = 3.035 , THD= 4.97%
M ag (% of F undamental)
Mag (% of Fundamental)
1.5 1.5
1 1
0.5 0.5
0 0
0 500 1000 1500 2000 2500 3000 0 500 1000 1500 2000 2500 3000
Frequency (Hz) Frequency (Hz)
Figure 5−23. Input and output currents and their harmonic spectrums of two HDTC
schemes.
129
Chapter 5 Hysteresis direct torque control (HDTC) for matrix converter drives
and experiments in terms of input and output qualities of the matrix converter drive.
Besides, the effectiveness IPFC strategy will be verified by experimental results.
In order to compare these two schemes, the classical HDTC is incorporated in the
Figure 5−24. Input current (5A/div), phase voltage (50V/div), torque (5 Nm/div) and
stator current (2A/div) of classical HDTC at 600rpm under rated load reversal.
130
Chapter 5 Hysteresis direct torque control (HDTC) for matrix converter drives
Simulink model. The control system can easily switch between these two schemes by a
DTC mode switch. The bandwidth for the IPF controller is 1e-3, and the time constant
of digital filter for the displacement angle is 3TS .
Figure 5−21 and Figure 5−22, the comparison of the speed step response of the two
Figure 5−25. Input current (2A/div), phase voltage (50V/div), torque (5 Nm/div) and
stator current (2A/div) of the proposed HDTC at 600rpm under rated load reversal
without IPFC.
131
Chapter 5 Hysteresis direct torque control (HDTC) for matrix converter drives
algorithms under 5 N⋅m, show higher input current harmonic amplitude in the classical
HDTC, while the drive performance including the torque, stator flux and stator current,
is not affected by the modified HDTC method. It can be seen from Figure 5−23, the
amplitude of harmonics in the input current of classical HDTC is nearly twice that of
the proposed HDTC from steady-state spectrum analysis, while the output qualities are
almost the same.
Figure 5−26. Input current (2A/div), phase voltage (50V/div), torque (5 Nm/div) and
stator current (2A/div) of proposed HDTC at 600rpm with IPFC.
132
Chapter 5 Hysteresis direct torque control (HDTC) for matrix converter drives
Both HDTC schemes use the same hardware and control parameters. The adaptive flux
observer and sensorless control are also employed by both of them. The IPFC strategy
is applicable to the both HDTC schemes and verified under steady-state and transients,
Figure 5−27. Steady-state performance of the classical HDTC at 100 rpm, under rated
load.
133
Chapter 5 Hysteresis direct torque control (HDTC) for matrix converter drives
motoring and generating operations. All results shown are under sensorless control.
The transient performance under full torque reversal is compared in Figure 5−24 to
Figure 5−26. Although they both perform bidirectional power-flow naturally, the input
quality of the proposed HDTC is obviously improved by using the new switching
Figure 5−28. Steady-state performance of the proposed HDTC at 100rpm, under rated
load.
134
Chapter 5 Hysteresis direct torque control (HDTC) for matrix converter drives
Figure 5−29. Input current and stator current of the classical HDTC with their harmonic
spectrums, 20dB/div, at 500 rpm under rated load.
135
Chapter 5 Hysteresis direct torque control (HDTC) for matrix converter drives
Figure 5−30. Input current and stator current of the proposed HDTC with their harmonic
spectrums, 20dB/div, at 500 rpm under rated load.
136
Chapter 5 Hysteresis direct torque control (HDTC) for matrix converter drives
pattern. The harmonic distortion is related to the control cycle and load level which can
be seen at the torque rising or falling. Moreover, the input current is leading the voltage
without using IPFC, since the matrix converter doesn’t deliver or feed the rated power.
This results from the oversized input filter capacitance which is designed for rated
power operation. As shown in Figure 5−26(a) and (b), the input current is almost in
phase with the corresponding phase voltage during motoring operation when the torque
is positive. On the other hand, the phase difference between the phase voltage and the
current is 180° during regenerative braking when the torque is negative at same speed.
The effect of the capacitance over-sizing can be compensated by introducing a power-
related correcting angle into duty cycle calculations in (5−11) and (5−12).
Steady-state performance at low speed under full-load is compared in Figure 5−27 and
Figure 5−28. The FFT of stator current and filtered input current are taken into in the
comparison. Comparing Figure 5−27(a) and Figure 5−28(a), the harmonic distortion of
the input current of the classical HDTC is much more serious than that of the proposed
HDTC, which can be observed from their FFT traces under the currents. However, the
performance of output current is not affected by the new switching pattern used in the
proposed HDTC, as clearly seen in Figure 5−27(b) and Figure 5−28(b).
The IPFC strategy is applicable to both methods at steady-state, which can be seen from
the waveforms at 500rpm and rated load in Figure 5−29 and Figure 5−30. In the
classical HDTC, the IPFC reduces the distortion of the input current as well as
obtaining unity input power factor, as shown in Figure 5−29(a) and (b). In the proposed
HDTC, IPFC compensates 25º displacement at 33% rated power, which fits the curve in
Figure 5−11. It is also seen that the input current has been improved while the stator
current hasn’t been changed by IPFC in both schemes.
The qualities of input and output of classical HDTC and proposed HDTC are compared
in Figure 5−31 and Figure 5−32 by means of Total Harmonic Distortions (THDs). The
test has been performed from 100rpm to 1200rpm in steps of 100rpm with 0 to nominal
load in steps of 1N⋅m. It can be seen that the THDs of stator currents are quite similar to
each other. The THDs of stator currents increase with lightening the load and lowering
speed. The maximum THD occurs around 100rpm. However it is bounded by 13% for
both methods in the entire testing range. As for the input current, THD of proposed
137
Chapter 5 Hysteresis direct torque control (HDTC) for matrix converter drives
HDTC is lower than that of the classical scheme, especially at medium and high speeds
with heavy load, which is within 20% compared to more than 40% of the classical
HDTC. The improvement can be clearly demonstrated by the THD differences shown
in Figure 5−30(b) and 5−31(b).
Mod. HDTC
Conv. HDTC
15
Stator current THD (%)
10
200
400
6
Sp
ee 600 5
d(
rpm 800 4
)
) 3 (N•m
1000 or q e
u
2 T
1200
1
5
Stator current THD (%)
6
-5
5
200 4 m)
N•
400 e(
Spe 600
3
r qu
ed ( 800 To
rpm 2
) 1000
1
1200
(b) ΔTHD
Figure 5−31. Comparison of output quality of two HDTC schemes from 100 to
1200rpm and 0 to 6 N⋅m (experiment).
138
Chapter 5 Hysteresis direct torque control (HDTC) for matrix converter drives
Figure 5−33 shows the comparison at particular speeds, 1000rpm, 600rpm and 200rpm
with zero to full load. The result again coincides with conclusion drawn above.
Mod. HDTC
Conv. HDTC
50
40
Input current THD (%)
30
20
10
200
Sp 400
ee
d 600 6
( rp
m 800 5
) 4
1000 3 (N•m)
2 Tor que
1200
1
40
Input current THD (%)
30
20 1
10 2
0 3
)
(N
•m
1200 4
ue
1000
rq
To
800
5
Speed 600
(rpm) 400
200 6
(b) ΔTHD
Figure 5−32. Comparison of input quality of two HDTC schemes from 100 to 1200rpm
and 0 to 6 N⋅m (experiment).
139
Chapter 5 Hysteresis direct torque control (HDTC) for matrix converter drives
50
Stator current of mod. HDTC
Stator current of conv. HDTC
40 Input current of mod. HDTC
Input current of conv. HDTC
30
THD (%)
20
10
0
1 2 3 4 5 6
Torque (N•m)
(a) At 1000rpm.
45
Stator current of mod. HDTC
40
Stator current of conv. HDTC
35 Input current of mod. HDTC
Input current of conv. HDTC
30
THD (%)
25
20
15
10
0
1 2 3 4 5 6
Torque (N•m)
(b) At 600rpm.
35
Stator current of mod. HDTC
30 Stator current of conv. HDTC
Input current of mod. HDTC
25 Input current of conv. HDTC
THD (%)
20
15
10
0
1 2 3 4 5 6
Torque (N•m)
(c) At 200rpm.
140
Chapter 5 Hysteresis direct torque control (HDTC) for matrix converter drives
5.7 Conclusion
This chapter has briefly reviewed the classical HDTC technique for VSI drives. Then it
has been extended to HDTC for the matrix converter drive which allows the further
control of input power factor in addition to the stator flux and torque of the motor with
three hysteresis comparators. The switching table for voltage vectors is exactly the same
as HDTC for VSI. The switching table for current vector is developed for the unity
input power factor control, as is not allowed in VSI HDTC. At any control cycle, the
most opportune switching combination is selected according to the outputs of these
three hysteresis controllers and the location of the stator flux to drive the errors of stator
flux and electromagnetic torque within the hysteresis band while maintaining the unity
input power factor.
Due to the hysteresis control features, the input current has harmonic components,
which is getting worse under heavy load and/or using not sufficiently high sampling
frequency. This problem can be solved using the proposed HDTC scheme with a
modified switching pattern and selection criteria. The proposed method employs speed-
dependent hysteresis torque controller utilizing the effects of zero vectors on the load
angle in different speed ranges. The most contribution is to better the input quality by
applying two adjacent current vectors for their own durations at each cycle according to
the input voltage vector position. Moreover, it simplifies the control structure by
eliminating the displacement angle estimator, low-pass filter and the input power factor
hysteresis controller, but it doesn’t compromise the merits of classical HDTC. An
adaptive stator flux observer is incorporated to realize a speed sensorless closed loop
control and accurate flux estimation over the wide speed range.
The performance of the proposed sensorless HDTC matrix converter IPMSM drive
system has been presented and verified by both extensive experimental and simulation
results. The effectiveness of the new input power factor correction strategy is confirmed
at transients and steady-states in the experiments. On the basis of the comparison and
analysis carried out for the two HDTC systems, the proposed control scheme is superior
to the classical one on the input side quality while they have identical performance on
the machine side. However unfortunately, the ripples in the torque, flux and currents are
high and the drive system cannot reach very low speeds or standstill with full load
141
Chapter 5 Hysteresis direct torque control (HDTC) for matrix converter drives
because there is no accurate synthesis of input or output space vector. Solutions to these
problems are presented in Chapter 6, which includes DTFC and ISVM.
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142
Chapter 5 Hysteresis direct torque control (HDTC) for matrix converter drives
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matrix converter drives using an overmodulation strategy and a simple
nonlinearity compensation,” IEEE Trans. on Ind. Electron., vol. 54, no. 6, pp.
3155–3166, Dec. 2007.
[26] Q. Gao, G. M. Asher, and M. Sumner, “Zero speed position estimation of a matrix
converter fed AC PM machine using PWM excitation,” EPE-PEMC’08, pp.
2261–2268, Sep. 2008.
143
Chapter 5 Hysteresis direct torque control (HDTC) for matrix converter drives
[27] H. Kubota, K. Matsuse and T. Nakano, “DSP based speed adaptive flux observer
for induction motor applications,” IEEE Trans. on Ind. Applicat., vol. 29, pp.
344–348, Mar./Apr. 1993.
[28] J. Maes and J. Melkebeek, “Speed sensorless direct torque control of induction
motors using an adaptive flux observer,” IEEE Trans. on Ind. Applicat., vol. 35,
pp. 778–785, May/June 2000.
[29] J. Holtz, “Sensorless control of induction machines – With or without signal
injection?” IEEE Trans. on Ind. Electron., vol. 53, pp. 7–30, Feb. 2006.
144
Chapter 6 Sensorless DTFC-ISVM IPMSM MC Drive using a combined adaptive flux
observer
6.1 Introduction
In the previous chapter, a new hysteresis direct torque control (HDTC) scheme has been
proposed, studied and implemented on the IPM machine driven by a matrix converter.
Compared with the conventional HDTC, the proposed HDTC scheme features lower
harmonic content in the input current, structural simplicity and unity input power factor
without compromising the merits of DTC, such as fast responses and robustness to
parameter variations. Moreover, the sensorless control has been implemented in the HDTC
drive system as well. An adaptive sliding mode flux observer (SMO) in the rotating (d-q)
reference frame simultaneously estimates the stator flux linkage, rotor speed and position.
However, it possesses several major disadvantages that can be summarized as follows:
• high ripples in torque and flux linkage even at high sampling frequency due to the
hysteresis control feature and the limited number of voltage vectors available;
• low cut-off frequency of the input filter and consequently big filter capacitance;
145
Chapter 6 Sensorless DTFC-ISVM IPMSM MC Drive using a combined adaptive flux
observer
• instability at very low speed and standstill;
The high ripple in the torque and the flux is one of the major drawbacks of HDTC. It relies
on the inherence of the hysteresis control. It also results from the low resolution vector
synthesis using the six fixed-direction voltage vectors. The torque ripples give rise to
fatigue in the shaft and also cause unsmooth operation. High distortion in the stator current
increases extra noise and losses of the machine. In addition, high harmonic content in the
input current degrades the input quality of matrix converter even with a bigger input filter.
Although a higher sampling frequency could be used to further suppress the ripples and
distortions, a very sophisticated DSP is needed to achieve such a high switching frequency
and this will inevitably increase the overall system cost. In addition, it will result in an
increase in the switching losses. Another inherent drawback of the fixed-band hysteresis
control is the switching frequency variation, which makes the input filter design difficult
and normally an oversized filter is used.
The vector selection criteria based on a six vector resolution is inadequate to synthesize the
stator flux vector having a circle locus. The reconstructed output voltages among six fixed-
direction and fixed-length vectors used in SMO make it difficult to accurately estimate the
flux and seriously affect the stability of the sensorless control at low speeds. In addition, the
estimation of stator flux linkage and torque involves stator resistance which is neglected in
the flux control. Any difference between the actual stator resistance and the value used in
the SMO will give rise to the errors in the estimated flux linkage and torque. The system is
degraded due to the rising estimation errors and fails at low speeds.
In order to reduce the flux and torque ripples, the resolution of the voltage vectors can be
improved by using multiple level inverters [1], [2]. However, due to the increased number
of power switches, the switching losses, system cost and complexity increase. Noguchi et al
[3] proposed a high-frequency and small amplitude triangular dither signal injection
scheme on the flux and torque errors to counteract the delay time in the feedback signals.
With the help of extra hardware, this method is simple to implement and the torque and
flux ripples are suppressed with enlarging switching frequency in the DTC controller [3].
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Chapter 6 Sensorless DTFC-ISVM IPMSM MC Drive using a combined adaptive flux
observer
An improved DTC scheme has been proposed to reduce torque and flux ripples while
maitaining the constant and low switching frequency by means of space vector modulation
(SVM) [4]−[9]. The reduction in torque and flux ripples was achieved by synthesizing an
arbitrary output voltage vector by two adjacent fixed-direction voltage vectors. The
improvement obtained is on DTC VSI drives. As the matrix converter can be considered as
two-stage converter according to ISVM theory, DTC-SVM strategy for VSI can be
transferred to MC drives [10]−[12]. The steady-state performance is improved under
constant switching frequency, but the dynamic response is not as fast as the classical DTC.
An overmodulation strategy is proposed and employed in ISVM to improve the transient
response [12]. The six-step overmodulation is only allowed in the inverter stage while the
input vector is modulated in linear region in the rectifier stage, which does not generate the
output vector with maximum amplitude which is the maximum input line-to-line voltage.
To solve the problems mentioned above, a direct torque and flux control (DTFC) scheme
based on ISVM for MC-fed IPMSM drive is firstly proposed in this chapter. It features low
torque and flux ripples, constant switching frequency and sinusoidal input/output currents
while maintaining unity input power factor and fast dynamics. Independent closed-loop
control of both the torque and stator flux linkage is achieved by using two PI controllers.
The reference voltage vectors are generated by three-mode ISVM unit, which replaces the
switching table in the conventional HDTC scheme. The fast dynamics of classical HDTC is
preserved by the overmodulation mode. The low speed performance is enhanced and
switching losses are reduced by the modified modulation mode. At medium and high speed,
the conventional ISVM is employed to realize DTFC. The IPFC strategy is applicable to
both linear modulation modes in steady-states without affecting the dynamics. The
principle and PI controller design of DTFC is discussed. A modified adaptive flux observer
has been presented in the sensorless DTFC IPMSM MC drive. Inserting a speed correction
term in the adaptive model increases the immunity to the stator resistance variation as well
as the load disturbance. The combined adaptive observer with HF signal injection for
DTFC IPMSM MC drive is proposed which is capable of handling full-load at low speeds
including standstill. Experimental verification of the new sensorless DTFC MC drive is
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Chapter 6 Sensorless DTFC-ISVM IPMSM MC Drive using a combined adaptive flux
observer
carried out. In comparison with the conventional SMO, the improvement and effectiveness
especially at very low speed and standstill with full load is clearly confirmed.
The mathematical model of an IPMSM can expressed in the rotor flux (d-q) as
d λd
°° vd = Rsid + dt − ωre λq
® (6−1)
° v = R i + d λq + ω λ
°̄ q s q
dt
re d
°λd = Ld id + λ f
® (6−2)
°̄λq = Lqiq
The various reference frames are depicted in Figure 6−1. As shown in Figure 6−1, by using
load angle δ , these equations can be transformed to the x-y reference frame, the stator flux
q β
y
vS
iS vq
iq ωS
x
ωre
θS
vd id δ λf
θ re d
α
Figure 6−1. The stator and rotor flux linkages in different reference frames.
148
Chapter 6 Sensorless DTFC-ISVM IPMSM MC Drive using a combined adaptive flux
observer
aligned with x-axis, or to the stationary (E-F) frames. The proposed DTFC scheme is
implemented in the stator flux reference frame. Equation (6−1) is re-written in x-y reference
frame by multiplying both side of it a transformation matrix.
§ λd · § cos δ − sin δ · § λx ·
¨λ ¸¨ ¨ ¸ (6−5)
© q ¹ © sin δ cos δ ¹¸ © λ y ¹
d λx dδ
°° v x = Rsix + dt − λ y dt − ωreλ y
® (6−6)
°v = R i + d λ y + λ dδ + ω λ
°̄ y s y
dt
x
dt
re x
Considering the relationship between the rotor speed, stator flux speed and load angle,
ωS = ωre + d δ / dt , the stator voltages and the torque of IPMSM in the stator flux reference
frame (x-y) can be derived.
d λx
°° v x = Rsix + dt − ωS λ y
® (6−7)
°v = R i + d λ y + ω λ
°̄ y s y
dt
S x
Since the stator flux vector is aligned with the x-axis, λx = λS and λ y = 0 . Then
d λx
° v x = Rsix +
® dt (6−9)
° v y = Rsi y + ωS λx
¯
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Chapter 6 Sensorless DTFC-ISVM IPMSM MC Drive using a combined adaptive flux
observer
d λs
v x = Rsix + (6−10)
dt
RS T
vy = + ωS λ S (6−11)
1.5P λS
Equation (6−10) shows that the magnitude of the stator flux vector λS can be directly
regulated by the x-component of the stator voltage vx . Similarly, (6−11) reveals that the y-
component of the stator voltage v y is qualified to regulate the torque with a feed-forward
compensation term ωS λS , provided that the amplitude of the stator flux λS is maintained
With the mathematical models of both the torque and stator flux loops, abundant classical
control design methods are readily available. The symmetric optimum criterion and root
locus design methods of PI controllers for direct torque controlled-space vector modulated
induction motor drives have been studied in [6], [13]. In the root locus method, the full
model of IM was taken into consideration. It is highly dependent on motor parameters. As
an alternative, a class of robust control technique called the integral of time multiplied by
the absolute of the error (ITAE) criterion [14], [15] is adopted in this thesis.
Considering the voltage drop across the stator resistance Rsix as a disturbance in the
forward path, the plant model is an integrator whose input and output are the x-component
RS ix ( s )
e( s ) KP s + KI vx ( s) 1 − sTs
λS* ( s ) e λS ( s )
s s
Figure 6−2. Block diagram of a typical PI control structure of stator flux loop.
150
Chapter 6 Sensorless DTFC-ISVM IPMSM MC Drive using a combined adaptive flux
observer
stator voltage and stator flux magnitude respectively. It is evident that a PI controller can be
cascaded with the plant model which makes up a typical PI control structure, as shown in
Figure 6−2.
Taking the system delay into consideration including the statistical delay of PWM
generation and digital signal processing, the open-loop transfer function is altered to (6−12)
with an equivalent mathematical model of the delay in the forward path.
K P s + K I − sTs
GOL (s ) = e (6−12)
s2
where TS is the sampling period. Since TS is sufficiently small, the delay can be
approximated by
1
e − sTs = (6−13)
1 + sTS
Substituting (6−12) into (6−13) and ignoring the stator resistance drop, the closed-loop
transfer function is given by
KPs + KI
GCL ( s ) = (6−14)
Ts s + s 2 + K P s + K I
3
To cancel the zero of the controller and thus improve the dynamic response, a pre-filter
(6−15) is inserted in the forward path.
KI
GPF ( s ) = (6−15)
KPs + KI
K I / TS
GCL ( s ) = (6−16)
s + s / TS + K P s / TS + K I / TS
3 2
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Chapter 6 Sensorless DTFC-ISVM IPMSM MC Drive using a combined adaptive flux
observer
Thus the PI controller gains can be determined by the optimum coefficients of a third-order
closed loop transfer function based on the ITAE criterion for a step input [14].
Taking Laplace transform and arranging the terms, the torque control equation (6−11) can
be expressed as
T (s) =
Rs
1.5 P λs
( vy (s) − ωs λs ) (6−17)
Consider another expression for the electromagnetic torque with relative to load angle,
3P λs
T= ª 2λ f Lq sin δ − λs ( Lq − Ld ) sin 2δ º¼ (6−18)
4 Ld Lq ¬
Since the torque operation range is limited within maximum torque, the torque exhibits
almost linearity with the load angle within the small operation area. Their relationship in
the small area can be linearized as T = KT δ with a linearization factor KT [16].
dT dδ
= KT = KT (ωS − ωre ) (6−19)
dt dt
KT τ
T (s) =
KT + τ s
( v y ( s) − ωre λs ) (6−20)
ωre λS
e( s ) K P s + K I vy (s) K Tτ
T * (s) e − sTs T ( s)
s τ s + KT
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Chapter 6 Sensorless DTFC-ISVM IPMSM MC Drive using a combined adaptive flux
observer
Rs
where τ = is a constant. Akin to the stator flux control loop, a PI controller can be
1.5 P λs
cascaded with the plant to achieve closed-loop torque control shown in Figure 6−3. The
plant model is a first-order system with the y-component of the stator voltage and torque as
the input and output respectively and the disturbance term is now ωre λs .
Applying the same analogy as before, the closed-loop transfer function is given by
KT K I / TS
GCL ( s ) = (6−21)
s + (1/ TS + KT / τ ) s + KT ª¬1/ (τ TS ) + KT K P / Ts º¼ s + KT K I / TS
3 2
where the linearization factor KT can be found from the sinusoidal curve of torque versus
load angle and the PI gains are governed by the ITAE performance index [14].
From the above analysis, DTFC consists of two PI regulators–one for stator flux and the
other for torque. The inputs of the PI controllers are the torque and stator flux errors while
the outputs are the xy components of the reference voltage vector. The voltages has to be
transformed to the stationary (Į-ȕ) reference frame for ISVM using the stator flux vector
angle θ s .
§ vα · § cos θ s − sin θ s · § v x ·
¨v ¸ = ¨ ¨ ¸ (6−22)
© β ¹ © sin θ s cos θ s ¹¸ © v y ¹
where the stator flux angle can be calculated with the estimated stator flux components in
Į-ȕ frame, θ s = tan −1 ( λβ / λα ) .
The indirect space vector modulation (ISVM) algorithm is used to synthesize the desired
voltage vector as well as the input current vector at a constant switching frequency. During
transients when the torque and flux errors are too large, the reference voltage may exceed
the available maximum voltage of the matrix converter. In this case, the outputs of the PI
controllers have to be limited to ensure that the reference voltage doesn’t exceed the
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Chapter 6 Sensorless DTFC-ISVM IPMSM MC Drive using a combined adaptive flux
observer
maximum inverter voltage Vmax For linear-modulation of ISVM. Vmax equals to 0.866Vin ,
where Vin is the input voltage amplitude. Therefore the limitation behaviour of the torque
and flux PI controllers is described by the following equation, where a proportional
reduction of its magnitude is performed while the angular phase is preserved.
¯ s
where vsPI is the output of PI controllers and vs* is the reference voltage vector for ISVM
unit after magnitude limitation.
In the conventional ISVM as presented in Chapter 3, two adjacent active vectors and one
zero vector are used to synthesize the reference vectors respectively in the rectification and
inversion stages. The five duty cycles for the four active vectors and one zero vector and
switching combination selection criterion can be found in Chapter 3. When the magnitude
of reference voltage vector is within the voltage constraint, the modified ISVM will be
applied. Making use of the active vectors with 120˚ phase difference in the rectification
stage, the maximum modulation index for the rectifier stage is 1/ 3 instead of 1.
Therefore, the modified ISVM can be only activated when the reference voltage magnitude
is within 0.5Vin which normally occurs at low speed operation. The duty cycles and
modulation index for the modified modulation strategy can be derived for an arbitrary
I2 VO*
I in*
θ *
in
ia θ o*
V1
I1
vca
Figure 6−4. Overmodulation represented in space vector hexagons and time domain.
154
Chapter 6 Sensorless DTFC-ISVM IPMSM MC Drive using a combined adaptive flux
observer
sector location of output voltage and input current vectors, referred in Chapter 3. The
modified modulation strategy features that the output performance, especially at low
speeds, is improved at the expense of input current quality. Furthermore, properly selected
the sequence doesn’t increase the number of branch-switch-overs (BSOs) per sampling
period compared with the conventional ISVM. The lower voltages are switched to
synthesize the input vector and thus the switching losses are reduced compared with the
conventional modulation.
It has to be noted that the limitation behaviour compromises the dynamics of DTFC when
the required voltage exceeds the sinusoidal modulation border. Using the linear modulation,
DTFC-ISVM exhibits a slower transient response compared with the classical HDTC. An
overmodulation strategy has been developed to cope with this problem in [12]. The
overmodulation was done only in the inverter stage with the one of six fixed-direction
voltage vectors each cycle which is the closest to the required output voltage vector. Using
this method, it can reach the maximum magnitude of the voltage vector available in VSI
where the magnitude is determined by the fixed DC-link voltage. But this method fails to
utilize the maximum available voltage to create the reference vector in matrix converters
because there is no DC-link and thus the magnitude is determined by the input voltages and
modulation strategy in the rectifier stage. It occurs when the reference vector is in ±30°
area centred at an input vector and the zero vector or the adjacent vector outside of this area
is applied to synthesize the reference vector. The magnitude of output voltage vector can
reach the maximum line-line voltage if in both rectifier and inverter stages, a single active
vector closer to the required vector, instead of two adjacent vectors and one zero vector, is
used for respective overmodulation. As shown in Figure 6−4, the vectors in red will be used
for the overmodulation in the rectifier and inverter stages to replace the vector pairs in blue,
which is quite similar to HDTC switching pattern. It is evident that the length of the vector
applied in mode 2 (overmodulation) is the maximum line-to-line voltage available on the
input side of the matrix converter, representing the proposed overmodulation strategy in the
time domain. It assures the target is reached most quickly during transients of DTFC when
the torque and flux errors are too large to be compensated by 0.866Vin . When the torque
and flux are both close to their targets, mode 1 (conventional ISVM) is switched on. When
155
Chapter 6 Sensorless DTFC-ISVM IPMSM MC Drive using a combined adaptive flux
observer
Table 6−1 Parameters of the SMO-DTFC drive used in simulations and experiments.
Vd* Vq*
ωˆ r
×
Tˆ
id
dq
iq abc
θˆre
Figure 6−5. Block diagram of the DTFC-ISVM MC IPMSM drive with adaptive SMO.
156
Chapter 6 Sensorless DTFC-ISVM IPMSM MC Drive using a combined adaptive flux
observer
the errors become smaller and the output voltage reference becomes below 0.5Vin , mode 0
is enabled. In this way, the control scheme combines advantages of smooth steady-state
operation and rapid transient response to the control command. Since the overmodulation
mode is only activated in a short term during transients, the disadvantages of HDTC, such
as high torque and flux ripples and switching frequency variation, cannot degrade the
performance of the DTFC-ISVM drive.
1400
Speed (rpm)
1000
600
0.4 0.6 0.8 1 1.2 1.4 1.6 1.8
6
Torque (N•m)
3
0
-3
-6
0.55
0.54
0.4 0.6 0.8 1 1.2 1.4 1.6 1.8
4
Stator currents (A)
-2
-4
157
Chapter 6 Sensorless DTFC-ISVM IPMSM MC Drive using a combined adaptive flux
observer
1400
Speed (rpm)
1000
30
0
-30
-60
0.4 0.6 0.8 1 1.2 1.4 1.6 1.8
180
Position (deg)
-180
0.4 0.6 0.8 1 1.2 1.4 1.6 1.8
10
Position error
-10
0.4 0.6 0.8 1 1.2 1.4 1.6 1.8
0.5
current error(A)
id error iq error
-0.5
0.4 0.6 0.8 1 1.2 1.4 1.6 1.8
Time (sec)
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Chapter 6 Sensorless DTFC-ISVM IPMSM MC Drive using a combined adaptive flux
observer
estimator have been settled by online manual tuning. The amplitude of HF signal is set to
guarantee stable operation at zero speed and full load. The period of the injected signal
should be a multiple of control sampling period for the proposed method.
The load dynamics is shown in Figure 6−6. Successive load reversals were applied to the
motor shaft at 1000 rpm, −6N⋅m added at 0.6 sec, reversed at 1 sec and 1.4 sec and then
removed at 1.8 sec. the performance of the designed PI controllers is satisfactory. The
ripples in the flux and torque are significantly reduced compared with the classical HDTC.
The adaptive observer performance under the same test condition is shown in Figure 6−7.
The estimated speed tracks the actual speed very well at both the transient and steady-state.
The maximum transient error is within ±35rpm occurring when the load is revered between
+6N⋅m and −6N⋅m. The position error is less than 1º electrical in the steady-state but 5º at
transients. Hence, SMO has an excellent load disturbance rejection capability.
The effectiveness of the input power factor correction (IPFC) strategy can be verified the
load reversal test at 500rpm by reversing the full load at 1s and 1.4s respectively, as seen in
Figure 6−8(a). Compared with the input current waveforms in Figure 6−8(b), applying the
IPFC strategy, the input current is almost in phase with the voltage during motoring
operation and in opposite phase during generating operation. The unity IPF is obtained
without any adverse effect on the input currents.
DTFC-ISVM IPM motor MC drive system with the sliding mode flux observer was
implemented on the same experiment setup as used in HDTC, except only one third of
input filter capacitance used. The entire system is shown in Figure 6−9.
Figure 6−10 shows the performance of adaptive observer under load disturbance at
1000rpm. Speed estimation error is bounded by ±60rpm during transients and converges to
zero in steady-state. A sudden nominal load reversal gives 15° electrical transient error and
9° steady-state error to the position estimation. The current estimation errors fluctuate at
zero. However, it is worth noting that the references are not the actual currents but derived
159
Chapter 6 Sensorless DTFC-ISVM IPMSM MC Drive using a combined adaptive flux
observer
5
200
Phase voltage(V)
Input current(A)
0 0
-200
-5
0.9 0.95 1 1.05 1.1 1.15
Time(sec)
5
200
Phase voltage(V)
Input current(A)
0 0
-200
-5
1.3 1.35 1.4 1.45 1.5 1.55 1.6
Time(sec)
5
200
Phase voltage(V)
Input current(A)
0 0
-200
-5
0.9 0.95 1 1.05 1.1 1.15 1.2
Time(sec)
5
200
Phase voltage(V)
Input current(A)
0 0
-200
-5
1.3 1.35 1.4 1.45 1.5 1.55 1.6
Time(sec)
Figure 6−8. Performance of input currents of MC at successive load reversals at 500 rpm.
160
Chapter 6 Sensorless DTFC-ISVM IPMSM MC Drive using a combined adaptive flux
observer
161
Chapter 6 Sensorless DTFC-ISVM IPMSM MC Drive using a combined adaptive flux
observer
from the coordinate transformation using the estimated position. The errors between the
actual currents and observer currents are not zero because of the position error, as shown in
Figure 6−11. The orientation can be further enhanced by a modified SMO which is
presented in the following section.
In Figure 6−12, the torque reversal responses of DTFC-ISVM and classical HDTC
algorithms are compared. It can be seen from Figure 6−12(a) that the overmodulation mode
is running until the torque error is so small that the linear modulation can compensate it
when torque reference is suddenly reversed from −6N⋅m to +6N⋅m. The modified
speed (rpm)
-50
0 0.5 1 1.5 2 2.5
(elec. degree)
100
position
0
-100
10
5
0
-5
10 0.5 1 1.5 2 2.5
current error(A)
id error iq error
-1
0 0.5 1 1.5 2 2.5
Time (sec)
Figure 6−10. Performance of SMO under successive load reversals at 1000 rpm.
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Chapter 6 Sensorless DTFC-ISVM IPMSM MC Drive using a combined adaptive flux
observer
modulation dominates the steady-state since the speed is still quite low. But HDTC keeps
using the switching pattern similar to the overmodulation all the time which causes high
torque ripple in the steady-state. It is seen that the response time of DTFC-SVM with an
overmodulation strategy is 3.7 ms, which is almost the same as that of the classical HDTC,
3.5 ms. That may be because of the higher sampling frequency of the classical HDTC. In
addition, the torque ripples are negligible compared with the classical HDTC in steady-state
even though the sampling period of HDTC is less than one-third that of DTFC scheme.
The further comparison of these two schemes is made by the experimental results at
500rpm under full-load, as shown in Figure 6−13. From Figure 6−13(a), a high distortion in
0
d-axis Current(A)
-4
0 0.5 1 1.5 2 2.5
1
^ ^
id-id id0-id
0.5
id error
-0.5
-1
0 0.5 1 1.5 2 2.5
q-axis current(A)
3 iq
iq0
0
-3
0 0.5 1 1.5 2 2.5
1
^ ^
0.5 iq-iq iq0-iq
i q error
-0.5
-1
0 0.5 1 1.5 2 2.5
Time (sec)
Figure 6−11. Current errors of SMO under successive load reversals at 1000 rpm.
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Chapter 6 Sensorless DTFC-ISVM IPMSM MC Drive using a combined adaptive flux
observer
the input current can be observed and low-order harmonics scattered from fundamental to
2kHz, which is not desirable. The input current waveform of the proposed DTFC in Figure
6−13(b) is much smoother than that of the classical HDTC and the dominant harmonics are
found around 5 kHz and 10 kHz which are determined by the ISVM sampling period. And
also, the input power factor is corrected to unity by IPFC. Similar conclusion can be drawn
on the output quality from the comparison of the stator currents of two schemes shown in
Figure 6−13(c) and (d). The dominant harmonics of the stator current of HDTC are
scattered around 1.5 kHz while lower amplitude of harmonic content can be observed in
6
Torque (N•m)
0
Modu. mode
-3 Est. torque
-6 Ref. torque
6
Torque (N•m)
-3 Est. torque
-6 Ref. torque
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Chapter 6 Sensorless DTFC-ISVM IPMSM MC Drive using a combined adaptive flux
observer
that of DTFC-ISVM and the dominant one is at the switching frequency.
The steady-state performance of the conventional and modified modulations are compared
in Figure 6−14. At low speeds, the vectors usually reach the minimum pulse width which is
determined by the commutation time. It becomes more serious when the reference vector is
close to a sector boundary. If a lower line-to-line voltage is used to construct the output
vector, the control continuity can go deeper (Refer to in Chapter 3). The modified
modulation reduces the THD of the stator current to 2.21% from 3.25% with the
conventional modulation. Some distortion can be observed in the input current of
modulation mode 1 which is significantly reduced with mode 0.
Figure 6−13. Comparison of input current (5A/div, 100V/div) and stator current (2A/div)
with their harmonic spectrums, 20dB/div, at 500 rpm under full load.
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Chapter 6 Sensorless DTFC-ISVM IPMSM MC Drive using a combined adaptive flux
observer
3 3
2 2
1 1
0 0
-1 -1
-2 -2
-3 -3
0.8 0.9 1 1.1 1.2 1.3 0.8 0.9 1 1.1 1.2 1.3
Time (s) Time (s)
Fundamental (3.4Hz) = 1.841 , THD= 2.21% Fundamental (3.4Hz) = 1.824 , THD= 3.25%
7 7
6
Mag (% of Fundamental)
Mag (% of Fundamental)
6
5 5
4 4
3 3
2 2
1 1
0 0
0 1000 2000 3000 4000 5000 6000 0 1000 2000 3000 4000 5000 6000
Frequency (Hz) Frequency (Hz)
0.5 0.5
0 0
-0.5 -0.5
-1 -1
0 0.1 0.2 0.3 0.4 0.5 0.6 0 0.1 0.2 0.3 0.4 0.5 0.6
Time (s) Time (s)
Fundamental (3.4Hz) = 0.6656 , THD= 2.58% Fundamental (3.4Hz) = 0.6761 , THD= 4.72%
12
10
10
Mag (% of Fundamental)
Mag (% of Fundamental)
8
8
6
6
4
4
2 2
0 0
0 1000 2000 3000 4000 5000 6000 0 1000 2000 3000 4000 5000 6000
Frequency (Hz) Frequency (Hz)
Figure 6−14. Performance comparison of input and output currents under modulation mode
1 and mode 0 at 100rpm 3N·m (experiment).
166
Chapter 6 Sensorless DTFC-ISVM IPMSM MC Drive using a combined adaptive flux
observer
The stator resistance plays a role since SMO is based on the voltage model. The stator
resistance variation resulting from temperature and frequency changes results in deviations
in flux and speed estimates and consequently, impaired position estimation accuracy. A
significant change in stator resistance can easily lead to instability.
From experimental results, it is seen that the d-axis current estimation error does not
converge to zero even at high speed. The sign of the error depends on the speed direction.
This situation is obvious under loaded condition or stator resistance variation. It increases
the position and current errors and the sensorless operation fails when the errors are too
much. The large orientation error dissatisfies the speed adaptation requirement of the
observer. Since the adaptive model contains a speed-dependent term, it has to be speed
adaptive. The speed adaptation is usually performed as the last step of the estimation
process based on the flux estimation errors. The position is derived from the integral of the
estimated speed. Hence, the speed estimate is affected by cumulative errors, noise and
delays. At very low speeds, the effects of converter nonlinearity errors and noise on
estimated speed and position become severe. The flux estimate gradually worsens with
inaccurate position fed back to the observer, which leads the drive system to instability.
The lowest operating speed achieved was 30 rpm (2% rated speed). The observer is not
suitable if persistent zero speed operation over a long period of time is required.
The buried magnet distribution in the rotor of the IPM motor produces saliency. The d-and
q-axes inductances vary due to magnetic saturation. Figure 6−15(a) shows measured and
interpolated d- and q-axis inductances from the experimental machine used in this thesis.
For this motor, the q-axis inductance is about 2.3 times the d-axis inductance which results
in saliency. The inductances vary as a function of operating current. The functions can be
represented by polynomials as shown in Figure 6−15(a). It is noticed that since Ld changes
little within the operation range, Ld is considered as constant. Lq falls as the operating
current increases. To further enhance the performance of the SMO, the variation of Lq with
current has to be taken into account, which is represented by the polynomial in Figure
167
Chapter 6 Sensorless DTFC-ISVM IPMSM MC Drive using a combined adaptive flux
observer
80% nominal
nominal Lq
varying Lq
20
(Elec. Degree)
Position error
15
10
5
1
1000 2
800 3
m)
Load
tor qu600 4 ed( rp
e
e( N• 400
m) 5 Sp
200
(a) Inductances vs. operating current. (b) Position errors against speed and load.
18 18
80% nominal nominal varying Lq 80% nominal
nominal
16 16
varying Lq
Position error(elec. degree)
position error(Elec. degree)
14 14
12 12
10 10
8 8
6 6
4 4
200 300 400 500 600 700 800 900 100 1 2 3 4 5 6
Speed(rpm) Load torque(N•m)
Figure 6−15. Comparison of position errors among 80%, nominal and varying Lq.
iβ β
Rβ
vβ
ωre
q̂ d
q ωˆ re vα
dˆ iα
θ re Rα
θˆre
α
168
Chapter 6 Sensorless DTFC-ISVM IPMSM MC Drive using a combined adaptive flux
observer
6−15(a). The effects caused by Lq detuning have been investigated by experiments. The
experimental test was carried out when the machine was operated with various loads up to
full load at various speeds. Figure 6−15(b) is a plot of the steady-state position estimation
errors versus load torque and speed for nominal, 80% nominal and varying Lq ,
respectively. Results at a particular load and speed are shown in Figure 6−15(c) and (d). It
can be seen that the position error varies with the speed and load, but by using the varying
Lq , the position errors are reduced compared with using fixed Lq .
To prevent the problems mentioned above, a combined observer is proposed to correct the
adaptive observer model by introducing a speed correction term. The current estimation
error id is used to generate the correction term for resistance variation via the PI control
mechanism. In addition, an HF signal injection technique is employed to enhance the
adaptive observer at low speeds including standstill.
High frequency (HF) signal injection technique exploits the rotor saliency and is well suited
to operation at very low and zero speeds. As described in [17], for a high quality position
estimation at standstill and very low speeds, the back electromotive force (EMF) and the
influence of stator resistance have to be eliminated. The use of high frequency signal
injection satisfies this requirement as neither the back electromotive force nor the stator
resistance is involved in determining the rotor position. It is also immune to the
measurement errors [18]. Numerous HF injection methods can be found in the literature.
They can be broadly classified into Į-ȕ reference frame rotating injection [19], d-q
reference frame pulsating injection [20] and d-q reference frame rotating injection [21].
These techniques have been applied to vector controlled IPMSM drives but similar
approaches for direct torque controlled IPMSM MC drives have been scarcely explored.
169
Chapter 6 Sensorless DTFC-ISVM IPMSM MC Drive using a combined adaptive flux
observer
The mathematical model of the IPM machine in the rotor (d-q) reference frame can be
expressed as
§ vd · § Rs + pLd −ωre Lq · § id · § 0 ·
¨v ¸ = ¨ ω L +
Rs + pLq ¹¸ ¨© iq ¹¸ ©¨ ωreλ f ¹¸
(6−24)
© q ¹ © re d
where p denotes the differential operator. Transforming (6−24) to the estimated rotor
Ld + Lq Ld − Lq
where LΣ = , LΔ = , the position estimation error θre = θ re − θˆre and
2 2
superscripts θ re and θˆre denote the values on the actual and estimated rotor reference
frames respectively. Superimposing an HF carrier signal fluctuating at angular frequency
Ȧc, and having amplitude Vc, on the d-component of the stator voltage in the estimated rotor
reference frame.
When the frequency of injected carrier is sufficiently high, normally between 400 Hz and 1
kHz, the stator impedance is dominated by the stator inductance and rotor frequency is
much smaller than the carrier frequency Ȧc. As a result, the first and third terms in (6−25)
can be neglected and thus the carrier-frequency model (6−24) can be approximated to
170
Chapter 6 Sensorless DTFC-ISVM IPMSM MC Drive using a combined adaptive flux
observer
Equation (6−28) indicates that the carrier frequency signal is modulated by the error
between the actual and estimated positions. The position information can be extracted from
the q-axis current iqiθ after it is demodulated to form a dc signal proportional to the position
ˆ
re
error. The principle of demodulation is shown in Figure 6−17. The HF q-axis current is
separated from the fundamental component by means of band-pass filter (BPF) and then
demodulated and low-pass filtered (LPF) to extract the error signal.
ª Vc Lq − Ld 1 − cos(2ωc t ) º
ε = LPF ªiqiθ sin(ωc t ) º = LPF « sin 2θre »
ˆ
re
(6−29)
¬ ¼ «¬ ωc 2 Ld Lq 2 »¼
Theoretically, the high frequency term containing cos(2ωc t ) is filtered out and the error
signal is governed by
ε = Kε sin(2θre ) (6−30)
Vc Lq − Ld
where Kε = . Assuming that the estimated error is small, (6−30) can be
ωc 4 Ld Lq
approximated by
ε ≈ 2 Kε θre (6−31)
The band-pass filtering is achieved by zero averaging over one period of carrier signal to
obtain the high frequency component of iq, which is expressed in (6−32). This algorithm
can be interpreted as a high-pass filter and is chosen due to its lower computational cost
than relevant band-pass filters [22].
k
TS
iqiθre (k ) = iqθre (k ) − ¦ iθ
ˆ ˆ ˆ
q
re
(n) (6−32)
Tc n= j
where k denotes the value at the kth sampling period, Tc = 2πωc is the period of the carrier
frequency, Ts is the sampling period and j = k + 1 − Tc / Ts which means the currents in the
171
Chapter 6 Sensorless DTFC-ISVM IPMSM MC Drive using a combined adaptive flux
observer
Tc / Ts successive sampling periods are averaged at the kth cycle. The constraint of this
algorithm is that the carrier period has to be selected as a multiple of the sampling period to
guarantee Ts / Tc an integer.
The low-pass filtering is implemented using two filters, namely a moving-average filter and
a first-order low-pass filter. The moving-average filter eliminates the angular frequency Ȧc
and its multiples effectively with only a short time delay, while the first order low-pass
filter reduces stochastic noise more effectively than the moving-average filter [22]. A PI
controller cascaded with an integrator is then used to drive the error signal to zero and to
obtain the estimated rotor position signal [18], [22]. Hence, the closed-loop system
constitutes a phase-locked loop (PLL) as depicted in Figure 6−17.
At extremely low speeds and standstill, HF signal injection offers a reliable solution.
However, as the speed increases, the rotor position sensing accuracy and dynamic
performance falls because the assumption of HF injection technique is no longer fulfilled.
Hence, other forms of high dynamic observers have to be adopted at higher speeds. The
transition between the signal injection and other observers must be smooth to avoid torque
oscillations and even instability. Andreescu et al [23] proposed a stator flux observer
combining the voltage and current models. Combining HF injection technique, it is seen to
be capable of sensorless operation of the IPMSM at very low speeds but with poor dynamic
performance [23]. Nevertheless, the amplitude of HF signal is never changed within a
specified switch speed. The adverse effects of HF signal, inducing additional noise and
losses into the system and thus reduce overall efficiency, degrade the drive system once it
iqiθre Δω̂2
ˆ
iqθre
ˆ
ε K HFI
sin(ωc t ) K HFP
Figure 6−17. Block diagram of demodulation scheme to extract the error signal and PI
mechanism to obtain the correction term.
172
Chapter 6 Sensorless DTFC-ISVM IPMSM MC Drive using a combined adaptive flux
observer
is activated. Another hybrid position and speed estimation observer was proposed by Piippo
Vd* Vq*
ωˆ r
×
T̂
id
dq
iq abc
sin(ωc t )
θˆre
×
Figure 6−18. Block diagram of DTFC-ISVM MC IPMSM drive with combined observer.
u in uS iS
e− jθre
ˆ
d id , iq
id , iq
θˆre C
ωˆ re λd , λq
e − jθre
ˆ
λˆd , λˆq
vˆd , vˆq iˆd , iˆq
Δωˆ re
Δω̂1 ωˆ re
id
Δω̂2 iq
173
Chapter 6 Sensorless DTFC-ISVM IPMSM MC Drive using a combined adaptive flux
observer
et al using a modified voltage model combined with HF [24]. They are proposed for
conventional VSI drives. On the contrary, only a few researches on sensorless controlled
matrix converter drives have been reported and verified by experiments [25]−[28]. And
similar approaches for direct torque and flux controlled IPMSM MC drives over wide
speed range including zero speed have not been explored.
This section proposes an enhanced flux observer by correcting the adaptive model with HF
injection at low speeds and with current estimation error to indirectly compensate the stator
resistance variation. It exhibits excellent dynamic as well as steady-state properties. The
sensorless DTFC-ISVM matrix converter IPMSM drive system is shown in Figure 6−18,
which consists of two PI controllers, an input power factor correction (IPFC), an ISVM unit
with an over-modulation mode and an adaptive observer combined with HF injection. The
proposed matrix converter drive is capable of handling full-load at standstill with HF
injection and switched to the adaptive observer estimation at medium and high speeds over
40 rad/s electrical in this thesis. In the entire range, it is corrected with current estimation
error. A smooth transition is achieved between 0 and 40 rad/s using a speed-dependent
weighting coefficient shown in Figure 6−19. The adaptive observer is dominant in the
dynamics in the flux and speed estimations in the entire speed range. The error signals are
used for correcting the estimated position by augmenting the observer as follows.
ωˆ 2 = ( K P 2ε + K I 2 ³ ε dt ) (6−36)
174
Chapter 6 Sensorless DTFC-ISVM IPMSM MC Drive using a combined adaptive flux
observer
where K P1 , K I 1 , K P 2 , K I 2 are the PI controller gains for current error based correction and
The PI mechanism used in a PLL can be tuned analytically by interpreting the PLL as in
Ref. Est.
speed (rpm)
1200
1000
800
3
0
-3
-6
0.56
Flux (Wb)
0.55
0.54
2
0
-2
-4
0 0.5 1 1.5 2 2.5
Time (sec)
Figure 6−20. Performance of DTFC with the modified SMO at 1000rpm with successive
full load reversals (experiment).
175
Chapter 6 Sensorless DTFC-ISVM IPMSM MC Drive using a combined adaptive flux
observer
Figure 6−17 [29].
α
° K P2 = 2K
° ε
® (6−38)
°K = α
2
°̄ I 2 6 Kε
speed (rpm)
20
0
-20
-40
0 0.5 1 1.5 2 2.5
10
(elec. degree)
position error
0
80 0 0.5 1 1.5 2 2.5
correction term
40
(rpm)
0
-40
id error iq error
0.5
0
-0.5
-1
0 0.5 1 1.5 2 2.5
Time (sec)
Figure 6−21. Performance of the modified SMO at 1000rpm with successive full load
reversals (experiment).
176
Chapter 6 Sensorless DTFC-ISVM IPMSM MC Drive using a combined adaptive flux
observer
where α relies on the cut-off frequency of the low-pass filter, α L = 3α .
HF injection is activated from zero to 40 rad/s. To ensure a smooth transition between the
low and high speed regions, the amplitude of the injected signal, Vc is decreased linearly
with increasing speed, i.e. Vc = Vc 0 f (ωˆ re ) = 20 ⋅ f (ωˆ re ) . The effect of HF on the system is
decreased. The error signal ε and PLL pole α are decreased at the same rate. The integral
speed (rpm)
200
170
0 0.5 1 1.5
Troque (N•m)
3
0 0.5 1 1.5
Flux (Wb)
0.56
0.55
0.54
correction term(rpm)
0 0 0.5 1 1.5
-100
-200
0 0.5 1 1.5
2
current (A)
-2
0 0.5 1 1.5
Time (sec)
Figure 6−22. DTFC performance at stator resistance step change to 158% rated value with
correction term at 200rpm with 63% rated load (experiment).
177
Chapter 6 Sensorless DTFC-ISVM IPMSM MC Drive using a combined adaptive flux
observer
gain K I 2 then varies according to (6−38) while the proportional gain K P 2 remains constant
As the speed approaches the transition speed, the error signal ε may be non-zero in steady-
state. To avoid integration drift in PI controller, the integral should be bounded within the
reasonable limits.
speed (rpm)
200
170
0 0.5 1 1.5
40
speed error
20
0
-20
-40
0 0.5 1 1.5
(elec. degree)
100
position
0
-100
0 0.5 1 1.5
20
(elec. degree)
position error
-20
0 0.5 1 1.5
0.2
current error(A)
0.1
0
-0.1 id error iq error
-0.2
0 0.5 1 1.5
Time (sec)
Figure 6−23. SMO performance at stator resistance step change to 158% rated value with
correction term at 200rpm with 63% rated load (experiment).
178
Chapter 6 Sensorless DTFC-ISVM IPMSM MC Drive using a combined adaptive flux
observer
K I 2 ³ ε dt ≤ 40 − ωˆ re (6−39)
The effectiveness and improvement of the modified SMO can be seen in Figure 6−20 and
d-axis Current(A)
-1
-1.5
-2
id id0
0 0.5 1 1.5
0.5
Current error
-0.5
id-i^d id0-i^d
-1
0 0.5 1 1.5
3
iq iq0
q-axis current(A)
2.5
1.5
1
0 0.5 1 1.5
0.4 iq-i^q iq0-i^q
current error
0.2
-0.2
-0.4
0 0.5 1 1.5
Time (sec)
Figure 6−24. Current errors at stator resistance step change to 158% rated value with
correction term at 200rpm with 63% rated load (experiment).
179
Chapter 6 Sensorless DTFC-ISVM IPMSM MC Drive using a combined adaptive flux
observer
6−21, compared with the results using conventional SMO. The transient speed error is
reduced to ±40rpm when a sudden nominal load is reversed at 1000rpm. 10° electrical
transient error and 5° steady-state error indicate the combined SMO improves the position
estimation as well as speed transients. The current estimation errors converge to zero in
steady-state.
300
speed (rpm)
200
100
0 0.5 1 1.5
40
20
speed error
-20
-40
0 0.5 1 1.5
(elec. degree)
100
position
-100
0 0.5 1 1.5
20
(elec. degree)
position error
10
-10
-20
0 0.5 1 1.5
0.4
current error(A)
0.2
0
-0.2
-0.4
0 0.5 1 1.5
Time (sec)
Figure 6−25. Mismatched stator resistance effect on SMO at 200rpm with 63% rated load
(experiment).
180
Chapter 6 Sensorless DTFC-ISVM IPMSM MC Drive using a combined adaptive flux
observer
The correction term in the observer can compensate the effect of stator resistance variation,
which has been tested by suddenly adding 3.4Ω three-phase external resistance to the stator
when the machine was running under 63% full load at 200rpm. Speed, torque, stator flux,
currents and estimation errors are shown in Figure 6−22 to Figure 6−24. The effects of the
step change in stator resistance can be compensated by the correction term in the SMO
within 0.5s, which is faster than the resistance adaption method. The current and speed
speed (rpm)
220
200
180
Ref. Est.
0 0.5 1 1.5
6
Troque (N•m)
2
0 0.5 1 1.5
0.56
Flux (Wb)
0.55
0.54
0 0.5 1 1.5
2
current (A)
-2
0 0.5 1 1.5
Time (sec)
Figure 6−26. Mismatched stator resistance effect on the DTFC performance at 200rpm with
63% rated load (experiment).
181
Chapter 6 Sensorless DTFC-ISVM IPMSM MC Drive using a combined adaptive flux
observer
estimation errors reduce to zero, exhibiting the effectiveness of both the modified sliding
mode observer and speed estimation scheme. Figure 6−22 displays the response of the drive
including the correction speed due to a step change in stator resistance. The responses of
the drive without using the correction speed are shown in Figure 6−25 to Figure 6−27.
Compared with the modified SMO, the resistance mismatch increases the position error by
15º and current error by 0.15A, as shown in Figure 6−25. It also de-rates the torque and
current of the machine. As seen in Figure 6−26, the machine requires about 0.3N·m more to
0
d-axis Current(A)
-2
-0.5
-1
40 0.5 1 1.5
q-axis current(A)
iq iq0
0
10 0.5 1 1.5
^ ^
current error
-0.5
-1
0 0.5 1 1.5
Time (sec)
Figure 6−27. Current error of original SMO with mismatched stator resistance at 200rpm
with 63% rated load (experiment).
182
Chapter 6 Sensorless DTFC-ISVM IPMSM MC Drive using a combined adaptive flux
observer
balance the same load as before. Consequently, more stator currents are drawn from the
converter. Figure 6−27 shows the currents in the estimated rotor reference frame diverge
from the actual values due to the position error, which indicates the orientation requirement
of SMO is not well fulfilled.
Figure 6−28 and Figure 6−29 show the performance of the modified SMO due to 3.4Ω step
change of the stator resistance at low speed where HF is dominant in speed estimation. The
modified SMO is immune to the resistance variation or mismatch. The estimation errors
resume to the original values after 0.5 s transient. The correction scheme works well with
100
speed (rpm)
50
0
4 4.5 5 5.5 6 6.5 7
40
speed error
20
0
-20
-40
4 4.5 5 5.5 6 6.5 7
20
(elec. degree)
position error
-20
4 4.5 5 5.5 6 6.5 7
0.5
current error(A)
id error iq error
-0.5
4 4.5 5 5.5 6 6.5 7
Time (sec)
Figure 6−28. Performance of modified SMO due to 3.4Ω increase in stator resistance at
50rpm with 3.5N⋅m (experiment).
183
Chapter 6 Sensorless DTFC-ISVM IPMSM MC Drive using a combined adaptive flux
observer
HF injection. The increased ripples in torque, flux and currents are caused by
superimposing HF signal to the stator voltages.
The low-speed dynamic response of the sensorless drive is shown in Figure 6−30 and
Figure 6−31. The machine is successively reversed from -20rpm to 20rpm with full load.
The estimated speed follows the actual speed very well and current and position estimation
errors are close to zero during the reversal, confirming the effectiveness of the combined
sliding mode-HF signal injection observer. It is notable that the HF ripples are contained in
the flux, torque and stator currents because the 500Hz HF injection is activated and
100
speed (rpm)
50
0
4 4.5 5 5.5 6 6.5 7
5
Troque (N•m)
2
0.56 4 4.5 5 5.5 6 6.5 7
Flux (Wb)
0.55
0.54
4 4.5 5 5.5 6 6.5 7
2
current (A)
-2
Figure 6−29. Current error of original SMO with mismatched stator resistance at 50rpm
with 3.5N⋅m (experiment).
184
Chapter 6 Sensorless DTFC-ISVM IPMSM MC Drive using a combined adaptive flux
observer
dominant at this speed.
The performance of the modified SMO in transition operation is tested by successive step
speeds of 0, −100, 300 and 100rpm with a sudden 3.5N⋅m step load applied at 12.5s as
shown in Figure 6−32 and Figure 6−33. At the speed transients and applying the load, the
signal injection is declining with a linear function dependent on the estimated speed. This
fact is visible especially in the flux waveform, i.e., no HF ripple at ±300rpm when the
speed (rpm)
20 Estimated
Actual
0
-20
0 1 2 3 4 5
10
speed error
-10
0 1 2 3 4 5
(elec. degree)
100
position
0
-100
0 1 2 3 4 5
(elec. degree)
position error
10
0
-10
0 1 2 3 4 5
1
current error(A)
i d error iq error
-1
0 1 2 3 4 5
Time (sec)
Figure 6−30. Low speed performance of combined SMO under rated load torque at 20rpm
reversal reference (experiment).
185
Chapter 6 Sensorless DTFC-ISVM IPMSM MC Drive using a combined adaptive flux
observer
injection is disabled, higher ripples at ±100 rpm and the highest at zero speed. The
transitions in the combined observer are smooth with small transient errors in the estimated
speed and flux. The position error is less than 6 electrical degrees when the machine is
loaded in the HF injection dominant region.
Sensorless zero speed operation with nominal torque steps is depicted in Figure 6−34 to
Figure 6−37. The rated load, +6N·m, was initially applied to the machine at 0.35s, reversed
300
20
speed (rpm)
speed (rpm)
200
1000
0
-20
-100
00 15 2 10 3 15 4 20 5 25
6
•m)
(N•m)
36
Troque (N
Troque
05
-34
00 15 2 10 3 15 4 20 5 25
0.56
(Wb)
0.56
Flux(Wb)
0.55
0.55
Flux
0.54
0.54
00 15 2 10 3 15 4 20 5 25
24
(A)
current(A)
12
current
00
-1
-2
-2
-4
00 15 2 10 3 15 4 20 5 25
Time
Time (sec)
(sec)
Figure
Figure 6−31.
6−32. Performance
Performance of
of DTFC-ISVM
DTFC-ISVM under rated load
at successive steptorque steps
speeds 100,at300,
low 0speed
and
−100rpm with a sudden
reference (experiment).
3.5Nm load impact (experiment).
186
Chapter 6 Sensorless DTFC-ISVM IPMSM MC Drive using a combined adaptive flux
observer
to the minus rated value, −6N·m at 1.55s and subsequently removed after 1.2s, as shown in
Figure 6−34. The observer is enhanced by the HF signal injection, having a fast dynamic
response as well as a good steady-state. It can be observed from Figure 6−35 that the
estimated speed tracks the actual speed very well, the position estimation error is very small
and current errors are zero during the transients and steady-state with small HF ripples in
the estimated speed when the full torque is added. Hence, the sensorless DTFC drive is
300
speed (rpm)
200
100
0
-100
0 5 10 15 20 25
6
Troque (N•m)
-3
0 5 10 15 20 25
0.56
Flux (Wb)
0.55
0.54
0 5 10 15 20 25
2
current (A)
1
0
-1
-2
0 5 10 15 20 25
Time (sec)
Figure 6−32. Performance of DTFC-ISVM at successive step speeds 100, 300, 0 and
−100rpm with a sudden 3.5Nm load impact (experiment).
187
Chapter 6 Sensorless DTFC-ISVM IPMSM MC Drive using a combined adaptive flux
observer
capable of persistent zero speed operation with full-load. The input performance of the
matrix converter drive is also verified under successive full-load reversals at zero speed.
In Figure 6−36 and Figure 6−37, the filtered input current and the corresponding phase
voltage together with one stator current and torque are shown to confirm the advantages of
the matrix converter which are the inherent bidirectional power-flow capability and the
400
speed (rpm)
200
0
-200
120 0 5 10 15 20 25
speed error
60
0
-60
-120
0 5 10 15 20 25
(elec. degree)
100
position
0
-100
0 5 10 15 20 25
20
(elec. degree)
position error
-20
0 5 10 15 20 25
current error(A)
id error iq error
0 5 10 15 20 25
Time (sec)
Figure 6−33. Performance of sensorless control at successive step speeds 100, 300, 0 and
−100rpm with a sudden 3.5Nm load impact (experiment).
188
Chapter 6 Sensorless DTFC-ISVM IPMSM MC Drive using a combined adaptive flux
observer
sinusoidal input/output waveforms with an adjustable input power factor.
In Figure 6−36, the stator current is a DC value at zero speed under full load and
subsequently becomes sinusoidal at reversing the load. The current will return to a DC after
the transient when the speed is stabilized at zero and the machine toque balances the load. It
can be seen that there is an HF component in the input current at zero speed because the
injected HF signal in the stator voltage is reflected in the input side without DC-capacitor.
400
Referecne
speed (rpm)
200 data2
-200
0 0.5 1 1.5 2 2.5 3
6
Troque (N•m)
3
0
-3
-6
0.56
Flux (Wb)
0.55
0.54
2
0
-2
-4
0 0.5 1 1.5 2 2.5 3
Time (sec)
Figure 6−34. Performance of DTFC-ISVM under rated load torque steps at zero speed
reference (experiment).
189
Chapter 6 Sensorless DTFC-ISVM IPMSM MC Drive using a combined adaptive flux
observer
The HF ripples are decaying with the increasing speed as the amplitude of HF signal is
declining. It is also noted that IPF is not unity in either steady-states or transients in Figure
6−36. The effectiveness of IPFC at zero speed is confirmed that the input current is in
phase with the corresponding phase voltage after the torque transients as seen in Figure
6−37. Since the speed is zero, no generation mode can be seen in the figure.
The bidirectional power-flow capability of the matrix converter is verified by the full-load
speed (rpm)
30
0
-30
0 1 2 3 4 5 6
(elec. degree)
Est.
100 Actual
position
0
-100
0 1 2 3 4 5 6
(elec. degree)
position error
10
0
-10
0 1 2 3 4 5 6
1
current error(A)
id error iq error
-1
0 1 2 3 4 5 6
Time (sec)
Figure 6−35. Performance of SMO under rated load torque steps at zero speed reference.
190
Chapter 6 Sensorless DTFC-ISVM IPMSM MC Drive using a combined adaptive flux
observer
reversal at both medium and high speeds as shown in Figure 6−38 to Figure 6−41. The
drive system performs bidirectional power-flow naturally using the same control and
modulation strategy. The input and output qualities of the proposed DTFC-ISVM are
obviously improved with significantly reduced harmonics and torque ripple in comparison
with those of HDTC. Both input and stator current waveforms are sinusoidal immediately
after the step command of a rated torque reversal at high speed. The input current is leading
Figure 6−36. Input current (1A/div), voltage (50V/div), torque (5Nm/div), stator current
(2A/div) at standstill full load reversal without IPFC (20ms/div).
191
Chapter 6 Sensorless DTFC-ISVM IPMSM MC Drive using a combined adaptive flux
observer
the voltage without using IPFC, since the matrix converter doesn’t deliver or feed the rated
power. It can be seen from Figure 6−38 and Figure 6−40 that the higher the power is
delivered by the matrix converter, the less the phase difference is. This results from the
oversized input filter capacitance which is designed for rated power level. As shown in
Figure 6−39 and Figure 6−41, using the IPFC strategy, the input current is almost in phase
with the corresponding phase voltage during motoring operation when the speed and torque
Figure 6−37. Input current (1A/div), voltage (50V/div), torque (5Nm/div), stator current
(2A/div) at standstill full load reversal with IPFC (20ms/div).
192
Chapter 6 Sensorless DTFC-ISVM IPMSM MC Drive using a combined adaptive flux
observer
are both positive. On the other hand, the phase difference between the phase voltage and
the current is 180° during regenerative braking when the torque is negative at the same
speed. The effect of the capacitance over-sizing has been compensated by introducing a
power-related correcting angle into duty cycles based on the ISVM theory.
The FFT analysis of currents at low speed verifies that the IPFC strategy can work without
Figure 6−38. Input current (1A/div), voltage (50V/div), torque (5Nm/div), stator current
(2A/div) at 600rpm full load reversal without IPFC.
193
Chapter 6 Sensorless DTFC-ISVM IPMSM MC Drive using a combined adaptive flux
observer
any degrading input or output performance of the MC drive, as shown in Figure 6−42. It
can be also seen that a 500 Hz harmonic, the same frequency of the HF injection signal, is
in both the input current and stator current.
It is further confirmed that this harmonic is only because of the injected HF signal by
experiment at 200 rpm under full-load as the amplitude of HF signal is zero at this speed. In
Figure 6−39. Input current (1A/div), voltage (50V/div), torque (5Nm/div), stator current
(2A/div) at 600rpm full load reversal with IPFC.
194
Chapter 6 Sensorless DTFC-ISVM IPMSM MC Drive using a combined adaptive flux
observer
Figure 6−43(c), there is no 500Hz harmonic component in the stator current from FFT
trace. And the 500Hz ripples are vanished in the input current as well. In comparison with
the input current at high speed full-load in Figure 6−44, higher harmonics at switching
frequency can be observed in Figure 6−43(a) and (b) because the modified ISVM is
Figure 6−40. Input current (5A/div), voltage (50V/div), torque (2Nm/div), stator current
(2A/div) at 1000rpm full load reversal without IPFC.
195
Chapter 6 Sensorless DTFC-ISVM IPMSM MC Drive using a combined adaptive flux
observer
enabled in this condition.
The input displacement angle between the input voltage and current is decreased with
increasing output power. As shown in Figure 6−44(b), there is a very small phase
difference between the current and voltage. However, the IPFC can correct it to exact unity
as shown in Figure 6−44(a).
Figure 6−41. Input current (2A/div), voltage (50V/div), torque (2Nm/div), stator current
(2A/div) at 1000rpm full load reversal with IPFC.
196
Chapter 6 Sensorless DTFC-ISVM IPMSM MC Drive using a combined adaptive flux
observer
Figure 6−42. Input and stator currents with their harmonic spectrums, 20dB/div, at 50 rpm
under rated load.
197
Chapter 6 Sensorless DTFC-ISVM IPMSM MC Drive using a combined adaptive flux
observer
Figure 6−43. Input and stator currents with their harmonic spectrums, 20dB/div, at 200
rpm under rated load.
198
Chapter 6 Sensorless DTFC-ISVM IPMSM MC Drive using a combined adaptive flux
observer
Figure 6−44. Input and stator currents with their harmonic spectrums, 20dB/div, at 1000
rpm under 3.5N·m load.
199
Chapter 6 Sensorless DTFC-ISVM IPMSM MC Drive using a combined adaptive flux
observer
6.6 Conclusion
In this chapter, a direct torque and stator flux control (DTFC) scheme for IPM synchronous
machine fed by matrix converters based on ISVM has been proposed. Independent closed-
loop regulation of both the torque and stator flux linkage has been achieved by using two PI
controllers. The reference input current and voltage vectors are synthesized using ISVM,
rather than the switching table in HDTC scheme. The design of the PI controllers based on
the ITAE criterion has been briefly included. It has been proven through both simulations
and experiments that the proposed control scheme improves the torque and flux ripples
significantly in both steady-state and transients while achieving a fixed switching
frequency. The harmonics in the input current and stator current are consequently reduced,
compared with HDTC scheme. Furthermore, the dynamic response of DTFC is comparable
to that of the classical HDTC by using the novel overmodulation strategy. Therefore, the
performance of DTFC is superior to that of the HDTC.
In order to achieve high performance sensorless control over a wide speed range, very low
speed and standstill operation of the drive is further enhanced by combining HF signal
injection with the sliding mode observer. The amplitude of HF signal is declining with the
speed increase, which reduces the HF effects on the machine. The variation of the stator
resistance is indirectly compensated by inserting a correction term to the speed dependent
term in the adaptive observer model. Extensive experimental results are shown to confirm
the effectiveness of the proposed observer on the sensorless control over a wide range
including full-load disturbance at zero speed. The smooth transition within the switch speed
between HF and observer is achieved. The stator resistance compensation is applicable and
effective in the entire speed range. The IPFC strategy is also verified by experiments in a
variety of conditions including zero speed and full-load.
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Chapter 6 Sensorless DTFC-ISVM IPMSM MC Drive using a combined adaptive flux
observer
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with signal injection enhancement for wide speed range sensorless direct torque
control of IPMSM drives,” IEEE Trans. on Energy Conversion, vol. 23, no. 2, pp.
393–402, Jun. 2008.
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pp. 964–970, Oct. 2004.
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motor at zero and low frequency,” IEEE Trans. on Ind. Electron., vol. 53, no. 2, pp.
440–449, Apr. 2006.
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202
Chapter 7 Conclusions and suggestions for future work
Improved current commutation and space vector modulation strategies were firstly on focus
in the thesis, as they are the basics of the matrix converter. In Chapter 2, a new hybrid
current-based commutation strategy has been presented after several commutation
strategies based on commutating voltage sign or the direction of the output current were
reviewed. This strategy executes a general four-step commutation within a small threshold
band area and a two-step current commutation over the threshold. The advantage of the
proposed new strategy is the faster commutation process and thus the distortion of the
output caused by the pulse width limit and commutation delay is attenuated. Furthermore,
the commutation strategy can be further reduced to a single step commutation combined
with a three-step one, if the power semiconductor devices have greater turn-off delay than
turn-on delay. The comparison between the proposed strategy and four-step commutation
strategy is made by means of output current THDs. The improvement has been confirmed
by the experimental results. The duty-cycle matrix and space vector modulation strategies
have been reviewed. The easily-understood ISVM theory is derived by considering the
matrix converter as two stage converter with a virtual dc-link. The loss reduced ISVM and
203
Chapter 7 Conclusions and suggestions for future work
conventional schemes were evaluated by means of THDs analysis. The advantages of this
new modulation strategy that the harmonic content of the output voltages and currents are
reduced and, additionally, the switching losses are decreased since the medium line-line
voltages can be utilized when the output voltage is lower than 0.5 of the input voltage or
even lower. It is possible to be used to enhance the standard ISVM for high performance
control of the matrix converter drives to improve output performance of the low speed
operation.
HDTC for the matrix converter drive is an extension of the classical HDTC technique for
VSI drives. Using three hysteresis comparators, it allows a further control of input power
factor in addition to the stator flux and torque of the motor. One of the major drawbacks of
the conventional HDTC, the high amplitude of harmonic components in the input current,
is significantly reduced by using the proposed HDTC. Moreover, it is simpler but doesn’t
compromise the merits of classical HDTC. The performance of the proposed sensorless
HDTC matrix converter IPMSM drive system has been verified by both extensive
simulations and experiments. The effectiveness of the new input power factor correction
strategy is confirmed at transients and steady-states in the experiments. On the basis of the
comparison and analysis carried out for the two HDTC systems, the proposed control
scheme is superior to the classical one on the input side quality while they have identical
performance on the machine side. However unfortunately, the ripples in the torque, flux
and currents are relatively high and the drive system cannot reach very low speeds or
standstill with full load because there is no accurate synthesis of input or output space
vector.
204
Chapter 7 Conclusions and suggestions for future work
To solve the problems of the HDTC schemes, a direct torque and stator flux control
(DTFC) scheme for IPM synchronous machine fed by matrix converter drives based on
ISVM was proposed. It was proven through both simulations and experiments that the
proposed control scheme improves the torque and flux ripples significantly in both steady-
state and transients while achieving a fixed switching frequency. The harmonics in the
input current and stator current are improved. Furthermore, the dynamic response of the
DTFC is comparable to that of the classical HDTC by using the novel overmodulation
strategy. Very low speed and standstill operation of the drive was enhanced by combining
HF signal injection with the conventional observer. Extensive experimental results are
shown to confirm the effectiveness of the combined observer over a wide range including
full-load disturbance at zero speed, the smooth transition between HF and observer and the
stator resistance compensation by the speed correction term. The IPFC strategy is also
verified by experiments in a variety of conditions including zero speed and full-load.
Two direct torque control strategies of sensorless IPM synchronous motor drives fed by
matrix converter have been implemented in this thesis. Due to the speed of DSP board, the
proposed sensorless HDTC cannot be completed within a control sampling period less than
50 µs. The higher the sampling frequency is, the better the waveform quality is, reducing
torque and flux ripples and current harmonic distortions. It will increase the cost with a
more powerful processor. FPGA can be employed to offload the DSP of certain compute-
intensive tasks, especially complex logic. Both ISVM and current commutation for matrix
converter can be hardwired into FPGA, allowing the multi-tasks executed in parallel. And
also because of the limitation of the current processor speed, DTC-ISVM algorithm is
executed at a cycle of 200 µs, corresponding to the switching frequency 5 kHz. The
injected HF carrier voltage is at 500 Hz, which causes 500 Hz harmonic component in the
205
Chapter 7 Conclusions and suggestions for future work
input currents as well as in the stator currents at low and zero speeds. Decreasing the cutoff
frequency will reduce the distortion but increase the size of the filter. A more effective
alternative is to increase the switching frequency and thus the injected HF signal frequency
over the cut-off frequency of a small input filter which can filter out the HF component
from the input current. Otherwise, the input filter has to be too much oversized.
The field weakening operation hasn’t been investigated in this thesis. One of the important
advantage and superiority of IPM motor is its saliency which provides significant
reluctance torque. Due to the securely embedded permanent magnets inside the rotor, the
IPM motor offers the capability of wider speed range with field weakening control. But the
machine used in this thesis cannot provide a wide region for the field weakening control
because it has a small saliency and the maximum operating speed is its rated speed
1500rpm.
One of the attractive prospects of matrix converter is compact and reliable all-silicon
design. But because no true integrated power module for matrix converter is available on
the power electronics market, bidirectional switches had to be built with discrete
unidirectional semiconductor devices and gate drivers when the lab prototype was
constructed. It increases the volume of the matrix converter. However, it is currently
possible to find modules commercially containing the whole power stage or one leg of a
matrix converter to realize a more compact design.
206
Appendix A Determination of IPM synchronous motor parameters
To properly design and optimize the control system of a permanent magnet motor drive,
the machine model and its parameters must be known. The most common parameters
used in the control algorithms are the simplified model parameters, including
These parameters are used to calculate control rules such as voltage limit ellipses and
maximum torque-per-ampere trajectories.
The equivalent circuit of a PM synchronous motor in dq-axis stator flux reference frame
is shown in Figure A−1. Since the PM synchronous motor does not have any damping
windings in the rotor, the rotor circuit is open and not shown in this figure. The dq-axis
synchronous inductances have been split into a stator leakage inductance Ll and a
magnetizing inductance Lm. The stator resistance of the motor can be easily measured
from the standard DC measurement and will not be discussed here.
R ω λq Ll Ldm
− +
vd
A-1
Appendix A Determination of IPM synchronous motor parameters
R ωLdid Ll Lqm
+ −
+
vq ω λf
−
N S S N
The back emf constant of a PM synchronous motor is determined by the open circuit
phase voltage when the motor is driven by another motor, such as a DC motor. If it is
assumed to be sinusoidal, the back emf constant is related to the rotor speed and phase
voltage.
Vm = ωre λ f (A−1)
where ωre is the electrical angular velocity of the rotor and Vm is the peak value of the
open-circuit phase voltage.
When the prototype motor is rotated at 375 rpm, the open-circuit line-to-line voltage can
be measured directly from the stator terminals of the IPM motor. As shown in Figure
A−3, the line-to-line voltage of this motor is almost sinusoidal and can be approximated
A-2
Appendix A Determination of IPM synchronous motor parameters
vL − L = 72.55sin ω t (A−2)
The peak value of the phase voltage is 41.89 volts and electrical rotor speed is 78.54
rad/s. Thus, the calculated back emf constant is 0.533 Wb.
The back emf constant can be also obtained straight from the datasheet of the motor.
The back emf (line-to-line) of the motor is 136 VRMS/kRPM in the datasheet. That
means the open-circuit line-to-line voltage is 136 V if the motor is rotated at 1000 rpm
electrical speed. The back emf constant can be derived from the peak value of phase
voltage and the electrical speed in rad/s, which is 0.53 Wb.
vL− L
Figure A-3. Measured line-to-line back emf of the prototype motor at 734 rpm.
A-3
Appendix A Determination of IPM synchronous motor parameters
where L0 is the average component of self inductance due to self flux-linkage crossing
the airgap, Ll is the phase leakage inductance and is due to self flux-linkage which does
not cross the airgap (slot leakage and end winding), and L2 is the magnitude of the
second harmonic component.
The mutual inductance between stator phases also exhibits a second harmonic variation
with θ due to the rotor geometry. The mutual inductance between phase A and phase B
is evaluated by considering the airgap flux linking phase A when only phase B is
excited. The resulting equations are:
The IPM synchronous motor can be characterised by its d-axis inductance Ld and q-axis
inductance Lq. As can be seen in the torque equation, the reluctance torque per ampere
is proportional to (Lq-Ld) while the saliency ratio (Lq/Ld) determines the operation
characteristics of the motor such as field weakening range and power factor. These
synchronous inductances are independent of the permanent magnets and can be
therefore measured before or after the magnets are put into the rotor. The dq-axis
synchronous inductances are given by:
Ld = Ldm + Ll (A−9)
Lq =Lqm + Ll (A−10)
where Ll is the stator leakage inductance and Ldm and Lqm are the magnetising
inductances.
A-4
Appendix A Determination of IPM synchronous motor parameters
Lab0 = − L0 / 2 (A−11)
L2 = Lab2 (A−12)
From dq axis theory, the dq-axis inductances are therefore obtained from the following
equations.
3
Ld = ( L0 + L2 ) + Ll (A−13)
2
3
Lq = ( L0 − L2 ) + Ll (A−14)
2
Ld + Lq 2
L0 = + Ll (A−15)
3 3
Ld − Lq
L2 = (A−16)
3
A-5
Appendix A Determination of IPM synchronous motor parameters
The AC standstill test is the easiest to perform and is widely applicable to inverter-fed
PM synchronous motors. The effect of saturation is underestimated due to the nature of
this test and is therefore mainly useful for measuring the unsaturated inductances. In
other words, it is not applicable if the inductances show much saturation.
The circuit connection for synchronous inductance measurement of the IPMSM with no
neutral connection available is shown in figure A−4. The self-inductance can be
obtained by
2 (VA / I ) − (1.5 R)
2 2
Laa (θ ) = (A−19)
3 ω
The measured self-inductance waveforms of the IPM motor are shown in figure A−5.
This can be approximated as
The calculated d-axis and q- axis inductances are Ld = 0.0448 H and Lq = 0.1024 H.
VA LA
VT, ω
LC LB
A-6
Appendix A Determination of IPM synchronous motor parameters
Inductance, mH
120
100
80
60
40
0 45 90 135 180
θm
Figure A-5. Measured self-inductance of IPMSM.
Ea = V − I a Ra (A−21)
A-7
Appendix A Determination of IPM synchronous motor parameters
P = Ea I a (A−22)
E a = kω (A−23)
Te = kI a (A−24)
dω
Te = J + Dω + TL (A−25)
dt
torque of DC motor and D and J are friction coefficient and rotor inertia.
In steady-state, assuming the load torque in (A−25) is zero, (A−26) to (A−28) can be
derived from (A−22) and (A−25).
Te − TL = Dω (A−26)
Ea I a
= Dω (A−27)
ω
P = Dω 2 (A−28)
The DC motor runs alone and then drives the IPM motor which is used as a load. The
voltage, current and rotor speed are recorded and then used to work out the power in
(A−28) to determine the friction factor.
Figure A−6 shows the plot of power vs. ω 2 . According to (A−28), from the slope of
curve in the lower subplot of Figure A−6, the friction co-efficient can be found to be
0.0016 N•m/rad/s and 0.0006 N•m/rad/s of IPMSM. J can be determined by rotating the
machine at rated speed and then switch off the power and record the speed. According
to (A−25), when the electro-magnetic torque by the DC motor equals zero,
dω
0= J + Dω (A−29)
dt
dω
J = − Dω |t =0 / | t =0 (A−30)
dt
Figure A−7 shows the plot of ω vs. time for combined DC motor and IPM motor and
DC motor alone respectively, in which the rotor inertia of the combined motors is found
to be 0.00272 kg•m2.
A-8
Appendix A Determination of IPM synchronous motor parameters
Determination of D
50
Measured DC motor and IPM motor
40 Curve fit
Power (W)
Measured
30
Curve fit
20
10 DC motor only
0
0 0.5 1 1.5 2 2.5
2 2 2 4
ω (rad /sec. ) x 10
20
Measured
15 Curve fit
Power (W)
IPM motor
10
0
0 0.5 1 1.5 2 2.5
2 2 2 4
ω (rad /sec. ) x 10
Determination of J
200
DC motor and IPM motor Measured
Speed (rad/sec.)
Curve fit
150
100
50
0
0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8
Time (sec.)
200
Measured
DC motor only
Speed (rad/sec.)
Curve fit
150
100
50
0
0 0.5 1 1.5 2 2.5
Time (sec.)
A-9
Appendix A Determination of IPM synchronous motor parameters
A-10
Appendix B Pin mapping and assignment
B-1
Appendix B Pin mapping and assignment
Table B−2 J7, J8, and J9 connectors on FPGA board (output & testing pins).
B-2
Appendix C Modelling and real-time programs
C-1
Appendix D List of publications arising from this thesis
D-1
Appendix D List of publications arising from this thesis
[11] D. Xiao and M. F. Rahman, “A modified DTC for matrix converter drives using
two switching configurations,” the 13th European Conference on Power Electronics
and Applications, 2009, EPE’09, September 8–10, 2009, Barcelona, Spain.
[12] D. Xiao, G. Foo and M. F. Rahman, “Sensorless direct torque and flux control for
matrix converter IPM synchronous motor drives using adaptive sliding mode
observer combined with high frequency signal injection,” IEEE Energy Conversion
Congress and Exposition, 2009, ECCE’09, September 20–24, 2009, San Jose, USA,
pp. 4000−4007 (oral).
[13] D. Xiao and M. F. Rahman, “A novel sensorless hysteresis direct torque control for
matrix converter fed interior permanent magnet synchronous motor,” IEEE Power
and Energy Society General Meeting, 2010, PES’10, July 26–29, 2010, Minneapolis,
USA (oral).
[14] D. Xiao and M. F. Rahman, “Sensorless direct torque and flux control for matrix
converter fed interior permanent magnet synchronous motor using adaptive sliding
mode observer,” IEEE Power and Energy Society General Meeting, 2010, PES’10,
July 26–29, 2010, Minneapolis, USA (oral).
[15] D. Xiao and M. F. Rahman, “Implementation of sensorless direct torque control
using matrix converter fed interior permanent magnet synchronous motor,”
International Power Engineering Conference, 2010, IPEC’10, June 21–24, 2010,
Sapporo, Japan (oral).
Submitted
[16] D. Xiao and M. F. Rahman, “Performance improvement of a sensorless hysteresis
direct torque controlled matrix converter IPM synchronous motor drive using a
modified switching pattern and an input power factor correction,” International
Conference on Electrical Machines and Systems, 2010, ICEMS’10, October 10−13,
2010, Incheon, Korea (fully accepted for oral presentation).
[17] D. Xiao and M. F. Rahman, “Low speed and standstill operation of sensorless direct
torque and flux controlled IPM synchronous motor fed by matrix converter,”
International Conference on Electrical Machines and Systems, 2010, ICEMS’10,
October 10−13, 2010, Incheon, Korea (fully accepted for oral presentation).
[18] D. Xiao, G. Foo and M. F. Rahman, “A new combined adaptive flux observer with
HF signal injection for sensorless direct torque and flux control of matrix converter
fed IPMSM over a wide speed range,” IEEE Energy Conversion Congress and
Exposition, 2010, ECCE’10, September 12–16, 2010, Atlanta, USA (fully accepted).
[19] D. Xiao and M. F. Rahman, “A novel hysteresis direct torque control for matrix
converter drives,” European Power Electronics and Drives Journal (updated
EPE’09 conference paper).
UNDER PREPARATION
[20] D. Xiao, G. Foo and M. F. Rahman, “A new combined adaptive flux observer with
HF signal injection for sensorless direct torque and flux control of matrix converter
fed IPMSM over a wide speed range,” will be submitted to IEEE Transactions on
Power Electronics (updated ECCE’09 paper).
D-2
Appendix D List of publications arising from this thesis
[21] D. Xiao and M. F. Rahman, “A novel sensorless hysteresis direct torque control for
matrix converter-fed IPMSM drive,” will be submitted to IEEE Transactions on
Industrial Applications (updated PES’10 paper).
D-3