LMC6482 CMOS Dual Rail-To-Rail Input and Output Operational Amplifier

March 1995

LMC6482 CMOS Dual

Rail-To-Rail Input and Output Operational Amplifier
General Description Features (Typical unless otherwise noted)
The LMC6482 provides a common-mode range that ex- Y Rail-to-Rail Input Common-Mode Voltage Range
tends to both supply rails. This rail-to-rail performance com- (Guaranteed Over Temperature)
bined with excellent accuracy, due to a high CMRR, makes Y Rail-to-Rail Output Swing (within 20 mV of supply rail,
it unique among rail-to-rail input amplifiers. 100 kX load)
It is ideal for systems, such as data acquisition, that require Y Guaranteed 3V, 5V and 15V Performance
a large input signal range. The LMC6482 is also an excel- Y Excellent CMRR and PSRR 82 dB
lent upgrade for circuits using limited common-mode range Y Ultra Low Input Current 20 fA
amplifiers such as the TLC272 and TLC277. Y High Voltage Gain (RL e 500 kX) 130 dB
Maximum dynamic signal range is assured in low voltage Y Specified for 2 kX and 600X loads
and single supply systems by the LMC6482’s rail-to-rail out-
put swing. The LMC6482’s rail-to-rail output swing is guar- Applications
anteed for loads down to 600X. Y Data Acquisition Systems
Guaranteed low voltage characteristics and low power dissi- Y Transducer Amplifiers
pation make the LMC6482 especially well-suited for battery- Y Hand-held Analytic Instruments
operated systems. Y Medical Instrumentation
See the LMC6484 data sheet for a Quad CMOS operational Y Active Filter, Peak Detector, Sample and Hold, pH
amplifier with these same features.
Meter, Current Source
Y Improved Replacement for TLC272, TLC277

3V Single Supply Buffer Circuit

Rail-To-Rail Input Rail-To-Rail Output

TL/H/11713–1 TL/H/11713 – 3
TL/H/11713 – 2

Connection Diagram Ordering Information

Temperature Range
NSC Transport
Package Military Industrial Drawing Media
b 55§ C to a 125§ C b 40§ C to a 85§ C

8-Pin LMC6482MN LMC6482AIN

N08E Rail
Molded DIP LMC6482IN
8-pin LMC6482AIM Rail
TL/H/11713–4 M08A
Small Outline LMC6482IM Tape and Reel
8-pin LMC6482AMJ/883
J08A Rail
Ceramic DIP

C1995 National Semiconductor Corporation TL/H/11713 RRD-B30M75/Printed in U. S. A.

 Absolute Maximum Ratings (Note 1) Operating Ratings (Note 1)
If Military/Aerospace specified devices are required, Supply Voltage 3.0V s V a s 15.5V
please contact the National Semiconductor Sales Junction Temperature Range
Office/Distributors for availability and specifications. LMC6482AM b 55§ C s TJ s a 125§ C
ESD Tolerance (Note 2) 1.5 kV LMC6482AI, LMC6482I b 40§ C s TJ s a 85§ C
Differential Input Voltage g Supply Voltage Thermal Resistance (iJA)
Voltage at Input/Output Pin (V a ) a 0.3V, (Vb) b0.3V N Package, 8-Pin Molded DIP 90§ C/W
M Package, 8-Pin Surface Mount 155§ C/W
Supply Voltage (V a b Vb) 16V
Current at Input Pin (Note 12) g 5 mA
Current at Output Pin (Notes 3, 8) g 30 mA
Current at Power Supply Pin 40 mA
Lead Temperature (Soldering, 10 sec.) 260§ C
Storage Temperature Range b 65§ C to a 150§ C
Junction Temperature (Note 4) 150§ C

DC Electrical Characteristics
Unless otherwise specified, all limits guaranteed for TJ e 25§ C, V a e 5V, Vb e 0V, VCM e VO e V a /2 and RL l 1M.
Boldface limits apply at the temperature extremes.

LMC6482AI LMC6482I LMC6482M

Typ
Symbol Parameter Conditions Limit Limit Limit Units
(Note 5)
(Note 6) (Note 6) (Note 6)
VOS Input Offset Voltage 0.750 3.0 3.0 mV
0.11
1.35 3.7 3.8 max
TCVOS Input Offset Voltage
1.0 mV/§ C
Average Drift
IB Input Current (Note 13) pA
0.02 4.0 4.0 10.0
max
IOS Input Offset Current (Note 13) pA
0.01 2.0 2.0 5.0
max
CIN Common-Mode
3 pF
Input Capacitance
RIN Input Resistance l 10 TeraX
CMRR Common Mode 0V s VCM s 15.0V 82 70 65 65
Rejection Ratio V a e 15V 67 62 60 dB
0V s VCM s 5.0V 82 70 65 65 min
V a e 5V 67 62 60
a PSRR Positive Power Supply 5V s V a s 15V, Vb e 0V 82 70 65 65 dB
Rejection Ratio VO e 2.5V 67 62 60 min
b PSRR Negative Power Supply b 5V s V b s b 15V, V a e 0V 82 70 65 65 dB
Rejection Ratio VO e b2.5V 67 62 60 min
VCM Input Common-Mode V a e 5V and 15V Vb b 0.3 b 0.25 b 0.25 b 0.25 V
Voltage Range For CMRR t 50 dB 0 0 0 max
V a a 0.3V V a a 0.25 V a a 0.25 V a a 0.25 V
Va Va Va min
AV Large Signal RL e 2 kX Sourcing 666 140 120 120 V/mV
Voltage Gain (Notes 7, 13) 84 72 60 min
Sinking 75 35 35 35 V/mV
20 20 18 min
RL e 600X Sourcing 300 80 50 50 V/mV
(Notes 7, 13) 48 30 25 min
Sinking 35 20 15 15 V/mV
13 10 8 min

2
 DC Electrical Characteristics (Continued)
Unless otherwise specified, all limits guaranteed for TJ e 25§ C, V a e 5V, Vb e 0V, VCM e VO e V a /2 and RL l 1M.
Boldface limits apply at the temperature extremes.

LMC6482AI LMC6482I LMC6482M

Typ
Symbol Parameter Conditions Limit Limit Limit Units
(Note 5)
(Note 6) (Note 6) (Note 6)
VO Output Swing V a e 5V 4.9 4.8 4.8 4.8 V
RL e 2 kX to V a /2 4.7 4.7 4.7 min
0.1 0.18 0.18 0.18 V
0.24 0.24 0.24 max
V a e 5V 4.7 4.5 4.5 4.5 V
RL e 600X to V a /2 4.24 4.24 4.24 min
0.3 0.5 0.5 0.5 V
0.65 0.65 0.65 max
V a e 15V 14.7 14.4 14.4 14.4 V
RL e 2 kX to V a /2 14.2 14.2 14.2 min
0.16 0.32 0.32 0.32 V
0.45 0.45 0.45 max
V a e 15V 14.1 13.4 13.4 13.4 V
RL e 600X to V a /2 13.0 13.0 13.0 min
0.5 1.0 1.0 1.0 V
1.3 1.3 1.3 max
ISC Output Short Circuit Sourcing, VO e 0V 20 16 16 16 mA
Current 12 12 10 min
V a e 5V Sinking, VO e 5V 15 11 11 11 mA
9.5 9.5 8.0 min
ISC Output Short Circuit Sourcing, VO e 0V 30 28 28 28 mA
Current 22 22 20 min
V a e 15V Sinking, VO e 12V 30 30 30 30 mA
(Note 8) 24 24 22 min
IS Supply Current Both Amplifiers 1.0 1.4 1.4 1.4 mA
V a e a 5V, VO e V a /2 1.8 1.8 1.9 max
Both Amplifiers 1.3 1.6 1.6 1.6 mA
V a e 15V, VO e V a /2 1.9 1.9 2.0 max

3
 AC Electrical Characteristics
Unless otherwise specified, all limits guaranteed for TJ e 25§ C, V a e 5V, Vb e 0V, VCM e VO e V a /2, and RL l 1M.
Boldface limits apply at the temperature extremes.

LMC6482AI LMC6482I LMC6482M

Typ
Symbol Parameter Conditions Limit Limit Limit Units
(Note 5)
(Note 6) (Note 6) (Note 6)
SR Slew Rate (Note 9) 1.3 1.0 0.9 0.9 V/ms
0.7 0.63 0.54 min
GBW Gain-Bandwidth Product V a e 15V 1.5 MHz
wm Phase Margin 50 Deg
Gm Gain Margin 15 dB
Amp-to-Amp Isolation (Note 10) 150 dB
en Input-Referred F e 1 kHz 37
nV/ SHz
Voltage Noise Vcm e 1V
in Input-Referred F e 1 kHz 0.03
pA/ SHz
Current Noise
T.H.D. Total Harmonic Distortion F e 10 kHz, AV e b2
%
RL e 10 kX, VO e 4.1 VPP 0.01
F e 10 kHz, AV e b2
RL e 10 kX, VO e 8.5 VPP 0.01 %
V a e 10V

4
 DC Electrical Characteristics
Unless otherwise specified, all limits guaranteed for TJ e 25§ C, V a e 3V, Vb e 0V, VCM e VO e V a /2 and RL l 1M.

LMC6482AI LMC6482I LMC6482M

Typ
Symbol Parameter Conditions Limit Limit Limit Units
(Note 5)
(Note 6) (Note 6) (Note 6)
VOS Input Offset Voltage 2.0 3.0 3.0 mV
0.9
2.7 3.7 3.8 max
TCVOS Input Offset Voltage
2.0 mV/§ C
Average Drift
IB Input Bias Current 0.02 pA
IOS Input Offset Current 0.01 pA
CMRR Common Mode 0V s VCM s 3V 74 64 60 60 dB
Rejection Ratio min
PSRR Power Supply 3V s V a s 15V, Vb e 0V 80 68 60 60 dB
Rejection Ratio min
VCM Input Common-Mode For CMRR t 50 dB Vb b0.25 0 0 0 V
Voltage Range max
V a a 0.25 Va Va Va V
min
VO Output Swing RL e 2 kX to V a /2 2.8 V
0.2 V
RL e 600X to V a /2 2.7 2.5 2.5 2.5 V
min
0.37 0.6 0.6 0.6 V
max
IS Supply Current Both Amplifiers 0.825 1.2 1.2 1.2 mA
1.5 1.5 1.6 max

AC Electrical Characteristics
Unless otherwise specified, V a e 3V, Vb e 0V, VCM e VO e V a /2, and RL l 1M.

LMC6482AI LMC6482I LMC6482M

Typ
Symbol Parameter Conditions Limit Limit Limit Units
(Note 5)
(Note 6) (Note 6) (Note 6)
SR Slew Rate (Note 11) 0.9 V/ms
GBW Gain-Bandwidth Product 1.0 MHz
T.H.D. Total Harmonic Distortion F e 10 kHz, AV e b2
0.01 %
RL e 10 kX, VO e 2 VPP
Note 1: Absolute Maximum Ratings indicate limts beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is
intended to be functional, but specific performance is not guaranteed. For guaranteed specifications and the test conditions, see the Electrical Characteristics.
Note 2: Human body model, 1.5 kX in series with 100 pF. All pins rated per method 3015.6 of MIL-STD-883. This is a Class 1 device rating.
Note 3: Applies to both single-supply and split-supply operation. Continuous short circuit operation at elevated ambient temperature can result in exceeding the
maximum allowed junction temperature of 150§ C. Output currents in excess of g 30 mA over long term may adversely affect reliability.
Note 4: The maximum power dissipation is a function of TJ(max), iJA, and TA. The maximum allowable power dissipation at any ambient temperature is PD e
(TJ(max) b TA)/iJA. All numbers apply for packages soldered directly into a PC board.
Note 5: Typical Values represent the most likely parametric norm.
Note 6: All limits are guaranteed by testing or statistical analysis.
Note 7: V a e 15V, VCM e 7.5V and RL connected to 7.5V. For Sourcing tests, 7.5V s VO s 11.5V. For Sinking tests, 3.5V s VO s 7.5V.
Note 8: Do not short circuit output to V a , when V a is greater than 13V or reliability will be adversely affected.
Note 9: V a e 15V. Connected as Voltage Follower with 10V step input. Number specified is the slower of either the positive or negative slew rates.
Note 10: Input referred, V a e 15V and RL e 100 kX connected to 7.5V. Each amp excited in turn with 1 kHz to produce VO e 12 VPP.
Note 11: Connected as voltage Follower with 2V step input. Number specified is the slower of either the positive or negative slew rates.
Note 12: Limiting input pin current is only necessary for input voltages that exceed absolute maximum input voltage ratings.
Note 13: Guaranteed limits are dictated by tester limitations and not device performance. Actual performance is reflected in the typical value.
Note 14: For guaranteed Military Temperature parameters see RETS6482X.

5
Typical Performance Characteristics
VS e a 15V, Single Supply, TA e 25§ C unless otherwise specified

Supply Current vs Input Current vs Sourcing Current vs

Supply Voltage Temperature Output Voltage

Sourcing Current vs Sourcing Current vs Sinking Current vs

Output Voltage Output Voltage Output Voltage

Sinking Current vs Sinking Current vs Output Voltage Swing vs

Output Voltage Output Voltage Supply Voltage

Input Voltage Noise Input Voltage Noise

vs Frequency vs Input Voltage

TL/H/11713 – 5

6
Typical Performance Characteristics
VS e a 15V, Single Supply, TA e 25§ C unless otherwise specified (Continued)

Input Voltage Noise Input Voltage Noise Crosstalk Rejection

vs Input Voltage vs Input Voltage vs Frequency

Crosstalk Rejection Positive PSRR Negative PSRR

vs Frequency vs Frequency vs Frequency

CMRR vs CMRR vs CMRR vs

Frequency Input Voltage Input Voltage

CMRR vs DVOS DVOS

Input Voltage vs CMR vs CMR

TL/H/11713 – 6

7
Typical Performance Characteristics
VS e a 15V, Single Supply, TA e 25§ C unless otherwise specified (Continued)

Input Voltage vs Input Voltage vs Open Loop

Output Voltage Output Voltage Frequency Response

Open Loop Open Loop Frequency Maximum Output Swing

Frequency Responce Response vs Temperature vs Frequency

Gain and Phase vs Gain and Phase vs Open Loop Output

Capacitive Load Capacitive Load Impedance vs Frequency

Open Loop Output Slew Rate vs Non-Inverting Large

Impedance vs Frequency Supply Voltage Signal Pulse Response

TL/H/11713 – 7

8
Typical Performance Characteristics
VS e a 15V, Single Supply, TA e 25§ C unless otherwise specified (Continued)

Non-Inverting Large Non-Inverting Large Non-Inverting Small

Signal Pulse Response Signal Pulse Response Signal Pulse Response

Non-Inverting Small Non-Inverting Small Inverting Large

Signal Pulse Response Signal Pulse Response Signal Pulse Response

Inverting Large Signal Inverting Large Signal Inverting Small Signal

Pulse Response Pulse Response Pulse Response

Inverting Small Signal Inverting Small Signal Stability vs

Pulse Response Pulse Response Capacitive Load

TL/H/11713 – 8

9
Typical Performance Characteristics
VS e a 15V, Single Supply, TA e 25§ C unless otherwise specified (Continued)

Stability vs Stability vs Stability vs

Capacitive Load Capacitive Load Capacitive Load

Stability vs Stability vs
Capacitive Load Capacitive Load

TL/H/11713 – 9

10
Application Information
1.0 Amplifier Topology
The LMC6482 incorporates specially designed wide-compli-
ance range current mirrors and the body effect to extend
input common mode range to each supply rail. Complemen-
tary paralleled differential input stages, like the type used in
other CMOS and bipolar rail-to-rail input amplifiers, were not
used because of their inherent accuracy problems due to
CMRR, cross-over distortion, and open-loop gain variation.
The LMC6482’s input stage design is complemented by an
output stage capable of rail-to-rail output swing even when
driving a large load. Rail-to-rail output swing is obtained by
taking the output directly from the internal integrator instead
of an output buffer stage.
TL/H/11713 – 39
FIGURE 2. A g 7.5V Input Signal Greatly
2.0 Input Common-Mode Voltage Exceeds the 3V Supply in Figure 3 Causing
Range No Phase Inversion Due to RI
Unlike Bi-FET amplifier designs, the LMC6482 does not ex- Applications that exceed this rating must externally limit the
hibit phase inversion when an input voltage exceeds the maximum input current to g 5 mA with an input resistor (RI)
negative supply voltage. Figure 1 shows an input voltage as shown in Figure 3 .
exceeding both supplies with no resulting phase inversion
on the output.

TL/H/11713 – 11
FIGURE 3. RI Input Current Protection for
Voltages Exceeding the Supply Voltages

3.0 Rail-To-Rail Output

The approximated output resistance of the LMC6482 is
180X sourcing and 130X sinking at Vs e 3V and 110X
sourcing and 80X sinking at Vs e 5V. Using the calculated
output resistance, maximum output voltage swing can be
TL/H/11713 – 10
estimated as a function of load.
FIGURE 1. An Input Voltage Signal Exceeds the
LMC6482 Power Supply Voltages with
No Output Phase Inversion 4.0 Capacitive Load Tolerance
The absolute maximum input voltage is 300 mV beyond ei- The LMC6482 can typically directly drive a 100 pF load with
ther supply rail at room temperature. Voltages greatly ex- VS e 15V at unity gain without oscillating. The unity gain
ceeding this absolute maximum rating, as in Figure 2 , can follower is the most sensitive configuration. Direct capaci-
cause excessive current to flow in or out of the input pins tive loading reduces the phase margin of op-amps. The
possibly affecting reliability. combination of the op-amp’s output impedance and the ca-
pacitive load induces phase lag. This results in either an
underdamped pulse response or oscillation.
Capacitive load compensation can be accomplished using
resistive isolation as shown in Figure 4 . This simple tech-
nique is useful for isolating the capacitive inputs of multi-
plexers and A/D converters.

TL/H/11713 – 17
FIGURE 4. Resistive Isolation
of a 330 pF Capacitive Load

11
Application Information (Continued)
5.0 Compensating for Input
Capacitance
It is quite common to use large values of feedback resist-
ance with amplifiers that have ultra-low input current, like
the LMC6482. Large feedback resistors can react with small
values of input capacitance due to transducers, photodi-
odes, and circuits board parasitics to reduce phase margins.

TL/H/11713–18
FIGURE 5. Pulse Response of
TL/H/11713 – 19
the LMC6482 Circuit in Figure 4
FIGURE 8. Canceling the Effect of Input Capacitance
Improved frequency response is achieved by indirectly driv-
The effect of input capacitance can be compensated for by
ing capacitive loads, as shown in Figure 6 .
adding a feedback capacitor. The feedback capacitor (as in
Figure 8 ), Cf, is first estimated by:

1 1
t
2qR1 CIN 2qR2 Cf
or

R1 CIN s R2 Cf
which typically provides significant overcompensation.
Printed circuit board stray capacitance may be larger or
smaller than that of a bread-board, so the actual optimum
TL/H/11713–15 value for Cf may be different. The values of Cf should be
FIGURE 6. LMC6482 Noninverting Amplifier, checked on the actual circuit. (Refer to the LMC660 quad
Compensated to Handle a 330 pF Capacitive Load CMOS amplifier data sheet for a more detailed discussion.)
R1 and C1 serve to counteract the loss of phase margin by
feeding forward the high frequency component of the output
signal back to the amplifiers inverting input, thereby preserv-
ing phase margin in the overall feedback loop. The values of
R1 and C1 are experimentally determined for the desired
pulse response. The resulting pulse response can be seen
in Figure 7 .

TL/H/11713–16
FIGURE 7. Pulse Response of
LMC6482 Circuit in Figure 6

12
Application Information (Continued)
6.0 Printed-Circuit-Board Layout
for High-Impedance Work
It is generally recognized that any circuit which must oper-
rate with less than 1000 pA of leakage current requires spe-
cial layout of the PC board. When one wishes to take advan-
tage of the ultra-low input current of the LMC6482, typically
less than 20 fA, it is essential to have an excellent layout.
Fortunately, the techniques of obtaining low leakages are
quite simple. First, the user must not ignore the surface
leakage of the PC board, even through it may sometimes
appear acceptably low, because under conditions of high
humidity or dust or contamination, the surface leakage will TL/H/11713 – 21
be appreciable. (a) Inverting Amplifier
To minimize the effect of any surface leakage, lay out a ring
of foil completely surrounding the LM6482’s inputs and the
terminals of capacitors, diodes, conductors, resistors, relay
terminals, etc. connected to the op-amp’s inputs, as in Fig-
ure 9 . To have a significant effect, guard rings should be
placed on both the top and bottom of the PC board. This PC
foil must then be connected to a voltage which is at the
same voltage as the amplifier inputs, since no leakage cur-
rent can flow between two points at the same potential. For TL/H/11713 – 22
example, a PC board trace-to-pad resistance of 1012X, (b) Non-Inverting Amplifier
which is normally considered a very large resistance, could
leak 5 pA if the trace were a 5V bus adjacent to the pad of
the input. This would cause a 250 times degradation from
the LMC6482’s actual performance. However, if a guard
ring is held within 5 mV of the inputs, then even a resistance
of 1011X would cause only 0.05 pA of leakage current. See
Figures 10a, 10b, 10c for typical connections of guard rings
for standard op-amp configurations.
TL/H/11713 – 23
(c) Follower
FIGURE 10. Typical Connections of Guard Rings
The designer should be aware that when it is inappropriate
to lay out a PC board for the sake of just a few circuits, there
is another technique which is even better than a guard ring
on a PC board: Don’t insert the amplifier’s input pin into the
board at all, but bend it up in the air and use only air as an
insulator. Air is an excellent insulator. In this case you may
have to forego some of the advantages of PC board con-
struction, but the advantages are sometimes well worth the
effort of using point-to-point up-in-the-air wiring. See Figure
11 .

TL/H/11713 – 20
FIGURE 9. Example of Guard Ring in P.C. Board Layout

TL/H/11713 – 24
(Input pins are lifted out of PC board and soldered directly to components.
All other pins connected to PC board.)
FIGURE 11. Air Wiring

13
Application Information (Continued)
7.0 Offset Voltage Adjustment 8.0 Upgrading Applications
Offset voltage adjustment circuits are illustrated in Figure 12 The LMC6484 quads and LMC6482 duals have industry
and 13 . Large value resistances and potentiometers are standard pin outs to retrofit existing applications. System
used to reduce power consumption while providing typically performance can be greatly increased by the LMC6482’s
g 2.5 mV of adjustment range, referred to the input, for both features. The key benefit of designing in the LMC6482 is
configurations with VS e g 5V. increased linear signal range. Most op-amps have limited
input common mode ranges. Signals that exceed this range
generate a non-linear output response that persists long af-
ter the input signal returns to the common mode range.
Linear signal range is vital in applications such as filters
where signal peaking can exceed input common mode
ranges resulting in output phase inverison or severe distor-
tion.

9.0 Data Acquisition Systems

Low power, single supply data acquisition system solutions
are provided by buffering the ADC12038 with the LMC6482
TL/H/11713–25
(Figure 14) . Capable of using the full supply range, the
LMC6482 does not require input signals to be scaled down
FIGURE 12. Inverting Configuration
to meet limited common mode voltage ranges. The
Offset Voltage Adjustment
LMC4282 CMRR of 82 dB maintains integral linearity of a
12-bit data acquisition system to g 0.325 LSB. Other rail-to-
rail input amplifiers with only 50 dB of CMRR will degrade
the accuracy of the data acquisition system to only 8 bits.

TL/H/11713–26
FIGURE 13. Non-Inverting Configuration
Offset Voltage Adjustment

TL/H/11713 – 28

FIGURE 14. Operating from the same

Supply Voltage, the LMC6482 buffers the
ADC12038 maintaining excellent accuracy

14
Application Information (Continued)
benefit from these features include analytic medical instru-
10.0 Instrumentation Circuits ments, magnetic field detectors, gas detectors, and silicon-
The LMC6482 has the high input impedance, large com- based tranducers.
mon-mode range and high CMRR needed for designing in-
A small valued potentiometer is used in series with Rg to set
strumentation circuits. Instrumentation circuits designed
the differential gain of the 3 op-amp instrumentation circuit
with the LMC6482 can reject a larger range of common-
in Figure 15 . This combination is used instead of one large
mode signals than most in-amps. This makes instrumenta-
valued potentiometer to increase gain trim accuracy and re-
tion circuits designed with the LMC6482 an excellent choice
duce error due to vibration.
of noisy or industrial environments. Other applications that

TL/H/11713 – 29
FIGURE 15. Low Power 3 Op-Amp Instrumentation Amplifier
A 2 op-amp instrumentation amplifier designed for a gain of Higher frequency and larger common-mode range applica-
100 is shown in Figure 16 . Low sensitivity trimming is made tions are best facilitated by a three op-amp instrumentation
for offset voltage, CMRR and gain. Low cost and low power amplifier.
consumption are the main advantages of this two op-amp
circuit.

TL/H/11713 – 30

FIGURE 16. Low-Power Two-Op-Amp Instrumentation Amplifier

15
Application Information (Continued)
11.0 Spice Macromodel
A spice macromodel is available for the LMC6482. This
model includes accurate simulation of:
# Input common-mode voltage range
# Frequency and transient response
# GBW dependence on loading conditions
# Quiescent and dynamic supply current
# Output swing dependence on loading conditions
and many more characteristics as listed on the macromodel
disk.
Contact your local National Semiconductor sales office to TL/H/11713 – 33

obtain an operational amplifier spice model library disk. FIGURE 18. Full Wave Rectifier
with Input Current Protection (RI)
Typical Single-Supply Applications

TL/H/11713–31
FIGURE 17. Half-Wave Rectifier
with Input Current Protection (RI)

TL/H/11713 – 34
FIGURE 18A. Full Wave Rectifier Waveform

TL/H/11713–32
FIGURE 17A. Half-Wave Rectifier Waveform
TL/H/11713 – 35
The circuit in Figure 17 uses a single supply to half wave FIGURE 19. Large Compliance Range Current Source
rectify a sinusoid centered about ground. RI limits current
into the amplifier caused by the input voltage exceeding the
supply voltage. Full wave rectification is provided by the cir-
cuit in Figure 18 .

16
Typical Single-Supply Applications

TL/H/11713 – 36
FIGURE 20. Positive Supply Current Sense

TL/H/11713 – 37
FIGURE 21. Low Voltage Peak Detector with Rail-to-Rail Peak Capture Range

In Figure 21 dielectric absorption and leakage is minimized by using a polystyrene or polyethylene hold capacitor. The droop rate
is primarily determined by the value of CH and diode leakage current. The ultra-low input current of the LMC6482 has a
negligible effect on droop.

TL/H/11713 – 38
FIGURE 22. Rail-to-Rail Sample and Hold
The LMC6482’s high CMRR (82 dB) allows excellent accuracy throughout the circuit’s rail-to-rail dynamic capture range.

TL/H/11713 – 27

0 0
1 C2 R2
R1 e R2, C1 e C2; f e ; DF e (/2
2qR1 C1 C1 R1
FIGURE 23. Rail-to-Rail Single Supply Low Pass Filter
The low pass filter circuit in Figure 23 can be used as an anti-aliasing filter with the same voltage supply as the A/D converter.
Filter designs can also take advantage of the LMC6482 ultra-low input current. The ultra-low input current yields negligible offset
error even when large value resistors are used. This in turn allows the use of smaller valued capacitors which take less board
space and cost less.

17
Physical Dimensions inches (millimeters)

8-Pin Ceramic Dual-In-Line Package

Order Number LMC6482AMJ/883
NS Package Number J08A

18
Physical Dimensions inches (millimeters) (Continued)

8-Pin Small Outline Package

Order Package Number LMC6482AIM or LMC6482IM
NS Package Number M08A

19
LMC6482 CMOS Dual Rail-To-Rail Input and Output Operational Amplifier
Physical Dimensions inches (millimeters) (Continued)

8-Pin Molded Dual-In-Line Package

Order Package Number LMC6482AIN, LMC6482IN or LMC6482MN
NS Package Number N08E

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be reasonably expected to result in a significant injury
to the user.

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