COMPUTER ARCHITECTURE AN
ORGANIZATION 216 (CAG216D)
Diploma in Computer Systems Engineering
MEMO
Test 2
120 min Examiners: Mr E Khoza, Mr C
2025 – Sem 1 Tshipota, Mr A Mayingi
9 pages Moderator: Dr Nadiah Nahri
(including cover & Appendix)
Student number
Signature
Surname Initials %
Class List
Number
Total Paper Total 65
Instructions to Candidates
1. Answer all questions
2. All bags and books must be put away according to the invigilator’s instructions. Follow all other
instructions given by the invigilator.
3. All cellular telephones must be switched off.
4. All answers must be written in Engineering format (milli, kilo, etc.) with 3 decimal places.
5. Answers without units will not be marked.
6. All the answers must be done in pen. Work done in pencil will not be marked.
(Diagrams may be done in pencil.)
7. Show all your calculations in the allocated areas.
8. All theoretical answers must be done in pen. Work done in pencil will not be marked. Diagrams may
be done in pencil.
9. Diagrams and schematics will be marked as follows: Marks will be allocated for
the correct components or blocks added to the diagram or schematic and marks
will be deducted for each wrong connection of these components or blocks on the
diagram or schematic or for any additional components or blocks unnecessarily
added to the diagram or schematic.
10. No replacement papers will be handed out. If you want to change an answer, draw a neat line
through the incorrect answer and write the replacement answer on the blank adjacent page.
11. No “bathroom breaks” will be allowed without a valid medical certificate. The student must conclude
all personal matters before starting to write the test.
12. No cheating is allowed.
13. By writing this paper, the student agrees to abide by all TUT, subject and test rules and regulations.
Paper moderated by student Signature
Question 1 10
1.1 Indicate which mode and which timer are selected for each of the following.
(a) MOV TMOD, #01H (b) MOV TMOD, #20H (c) MOV TMOD, #12H (3)
TMOD = 00000001, mode 1 of timer 0 is selected
TMOD = 00100000, mode 2 of timer 1 is selected.
TMOD = 00010010, mode 2 of timer 0, and mode 1 of timer 1 are selected.
1.2 Describe the purpose of each bit in the Interrupt Enable (IE) register (7)
• EA : Global enable/disable.
• : Reserved for additional interrupt hardware.
• ES : Enable Serial port interrupt.
• ET1 : Enable Timer 1 control bit.
• EX1 : Enable External 1 interrupt.
• ET0 : Enable Timer 0 control bit.
• EX0 : Enable External 0 interrupt.
Question 2 17
2.1. Name the 2 types of serial communication. (2)
Synchronous Asynchronous
2.2. Which modes are used for Multi-Processor communications? (2)
Mode 2 Mode 3
2.3. Define the Baud rate (1)
Baud rate is the number of bits transmitted or received per second.
2.4 The following terms are commonly used in an 8051 microcontroller. Provide a full
description of each. [5 marks]
a) TCON
b) P1
c) DPTR
d) ACC
e) INT0
a) Timer Control
b) Port 1
c) Data Pointer
d) Accumulator
e) External Interrupt 0
2.5. Indicate which modes the following characteristics are unique to. (4)
Characteristic Mode 0 Mode 1 Mode 2 Mode 3
c) 8-bit counter X
a) 13-bit counter X
b) 16-bit counter X
d) Baud rate generator X
2.6. What is the purpose of a comment in a program? (1)
To explain the purpose of the instruction
2.7 Use the following table to write an instruction that exchanges the digits of the Accumulator with the RAM
indirectly pointed to by R1. Hint: use the XCHD mnemonic. (2)
XCHD A, @R1
A = 39h
Int RAM addr 2Ch = 7Bh
Question 3 10
3.1. Design and draw a 4k x 8 RAM using 1k x 8 memory IC’s. (10)
✓ 4 chips
✓ 12 Address lines (AO- A11)
✓ AO-A9 connected to Chip 1-4
✓ A9&A1O used for decoding
✓ Decoder used for decoding
✓ ✓✓✓Decoder outputs to Chip 1-4
✓ DO-Dl connected to Chip 1-4
Question 4
4.1 Find out to which by each of the following bits belongs. Give the address of the RAM byte
in hex
(a) SETB 42H, (b) CLR 67H, (c) CLR 0FH (d) SETB 28H, (e) CLR 12, (f) SETB 05 [6 mks]
4.2. List the steps to implement an interrupt. (5)
1. Set the EA-bit in the IE-register
2. Set the corresponding individual interrupt enable bit in the IE-register
3. Set the interrupt priority bits in the IP-register (if required)
4. Specify edge triggering or level detection
(Configure bits 0 & 2 in the TCON-register)
5. Begin the interrupt routine at the corresponding vector address
4.3 . Arrange the interrupt sources in order of priority (highest to lowest) by writing down their
numbers in the correct sequence. (5)
1. External interrupt 0 (EX0)
2. External interrupt 1 (EX1)
3. Serial port interrupt (ES) Answer:
4. Timer interrupt 0 (ET0) 1 4 2 5 3
5. Timer interrupt 1 (ET1)
4.4 Show the instructions to (a) enable the serial interrupt, timer 0interrupt, and
external hardware interrupt 1 and (b) disable (mask) the timer 0 interrupt, then
(c) show how to disable all the interrupts with a single instruction.[6 marks]
• Solution:
– (a) MOV IE,#10010110B ;enable serial, timer 0, EX1
• Another way to perform the same manipulation is:
– SETB IE.7 ;EA=1, global enable
– SETB IE.4 ;enable serial interrupt
– SETB IE.1 ;enable Timer 0 interrupt
– SETB IE.2 ;enable EX1
– (b) CLR IE.1 ;mask (disable) timer 0 interrupt only
– (c) CLR IE.7 ;disable all interrupts
Question 5
5.1. The following program shows the basic initialization of the registers involved in
serial port operations. Complete the program and comments by writing the
correct information in the spaces provided. (6)
ORG 0000h
JMP INIT ;Reset vector address
ORG 0023h ;Serial interrupt vector
JMP SER_INT
ORG 0030h ;Starting address
INIT: CLR TR1 ;A
MOV TH1,#247 ;2400 baud rate @8MHz
MOV B,#00100000b ;Timer 1 8-bit auto-reload
MOV C,#01010011b ;8-bit UART and TI/RI flag
MOV IE,#00010000b ;Serial interrupt
MOV IP,#00010000b ;Serial high priority
SETB TR1 ; D
7
E ;Enable al interrupts
IDLE: MOV A,#0033h ;Dummy program to gain time
SUBB A,#03h
NOP
JMP IDLE
SER_INT: JNB RI,OUT1 ;Check if interrupt is set
JNB RI,$ ;Wait for RI interrupt
CLR RI
MOV A,SBUF ;Read data from buffer
CJNE A,#47h,OUT1 ;See if G has been pressed
TX_INT: MOV DPTR,#TABEL ;Load table
MOV R0,#00h
MOV A,R0
TX: MOVC A,@A+DPTR
MOV SBUF.A
JNB TI,$ ;Check to see if all data
CLR TI ;has been transmitted
INC R0
INC DPTR
CJNE R0,#50,TX
OUT1: CLR TR1 ;Stop timer
RETI ;F
TABEL: DB ‘8051 serial test’,0Dh,0Eh
END
A D
Stop Timer Start Timer 1
B E
TMOD SETB EA
C F
SCON Return to main routine
8
MCS51 INSTRUCTION SET
2-loop: t = 1 + [(1+2.R0) + 2].R1
3-loop: t = 1 + (1 + [(1+2.R0) + 2].R1 + 2). R2
Mneumonic Byte Osc Mneumonic Byte Osc
Periods Periods
ADD A,Rn 1 12 MOV direct,A 2 12
ADD A,direct 2 12 MOV direct,Rn 2 24
ADD A,@Ri 1 12 MOV direct,direct 3 24
ADD A,#data 2 12 MOV direct,@Ri 2 24
ADDC A,Rn 1 12 MOV direct,#data 3 24
ADDC A,direct 2 12 MOV @Ri,A 1 12
ADDC A,@Ri 1 12 MOV @Ri,direct 2 24
ADDC A,#data 2 12 MOV @Ri,#data 2 12
SUBB A,Rn 1 12 MOV DPTR,#data16 3 24
SUBB A,direct 2 12 MOVC A,@A+DPTR 1 24
SUBB A,direct 1 12 MOVC A,@A+PC 1 24
SUBB A,#data 2 12 MOVX A,Ri 1 24
INC A 1 12 MOVX A,@DPTR 1 24
INC direct 2 12 MOVX @Ri,A 1 24
INC @Ri 1 12 MOVX @DPTR,A 1 24
DEC A 1 12 PUSH direct 2 24
DEC direct 2 12 POP direct 2 24
DEC @Ri 1 12 XCH A,Rn 1 12
INC DPTR 1 24 XCH A,direct 2 12
MUL AB 1 48 XCH A,@Ri 1 12
DIV AB 1 48 XCHD A,@Ri 1 12
DA A 1 12 CLR C 1 12
ANL A,Rn 1 12 CLR bit 2 12
ANL A,direct 2 12 SETB C 1 12
ANL A,@Ri 1 12 SETB bit 2 12
ANL A,#data 2 12 CPL C 1 12
ANL direct,A 2 12 CPL bit 2 12
ANL direct,#data 3 24 ANL C,bit 2 24
ORL A,Rn 1 12 ANL C,/bit 2 24
ORL A,direct 2 12 ORL C,bit 2 24
ORL A,@Ri 1 12 ORL C,/bit 2 24
ORL A,#data 2 12 MOV C,bit 2 12
ORL direct,A 2 12 MOV bit,C 2 12
ORL direct,#data 3 24 JC rel 2 24
XRL A,Rn 1 12 JNC rel 2 24
XRL A,direct 2 12 JB bit,rel 3 24
XRL A,@Ri 1 12 JNB bit,rel 3 24
XRL A,#data 2 12 JBC bit,rel 3 24
XRL direct,A 2 12 ACALL addr11 2 24
XRL direct,#data 3 24 LCALL addr16 3 24
CLR A 1 12 RET 1 24
CPL A 1 12 RETI 1 24
RL A 1 12 AJMP addr11 2 24
RLC A 1 12 LJMP addr16 3 24
RR A 1 12 SJMP rel 2 24
RRC A 1 12 JMP @A+DPTR 1 24
SWAP A 1 12 JZ rel 2 24
MOV A,Rn 1 12 JNZ rel 2 24
MOV A,direct 2 12 CJNE A,direct,rel 3 24
MOV A,@Ri 1 12 CJNE A,#data,rel 3 24
MOV A,#data 2 12 CJNE Rn,#data,rel 3 24
MOV Rn,A 1 12 CJNE @Ri,#data,rel 3 24
MOV Rn,direct 2 24 DJNZ Rn,rel 2 24
MOV Rn,#data 2 12 DJNZ direct,rel 3 24
MOV direct,A 2 12 NOP 1 12
A,#data,Rel (if A < #data then CY=1 else CY=0) CJNE A,direct,Rel (if A < direct) then CY=1 else CY=0)
CJNE Rn,#data,Rel (if A < #data) then CY=1 else CY=0
