Cdb5460au Dbu1-51091
Cdb5460au Dbu1-51091
– Time Domain Analysis Schematics in PADS™ PowerLogic™ format are available for
download at www.cirrus.com/IndustrialSoftware.
– Noise Histogram Analysis
+2.5V
reference
SERIAL
REF EERPOM
IN OUT
VREF CS
SDI C8051F320
VIN+ SDO
SCLK
INT
VIN-
CS5460A
RESET
E1
EOUT
IIN+ Reset
E2 Circuirty
EDIR RESET
BUTTON
IIN- MODE
MODE
4.096MHz
Crystal
TABLE OF CONTENTS
1. HARDWARE ............................................................................................................................. 3
1.1 Introduction ........................................................................................................................ 3
1.2 Evaluation Board Overview ................................................................................................ 3
1.3 Analog Section ................................................................................................................... 4
1.4 Digital Section .................................................................................................................... 5
1.5 Power Supply Section ........................................................................................................ 5
1.6 Auto-boot Mode ................................................................................................................. 6
2. SOFTWARE .............................................................................................................................. 8
2.1 Installation .......................................................................................................................... 8
2.2 Using the Software ............................................................................................................. 8
2.3 Start-up Window ................................................................................................................ 8
2.4 Setup Window .................................................................................................................. 12
2.5 Calibration Windows ........................................................................................................ 14
2.6 Conversion Window ......................................................................................................... 16
2.7 Pulse Rate Window .......................................................................................................... 17
2.8 Data Collection Window ................................................................................................... 18
2.9 EEPROM Window ............................................................................................................ 25
2.10 Debug Panel .................................................................................................................. 26
Appendix A. Bill Of Materials ................................................................................................... 27
Appendix B. Schematics .......................................................................................................... 29
Appendix C. Layer Plots ........................................................................................................... 33
FIGURE 26. REVISION HISTORY .............................................................................................. 37
LIST OF FIGURES
Figure 1. CDB5460AU Assembly Drawing...................................................................................... 3
Figure 2. GUI Start-up Window ....................................................................................................... 8
Figure 3. Setup Menu Showing Successful USB Connection ......................................................... 9
Figure 4. USB Error Message ......................................................................................................... 9
Figure 5. Data from Disc File Selection Window ........................................................................... 10
Figure 6. Menu Pull-down Options ................................................................................................ 10
Figure 7. Quit Dialog ..................................................................................................................... 11
Figure 8. Setup Window ................................................................................................................ 12
Figure 9. Calibration Window ....................................................................................................... 14
Figure 10. Conversion Window ..................................................................................................... 16
Figure 11. Pulse Rate Output Window .......................................................................................... 17
Figure 12. Data Collection Window ............................................................................................... 18
Figure 13. Configuration Window .................................................................................................. 19
Figure 14. Histogram Analysis ...................................................................................................... 21
Figure 15. FFT Analysis ................................................................................................................ 23
Figure 16. Time Domain Analysis ................................................................................................. 24
Figure 17. EEPROM Window........................................................................................................ 25
Figure 18. Debug Panel ................................................................................................................ 26
Figure 19. Schematic - Analog Inputs ........................................................................................... 29
Figure 20. Schematic - CS5460A & Socket .................................................................................. 30
Figure 21. Schematic - Microcontroller & USB Interface............................................................... 31
Figure 22. Schematic - Power Supplies ........................................................................................ 32
Figure 23. Top Silkscreen ............................................................................................................. 33
Figure 24. Top Routing.................................................................................................................. 34
Figure 25. Bottom Routing ............................................................................................................ 35
Figure 26. Bottom Silkscreen ........................................................................................................ 36
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1. HARDWARE
1.1 Introduction
The CDB5460AU evaluation board provides a quick means of evaluating the CS5460A power measure-
ment IC. The CDB5460AU evaluation board operates from a single +5 V power supply. The evaluation
board interfaces the CS5460A to a PC via an USB interface. To accomplish this, the board comes
equipped with a C8051F320 microcontroller and a USB interface. Additionally, CDB5460AU GUI software
provides easy access to the internal registers of the CS5460A, and provides a means to display the per-
formance in the time domain or the frequency domain.
U1
JP4 J40
D1 1 2
VIN- U10
VIN- U11 U2
VREF TP11 JP5
GND
GND VIN- TP30
J27 J22 PFMON GND U8
GND J24
GND IIN+ J25
VREFIN
VREF
VREFOUT
VREF
IIN+ TP12
IIN+
IIN- IIN- VA+GND GNDVD+
VREF TP13
GND
JP6GND IIN-
J26
GND
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The evaluation board provides three voltage reference options for VREFIN to the CS5460A. The three voltage ref-
erence options include: VREFOUT from the CS5460A, the on-board +2.5V reference, and external REF+ (screw
terminal J14). Table 1 and Table 2 illustrate the options available for VREFIN. With a jumper on J25 in the position
labeled VREFOUT, the reference is supplied by the on-chip voltage reference. With a jumper on J25 in the position
labeled VREF, the reference is supplied by an off-chip voltage reference.
VREF O
Selects On-chip
VREFOUT VREFIN O
Reference (30 ppm/°C) VREFOUT
(Default)
Table 2 illustrates the options available for VREF. With a jumper on J12 in position LT1019, the LT1019 provides a
+2.5V reference (the LT1019 was chosen for its low drift — typically 20ppm/°C). By setting the jumper on J12 to
position REF+, an external voltage reference is supplied via screw terminal J14's REF+ input.
The three input signal options for the voltage (VIN±) and current (IIN±) channel input include: an external signal
(screw terminals J23 and J27), GND, or VREF. Table3 illustrates the options available. By installing jumpers on J17
to position VIN+, J22 to position VIN-, J24 to position IIN+, and J26 to position IIN-, the input voltage signal is sup-
plied from the screw terminals J23 and J27. With a jumper on J17, J22, J24, and J26 in the GND position, the inputs
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are connected to analog ground (AGND). With a jumper on J17, J22, J24, and J26 in position VREF, the inputs are
connected to the reference voltage selected on J12.
INPUT Description J17 J22 J24 J26
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for the 8051 microcontroller (8051_REGIN). Jumper J9 allows the 8051_REGIN supply to be sourced
from either the Vu+_EXT binding post (J6), +5V binding post (J3) or VD+_EXT binding post (J5).
+5
VD+_EXT O VD+ Vu+_EXT O 8051
NC +5 O O VD+ +5 O O 8051
+3.3 O O VD+ VD+ O O 8051
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The EEPROM must be programmed prior to the auto-boot sequence. When the CDB5460AU Evaluation
Board is sent from the factory, the EEPROM is programmed with the following CS5460A command/data
sequence:
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2. SOFTWARE
The evaluation board comes with software and an USB cable to link the evaluation board to the PC. The
evaluation software was developed with LabWindows®/CVI®, a software development package from na-
tional Instruments. The evaluation software is available for download on the Cirrus Logic web site at
http://www.cirrus.com/industrialsoftware and was designed to run under Windows® 2000 or
Windows XP®.
2.1 Installation
To install the software, go to the Cirrus Logic web site at http://www.cirrus.com/industrialsoftware and re-
fer to application note AN278.
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If the USB item in the Setup menu is selected, the evaluation software will poll the CDB5460AU, verifying
the serial communication link is ready. At this point, the USB menu item is checked indicating that the PC
has successfully communicated with CDB5460AU evaluation board, and device and micro-code version
information are read from the board and displayed on the screen. See Figure 3. Due to improvements to
the software or new features being added, the version displayed may be different than the image shown
here.
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CDB5460AU
If the Data from Disk item in the Setup menu is selected, a file selection window will appear as shown in
Figure 5. User can select a pre-saved data file for further analysis using time domain, FFT, and histogram
plots in Data Collection Window of the software.
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In the Setup window, all of the CS5460A's registers are displayed in hexadecimal notation and are decod-
ed to provide easier readability. Refer to the CS5460A data sheet for information on register functionality
and definitions. See Figure 8.
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The Refresh Screen button will update the contents of the screen by reading all the register values from
the part. It is a good idea to press the Refresh Screen button when entering the Calibration window, or
after modifying any registers to reflect the current status of the CS5460A.
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2.8.7.2 Average
When performing FFT analyses, this field determines the number of FFTs to average. FFTs will be col-
lected and averaged when the Collect button is pressed.
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1. In the Data Collection window, press the Config button to bring up the Configuration window and view the
current settings.
2. Select the appropriate settings from the available options (see the Configuration Window section) and press
the Accept button.
3. The Data Collection window should still be visible. Press the Collect button to begin collecting data.
4. Once the data has been collected, it can be analyzed, printed, or saved to disk.
1. Pull down the Setup menu and select the Disk menu item. A file menu will appear.
2. Find the data file in the list and select it. Press the Select button to return.
3. Go to the Data Collection window, and press the Collect button.
4. The data from the file should appear on the screen. The data will be ready for different types of analysis.
5. To select a different file, repeat the procedure.
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2.8.11.1 BIN
Displays the x-axis value of the cursor on the histogram.
2.8.11.2 MAGNITUDE
Displays the y-axis value of the cursor on the histogram.
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2.8.11.3 MEAN
Indicates the mean of the data sample set. The mean is calculated using the following formula:
n–1
∑ Xi
i=0
Mean = ----------------
n
2.8.11.4 STD_DEV
Indicates the standard deviation of the collected data set. The standard deviation is calculated using the
following formula:
n–1 2
∑ ( Xi – MEAN )
i=0
STDDEV = ------------------------------------------------
n
2.8.11.5 VARIANCE
Indicates for the variance of the current data set. The variance is calculated using the following formula:
n–1 2
∑ ( Xi – MEAN )
i=0
VARIANCE = ------------------------------------------------
n
2.8.11.6 MAXIMUM
Indicates the maximum value of the collected data set.
2.8.11.7 MINIMUM
Indicates the minimum value of the collected data set.
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2.8.12.1 FREQUENCY
Displays the x-axis value of the cursor on the FFT display.
2.8.12.2 MAGNITUDE
Displays the y-axis value of the cursor on the FFT display.
2.8.12.3 S/PN
Indicates the signal-to-peak noise ratio (decibels).
2.8.12.4 SINAD
Indicates for the signal-plus-noise-plus-distortion to noise-plus-distortion ratio (decibels).
2.8.12.5 S/D
Indicates for the signal-to-distortion ratio, 4 harmonics are used in the calculations (decibels).
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2.8.12.6 SNR
Indicates for the signal-to-noise ratio, first 4 harmonics are not included (decibels).
2.8.12.7 FS-Pdb
Indicates for the full-scale to signal Ratio (decibels).
2.8.12.9 COUNT
Displays current x-position of the cursor on the time domain display.
2.8.12.10 MAGNITUDE
Displays current y-position of the cursor on the time domain display.
2.8.12.11 MAXIMUM
Indicates for the maximum value of the collected data set.
2.8.12.12 MINIMUM
Indicates for the minimum value of the collected data set.
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CIRRUS LOGIC BILL OF MATERIAL (Page 1 of 2)
CDB5460AU_Rev_B.bom
Item Cirrus P/N Rev Description Qty Reference Designator MFG MFG P/N Notes
1 001-06872-Z1 A CAP 0.1uF ±10% 50V NPb X7R 1206 6 C1 C18 C19 C21 C29 C30 KEMET C1206C104K5RAC
2 001-02779-Z1 A CAP 22pF ±5% 50V C0G NPb 0805 1 C2 KEMET C0805C220J5GAC
3 001-02189-Z1 A CAP 0.1uF ±10% 16V X7R NPb 0603 5 C3 C4 C26 C32 C33 KEMET C0603C104K4RAC
4 012-00010-Z1 A CAP 47uF ±20% 16V NPb ELEC CASE C 4 C5 C8 C28 C31 PANASONIC EEE1CA470WR
5 001-04344-Z1 A CAP 0.1uF ±5% 50V X7R NPb 0805 7 C6 C7 C10 C11 C12 C15 C25 KEMET C0805C104J5RAC
6 001-03266-Z1 A CAP 220pF ±10% 50V X7R NPb 0805 4 C9 C17 C20 C24 KEMET C0805C221K5RAC
7 001-06685-Z1 A CAP 0.018uF ±10% 50V X7R NPb 1206 2 C13 C23 KEMET C1206C183K5RAC
8 012-00012-Z1 A CAP 10uF ±20% 16V ELEC NPb CASE A 3 C14 C22 C1000 PANASONIC EEE1CS100SR
9 001-07078-Z1 A CAP 1uF ±10% 25V X7R NPb 1206 1 C16 KEMET C1206C105K3RAC
APPENDIX A. BILL OF MATERIALS
27
28
CIRRUS LOGIC BILL OF MATERIAL (Page 2 of 2)
CDB5460AU_Rev_B.bom
Item Cirrus P/N Rev Description Qty Reference Designator MFG MFG P/N Notes
33 020-03355-Z1 A RES 301 OHM 1/3W ±1% NPb 1210 FILM 1 R25 DALE CRCW1210301RFKEA
34 020-03378-Z1 A RES 470 OHM 1/3W ±1% NPb 1210 FILM 4 R30 R31 R32 R33 DALE CRCW1210470RFKEA
35 020-03539-Z1 A RES 12.1k OHM 1/3W ±1% NPb 1210 FLM 1 R35 DALE CRCW121012K1FKEA
36 020-02748-Z1 A RES 15k OHM 1/4W ±1% 1206 NPb FILM 1 R37 DALE CRCW120615K0FKEA
37 020-01473-Z1 A RES 0 OHM 1/18W ±1% NPb 0805 FILM 12 R51 R52 R53 R54 R55 R56 R57 R58 R59 R60 DALE CRCW08050000Z0EA
R61 R62
38 020-02273-Z1 A RES 0 OHM 1/4W NPb 1206 FILM 1 R64 DALE CRCW12060000Z0EA
39 120-00002-Z1 A SWT SPST 130G 0/1 5mm TACT ESD NPb 1 S1 ITT INDUSTRIES PTS645TL50 INSTALL AFTER WASH PROCESS
40 110-00045-Z1 A CON TEST PT .1"CTR TIN PLAT NPb BLK 16 TP1 TP2 TP9 TP10 TP11 TP12 TP13 TP20 TP21 KEYSTONE 5001
TP22 TP23 TP24 TP25 TP26 TP27 TP30
41 062-00124-Z1 A IC PGM 128BIT SER EPROM NPb SOT23-5 1 U1 MICROCHIP 24LC00-I/OT PROGRAM AT TEST
42 061-00250-Z1 A IC DIG LOW V BUF/LDRV 5V NPb SOIC20 1 U2 FAIRCHILD 74LCX760WMX
SEMICONDUCTOR
43 062-00079-Z1 A IC PGM USB 16kB FLAS MCU NPb LQFP32 1 U3 SILICON C8051F320-GQ PROGRAM AT TEST
LABORATORIES INC
44 060-00061-Z1 A IC LNR PREC V REF 2.5V NPb SO8 1 U4 LINEAR TECH LT1019CS8-2.5#PBF
45 061-00190-Z1 A IC LOG UHS TINY DUAL BUF NPb SC70-6 1 U5 FAIRCHILD NC7WZ07P6X
SEMICONDUCTOR
46 065-00161-Z2 C IC CRUS PWR/ENERGY IC NPb SSOP24 1 U6 CIRRUS LOGIC CS5460A-BSZ/C
47 061-00002-Z1 A IC LOG INV 5P UHS TINY NPb SOT23 1 U8 FAIRCHILD NC7SZ04M5X
SEMICONDUCTOR
48 061-00219-Z1 A IC LOG UHS TINY ANA SWT 6P NPb SC70 2 U9 U11 FAIRCHILD NC7SB3157P6X
SEMICONDUCTOR
49 062-00122-Z1 A IC PGM EEPROM 512x8 SPI NPb SOIC8 1 U10 ATMEL AT25040AN-10SU-2.7 PROGRAM AT TEST
50 080-00003-Z1 A WIRE BPOST 1.5X.25 24/19 GA BLU NPb 4 XJ3 XJ4 XJ5 XJ6 SQUIRES L-1.5X.25TX.25T_TYPE_E_ WIRES FOR BINDING POSTS
51 300-00025-Z1 A SCREW 4-40X5/16" PH MACH SS NPb 4 XMH1 XMH2 XMH3 XMH4 BUILDING FASTENERS PMSSS 440 0031 PH SCREWS FOR STANDOFFS
52 135-00013-01 A SKT PINCH CONTACT FOR SSOP24 0 XU6 ENPLAS OTS-24(34)-0.65-01 DO NOT POPULATE
53 100-00049-Z1 A XTL 4.0960MHZ HC49S 50ppm 50pF NPb 1 Y1 CAL CRYSTAL CCL-6S-4.0960C14F-R
54 070-00006-Z1 A DIODE TR 6.8V 600W NPb AXL 3 Z1 Z2 Z3 LITTELFUSE P6KE6.8
55 600-00176-Z2 B SCHEM CDB5460AU-Z NPb REF CIRRUS LOGIC 600-00176-Z2
56 240-00176-Z1 B PCB CDB5460A_61A_63 NPb 1 CIRRUS LOGIC 240-00176-Z1
57 603-00176-01 B ASSY DWG PWA CDB5460A_61A_63 REF CIRRUS LOGIC 603-00176-01
58 110-00013-Z1 D CON SHUNT 2P .1"CTR BLK NPb 12 MOLEX 15-29-1025 REFER TO ASSEMBLY DRAWING
FOR PLACEMENT LOCATIONS
59 422-00037-01 A1 LBL SUBASSY PRODUCT NUMBER 1 CIRRUS LOGIC 422-00037-01 REFER TO ASSEMBLY DRAWING
FOR PLACEMENT LOCATION
60 020-01473-Z1 A RES 0 OHM 1/18W ±1% NPb 0805 FILM 0 R34 DALE CRCW08050000Z0EA DO NOT POPULATE
61 110-00045-Z1 A CON TEST PT .1"CTR TIN PLAT NPb BLK 0 TP7 TP8 KEYSTONE 5001 DO NOT POPULATE
62 312-00008-01 A INSULATOR .312 x .145 FOR HC49U/US 1 XY1 ECS 700-9001 INSULATOR FOR Y1
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APPENDIX B. SCHEMATICS
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30
Figure 20. Schematic - CS5460A & Socket
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Figure 21. Schematic - Microcontroller & USB Interface
CDB5460AU
31
32
Figure 22. Schematic - Power Supplies
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34
Figure 24. Top Routing
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Figure 25. Bottom Routing
CDB5460AU
35
36
Figure 26. Bottom Silkscreen
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REVISION HISTORY
Revision Date Changes
DB1 JAN 2009 Initial Release.
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CDB5460AU
IMPORTANT NOTICE
Cirrus Logic, Inc. and its subsidiaries ("Cirrus") believe that the information contained in this document is accurate and reliable. However, the information is subject
to change without notice and is provided "AS IS" without warranty of any kind (express or implied). Customers are advised to obtain the latest version of relevant
information to verify, before placing orders, that information being relied on is current and complete. All products are sold subject to the terms and conditions of sale
supplied at the time of order acknowledgment, including those pertaining to warranty, indemnification, and limitation of liability. No responsibility is assumed by Cirrus
for the use of this information, including use of this information as the basis for manufacture or sale of any items, or for infringement of patents or other rights of third
parties. This document is the property of Cirrus and by furnishing this information, Cirrus grants no license, express or implied under any patents, mask work rights,
copyrights, trademarks, trade secrets or other intellectual property rights. Cirrus owns the copyrights associated with the information contained herein and gives
consent for copies to be made of the information only for use within your organization with respect to Cirrus integrated circuits or other products of Cirrus. This con-
sent does not extend to other copying such as copying for general distribution, advertising or promotional purposes, or for creating any work for resale.
CERTAIN APPLICATIONS USING SEMICONDUCTOR PRODUCTS MAY INVOLVE POTENTIAL RISKS OF DEATH, PERSONAL INJURY, OR SEVERE PROP-
ERTY OR ENVIRONMENTAL DAMAGE ("CRITICAL APPLICATIONS"). CIRRUS PRODUCTS ARE NOT DESIGNED, AUTHORIZED OR WARRANTED FOR
USE IN PRODUCTS SURGICALLY IMPLANTED INTO THE BODY, AUTOMOTIVE SAFETY OR SECURITY DEVICES, LIFE SUPPORT PRODUCTS OR OTHER
CRITICAL APPLICATIONS. INCLUSION OF CIRRUS PRODUCTS IN SUCH APPLICATIONS IS UNDERSTOOD TO BE FULLY AT THE CUSTOMER'S RISK
AND CIRRUS DISCLAIMS AND MAKES NO WARRANTY, EXPRESS, STATUTORY OR IMPLIED, INCLUDING THE IMPLIED WARRANTIES OF MERCHANT-
ABILITY AND FITNESS FOR PARTICULAR PURPOSE, WITH REGARD TO ANY CIRRUS PRODUCT THAT IS USED IN SUCH A MANNER. IF THE CUSTOMER
OR CUSTOMER'S CUSTOMER USES OR PERMITS THE USE OF CIRRUS PRODUCTS IN CRITICAL APPLICATIONS, CUSTOMER AGREES, BY SUCH USE,
TO FULLY INDEMNIFY CIRRUS, ITS OFFICERS, DIRECTORS, EMPLOYEES, DISTRIBUTORS AND OTHER AGENTS FROM ANY AND ALL LIABILITY, IN-
CLUDING ATTORNEYS' FEES AND COSTS, THAT MAY RESULT FROM OR ARISE IN CONNECTION WITH THESE USES.
Cirrus Logic, Cirrus, and the Cirrus Logic logo designs are trademarks of Cirrus Logic, Inc. All other brand and product names in this document may be trademarks
or service marks of their respective owners.
LabWindows and CVI are registered trademarks of National Instruments, Inc.
Windows, Windows 2000, and Windows XP are trademarks or registered trademarks of Microsoft Corporation.
PADS and PowerLogic are trademarks of Mentor Graphics Corporation.
SPI is a trademark of Motorola Semiconductor, Inc.
38 DS487DBU1
Mouser Electronics
Authorized Distributor
Cirrus Logic:
CDB5460AU