Topics in Electrical Engineering

Semiconductor Devices
Dr. K. Fobelets
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Contents
1 Introduction to the module ........................................................................................................... 5
1.1 Aims ...................................................................................................................................... 5
1.2 Learning Outcomes ............................................................................................................... 5
1.3 Recommended textbooks ...................................................................................................... 5
1.4 Course synopsis ..................................................................................................................... 5
1.5 History ................................................................................................................................... 5
1.6 Glossary ................................................................................................................................. 8
1.7 Constants ............................................................................................................................... 9
1.8 List of Formulae .................................................................................................................. 10
2 Semiconductors and their characteristics ................................................................................... 11
2.1 Electrons and holes as charge carriers in a lattice ............................................................... 11
2.2 Conductivity in semiconductors .......................................................................................... 13
2.3 Currents in semiconductors ................................................................................................. 17
2.3.1 Drift currents ................................................................................................................ 17
2.3.2 Diffusion currents ........................................................................................................ 20
2.4 Continuity equations – for information only ....................................................................... 21
2.5 Other important relationships .............................................................................................. 23
2.5.1 Poisson equation .......................................................................................................... 23
2.5.2 Electric field-electrostatic potential ............................................................................. 23
2.5.3 Electric potential energy .............................................................................................. 24
2.6 Mathematical description of the energy of electrons and holes – for information only ..... 24
2.6.1 Coupled mode theory by Feynman .............................................................................. 24
2.6.2 Quasi free electron model ............................................................................................ 25
2.6.3 Effective mass .............................................................................................................. 28
2.7 Simplified energy band diagram ......................................................................................... 29
2.8 Calculation of the density of electrons and holes – for information only ........................... 30
2.9 Energy band diagrams under an electric field ..................................................................... 34
2.10 Conclusions...................................................................................................................... 36
3 The pn diode............................................................................................................................... 38
3.1 Fabrication of a pn diode ..................................................................................................... 38
3.2 The pn diode in equilibrium ................................................................................................ 38
3.2.1 Internal electric field .................................................................................................... 38
3.2.2 Depletion region – for information only ...................................................................... 40
3.3 The pn diode under bias in the dark .................................................................................... 44
3.3.1 Forward bias ................................................................................................................. 44
3.3.2 Reverse bias ................................................................................................................. 45
3.3.3 The minority carrier concentration at the depletion region edges ............................... 46
3.3.4 Currents in the charge neutral regions ......................................................................... 47
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 3.3.5 Depletion region of a diode under bias ........................................................................ 49
3.4 Small signal equivalent circuit of a pn diode ...................................................................... 50
3.5 The pn diode as solar cell .................................................................................................... 51
3.5.1 pn diode in the dark and illuminated ............................................................................ 51
3.5.2 Some insight into the physical processes ..................................................................... 53
3.5.3 Analysing the performance of the PV cell ................................................................... 54
3.5.4 Equivalent circuit of a solar cell .................................................................................. 56
3.6 Conclusion ........................................................................................................................... 56
4 The Bipolar Transistor – BJT..................................................................................................... 58
4.1 Principles behind the operation of a BJT ............................................................................ 58
4.1.1 Reverse biased p-n junction, I=Isat independent of voltage V ...................................... 58
4.1.2 Minority carrier injection by a hypothetical device (hole injector) ............................. 59
4.1.3 Minority carrier injection by a semiconductor device (hole injector) ......................... 59
4.2 Currents in a short BJT ........................................................................................................ 60
4.2.1 The emitter current IE ................................................................................................... 61
4.2.2 The collector current IC ................................................................................................ 62
4.2.3 The base current IB ....................................................................................................... 63
4.3 Current gain in a short BJT ................................................................................................. 64
4.4 Other BJT connections ........................................................................................................ 64
4.5 Physics behind the BJT small signal equivalent circuit ...................................................... 65
4.6 Conclusion ........................................................................................................................... 66
5 The Metal-Oxide-Semiconductor Field Effect Transistor – MOSFET ..................................... 67
5.1 Fabrication ........................................................................................................................... 67
5.2 Metal-oxide-semiconductor junction – MOS capacitor ...................................................... 68
5.3 Functioning of MOSFETs ................................................................................................... 68
5.3.1 n-channel enhancement mode MOSFET ..................................................................... 69
5.3.2 Ideal MOSFET output characteristics .......................................................................... 72
5.4 Types of MOSFETs............................................................................................................. 73
5.4.1 Enhancement mode - depletion mode .......................................................................... 73
5.4.2 n-channel - p-channel enhancement mode ................................................................... 73
5.5 CMOS.................................................................................................................................. 74
5.6 Small signal equivalent circuit of a MOSFET .................................................................... 74
5.7 Conclusion ........................................................................................................................... 75

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1 Introduction to the module
1.1 Aims
(1) To give insight into carriers and carrier movement in semiconductors
(2) To give insight into the physics of semiconductor diodes and transistors.
(3) To explain energy band diagrams as a tool to predict device behaviour.

1.2 Learning Outcomes

At the end of the course you should be able to:
(1) Discuss the characteristics of semiconductors, in particular Si, that make the material suitable for electronic devices
(2) Explain qualitatively the mechanisms of electric conduction in semiconductors, and calculate relevant quantities
from given data.
(3) Calculate and explain the DC current-voltage behaviour of diode, BJT and MOSFET.

1.3 Recommended textbooks

These course notes summarise the relevant topics from the following book:
"Solid State Electronic Devices", B.G. Streetman, Prentice Hall International Editions, 4th ed.

Good on-line resources:

http://ecee.colorado.edu/~bart/book/book/title.htm
http://web.mit.edu/6.012/www/

1.4 Course synopsis

Introduction into semiconductor materials
A semiconductor is a material with a conductivity level between metals and insulators. Unlike metals, the charges in the
semiconductor are more tightly bound to the atoms and although some of these charges travel around in the
semiconductor, they are only quasi-free as they feel the continuous influence of the surrounding lattice (atoms). 2 types
of moving charges describe currents in semiconductors: negatively charged electrons and positively charged holes. The
energetic state of the charges is given in the “energy band model” which is based on quantum-mechanics that is not
covered in this module. The energy band diagram with its associated bandgap and position of the Fermi level will form
the basis to understand the operation of semiconductor devices.
Two different types of currents, drift and diffusion, can occur in a semiconductor. Both currents normally occur at the
same time in devices. Approximations are made to enable extraction of analytical formulae for the currents.
The background on semiconductor transport processes will then be applied to pn diodes in the dark and under
illumination.

1.5 History

Figure 1: 12AX7 vacuum tubes glow inside a modern guitar amplifier. Picture taken from
http://en.wikipedia.org/wiki/Image:Tubes.jpg by Chris Roddy.

Around 1904, the first computers were built using vacuum tube technology. They were bulky and didn’t come cheap.
Figure 1 shows 3 vacuum tubes in operation, they resemble incandescent light bulbs. In a vacuum, electrons – small
negatively.charged particles – are created by thermionic emission (with enough heat energy, electrons can escape from
a metal – the cathode – into vacuum and be accelerated towards another contact – the anode – via an electrostatic
potential difference). The flow of electrons creates a current that is dependent on the voltage applied. This vacuum tube,
with only two contacts is called a diode. It allowed electrical current to flow in only one potential direction and thus it
behaved as a rectifier. No independent control could be exercised on the amount of electrons and thus the magnitude of
the current flowing. In 1908 an extra metal grid was introduced in the structure on which a voltage could be applied.
This voltage – a lot smaller than the anode voltage – could control the amount of electrons flowing from the cathode.

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This created a system where a relatively small voltage controls the current flowing between two other contacts - the
amplifier was born.

Figure 2: Left: a picture of the first contact transistor (1947) and right: a colour enhanced SEM (secondary electron
microscope) cross section of an SOI (Silicon-on-Insulator) chip (dielectric insulation removed) from IBM, showing 3
tiny transistors with their metal interconnections. Taken from:
http://sinclair.ece.uci.edu/Useful%20educational%20pictures/

In 1947, Brattain, Bardeen and Shockley at the Bell telephone Laboratories discovered something revolutionary in the
lab: amplification was demonstrated using two Au wires on a block of a semiconductor called germanium (Ge) – the
first solid state amplifier was invented! That this didn’t happen overnight can be read in e.g. Miracle Month on web
page: [http://www.pbs.org/transistor/background1/events/miraclemo.html]. Although a lot smaller than a vacuum tube
and operating at lower voltage and current levels, the picture of the first semiconductor transistor in figure 2 (left)
directly illuminates why this didn’t lead immediately to a microprocessor (Fig.2 right). A large amount of research on
the physics behind the operation of semiconductor devices and into fabrication techniques and tools had to be done
before the era of integrated circuits started in 1971. Figure 3 gives an idea of the time it has taken research and industry
to get to were we are today in the world of semiconductor technology.
Timeline
1930 1940 1950 1960 1970 2000

1928: Lilienfield – FET patent 2000: Nobel Prize for Physics

Jack S. Kilby – integrated circuit
Z. I. Alferov, H. Kroemer –
1948: Shockley, Bardeen, Brattain – semiconductor heterostructures
BJT
1960: Kahng, Atalla – Si MOSFET

1962: Wanlass, Sah, Moore – CMOS

1964: Fairchild / RCA – 1st commercial

MOSFETs

1968: Noyce & Moore found Intel

1971: 1st microprocessor,

intel4004
Figure 3: A timeline on semiconductor research showing that it took more than 20 years of research to get from a
device concept to an integrated circuit.

The invention of the transistor was a major event that changed the course of history for electronics. Now the technology
is pushed by processor requirements for different applications such as gaming, AI, machine learning… This has led to
other changes such as the introduction of strained material layers, the finFET and the Ultra Thin Body and Box FETs.
The first generation of computers used vacuum tubes; the second generation of computers used a connection between

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discrete transistors and passive components1 ; the third generation of computers used integrated circuits; and the fourth
generation of computers uses microprocessors.

The aim of this course is not to find out how to build the circuits (that is taught in Analysis of Circuits and Analogue
Electronics course), but it is to find out how the basic components of the circuits – the semiconductor devices – work.
Knowledge that will ultimately lead to improve their performance.

1
Such as resistors, capacitor and inductors
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1.6 Glossary
n density (concentration) of free electrons
np density of electrons in a p-type material
nn density of electrons in an n-type material
n’p injected density of electrons in forward bias
n”p density of electrons in reverse bias at depletion region edge
np excess minority carrier electron concentration
ni is the intrinsic density of electrons
p density (concentration) of free holes
pn density of holes in an n-type material
pp density of holes in a p-type material
p’n injected density of holes in forward bias
p”n density of holes in reverse bias at depletion region edge
pn excess minority carrier hole concentration
pi is the intrinsic density of holes (ni = pi)
ND donor doping concentration
N-D ionised donor doping concentration (at 300K N-D = ND)
NA acceptor doping concentration
N-A ionised acceptor doping concentration (at 300K N-A = NA)
Ec bottom of the conduction band (energy)
Ev top of the valence band (energy)
EG bandgap (forbidden band)
EF Fermi level
Ei intrinsic energy level
 resistivity
 conductivity
 mobility
R resistance
I current
J current density (current per area)
Cox oxide capacitance per area
Cj junction (depletion) capacitance
Cd diffusion capacitance
tox oxide thickness
Wdepl depletion region
wn depletion region extending into the n-type region
wp depletion region extending into the p-type region
T temperature
kB Boltzman constant
e the positive value of the charge of an electron
q the value of the charge of a single carrier (positive for hole, negative for electron)
m0 free electron mass
m n* is the effective mass of the electron
m *p the effective mass of the hole
v or vd velocity (drift velocity)
vth thermal velocity
E electric field
 scattering time, average time between collisions
n average life time of electrons before recombining
p average life time of holes before recombining
Ln diffusion length of the electrons
Lp diffusion length of the holes
Dn diffusion constant of electrons
Dp diffusion constant of holes
A area (mainly cross sectional area)
g(E) density of states
f(E) Fermi-Dirac distribution function
Nc effective density of state in the conduction band
Nv effective density of state in the valence band
h Planck constant
ħ reduced Planck constant
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m workfunction metal
s workfunction semiconductor
 electron affinity
V0 or Vbi built-in voltage
VT thermal voltage (kT/e)
gd differential conductance
gm transconductance
SiO2 silicon dioxide
Q charge
df ( x)
= f ' ( x) is the gradient (or the rate of change) of the function f(x) in x.
dx
d 2 f ( x)
= f ' ' ( x) is the curvature or concavity of f(x), it gives the gradient of the gradient of f(x)
dx 2

1.7 Constants
This list of constants will be made available in the exams.
permittivity of free space: o = 8.85  10-12 F/m
permeability of free space: o = 4  10-7 H/m
intrinsic carrier concentration in Si: ni = 1.45  1010 cm-3 at T = 300 K
dielectric constant of Si: Si = 11
dielectric constant of SiO2: ox = 4
thermal voltage: VT = kT/e = 0.026 V at T = 300 K
charge of an electron: e = 1.6  10-19 C
Planck’s constant: h = 6.63  10-34 Js
Bandgap of Si: EG = 1.12 eV at T = 300 K
Effective density of states of Si: NC = 3.2  1019 cm-3 at T = 300 K
NV = 1.8  1019 cm-3 at T = 300 K

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1.8 List of Formulae
This list of equations will be made available in the exams.
1
f (E) =
æ E - EF ö Fermi distribution
1+ exp ç ÷
è kT ø
æ -E ö Intrinsic carrier concentration
ni = NV N C exp ç G ÷
è2kT ø
( Ec -E F )
- Concentration of electrons
n = N ce kT

(Ev -E F )
p = Nve kT Concentration of holes
dE = r (x)
dE Poisson equation in 1 dimension
dx e
dn(x) ü
J n (x) = em n n(x)E(x)
E(x) + eDn ï Drift and diffusion current
dx ï
ý densities in a semiconductor
dp(x) ï
J p (x) = em p p(x)E(x)
E(x) - eDp
dx ïþ

mCoxW æ 2 ö
VDS Current in a MOSFET
I DS = ç ( GS th ) DS
V - V V - ÷
L è 2 ø

eDn n p0 æ eV ö ü
Jn = ç e -1÷ ï
kT
Current densities for a pn-junction
Ln è ø ïï
ý with lengths Ln & Lp
eDp pn0 æ eV ö ï
Jp = ç e kT -1÷ ï
Lp è ø ïþ

kT æ N A N D ö
Vbi = ln ç ÷ Built-in voltage
e è ni2 ø
ìï c = p or n
æ eV ö n p Minority carrier injection
c = c0 exp ç ÷ with í
è kT ø c
ïî 0 bulk minority carrier concentration under bias V
kT Einstein relation
D= m
e
é 2e (Vbi - V )N A ù é 2e (Vbi - V )N D ù
1/2 1/2

wn (V ) = ê ú & w p (V ) = ê ú Depletion widths under bias V

ë e(N A + N D )N D û ë e(N A + N D )N A û
é æN öù
1/2

êe kT ln ç substrate ÷ ú
è ni ø ú
= 2ê
Maximum depletion width
Wdepl
max
ê e N substrate
2 ú
ê ú
ë û

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2 Semiconductors and their characteristics

In this chapter we will explain what a semiconductor is and why these materials are interesting for the electronics
industry. The reader should be aware that the comprehensive explanation of the physics behind transport in
semiconductor devices is based on quantum mechanical calculations and statistics. This will not be treated in detail in
this module. Instead we will introduce some quantum mechanical concepts using intuitive explanations rather than
employing the full mathematical approach in order to simplify the physics whilst still delivering the background to
understand semiconductor devices.

2.1 Electrons and holes as charge carriers in a lattice

A semiconductor belongs to the group of materials called solids. A semiconductor consists of atoms bonded together
by coulomb attraction. Each atom consists of a nucleus built from neutrons (no charge) and protons (positively charged),
surrounded by negatively charged electrons of which the amount is equal to the number of protons in the nucleus. Thus,
the bonding of two atoms is caused by the electrostatic force between the nucleus of one atom and the surrounding
electrons of the other atoms and vice verse. The Coulomb force, F between the charges is given by:
1 q1 q 2
F=
4 0 r 2
With qi (i=1,2) the two charges involved in the attraction or repulsion, r the distance between the charges and 0 the
permittivity of free space: 0 = 8.854 10-12 F/m.2
Bonding occurs at a certain distance between the two atoms – the bond length (lattice constant) – where the energy of
the solid is minimised. Bringing the atoms closer together will dramatically increase the repulsive force between the
nuclei and between the surrounding electrons of each atom and is thus unfavourable.
Two extreme types of bonding exist: the ionic and the covalent bond. In the ionic bond one atom transfers one or more
of its electrons to the other atom. In a covalent bond the electrons are mutually shared. This is illustrated in figure 1.

e- e-
+ +

Ionic bond Covalent bond

e-
e- e-
+ + e- + +

Figure 1: A simplified cartoon of ionic and covalent bonding

Take a look at the periodic table in figure 2. The elements in the periodic table are organised according to their atomic
number that is equal to their number of protons and electrons. This number increases by one with each element listed,
thus different elements have a different number of electrons. Quantum mechanics has shown that these electrons cannot
all have the same energy. A simplified view of an atom (element) was introduced by Niels Bohr in 1913. This model
shows the electrons in orbit around the nucleus at different “distances from the nucleus” – shells. Each shell can only
contain a certain maximum amount of electrons and the closer the shell to the nucleus the stronger the bond between the
nucleus and the electron. On the first shell (“closest to the nucleus”) only 2 electrons are allowed, on the 2 nd 8, on the 3rd
18, etc. Although the Bohr model with “distances from the nucleus” is not correct3, it is a useful tool to explain why
certain bonds are made.
Take the last column of the periodic table (fig. 2) with elements such as He2, Ne2,8, Ar2,8,8, Kr2,8,18,8,
Xe2,8,18,18,8,…(noble gases)4. We know from chemistry that these elements are chemically inert (do not react, are very
stable). On the other hand we notice that the outer shell in these stable atoms (apart from He) has 8 electrons. As a rule

2
The dielectric constant, r is the ratio of the permittivity of a material to the permittivity of free space. It is a parameter
that indicates how well the material can store electrical energy in an electric field (e.g. high r gives high capacitance
values. C = r 0 A/t with A area of capacitor and t the thickness of the insulator with dielectric constant r.)
3
It breaches Heisenberg’s uncertainty principle: position and momentum of a particle cannot be exactly simultaneously
known (measured).
4
The superscript on the elements give the number of electrons in each shell.
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of thumb, individual atoms will react in such a way as to fill or empty the outer shell such that it obtains 8 electrons and
thus takes the electron configuration of a noble gas. These outer shell electrons are also called valence electrons.

Figure 2: Periodic table

To illustrate its influence on bonding, take Na (Sodium): Na 2,8,1. In a bonding process it will be happy to lose one
electron to obtain the Ne configuration. Cl2,8,7 on the other hand is happy to receive one electron. Thus Na and Cl made
an ionic bond. This type of bond works well with elements that do not have to lose or gain more than 2 electrons. Once
more electrons have to be transferred, large amounts of energy are needed that are not normally available at room
temperature. Therefore, the elements in the middle of the periodic table such as C, Si, Ge, Ga, As,… prefer a covalent
bond where electrons are shared rather than transferred. A more quantitative measure of the ability to donate electrons is
called ionisation potential, or otherwise the electron affinity,  that gives the ability of an element to accept electrons.
These values are tabulated in textbooks and are the energy required respectively released by losing resp. gaining an
electron. This concept of electron affinity will be useful later in the module.
Historically we know that C, Si, Ge, GaAs are semiconductors. These solids are formed by covalent bonds. Si has 4
valence atoms and forms covalent bonds with the neighbouring Si to obtain the noble gas electron configuration, see
figure 3. The same happens with Ge. Ga has 5 valence electrons and combined with Al, that has 3, gives the alloy GaAs.

By sharing, atoms feel surrounded by 8 valence electrons

Figure 3: Left: a Si (silicon) atom with its 4 valence electrons. Middle: covalent bonding with its neighbours, allows
each Si atom in the lattice the noble gas configuration within the solid. Right: an alternative representation of the
covalent bonds in solids.

In order for the semiconductor to be of interest for mainstream Si technology, the Si lattice needs to be crystalline 5.
This means that the position of the atoms must be periodic in the whole volume of the material. It is impossible to

5
We will see later that pure crystalline materials will have mobile charged carriers with the highest speed under an
electric field.
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fabricate semiconductor materials that are perfectly crystalline, nor perfectly pure (lacking of any “foreign” atom). But
material fabricants are making Si very close to perfect and this then allows processors to become faster and cheaper. In
this module we will focus on devices made in crystalline Si only.
Whilst semiconductors are built of atoms with strong covalent bonding of the valence electrons, metal have a different
bonding structure which is more ionic in character. A metal can be regarded as made up of lattice ions surrounded by
highly mobile negative carriers, electrons6. Thus in a metal the electrons roam freely within the confines of the metal
boundary.

2.2 Conductivity in semiconductors

In metals the highly mobile electrons roam freely within the structure, in a semiconductor the electrons are “trapped”
by the covalent bonding process – the electrostatic forces between the atoms that form the lattice. Sufficient energy
needs to be applied to the lattice in order to break some of the bonds and thus release electrons from the nuclei. At
absolute zero temperature: T=0K and without any other excitation, none of the electrons will be released from the
covalent bonds of the semiconductor lattice. However, when we increase the temperature, the thermal energy can be
sufficient to release some electrons from their covalent bond. At room temperature there will be a sufficient amount of
electrons freed from the bonds to enable electrical conduction in the semiconductor, but still a lot less than in metals
where the number of electrons involved in the conduction is a lot higher and are more mobile than in semiconductors.
Based on this knowledge an alternative definition of a semiconductor can be given: a semiconductor is a solid material
with an electrical conductivity7 between that of a metal and an insulator.
The conductivity of a semiconductor is dependent on the amount of charged carriers that can participate in conduction.
The charged carriers that can conduct are only those that are released from the covalent bonds in the lattice. Energy
supplied to the semiconductor, such as in the form of temperature, can release some electrons from the covalent bond.
Figure 4 gives a schematic picture of freed electrons in the lattice. These released charges are moving randomly around
the semiconductor due to the available thermal energy.

Electrons released from the covalent bond.

These atoms now miss an electron for a noble gas configuration.

Figure 4: Thermal energy has broken 2 covalent bonds and two electrons are released to roam within the lattice. A
consequence of the freed electrons is that some atoms do not have the noble gas electron configuration any more.

As illustrated in Figure 4, the freed electrons leave behind “empty spaces”. The concerned atoms will strive to fill
these “empty spaces” with another electron in order to rebuild the 8-valence electron configuration. The “empty spaces”
are called holes and since they will be filled by creating an empty space at another atom position, it looks as if the empty
space is travelling through the structure. Given that the “empty space” moves by an electron filling it, it is as if an
electron is moving in the opposite direction than expected. Rather than working with electrons that “move in the
opposite direction” it is postulated that the empty space is a hole that is the free carrier that behaves as a positively
charged carrier. Remember an electron is a negatively charged carrier that moves from ve- to ve+. A hole is a positively
charged carrier that moves from ve+ to ve- (thus opposite).
Thus, thermal energy generates free electrons and free holes (empty spaces), a process that is called generation of
electron-hole pairs. At the same time, a certain amount of holes (empty spaces) will be refilled with electrons, a process

6
See e.g. “Lecture on electrical properties of materials” by L. Solymar and D. Walsh (Oxford University press - 1975)
7
Conductivity is a parameter that indicates the current amplitude through the solid when a voltage is applied.
13
called recombination of electrons and holes, re-forming the covalent bond. The amount of free electrons (and thus free
holes) per volume (density of carriers) generated via thermal energy is ni=1.45 1010 cm-3 for Si at room temperature. For
another semiconductor it will be a different value e.g. for Ge it is: ni=2.4 1013 cm-3 at room temperature.
This is a very interesting result as it concludes that in a semiconductor we have not one but two types of charged
carriers: the electron with its negative charge and the hole with a positive charge. And under an applied voltage they
move in the opposite direction. The electron charge is q=-e and the hole charge is q=+e with e = 1.6 10-19 C or 1 eV.
The picture we have sketched here to explain the existence of holes is indeed rather intuitive. Again quantum
mechanics is needed to, not only, show that free positively charged carriers – holes – exist in semiconductors but is also
needed to explain the specific character of these charges.
Temperature is not sufficient to make silicon conductive enough for use in most devices, the density of free carriers
must be orders of magnitude larger than ni=1.45 1010 cm-3. Another way to increase the amount of charges is called
doping. When silicon is doped a certain number of Si atoms will be replaced by another type of atom, for instance by As
(arsenic) or B (boron). By using doping we can increase the amount of one type of carriers e.g. electrons compared to
the other carrier type, holes, in one semiconductor. Fig. 5 (left) demonstrates a doping process in which a surplus
amount of electrons is introduced: n-type doping. Fig.5 (right) shows the situation of p-type doping – a surplus of holes.

A foreign element is introduced, A foreign element is introduced,

e.g. P e.g. B
P has 5 valence
P has 1 more valence electron than Si. electrons. B has
B has 1 valence electron less 3 valence
than Si. electrons.
Figure 5: Left n-type doping by replacing an amount of Si atoms by atoms with 5 valence electrons. Right: p-type
doping by replacing an amount of Si atoms by atoms with only 3 valence electrons8.

Doping is done by using a process called ion implantation9. Foreign atoms are introduced and replace some of the Si
atoms in the lattice. These foreign atoms have to sit on the exact lattice positions of the removed Si atoms. The foreign
atoms, when chosen well, will go into covalent bonding with the surrounding Si lattice. For n-type doping, the foreign
atoms must have 5 valence electrons, typically P, As or Sb is used in Si. Only 4 of the 5 valence electrons of the foreign
element will bond, leaving one free electron. For p-type doping the foreign atom should only have 3 valence electrons,
typically B is used in Si. Since the foreign element lacks 1 electron in the bond, it has generated a hole. The number of
foreign elements we can introduce in this way can be a lot higher than the amount of intrinsic carriers, ni. n-type doping
levels of up to 1019 cm-3 and p-type of up to 1020 cm-3 can be introduced without destroying the crystallinity of the Si
lattice or the electro-optical character of the lattice. It remains to be noted that for doping induced carriers to be free,
ionisation of the foreign element needs to occur. Thus the temperature of the materials has to be well above absolute
zero for doping to be effective. At room temperature for P, Sb, B and As doping in Si we can assume, with negligible
error, that all doping atoms (foreign elements) are ionised and thus all extra introduced carriers are free. Figure 6 gives
the variation of the carrier concentration (electrons) in donor doped Si as a function of temperature.

n-type doping changes the semiconductor into a material with surplus of electrons compared to holes. The
semiconductor is then called an n-type semiconductor. In an n-type semiconductor we find that n>p, n the electrons and
p the hole density (concentration). In this case, the doping atoms (foreign elements) are called donors.
p-type doping changes the semiconductor into a material with a surplus of holes compared to electrons. The
semiconductor is then called a p-type semiconductor. In a p-type semiconductor we find that p>n. In this case, the
doping atoms are called acceptors.

8
P: phosphorous and B: boron.
9
Vacuum machine that accelerated ions towards the Si substrate where they get inserted via high energetic
bombardment. This makes the Si amorphous and heat treatment is necessary to recrystallize the surface.
14
 At very high T, huge

Free electron density (cm-3)

17 electron-hole pair
10
generation: ni>ND

1015
At moderate T, all At very low T, few
donor atoms ionised electron-hole pairs
1013 ni<ND & n=ND generated and donor
electrons stay bound
to donor atoms
1011
0 2 4 6 8 10 12
1000/T (K-1)
Figure 6: Free carrier concentration as a function of temperature for n-type Si10.ni is the intrinsic carrier concentration
(no doping applied). n is the electron concentration. ND is the concentration of donor atoms.

In intrinsic (i.e. pure, undoped) semiconductors have a small density of free carriers at room temperature and therefore
have a very low electrical conductivity. The number of holes and electrons is equal in an intrinsic semiconductor as both
free carriers are generated by thermal energy and thus whilst an electron is created a holes occurs simultaneously
(electron-hole pairs are generated).
ni = p i (1)
ni is the intrinsic density of electrons
pi is the intrinsic desnity of holes
This gives the relation: n × p = ni2 in an intrinsic material

Extrinsic (i.e. doped) semiconductors have better conductivity. Impurities, donors or acceptors, are introduced in a pure
intrinsic semiconductor. Thermal energy frees electrons from donor atoms, and holes from acceptor atoms. Donor
doping (donors donate an extra electron) creates an n-type material. The donor density notation is ND. Acceptor doping
creates a p-type material. The acceptor density notation is NA.
The density of dopants is normally higher than the intrinsic density of free carriers in the semiconductor.
Is n × p = ni2 still valid for doped semiconductors?
The Law of mass action is based on equilibrium between generation and recombination of carriers when no external
source are applied. Thus the generation rate, G(T) and the recombination rate, R(T) are equal at constant temperature:
G(T) = R(T). G(T) is independent of number of carriers and we can write G(T) = f1(T). Recombination is dependent on
number of free carriers. R(T) is 0 when n = 0 and/or p = 0. Thus we can write R(T) = f 2(T) n×p (f2(T) is a function that
takes the temperature dependence into account).
G(T) = R(T)
f1(T) = f2(T) n×p
f1(T)/ f2(T) = n×p
This is valid independent of doping and thus also for intrinsic materials, thus:
f1(T)/ f2(T) = ni2

This gives us the first fundamental law:

n  p = ni2
(2)

The second fundamental law is charge neutrality:

( )
e − n + p + N D+ − N A− = 0
(3)
with e: absolute value of unit charge (1.6 10-19 C), n: density of electrons, p: density of holes, 𝑁𝐷+ density of ionised
donor atoms, 𝑁𝐴− : density of ionised acceptor atoms. 𝑁𝐴− ionised acceptor atoms are negatively charged and 𝑁𝐷+ ionised
donor atoms are positively charged. Note that the ionised doping atoms are fixed within the lattice and cannot roam
around the lattice. They do not contribute towards current. At room temperature T = 300 K, the available thermal
energy is enough to ionise all the doping atoms. This means that @ T = 300 K we can write 𝑁𝐷+ = 𝑁𝐷 and 𝑁𝐴− = 𝑁𝐴 .

What is the free carrier concentration in doped materials? In order to find the density of free electrons, n and holes, p in
a doped semiconductor, the two fundamental equations (2) and (3) need to be solved simultaneously. For a donor-doped
material this gives:

10
Later in the chapter the equation for the intrinsic carrier concentration can be derived, after the introduction of energy
bands and Fermi-Dirac statistics.
15
 𝑛𝑖2⁄
𝑛2 − 𝑁𝐷 𝑛 − 𝑛𝑖2 = 0 by replacing p by 𝑛 derived from the law of mass action.
And the solution:
2 +4 𝑛2
𝑁𝐷 +√𝑁𝐷 𝑖
𝑛= (4)
2
We can approximate eq. (4) when the doping density is sufficiently higher than the intrinsic carrier concentration
(useful doping densities would be > 10 15 cm-3). Thus if ND>>ni then, at room temperature, the density of electrons will
𝑛𝑖2
be approximately equal to the doping density n=ND. The hole concentration is then given by using eq. (2): 𝑝 = .
𝑁𝐷
𝑛𝑖2
Similarly in p-type material, when because NA>>ni then p=NA and 𝑛 =
𝑁𝐴
Within a doped semiconductor we call the carrier type with the larger density the majority carrier, whilst the carrier
with the lower density is called the minority carrier. In order to avoid confusion, we often use subscripts. Subscripts n
refer to an n-type material, p to p-type material. This gives:
* n-type semiconductors
Majority carrier concentration, nn = N D (5)

ni2
Minority carrier concentration, pn = (6)
ND

* p-type semiconductors
Majority carrier concentration, pp = NA (7)

ni2
Minority carrier concentration, np = (8)
NA

*The majority and minority carrier concentrations within one semiconductor are related by:
nn p n = ni2
(9)
n p p p = ni2

Although these names, majority and minority carrier, seem pointless at the moment, they will be useful in the discussion
of devices where both electrons and holes play a role – the so-called bipolar devices such as pn diodes.

Looking carefully at these simple equations (5-8) for minority and majority carriers and putting them into the equation
for charge neutrality (3), we notice that the result is not completely correct. With nn = ND and pp = NA, we have made an
approximation. As a result, charge neutrality with this approximation does not work out to exactly zero, however under
normal circumstances (T = 300 K and doping density N: 10 15 cm-3< N < 1019 cm-3) the error is small and is normally
neglected.

Doping changes the electrical conductivity  of the semiconductor. The reciprocal of conductivity is resistivity =1/
The conductivity is directly related to the density of free carriers in a semiconductor, increasing the density of free
carriers, increases the conductivity.

Thought experiment
Assume we fabricate two resistors in Si using doping implantation. For resistor R 1 we implant the Si surface A with P to
a depth d with a density of doping atoms ND1. Resistor R2 has the same geometry and is implanted with a density of
doping atoms ND2. After defining two Ohmic11 contacts to the implanted Si volumes, the resistance of R1 and R2 can be
determined by e.g. applying a voltage and measuring the current through the structure. The result of the measurements
is given in figure 7.
We note that the current through R1 is smaller than through R2 for the same voltage. If we take into account Ohms’ law12
V=R I then we can determine which of the two Si resistors has the highest doping density: N D2 > ND1.
It needs to be pointed out that Si doped resistors, as presented in this example, are avoided in integrated circuits
notwithstanding their simplicity, because of the large area necessary to make such a resistor and because of its constant
value (if one gets it wrong, there is no easy solution). Integrated circuit design relies on active devices – the MOSFET to

11
See later. An Ohmic contact does not influence the operation of the device. Assume here that its resistance is zero.
12
See Analysis and Design of Circuits module.
16
function as a resistor. MOSFETs are small and the resistance offered by a MOSFET can be varied via a voltage on the
control contact.

I I

V V

R1 R2
Figure 7: Measured current-voltage (I-V) characteristics of the two resistors.

2.3 Currents in semiconductors

The interest in semiconductors is based on their ability to generate currents in response to an applied voltage and that
somehow we can control these currents by changing the material properties (e.g. doping) or indirectly by external
currents or voltages controls.
In semiconductors two types of current can exist: drift and diffusion currents. It is the aim of this section to create an
understanding of the physical principles behind the existence of the currents.

In the previous section we have seen that at room temperature an equal amount of free holes and electrons exit in an
intrinsic semiconductor, or in a doped (extrinsic) material a surplus of one type of carriers – the majority carriers –
occurs. These free carriers – the ones that are not stuck in the covalent bonds – are always whizzing around in the
semiconductor in no particular direction (equivalent to molecules in a gas) due to the existence of thermal energy
3
~ k B T , with kB = 1.38 10-23 J/K the Boltzman constant and T the temperature in K. Thus although the carriers are
2
moving continuously, they move randomly and therefore do not generate a net current. The random motion can be seen
as a process of acceleration of the carriers due to the thermal energy input, followed by interactions (collisions) of the
carriers with the lattice that makes them lose all their kinetic energy that is transferred to the lattice. This is called elastic
(only energy contents is changed) or inelastic (both energy and direction are changed) scattering. In the scattering
process, the electron loses its kinetic energy, its velocity goes to zero and the energy is transferred to the lattice atom
that increases it vibration energy a bit13. This increase in vibrations increases the overall temperature of the lattice a little
bit.

2.3.1 Drift currents

A voltage, V applied across a semiconductor will set up an electric field, E. Remember that in DC electric fields and
Coulomb force are related:
1 𝑞1 𝑞2
The Coulomb force, 𝐹̅ between charges q1 and q2 is given by: 𝐹̅ = ̅̅̅ 14
2 1𝑟 .
4𝜋𝜀0 𝑟
𝐹̅ 1 𝑞2
The electric field is a more general parameter and is given by: E = = ̅̅̅
1𝑟 and is present everywhere in
𝑞1 4𝜋𝜀0 𝑟 2
space15. This is normally re-written as F = q E. Thus the force on the charge and the electric field are in the same
direction when acting on a positive charge (e.g. holes).

When an electric field is applied, the motion of the carriers is still influenced by thermal energy and they will undergo
scattering processes, thus each individual carrier will take a different path. However ,the average direction of movement
(velocity) of all the carriers is no longer zero as after the scattering event the electric field pulls the charge back as given
by F = q E. This net motion of carriers under an electric field is called drift.
The drift current, caused by a flux of charged carriers under an electric field, must be proportional to the charge of all
available carriers and the speed with which these carriers move. The charge of all available carriers is determined by the

13
The covalent bonds between the atoms in the lattice can be seen as springs and when energy is transferred to an atom,
the springs vibrate. This is equivalent to heating of the lattice. Note that such as photons are particles and waves, the
heat propagation in a lattice can also be seen as particles and waves. These particles are called phonons. Thus heat
transport through a semiconductor is via phonons.
14
The bar on top of the parameter indicates its vector characteristic. It has an amplitude and a direction. ̅̅̅
1𝑟 is the unit
vector in the r direction.
15
For more info see e.g. https://www.khanacademy.org/science/electrical-engineering/ee-electrostatics/ee-electric-
force-and-electric-field/a/ee-electric-field
17
doping density. In the following, we will derive the velocity of the carriers in a semiconductor under an electric field –
drift velocity – based on classical formulae and quantum mechanical arguments.
Newton’s 2nd law gives the relationship between acceleration dv and electric field E:16
dt
dv (10)
m = qE
dt
This is a well known classical relationship but what is the mass m of a carrier within a semiconductor? We know that
the mass of a free electron in a vacuum is m0 = 0.91 10-30 kg. There is of course a difference between the movement of
an electron in a vacuum and an electron in a semiconductor. The electron in a semiconductor is moving in a lattice of Si
atoms. The atoms in a semiconductor are distributed in a periodic way (crystalline). They are connected in a way that
allows them to move around their equilibrium position, as if they are connected by strong springs. The thermal energy
will heat up the lattice and make the atoms move a bit around their equilibrium position. Thus the movement of an
electron will be influenced by interactions with randomly vibrating atoms and charges as in positively charge neuclei
and ionised doping atoms. Thus, they are not completely free to move, they will “scatter” – lose their kinetic energy in
an interaction with the lattice, setting v equal to zero and then gain velocity due to the electric field and the thermal
energy. No lattice is perfectly pure and thus not perfectly periodic, imperfections increase the number of scattering
events that can occur. Since introducing doping atoms is actually disrupting the periodicity of the lattice, doping atoms
increase the number of scattering events.
In addition, the electrons will behave as a wave when travelling through a Si lattice, similar to light moving through a
material, with characteristics such as interference. Thus, this wave character will also have an influence on how the
electron can move (standing and propagating waves of electrons can occur).
In eq. (10) this is not taken into account and in principle makes eq. (10) inappropriate for use in semiconductors.
However, we want to avoid having to go through rigorous quantum mechanical calculations. Thus, in order to be able to
use eq. (10) in a semiconductor, the interactions and wave character are taken into account through the carrier mass.
The quantum mechanical approach17 e.g. by the, Feynman model, the Krönig-Penney model, or if you are more
familiar with optics, the Ziman model18 gives:
1) the electrons cannot have all possible energy values, there are region with discrete energy levels on which
electrons can exists divided by regions of forbidden energies. These are called energy bands.
2) there are electrons with a positive and a negative mass. Since the existence of a negative mass is rather
unrealistic in classical mechanics, this change in sign is absorbed in a change of the sign of the charge of these
peculiar electrons. These electrons with positive charge and also a positive mass are call holes. This is in
agreement with the previous picture of broken bonds generating electron-hole pairs. Thus there exists two types
of carriers:
a. those with a charge q=-e and a mass m n = m0 m n* called electrons
b. those with a charge q=+e and a mass m p = m0 m *p called holes19
*
with m0 the free electron mass, mn , m *p the effective mass of the electron and hole, respectively.
Using these masses, allows us to use eq. (10) in semiconductors. The mass m is replaced by mn , p = m0 mn*, p . The
value of the effective mass of electrons and holes for different semiconductors are different and can be found in tables in
textbooks for most of the available semiconductors. Table 1 gives a short list of effective masses for different popular
semiconductors.

Table 1: The average effective mass of electrons and holes in Si, Ge and GaAs
Effective mass20 Si Ge GaAs
electrons 0.26 0.12 0.067
holes 0.33 0.16 0.26

If the carriers obey eq. (10), then they would undergo a continuous acceleration in the direction of the electric field. That
is not the case because the net acceleration of eq. (10) is balanced by deceleration due to scattering processes what

16
The vector notation is not used for simplicity but remember that velocity, electric fields, currents etc will all have a
direction and an amplitude. Also observer that eq. (10) is the same as F = q E.
17
See later
18
For the interested reader read e.g. the relevant chapter in L. Solymar and D. Walsh, “Electrical properties of
materials”, 8th ed. Oxford University Press (2010). There should be some in the library. Note that this is not examinable
material.
19
Note that holes cannot exist outside a semiconductor.
20
Average effective mass is associated to the fact that the carrier mass can be different in different directions of the
lattice. This is not surprising as the packing of the atoms is different in the different lattice directions. Note that we will
always work in one dimension in this module.
18
creates a steady state condition. Remember that the carriers are still under the influence of the thermal energy and are
still being scattered (collisions with the lattice atoms21).
The deceleration of the carriers due to scattering processes can be mathematically expressed as:
dv − v
= (11)
dt 
The average time between the scattering events is given by  – the mean free time. This equation means that every 
seconds the electron stops (due to a collision with an atom – heavy in comparison with the weight of an electron), thus
loses its velocity v completely. After the scattering event, the electron will again be accelerated by the electric field until
the next scattering event and so on. Thus if there is more disruption to the pure Si periodicity in the lattice there will be
more scattering opportunities and the time,  between scattering events will reduce.
Thus in steady state22, the average gain in velocity (acceleration) is equal to the average loss in velocity (deceleration),
therefore from (10) and (11)23 we find the average net velocity of the carriers in a semiconductor under and electric
field:
q
v= E (12)
m
The material constant  - called mobility, is introduced:
e
= (13)
m
The mobility (units: cm2/Vs) is a material and doping dependent positive value. Since the mobility is directly
proportional to the scattering time  we can expect that when the doping concentration increases, the mobility decreases
because the time between scattering events decreases. The average net velocity of the carriers in a semiconductor under
an electric field – called the drift velocity – is:
vn , p =   n , p E with + for holes and - for electrons. (14)
The expression of the drift velocity given in (14) is only valid for low electric fields, at higher electric fields the
characteristics of the scattering processes change and become field dependent such that the linear relationship between
drift velocity and electric field no longer exists. Beyond the linear region, the drift velocity saturates and the electrons
and holes cannot move any faster.
v
v (m/s)GaAs
Si

E max E
E (V/m)
Emax
Figure 10: The low field mobility as a function of doping Figure 9: Drift velocity-electric field curves. Emax is
concentration for different semiconductors. Taken from S.M. the maximum electric field for which the linear
Sze “Physics of Semiconductor Devices”. relationship between drift velocity and electric field
as given by (14) is valid.
Since current due to an electric field is defined as I = Q v A with Q the charge density, v the velocity and A the cross
sectional area and we know the density of charges (electrons or holes) as well as the velocity from eq. (14), we can write
down the expression of drift current in semiconductors. The current density J = I/A, due to the net drift of carriers is the
number of carriers crossing a unit area per unit time multiplied by the charge:
J n = qnvn = −envn = en nE is the current density (A/cm2) for electrons
J p = qpv p = epv p = ep pE is the current density (A/cm2) for holes

The total current density is the vector sum of the electron and the hole current:
J tot = J n + J p = e(nn + p p )E (15)

From Ohm’s law, we know J= E,24 thus we find the expression for the total conductivity:

21
Collisions with other carriers only occur in heavily doped semiconductors: N>10 19 cm-3.
22
Steady stae means no variation as a function of time.
23
gain+loss=0
24
this is effectively Ohm’s law: I = V/R
19
 tot =  n +  p = e(n n + p p ) (16)
The units for conductivity are ( cm) or S/cm – S = Siemens. The reciprocal of the conductivity  is the resistivity, 
-1

1
= 

Eq. (16) shows that the total conductivity of a semiconductor is determined by both the minority and majority carriers in
a semiconductor. Since the total conductivity is sum of the contribution of the majority and minority carriers and the
densities of these are orders of magnitude different whilst the mobilities on differ by a factor of ~2, it is clear that
electric conductivity  is determined by the majority carriers and thus these will also defined the magnitude of the drift
current.

The resistance R and conductance G=1/R can be derived from (16) by taking into account the geometrical parameters of
the semiconductors:
𝜌𝑙
𝑅 = with l the length of the material and A its cross sectional area. This is the area perpendicular to current flow.
𝐴

2.3.2 Diffusion currents

In the above section we have seen that the random motion of the charges can be changed by applying an electric field.
The charges still whiz around the lattice due to thermal energy but the average velocity of the total amount of charges is
determined by the electric field and thus a current is generated – drift current. In semiconductors, another type of current
can occur, one that is due to excess carriers.
As seen before, generation of carriers due to thermal energy is always in electrons-hole pairs and thus the number of
electrons and holes caused by generation is equal (the intrinsic carrier concentration at a certain temperature). Assume
that a process exists that can create a local excess of one type of carriers compared to the other. This would generate a
gradient in the carrier concentration. The mobile carriers react in a similar way to what you would expect from gas
molecules. If in a corner of the room a chemical is spilled releasing gas molecules different from nitrogen and oxygen
then after a while the observer can smell the gas at the other side of the room because the molecules have diffused
throughout the room to cancel the gradient in its density 25. The same happens with excess carriers in a semiconductor,
they will diffuse in order to eliminate the excess26. This diffusion is not a completely random process as the gradient will
determine the average directions in which the carriers move. This process will cause diffusion currents27. Figure 11
gives the variation of the density of electrons as a function of space and time (in 1 dimension only) when at t = 0 a local
excess concentration is introduced at x = 0. Note that this picture is the same as that given by Fick’s law for diffusion of
gases.
n(x) n(x)

t1

t3>t2>t1 linear

t2 e- flux
n
t3 n+n
t3

x x
x x+x

(a) (b) (c)

Figure 11: (a): At t0 a delta function excess occurs at x=0. The source of the excess is then removed and the
figure gives a variation as a function of time and space of the excess electron concentration. (b): the arrow indicates the
flux of electrons (drawn only in the +x direction). When taking an infinitesimal small region, the graph seems linear. (c)
Electron concentration versus distance in an infinitesimal small region around x. l is the mean free path.

With reference to fig.11, when only diffusion is taking place the number of electrons will remain constant (thus the area
under each graph in fig.11 remains constant). When we wait long enough the variation of the electrons as a function of
space will be zero (no excess and thus also no gradient any more) but its value is non-zero.
In real semiconductors however there are two kinds of carriers. This means that from time to time, with a characteristic
time p or n – the characteristic life time – the excess carriers are going to recombine with the other type of carriers
available. Recombination is the opposite of generation: during generation an electron-hole pair is created, during
recombination an electron-hole pair disappears. If recombination occurs during the diffusion process then the number of
excess carriers lowers and the area under the graphs in fig.11 will decrease as a function of time. Again these times p or
n are average times (average over the huge number of carriers available in a semiconductor). This means that in reality

25
Density and concentration are synonyms.
26
And of course will also recombine whilst they are diffusion to go back to equilibrium.
27
When the excess is maintained at a steady state conditions then this will deliver a steady state current.
20
some carriers will recombine sooner and some later than these given characteristic times. When a carrier is travelling in
a time span smaller than its lifetime, then in principle, on average they do not recombine within a distance Lp or Ln –
called the diffusion length of the carrier. Diffusion length and lifetime of a carrier (average time before recombination)
are related by: 𝐿𝑛 = √𝐷𝑛 𝜏𝑛 with Dn the diffusion constant for electrons and 𝐿𝑝 = √𝐷𝑝 𝜏𝑝 with Dp the diffusion constant
for holes. Note that these times and length are related to recombination events.

Going back to diffusion. Whilst the electrons are diffusing, their movement is influenced by thermal energy and
scattering processes. Let us call l the mean free path of these moving electrons. This means that after each average
distance l the carrier will scatter, loose it kinetic energy before being accelerated again by the thermal energy. Then the
average velocity of the carriers will be vth = l/ with  the time between scattering events28. Thus, referring back to fig.
11(c), since the probability of the electrons flowing to the right is equal to the probability of electrons flowing to the left
in this case, then on average ½ of electrons at point x-l will move to the right and ½ of electrons at point x+l will move
to the left (1D case). Since both flow with a velocity vth they will cross point x in opposite directions. The net flux is
then the net density of particles that crosses point x per second:
 ( x) = 1 2 n( x − l )vth − 1 2 n( x + l )vth = 1 2 vth n( x − l ) − n( x + l )
 n( x − l ) − n( x + l )   n( x − l ) − n( x + l ) 
2
 ( x) =
l
n( x − l ) − n( x + l ) = l   = Dn  
2  2l   2l
Dn is the electron diffusion constant. Since l is very small, we notice that the last function is a derivative in the finite
difference approximation (derivative with discrete points). Thus the expression for the flux can be written as:
 n ( x − l ) − n( x + l )   n( x + l ) − n( x − l )  dn( x)
 ( x) = Dn   = − Dn   = − Dn dx
 2 l   2 l 
dp( x)
A similar derivation for holes gives:  ( x) = − D p
dx
The diffusion current due to excess carriers is then:

− dn( x) − dn( x) dn( x) for electrons

J n = q ( x) = qDn = −eDn = eDn (17)
dx dx dx
− dp( x) − dp( x) dp( x)
J p = qD p = +eD p = −eD p for holes (18)
dx dx dx

Dn,p is the proportionality constant and is called the diffusion constant. The diffusion constant stands in relation with the
mobility following the Einstein equation29:
Dn, p kT
= (= 0.026V @ T = 300K ) (19)
 n, p e
𝑘𝑇
𝑉𝑇 = is called the thermal voltage. (20)
𝑒

In order to be able to use equations (17) & (18) we need to know the variation of the excess carrier concentration as a
function of distance. Remember that when a semiconductor is uniformly doped, the density of mobile charges at room
temperature is equal to the density of the doping atoms, see eq. (4) & (6). This allows us to calculate the drift currents
given by eq. (15). Homogeneous doping does not create gradients and thus also no diffusion currents. In the case an
excess charge is introduced, the number of charges is defined by the source that is generating the excess.

2.4 Continuity equations – for information only30

In the previous sections we derived the expressions for the drift and diffusion current. These expressions are a function
of the electron and hole concentrations which are a function of position, n(x) and p(x)31. In equilibrium, the
concentration of electron and holes is given by the doping concentration (see eq. (4…7)). However, when currents are
flowing due to e.g. carrier injection processes under influence of light or an electric field, then there will be a deviation
of this equilibrium condition and n and p become position dependent32. Due to carrier injection processes diffusion

28
Note that this time is related to scattering and not to recombination. The  related to recombination is called the
lifetime of the carrier.
29
This equation can be derived from the drift-diffusion equations at equilibrium.
30
This section is for information only. It gives an insight into how the variation of the minority carrier concentration
can be derived.
31
When there are variations in function of time e.g. an ac voltage applied then these concentrations will also be a
function of time n(x, t) and p(x, t). In this module we only look at DC.
32
Note that position dependent doping will also lead to diffusion processes.
21
currents will flow. The continuity equations determine the excess carrier concentration that can exist in a material when
carrier injection processes occur and thus determine n(x) and p(x). These equations are a balance equation looking at the
variation of e.g. the hole concentration in a volume V. A hole current with a certain amplitude flows into this volume and
a hole current with a different amplitude flows out of the volume. The balance equation then states that this difference
must be equal to the next change of holes within the volume that is due to generation and recombination processes. This
is depicted in fig. 12.

Figure 12: A hole current is flowing through an infinitesimal volume of an n-type Si layer.

The rate of variation of the hole concentration from position x to x+x is given by the following rate equation33:
p 1 J p ( x) − J p ( x + x)
= +G−R
t x → x + x e x (21)
The first term is the mathematical description of “rate” = variation as a function of time. The second term gives the
difference between the density of holes flowing into x and coming out of x+x. The last term is the net
generation/recombination of carriers – R is recombination rate and G is generation rate.
Or in words: the rate of hole concentration variation is equal to the change of the holes concentration in the volume
x  A per unit time due to a current flowing in the x direction through a cross sectional area A plus the concentration
of holes that is recombining/generated as a function of time in that volume.
The concentration of holes p(x) is equal to the equilibrium concentration + the excess hole concentration:
p( x) = p0 + p( x)
(22)
p0 is the constant equilibrium concentration of holes, determined by doping, while the excess carrier concentration, p is
a function of x and will be determined by the continuity equation 34.
In equilibrium the rate of generation will be equal to the rate of recombination35: a constant carrier concentration is
established that is dependent on temperature and material parameters. When not in equilibrium, there can be an excess or
a deficit in carrier concentration. Carrier recombination and generation rates, respectively, will increase. If the excess
that is introduced is small with respect to the majority carrier concentration but large with respect to the minority carrier
concentration, then the carrier recombination and generation rate will only need to consider bringing the minority
carriers back towards equilibrium. In that case the term G-R in an n-type material in the dark is approximated by:
p
−
p
(23)
with p the average lifetime of the hole. This is the average time a hole can travel through the semiconductor before it
recombines with an electron. p > 0 for an excess of holes and the recombination rate is larger than the generation rate,
p < 0 for a deficit of holes and the recombination rate is smaller than the generation rate. An additional generation term
rate term GL will need to be introduced in the continuity equation when light is shining on the semiconductor with an
energy that is sufficient to break the covalent bonds and generate additional electron hole pairs (see solar cells later).
Thus in the dark G-R in eq. (21) is given by eq. (23). Thus the balance equation for holes becomes:
.
p n ( x, t ) 1 J p ( x) − J p ( x + x) p n ( x, t )
= − (24)
t x → x + x e x p
The term pn is the excess minority carrier concentration. Excess means the density of carriers larger than the minority
carrier concentration defined by the doping of the bulk material. For x→0 the equation (24) becomes a differential
equation:

33 𝜕
Note that in this expression we are working with partial derivatives (see maths for more explanations). In this
𝜕𝑡
𝑑
module these are worked out similarly to ordinary derivative the partial derivative notation is used when a function is
𝑑𝑡
dependent on more than 1 variable. Here it is time and distance and both can vary.
34
The constants drop out in the derivatives.
35
It is worthwhile to remember that carrier regeneration and recombination always involves both holes and electrons.
22
p ( x, t ) p ( x, t ) − 1 J p ( x, t ) p ( x, t )
= = − (25)
t t e x p
Similar for electrons:
n( x, t ) n( x, t ) 1 J n ( x, t ) n( x, t )
= = − (26)
t t e x n
If excess charges exit then carrier gradients exits and the resulting current is diffusion. The diffusion current density
expression can be inserted in eq. (26). Remember that the current current densities are given by:
n p
J n = eDn
x
(27)
p n
J p = −eD p
x
Substituting (27) in (26)36 gives the continuity equations of minority carriers taking recombination/generation in
volume V into account:
n  2n n
= Dn −
t x 2  n
(28)
p  2p p
= Dp −
t x 2  p
In this module we look at steady state, thus the time derivative is zero and the steady state continuity equations become:
 2n n n
= = 2
x 2
Dn n Ln
(29)
 2p p p
= = 2
x 2
D p p L p
Eq. (29) is extremely important for the derivation of the currents in a pn diode.

2.5 Other important relationships

2.5.1 Poisson equation
From A-levels: an electric field is everywhere where an electric charge experiences a force. Thus, the electric charge is
the source of an electric field and vice versa. Gauss’ law37 states that the electric flux out of a closed surface is equal to
the total charge enclosed divided by the permittivity. The permittivity,  of a material is an indication of how easy it is
to separate charges. The value of  = 0×r with 0 the permittivity in air and r the relative permittivity of the material.
In semiconductors Gauss’ law is called the Poisson equation and gives the relationship between the electric field and the
different charges that can exist in the semiconductor. The Poisson equation relates the first derivative of the electric
field to the total charge density (x)38 (in 1 dimension):

dE ( x)
dx
(
=  ( x) = e − n( x) + p( x) + N D+ ( x) − N A− ( x) )
(30)
Charges that can be available in a semiconductor are free electrons with a density n(x), free holes p(x), fixed ionised
doping atoms ND and/or NA. All these parameters can be a function of x as all charges can vary as explanations in the
pn diode will show.
The ionised doping density in this equation will be equal to the doping density at room temperature (full ionisation of
all doping atoms)

2.5.2 Electric field-electrostatic potential

The relation between electric field and electrostatic potential is known from A-level physics:

36
Note that the subscript n and p are omitted. Remember that these equations are for the minority carriers!
37
This will be more extensively covered in the second year Electromagnetism module. For the Semiconductor Devices
module it is sufficient to know that the Poisson equation links the electric field (also occurring in the drift-diffusion
equation) and the charges. This means that all the equations to describe transport processes in semiconductors are
coupled.
38
It is unfortunate that for historical reasons the symbol for all charges in this equation is the same as the resistivity,
although they have different meaning.
23
 dV ( x)
E ( x) = −
dx (31)
In the simple case where the electrostatic potential drop is linear, this relation can often be written as:
𝑉
E = − with V the electrostatic potential difference across the material (V = V – 0 (ground node)) and L the length of
𝐿
the material across which the voltage drops.
Note the – sign indicating that the direction of electric field and electrostatic potential are opposite.

2.5.3 Electric potential energy

When an electric charge moves through an electric field, E its potential energy, E changes. In the case of an electron that
crosses an electrostatic potential difference of V = 1 V, the change in its potential energy is equal to 1 eV (electron volt).
This is the definition of the eV and leads to the equation:
E = -e V (32)
With E the potential energy and V the electrostatic potential. The minus sign is a result of the fact that the potential
energy of an electron must increase in the direction of the electric field.

Combining equations (30), (31) and (32) gives the equation of the variation of the potential energy of electrons:
𝑑2 𝐸
𝜀 = 𝜌(𝑥)
𝑑𝑥 2

2.6 Mathematical description of the energy of electrons and holes – for

information only39
Up till now we have avoided the use of quantum mechanics almost completely, and we derived the transport equations
for the carriers within the semiconductor by mainly ignoring their wave-particle character. Thus, in principle we should
be ready to jump to the study of semiconductor devices. Doing that however would seriously limit our insight into the
physical processes that are happening within the semiconductor and we would solely solve differential equations with
certain boundary conditions that we accept rather than understand. On the other hand, digging into quantum mechanics is
a bit like running before we can walk, because of the lack of sufficient mathematically knowledge at this stage. Also
doing quantum mechanics in this module would prevent us (time wise) to look at any device in detail. Therefore, we will
just lift a tip of this subject area, enough to allow us to work with energy band diagrams which are a handy tool for the
prediction of transport processes in semiconductor devices.

2.6.1 Coupled mode theory by Feynman

The optical and electrical properties of semiconductors are determined by the energy of the free carriers, both electrons
and holes. In order to build a robust mathematical picture of the energy relationships of the free carriers, one has to look
into the subject of quantum mechanics.

We have already seen that a Si atom has 14 electrons. All these electrons have certain energies in relation to their
“position”40 from the nucleus (see Fig. 13a). When we bring the Si atoms together into a Si lattice, we have seen that
covalent bonding will occur. Thus the 4 outer shell electrons of each neighbouring Si atom will be shared. We can
accept that due to these interactions, the energy of the electrons has changed. This means that the energy of the single Si
atoms will be different from the energy of the Si atoms within a lattice. If we take 2 Si atoms, each one individually
surrounded by vacuum, will have an energy value E0. When we bring the two close together, interactions cause covalent
bonding and each atom cannot have the same energy value E 0 anymore. The coupled mode theory, formulised by
Feynman, calculates that the original energy level E0 splits in two different levels E1 and E2, one higher and one lower
than the original single atom energy (see Fig. 13b). But in a Si crystal we have 1023 cm-3 atoms which will all interact
with their neighbours. When N atoms are brought close together, then there are 4N valence electrons, thus the energy
levels will split again into 2N filled energy levels and 2N empty energy levels as shown in Fig. 13c.

39
None of the derivations in this section are examinable. The purpose of the section is to give some intuition into the
calculations involved in the quantum mechanical description of electrons in a periodic lattice. The key results are the
existence of a valence and conduction band that are separated by a forbidden band (band gap). Free electrons will reside
in the conduction band and free holes in the valence band. More information on the derivations can be found in: L.
Solymar and D. Walsh, “Electrical properties of materials”, 8 th ed. Oxford University Press (2010).
40
Bohr model.
24
 sp*3

energy

energy
3
p Completely empty Conduction band
3s
No
energy
sp3
energy

3p levels
3
outer shell electrons p Completely filled Valence band
3s 3s

2p 2p
do not take part in
2s 2s bonding

1s 1s
E≈1eV

Figure 13: a) (left) Energy of the 14 electrons in an isolated Si atom. b) (middle) Energy of the valence electrons when 2
Si atoms are covalently bonded. One sp3 energy configuration is completely filled the other one, called sp*3 is
completely empty (total number of levels are maintained but electrons are re-distributed over levels). c) (right) N Si
atoms brought together increases the number of energy levels in sp3 to 2N and in sp*3 too. Each energy level (also
called a state) can only take two electrons).

Thus the covalent bonding of the valence electrons within the semiconductor lattice has created bands of allowed
energies. The valence band, that is an energy region with extremely closely spaced energy levels (states) is completely
filled with the valence electrons of all the atoms. On each level 2 electrons occur (Pauli’s exclusion principle). In energy
bands below the valence band are the other electrons that do not take part in the covalent bonding. The conduction band
is the higher lying energy band with closely spaced energy levels. This band is completely empty of electrons when the
covalent bonding is complete. In between these two regions that are filled with energy levels that can each carry 2
electrons, lies a region where no states (energy levels) occur. This means that there cannot exist an electron with an
energy within this region41. The region without energy levels is the forbidden band or bandgap. The difference
between the bottom of the conduction band and the top of the valence band is EG, a constant (at constant T) for each
semiconductor.
In the given situation with complete covalent bonds, the valence band energy levels are all completely filled up. If we
apply a voltage across the semiconductor and thus increase the energy of the electrons then these would have energies
within the bandgap. Since this is forbidden, no current can flow in this system. This is consistent with what we have
seen before because current can only be carried by free electrons (not bonded to the atom) that only occurs when the
covalent bonding is not complete. Thus, in order to generate a current some of the electrons in the valence band should
“jump42” to the conduction band, as there are a lot of free energy levels available.

2.6.2 Quasi free electron model

While the previous approach relies on A level chemistry, the approach taken here by solving the Schrödinger equation is
more related to Physics A-level knowledge. The basic principle is similar to the wave-particle duality of photons. The
same duality exists for electrons. The description of scattering processes of electrons in a lattice is based on its particle
character. The photoelectric effect also indicates that for one photon of the correct wavelength, one electron can be
released from a material. On the other hand, with sufficiently small slits, the double slit experiment with electrons also
leads to interference fringes, a sure sign of the wave character of the electrons.
The Schrödinger equation gives the quantum mechanical mathematical description of the total energy of an electron:
Total energy = kinetic energy + potential energy
E = KE + PE
This classical concept was re-written by Schrödinger (based on de Broglie’s wave description) into:
 2 d 2  ( x)
E ( x) = − + V ( x) ( x)
2m dx 2

41
For pure material and ignoring possible quantum mechanical tunnelling processes.
42
be excited
25
Where  (x) is the electron wave,  is the reduced Planck’s constant, m is the mass of the electron and V(x) is the
potential energy in the system through which the carrier is propagating.
V(x) is imposed by the forces that atoms in the lattice impose on the electrons. This is a rather complex problem to solve
and therefore some simplifications will be imposed.
The first one is the free electron model (valid for metals). In that case, V(x) = 0. This describes an electron in a potential
well. The “well” is formed by the boundaries of the materials in which the electrons are free to roam (see figure 14).

Figure 14: infinitely deep quantum well in which the electrons are trapped.

The solution of the Schödinger equation is43:

2
 ( x) =
2
sin( kx)  ( x) = cos( kx)
L L

k=
n
n = even
and k =  n n = odd
L L
 k 2 2
 2k 2
E (k ) = E (k ) =
2m 2m
n = 1,2,3,… The parameter k is called the wavevector (here only in 1D).
What is important to remember from this is that:
- The electrons can only have discrete energy values (n)
- That the allowed energy values are lying on a parabola (energy band – E-k relationship).

In a semiconductor the electrons are not free to roam as they see a periodic variation of the potential due to the
periodically spaced atoms. In the nearly free electron model that describes the energy of electrons in a semiconductor,
one assumes that they will behave as electrons in a metal apart from some disruption to this model that will occur at
specific values of E-k.
One way to “see” this disruption is to understand that the electron waves will reflect on the lattice planes and that the
reflected and incoming electron waves can interference when they are in phase. When this happens, the electrons cannot
propagate through the lattice, they have become standing waves instead of propagating waves.
The mobile electrons can have a range of momenta and can travel in any direction except those for which Bragg
reflection can occur, that is when individual reflections add in phase (see Fig.15), when n  = 2 a cos, n=1,2,3,…
When an electron is back-scattered such that 2a=n (1D) there will be coherent superposition between forward and
backward travelling waves. A standing wave will be established and these electrons will be localised ie they are no
longer free to carry current.

Figure 15: electron waves in a semiconductor reflecting on crystal planes in the Ziman model.

We can rewrite the condition for coherent superposition as k=2π/=nπ/a and clearly something funny happens here.
This particular wave number is given the special name of Brillouin zone boundary. For a free electron E~p2 ie E~k2
and this is also generally true in a crystalline solid except close to the zone boundary. Here the energy takes two values
(ie it is discontinuous) which are separated by a band of forbidden energies. The two energy values come about because

43
This is solved in the 1st set of study group questions. The derivation of the equations is not examinable.
26
of the way in which the standing waves line up with the atomic cores (see Fig.16).

Figure 16: Electron waves at the Brillouin zone boundary

When the wavefunction maxima line up with the positively charged nucleus the electron energy is reduced. In the other
case the energy is at a maximum. The free electron E-k band diagram is split into a series of allowed bands separated by
energy gaps (Fig. 17). The higher order bands (n=2,3,4 etc.) can be folded onto the first Brillouin zone and this is called
the reduced zone scheme (Fig. 17).
It is this band structure which determines the electrical and optical properties of solids. For instance, in a semiconductor
at room temperature, band 3 is partially filled (only very close to the bottom of the band). The electrons in this band can
be accelerated by an electric field (we speak of there being available states) and a current can flow. In an insulator
however, the band 2 is entirely full and 3 entirely empty, the energy gap EG is many electron volts and we cannot
increase the electron energy with an electric field to overcome this bandgap. In this course we are interested in
semiconductors. These are materials which have a comparatively small energy gap (E G~1eV) so that a significant
number of electrons can be thermally excited into the lowest lying empty band (ie band 3 - the conduction band)
leaving a hole behind in band 2 - the valence band.

EG

Figure 17: left: Expanded zone scheme, right: folded zone scheme that contains all the information required.

Relevance of this information44:

In a semiconductor, such as Si, the energy of electrons lies in parabolic energy bands with discrete energy values (very
closely spaced). These allowed discrete energy levels are called states. There exists energy values that are invalid for
electrons in semiconductors, these energy values form the bandgap. No electrons45 can exist in the bandgap.
Only two of these bands are relevant for semiconductor devices, the conduction band and the valence band (see fig. 18).
At zero T the valence band is completely filled with electrons. These electrons are the valence electrons of all the atoms
in the lattice that are stuck in the covalent bonds. There are not free electrons and holes. When the thermal energy is
sufficiently large to break the covalent bond then some of the electrons will gain sufficient energy to cross the bandgap
and go into the conduction band. This process leaves behind energy states in the valence band that are unfilled. These
are called holes. Thus the conduction band consist of the free electrons and the valence band of free holes (the electrons
in the valence band are not free to carry current as they are stuck in the bonds with Si atoms). Thus the free holes are on
those energy levels in the valence band where there are no electrons. Free electrons and holes in semiconductors at
room temperature and under normal electric fields will only occur very close to the band edges, thus around Ec and

44
This is the main information that you need to remember in order to understand transport in semiconductors. All the
derivations are to justify this summary but will not be part of the exam.
45
Nor can holes exist in the bandgap.
27
around Ev46. Remember that these parabolic bands are the total energy of the electrons: kinetic + potential energy. We
will see later that to describe transport of carriers in a semiconductor, we can focus on the potential energy only. This is
because scattering processes in the semiconductor prevent the increase in kinetic energy.

Figure 18: Conduction and valence band in a semiconductor. The dashed lines are the dispersion relations. The energy
region between Ec and Ev (band edges) are forbidden and Ec-Ev=EG the band gap.

2.6.3 Effective mass47

Another useful property which we can infer from the band diagram is the electron effective mass. In a crystal an
electron experiences attractive forces due to the ion cores of the lattice and repulsive forces at the bonding sites. On an
atomic level this is of course very difficult to calculate but fortunately we need only consider the average effect of the
force to understand the bulk properties. The average effect of the crystal potential is to alter the inertia of the electron.
The change in inertia is represented by an effective mass m*. To see how the effective mass is related to the band
diagram consider Newton’s laws (classical).
dv dv dk
F =m =m
dt dk dt
h 2
de Broglie found that = and the solution to the Schrödinger equation gives: k =
mv 
thus:
k
v=
m
On the other hand the Schödinger equation also gives:
2k 2 dE  2 k
E= → =
2m dk m
thus
1 dE dv 1 d 2 E
v= and =
 dk dk  dk 2
Therefore the expression of the force in quantum mechanical terms becomes:
1 d 2 E dk
F =m
 dk 2 dt
k
The impulse is given by p = mv or by de Broglie (for waves) p = k thus v =
m
On the other hand, based on de Broglie’s equation:
dp dk
F= =
dt dt
Thus:
1 d 2 E dk dk
F =m 2
=
 dk dt dt
Giving the expression of the effective mass:

46
Ec is the bottom of the conduction band, Ev is the top of the valence band.
47
For information only.
28
 −1
d 2E 
m=  2 
2

 dk 

Relevance of this information48:

This derivation is for justification purpose only. The important information that we extract from the quantum
mechanical description is the mathematical proof of the existence of the hole.
d 2E
The valence band has <0 thus the second derivative is negative, leading to a negative mass. Negative masses are
dk 2
not an acceptable property that occurs in the observable world. Therefore instead of saying that the valence band is
populated with electrons with a negative mass, we can propose a different type of free carrier. This free carrier is the
hole and it has a positive mass and the sign difference is absorbed in the charge. This shows that the quantum
mechanical description of the propagation of electrons through a semiconductor also leads to the introduction of a hole:
a free carrier with a positive mass and a positive charge.
This derivation closes the loop between the particle characteristics of carriers and the quantum mechanical description
of carriers as a wave.
From now on we will accept the existence of 2 types of carriers in a semiconductor, holes in the valence band and
electrons in the conduction band.
Note that in this simplified derivation, we still didn’t prove that the mass of electrons is different from that of holes. For
now, you will have to accept that this is the case. More accurate calculations with the correct V(x) in the Schrödinger
equations prove this fact49.

2.7 Simplified energy band diagram

Solving the Schrödinger equation for a particle in a box gives discrete energy levels that follow a parabolic function
(energy band). These energies are the sum of potential and kinetic energy. When deriving the equations for drift
current50, we have identified that whilst electrons/holes are travelling through the semiconductor, they are scattered by
the atoms in the lattice. Thus under an electric field, due to the scattering process of a light electron with a heavy atom,
the electron loses its kinetic energy they have gained by the electric field and transfers it to the atom that vibrates
slightly (heating). In the next section we will derive that most of the electrons reside near the bottom of the conduction
band and most of the holes near the top of the valence band. Therefore the energy band diagram, given in fig. 18 can be
simplified to that given in fig. 19 (right).

+PE

+PE

Figure 19: Left: parabolic energy band diagram (dispersion relation). Right: potential energy only as a function of
distance. Increasing kinetic energy is stepping up in energy for electrons and stepping down in energy for holes.

The magnitude of the bandgap is different for different material. Fig. 20 demonstrates the difference in bandgap between
an insulator, a semiconductor and a metal.

48
Interesting is that the curvature of the band is indicative of the effective mass and that holes are also a result of the
fact that the QM mathematics gives a negative mass. Since negative masses are not physically relevant, the concept of a
hole is introduced with a positive mass and the sign is compensated by associating a positive charge to it. All the
derivations are to justify this but will not be part of the exam.
49
Look at the recommended textbook, Streetman, with examples of more accurate energy band diagrams.
50
This of course also happens when carriers are diffusing.
29
 partially filled empty empty
Ec Ec Ec
Ev
Eg
Ev
filled Eg
filled
or
Ev
Ev filled
overlap
Ec

Figure 20: the bandgap for a metal, semiconductor and insulator (from left to right). This demonstrates that the energy
needed to free an electron from the valence band into the conduction band is extremely small to zero for metals, of the
other of multiple kT’s in a semiconductor and very large for an insulator.

2.8 Calculation of the density of electrons and holes – for information only51
We have seen that at room temperature a certain density of electrons break away from the covalent bond. These
electrons gain enough energy to be excited across the bandgap into the conduction band. Of course when an electron is
excited to the conduction band it leaves an empty space on an energy level in the valence band, this space can be
occupied by other electrons gaining energy in the valence band or can be refilled with electrons falling back from the
conduction band. In the first case we see an “empty” space travelling. This will be the hole we have talked about before.
Thus filled energy levels in the conduction band (electrons) can travel and thus carry current. The same is valid for the
empty spaces in the valence band (holes) which can travel and carry current.
Another method to create free electrons (in the conduction band) and free holes (in the valence band) is by shining light
with the correct wavelength, , on the semiconductor. Photons (light particles) with energy E = h = hf  EG when

absorbed, transfer their energy to the valence electrons and create electron-hole pairs. Electrons “jump” into the
conduction band leaving behind a hole in the valence band.
Both methods given above create the same number of free electrons and free holes via direct energy transfer to the
valence electrons. Note that these electrons are in a higher (excited) state and will try to return to their lowest possible
energy value if a lower energy level is unfilled. This means that generation (creation of electron hole pairs) and
recombination (annihilation of electron hole pairs = excited electrons fall back to the valence band) is a continuously
ongoing process.
We have seen that doping implantation, where a certain density of Si atoms is replaced by group III or group V atoms
(acceptor resp. donor doping), also increases one carrier type whilst decreasing the other (consequence of charge
neutrality and law of mass action). How these free electrons or holes fit into the energy band formalism will be
discussed later.

What is the density of electrons in the conduction band of Si at absolute zero temperature T=0K?

Given the energy band diagram, we still need to find expressions that relate the density of free electrons (n) and free
holes (p) to certain energy levels.
Electrons and holes occupy certain energy levels or states that are discrete but closely spaced in energy (therefore we
talk of an energy band). The number of available states that can be occupied by free electrons increases with increasing
energy above the bottom of the conduction band and the number of states that can be occupied by free holes increases
with decreasing energy below the top of the valence band. The density of states as a function of energy in 3D materials,
32
g(E) is proportional to g ( E )  E 52. The full expression is: g ( E ) = 1  2m  E , with ħ = h/2, h is Planck’s
2 2   2 
constant. The density of states gives the number of energy levels that can be occupied by mobile charges. Since there are
no states in the forbidden gap we can re-write this equation as:
32
1  2 mn 
gc (E) =   E − Ec for E > Ec
2 2   2 
g G ( E ) = 0 for for Ev < E < Ec (33)
32
1  2m p 
gv (E) =   Ev − E for E < Ev
2 2   2 

51
For information only. This section gives some insight into the derivation of the electron and hole density. The concept
of density of states is introduced as well as the Fermi-Direct distribution function. From this we only use the concept E F
and the expressions for n and p in function of band energies.
52
The interested reader is referred to the textbooks mentioned at the start.
30
We also know that free electrons and holes can only have an energy value associated to an available energy level (state)
and only 2 electrons or holes can occupy 1 level. At room temperature there are of course a large number of free
electrons and holes and we require knowledge on whether a state at a certain energy is filled or not by an electron or
hole. Since there are a large number of carriers and they are continuously moving, statistical methods need to be applied.
The statistics is based on the knowledge that electrons are indistinguishable (fermions with half-integer spin), that they
behave as waves in a crystal (occupy energy levels) and that they obey Pauli’s exclusion principle (a max of 2 electrons
per energy level one with spin up and one with spin down). This has led to Fermi-Dirac statistics that expresses the
probability of finding an electron at a certain energy E and temperature T:
1 (34)
f (E) =
1 + exp 
( E − E F ) 
 k BT 
Where kB is the Boltzmann constant: kB = 1.38 10-23 J/K and T is the absolute temperature in K. Note that at room
temperature kB×T = 0.026 eV.
f(E) is called the Fermi-Dirac distribution function53. The quantity EF is the Fermi level. EF is not a state it is an
important parameter of the distribution function. At the Fermi energy EF, the probability of finding an electron is ½.
This is the definition of EF. Not that the parameter EF that is characterising the distribution function is independent of
whether or not a band gap exists.
If f(E) gives the probability to find an electron then 1-f(E) must give the probability to find a hole. Figure 21 gives the
Fermi-Dirac distribution function for different temperatures.
f(E)
T=0K
1
T1
1/2
T2>T1

EF E
Figure 21: The Fermi-Dirac distribution function as a function of temperature.

What is the probability to find an electron at energies larger than EF at absolute zero temperature? What is the
probability of finding a hole at energies lower than EF at T=0K?

The product of the density of states and the Fermi-Dirac distribution function gives the density of electrons ad holes as a
function of energy.
𝑛(𝐸) = 𝑔𝑐 (𝐸) × 𝑓(𝐸) (35)
𝑝(𝐸) = 𝑔𝑣 (𝐸) × (1 − 𝑓(𝐸)) (36)
Integrating eq. (35) and (36) over the conduction and valence, respectively gives the total density of free electrons and
holes in the material:
+
n=  f ( E ) g ( E )dE
Ec (37)
Ev

p=  (1 − f ( E ))g ( E )dE
−
With Ec the bottom of the conduction band and Ev the top of the valence band. n is the density54 of free electrons and p is
the density of free holes. These integrals are easier to work out in case (Ec − E F )  kT (doping is not too high < 1019
cm-3) as then the Fermi-Dirac equation (34) can be simplified to:
1
f (E) 
exp 
( E − EF ) 
 kT 
(38)

53
A distribution function is related to basic probability mathematics but applied to continuous rather than discrete
variables. This approach is taken for when the number of events is very large such as e.g. for the molecules in gases and
charge carriers in semiconductors. Derivation of the Fermi-Dirac distribution function can be found in e.g.
ecee.colorado.edu/~bart/book/fermi-dirac_derivation.htm
54
In units of cm-3
31
The result of the integration is:
 − (E c − E F ) 
n = N C exp 
 kT  (39)
 − (E F − E v ) 
p = N V exp 
 kT 
With NC and NV the effective density of states in the conduction resp. the valence band.
3
 2mn kT  2
N C = 2 2

 h  (40)
3
 2m p kT  2

NV = 2 
 h2 
 
With mn & m p the mass of the electron, resp. the hole.

When we have an intrinsic material (no doping) we have seen that the density of free electrons is equal to the density of
free holes. The Fermi level will then lie at some intrinsic level Ei near the middle of the band55 and the intrinsic electron
and hole concentrations can then be written as (EF = Ei for intrinsic materials):
 − ( E c − Ei ) 
ni = N C exp 
 kT 
 − (Ei − E v ) 
pi = N V exp  (41)
 kT 
 E 
 ni pi = ni2 = N C N V exp − G 
 kT 
 E 
 ni = N C N V exp − G 
 2kT 
This implies that for semiconductors with a small bandgap (e.g. Ge), the intrinsic carrier concentration is higher than for
large bandgap materials. Thus in the case the material is undoped, the resistivity of Ge is smaller than that of Si. Since
NC ≈ NV in Si, Ei is lying approximately in the middle of the band gap. This can be easily derived from eq. (41). Using
eq. (41) and eq. (39) we can write the expression of carrier concentration as a function of E i and the intrinsic carrier
concentration ni.
 (E − E i ) 
n = n i exp F 
 kT  (42)
 (E − E F ) 
p = n i exp i 
 kT 
The advantage of this notation is that it is easy to identify whether a material is n-type or p-type. If EF lies above Ei the
material is n-type and if EF lies below Ei the material is p-type. Moreover the use of the parameter F = Ei – EF, called
the Fermi potential, is often used to simplify theoretical derivations. In many textbooks the intrinsic level is used as the
reference level (zero point in energy) to describe the potential energy of carriers56.
Using eq. (42), you are now in a position to proof the law of mass action n×p = ni2.

From the above equations we see that the distance between the Fermi level EF and the conduction band edge Ec
decreases when the density of free electron, due to doping, is increasing. Similarly, the Fermi level EF comes closer to
the valence band edge Ev when the density of free holes increases as a result of doping. Thus this demonstrates that for
n-Si with n > p EF is lying closer to Ec than Ev and for p-Si with n < p EF is lying closer to Ev than Ec. This picture is
completely consistent with our derivations of majority and minority carriers in doped materials.

Equation (33), (35), (36), (38) are all summarised in fig. 22, the band diagram, the density of states, the Fermi-Dirac
distribution function and the density of free carriers in three cases: intrinsic (no doping), and extrinsic (n-doping resp. p-
doping).

In the extrinsic (doped) semiconductor we see that the density of free electrons first increases as a function of energy
and then decreases exponentially as a function of energy. Thus a large density of electrons can be found at energies
close to the conduction band edge (Ec), but further away – higher in energy – the number decreases rapidly
(exponentially). Similarly for holes, a large density of holes is available near the valence band edge (Ev) and decreases

55
For Si since NV ≈ NC
56
The potential energy for electrons is normally referred to E c and that for holes to Ev.
32
rapidly (exponentially) for “decreasing” energies. Remember that the energy of a hole increases when we go down
along the energy access.
The comprehension of these graphs, especially the left hand side and right hand side graphs, are of ultimate importance
to understand the physics behind the current-voltage characteristics of semiconductor devices. Make sure that you
understand the graph.

Draw the carrier concentration of two p-type semiconductors. One has a doping density NA1 and the other NA2 with
NA2>NA1. Plot both on adjacent graphs and ensure that the qualitative difference between the two graphs is clear. Which
case has the largest density of free holes deeper in the valence band?

E E E
T>0K electrons
Ec
Intrinsic
EF
semiconductor
Ev
holes
a) intrinsic
g(E) 1/2 1 F(E) carrier
f(E)
concentration
E E E
electrons
Ec
EF

Ev
holes
b) n-type
g(E) 1/2 1 F(E) carrier
Extrinsic f(E) concentration
semiconductor
E E E
electrons
Ec

EF
Ev
holes
c) p-type
g(E) Density of states g(E) 1/2 1 F(E) carrier
f(E)
concentration
f(E) Fermi-Dirac distribution function
Figure 2257: From left to right the graphs are: energy band with position of E F ; density of states g(E) ; Fermi-Dirac
distribution function ; carrier concentration as a function of energy. The line is g(E)×f(E), the hatched area are the
carrier densities n and p. a) intrinsic semiconductor. Fermi level lies ±midgap and the density of holes and electrons is
equal (shaded regions). b) n-type semiconductor. The Fermi level lies closer to the conduction band than the valence
band and as a consequence the integration of the product of the density of states and the Fermi-Dirac function gives an
increased density of electrons and a decreased density of holes. c) p-type semiconductor. The Fermi level lies closer to
the valence band than the conduction band and as a consequence the integration of the product of the density of states
and the Fermi-Dirac function gives an increased density of holes and a decreased density of electrons.

As stated before, the Fermi-Dirac distribution function is independent of the material – it is the probability function for
electrons. Thus we can combine f(E) with the plot of fig. 20 to extend knowledge on semiconductors to metals and
insulators. Both materials are important for devices as the contacts consist of metals and the control contact in the
MOSFET is made from an insulator.

57
This is one of the most important plots in this part of the course: the distribution of carriers as a function of energy
and their dependence on doping type. The right hand plot is key to understanding why in diodes, MOSFETs and BJTs
conduction is sometimes inhibited although classical electrostatics predicts current flow.
33
 T = 300K Energy

empty
EC EV
EC
EC
EF EG EV
EV

full
f(E) 1 1/2 0

s
nd
r
cto

ba
r
ato

lap ith
u

ng
nd
l

er w
su

pi
ic o

ov e t a l
in

m
se
Figure 23: The energy band diagram and the Fermi-Dirac distribution function brought together in 1 plot for different
relevant materials.

What we can derive from fig. 23 is that for an insulator with a large band gap, f(E) = 0 for E > E c and 1-f(E) = 0 for E <
Ev. This means that the probability of finding an electron in the conduction band of an insulator is zero and the
probability of finding a hole in the valence band is also zero. For the metal, where the conduction and valence band
overlap we find electrons and holes as clouds around the Fermi level and in a semiconductor we have some electrons in
the conduction band and some holes in the valence band because f(E) is different from zero near the bandedges.

2.9 Energy band diagrams under an electric field

The energy bands give an indication of the potential energy of the free electrons, with Ec the lowest potential energy a
free electron can have. Similarly Ev gives the lowest potential energy of the holes. We need to find the variation of the
potential energy Ec (or Ei) as a function of an electric field E and an electrostatic potential V.
An electric field applied in the x direction E(x), points from high electrostatic potential v+ → v- to low electrostatic
potential. The electrostatic potential difference V(x) varies in the opposite direction following:
E(x) = − dV ( x) (43)
dx
We know that the electrons will travel from v- → v+ (electrostatic attraction), thus in the opposite direction of the
electric field. A travelling electron is converting its potential energy in kinetic energy and thus its potential energy
should lower from v- to v+. This means that an electric field will cause a gradient in the energy bands such that the
electric field points in the direction of increasing potential energy (see Fig.24)
E(x) = − dV ( x) = 1 dEi (44)
dx e dx

Energy
E(x)
Ec

Ei
Eg Eg
Ev

x
Figure 24: The tilt of the energy bands under influence of an electric field. Free electron will move from right to left
(down the hill), free holes will move from left to right (up the hill). Note that the bandgap is unchanged under the
influence of an electric field and that the intrinsic level follows the gradient of the band edges. The Fermi levels are not
drawn as they are only valid for equilibrium conditions.

34
Ei (or Ec) is the potential energy of the electron: the work done to move the electron. The electrostatic potential V(x) is
the work done to move the electron divided by its charge, thus E i = -eV.
The direction of the slope of the bands is easy to remember: electrons drift “downhill”, holes drift “uphill” like bubbles
of air in water.
Most semiconductor devices are constructed from a connection of different materials. The position where the materials
touch is called the junction58. Different materials have different characteristics because the energy of their free carriers is
different, e.g. due to different doping densities (or because they have a different band gap). The question is how to draw
the energy band diagram of a combination of materials. In order to do that, we need to “calibrate” the energy of the
electrons in the different materials to a universal reference level. This level will be the vacuum level. To do this, the
parameters from the photoelectric (Compton) effect are used. The material placed in a vacuum is irradiated with photons
of a certain energy: E = h  f with h Planck’s constant and f the frequency. Einstein found that for certain energies of
irradiation, electrons will be freed from the material into vacuum. The minimum energy at which this happens is called
the workfunction  of the material. Further increasing the energy of the irradiation will give the freed electrons more
kinetic energy after release. Note that increasing the intensity of the irradiation in this experiment only increases the
density of freed electrons but not their kinetic energy after release. The workfunction is the energy difference between
the Fermi level and the vacuum level and is a constant for each material, dependent on doping density. Thus we can
draw the energy band diagrams of each material next to each other to form the junctions with respect to the vacuum
level (see fig. 25). For a semiconductor-vacuum interface, the electron affinity χ, is defined as the energy obtained by
moving an electron from the vacuum just outside the semiconductor to the bottom of the conduction band just inside the
semiconductor. The electron affinity is a parameter than can be found in the periodic table and for semiconductors can
also be found in textbooks. The relationship between electron affinity  and workfunction is :
 =  + (Ec – EF) (in this case  &  are given in eV)
Thus whilst  is doping dependent,  is independent of the doping.
Potential difference
across the junction
Evac E*vac
Energy

Energy

E*vac e(2-1) e2

e1 e2
e1
Ec
Ec
EF
EF
EF
Ev
Ev

Figure 25: left: The energy band diagram of two semiconductors relative to the vacuum level before forming a junction.
Right: After forming the junction electron diffuse from higher energy levels to lower energy levels (occupying lowest
available states within the system). The Fermi levels align and thus a contact potential difference will occur across the
junction equal to the difference in workfunction.

Due to the difference in workfunction one material will have electrons at higher energy levels compared to the other
material. When the two are brought into contact electrons will diffuse to the available states at lower energies if
possible. During this process the Fermi levels align. When the Fermi levels are aligned, no more diffusion will occur.
Thus in a junction without external bias the Fermi level is constant throughout the structure otherwise there would be
further diffusion of carriers until the Fermi level is aligned. This process of diffusion has created a potential difference –
contact potential – across the junction that is directly proportional to the workfunction difference. The existence of this
potential difference results in an internal electric field and thus we should find that the energy bands across the junction
show a gradient. This will be discussed in detail in the pn-diode section.

That diffusion causes internal electric fields and thus gradients in the energy band diagrams can be demonstrated based
on the expressions for the current in semiconductors that we derived previously but repeat here for convenience.

58
Also metallurgic junction
35
 dn( x)
J ntot = en( x)  n E + eDn
dx (45)
dp( x)
J ptot = ep( x)  p E − eD p
dx
The total electron and total hole current are caused by drift and diffusion. When no external bias is applied, then the total
current should be zero. Thus each carrier current component should be zero. Introducing this into (45) gives an
expression for an electric field E that is caused by a carrier gradient d[carrier]/dx:
 Dn dn( x)
− n( x)  dx
E =
 D
n (46)
 p dp( x)
 p( x)  p dx
Using equation (42), (44) and (46) (e.g. for a gradient in hole density) gives the Einstein equation:
D kT
= (47)
 e
This equation relates mobility to diffusion constant.

2.10 Conclusions
Free carriers in semiconductors that can contribute to current are electrons and holes. These carriers have the same
absolute value of charge but an opposite sign, their mass is different from the free electron mass because they interact
with the lattice atoms that are periodically spaced. The hole and electron mass in Si is different. The hole mass is about
twice the electron mass and thus we expect the holes to travel more slowly than the electrons.
The law of mass action states that the product of the electron and hole concentration, as free carriers, must be constant.
At the same time the material needs to be charge neutral meaning that the sum of free carriers + ionised doping atoms
needs to be zero.
Free electrons reside in the conduction band and free holes in the valence band. There is a bandgap, a region of energies
forbidden for electrons and holes. The bandgap is also called the forbidden band as no carriers can exist with that energy
within the semiconductor. The bandgap is a material parameter and is dependent on temperature.
The density of free electrons and holes is determined by temperature and doping. At room temperature and without
doping the free electron concentration is equal to the free hole concentration. Doping of a semiconductor can increase
the density of electrons or holes dependent on the number of valence electrons of the doping atom chosen.
Since the carrier reside near the band edges (E c and Ev) and since they lose their kinetic energy during transport via
scattering processes, the energy band diagrams using the band edges as a function of distance only give the potential
energy of the carriers. Ec and Ev denote the minimum potential energy of the electrons and holes, respectively. The
intrinsic level Ei can be used as a reference level for the potential energy variation of electrons and holes. In n-Si the
Fermi level EF lies above Ei and below Ei for p-Si. Ei lies approximately in the middle of the bandgap (midgap) in Si.
There are two types of current that can flow in the semiconductor, drift current under an electric field (this electric field
can be external or internal) and diffusion current as a consequence of a carrier gradient.
Transport equations that we have derived up till now are:
dn( x)
J n ( x) = e n n( x) E ( x) + eDn
E(x)
The drift-diffusion equations: dx
dp( x)
J p ( x) = e p p ( x) E ( x) − eD p
E(x)
dx
 2n n n
= = 2
x 2
Dn n Ln
The time independent continuity equations for materials in the dark:
 2p p p
= = 2
x 2
D p p L p
When no recombination is taken into account, e.g. layers are sufficiently short such that the carriers can pass through
before recombination occurs, then these equations simplify to:

𝜕 2 𝛿𝑛 𝜕 2 𝛿𝑝
= 0 & =0
𝜕𝑥 2 𝜕𝑥 2

36
  − (Ec − EF ) 
n = N C exp 
In addition, we have derived:  kT 
 − ( E F − Ev ) 
p = NV exp 
 kT 
And
n  p = ni2
(− n + p + N +
D )
− N A− = 0

37
3 The pn diode

In this chapter we will explain what is happening to the carrier concentrations when two different materials are
connected together. We will focus on the combination of p-Si and n-Si and assume that the metal-semiconductor
junctions that necessarily form the contacts are ideal: no resistance thus no voltage drop; infinite generation and
recombination of carriers such that the carrier concentrations is kept at their equilibrium values in the semiconductor at
the contact and converts holes to electrons when moving from the semiconductor into the metal contact and electrons
into holes when the current in the semiconductor is determined by hole current.
We will first study the pn diode in equilibrium, no external voltage and no light are disturbing the material. Then we will
look at the pn diode in the dark under an external DC bias and finally we will analyse how the characteristics in the dark
will be influenced by light falling on the pn diode.
The basic concepts and formulae that we have derived in the previous chapter are instrumental in the understanding of
what follows.

3.1 Fabrication of a pn diode

Can be made from the same material, e.g. Si where one part is p-doped and the othe n-doped, called a homojunction.
They can also be composed from a combination of different materials different doping type, called a heterojunction.
Although heterojunctions have become increasingly important in semiconductor technology, in this module we will
only study homojunctions. For more info on heterojunctions, module: Advanced Electronic Devices.
pn diodes are fabricated via the implantation of doping atoms into a p-type or an n-type substrate, fig.1 (in VLSI59 p-
type Si substrates are preferred as they are cheaper) using compensation doping with the opposite carrier type. The
implantation dose must be sufficiently higher than the original carrier concentration available to compensate the original
doping and then invert it to the other carrier type. Contacts are defined on each side that do not interfere with the basic
operation of the device60.
implantation
metal

p p p
n n n n n
metal p n
Figure 1: Left: Schematic of the fabrication process of a pn diode. Right: the circuit symbol for a pn diode. Note that in
current VLSI all contacts are defined on the top isolated by layers of SiO2.

Although the processed pn diode is a 3D device, for simplicity we will simplify the structure of the pn diode to basically
a 1D device assuming homogeneous carrier transport in the cross section perpendicular to that 1D direction. This is
given in fig. 2.

p-Si n-Si

x
-Xp 0 Xn
Figure 2: simplified pn diode used in this module. x is the transport direction of carriers. Xn and Xp are the lengths of
the n and p material, respectively. The junction, indicated by the red dashed line at x = 0) is abrupt going from p-type
to n-type in a step function.

It is customary in pn diodes to express length in term of m, carrier densities in cm-3 and many other constants can be
found in m or cm. Therefore in any calculations uniformity of units amongst all parameters is of utmost importance.

3.2 The pn diode in equilibrium

3.2.1 Internal electric field
When bringing an n and a p type material together there is a large concentration gradient across the junction (x=0 cm in
fig. 2): in the n material there are many more electrons – majority carriers – than in the p-material where there are just a
few – minority carriers. Similarly for holes, there is a large concentration gradient across the junction.

59
Very large scale integration
60
The are traditionally called Ohmic contacts
38
Due to this massive concentration gradient, a diffusion of electrons from n to p and of holes from p to n will occur.
Since there is no bias applied, the net current for electrons and holes separately needs to be zero. Thus an internal
electric field needs to be built-up across the junction in order to cause a drift current of the same magnitude as the
diffusion current but in opposite direction.
𝑑𝑛 𝑑𝑝
𝐽𝑛 = 𝑒𝜇𝑛 𝑛 E+ 𝑒𝐷𝑛 = 0 & 𝐽𝑝 = 𝑒𝜇𝑝 𝑝E − 𝑒𝐷𝑝 = 0
𝑑𝑥 𝑑𝑥
Thus the electric field across the junction at equilibrium is:
𝐷 𝑑𝑛 𝐷 𝑑𝑝
E0 = 𝑛 =− 𝑝
𝜇𝑛 𝑛 𝑑𝑥 𝜇𝑝 𝑝 𝑑𝑥

The magnitude of the field, E0 is also determined by the alignment of the Fermi levels, EF. As long as the Fermi levels
are not aligned, diffusion is larger than drift as states at lower energy values are available to accept carriers at the other
side of the junction.
Based on the relationships discussed in the previous chapter in section 2.5, we know that electric fields, electrostatic
potentials and potential energies are all related. Thus the internal electric field E0 is associated to a voltage drop across
the junction, V0 that is called the contact electrostatic potential or built-in voltage. Since there is an electric field across
the junction the potential energy should change and thus there should be a slope in the energy band diagram across the
junction. The energy band diagram that results is given in fig. 3.
W0 E 0
Ecp p-Si n-Si
Ecp Ecn eV0
Ecn
EF Eg e-
Eg EF EF Ec
EF
Ec
Evp EF EF
Evp Evn Ev
Evn Ev
p-type n-type p-type n-type h+
Figure 3: The energy band diagram of a p and n-type semiconductor before contact (left) and after contact (middle).
Note: EF constant across unbiased junction. The internal electric field (right) causes a potential barrier with a potential
difference between n and p side equal to eV0. W0 is called the depletion region and is the region across which the build-
in voltage V0 drops. The right figure also demonstrates that diffusion and drift of carriers (see dynamics in the
powerpoint slides).

Since an internal electric field occurs across the junction, charges must be associated to this field (Poisson equation!).

dE ( x)
dx
(
=  ( x) = e − n( x) + p( x) + N D+ ( x) − N A− ( x) )
The electric field forces any electrons and holes in the region across which it occurs to move out of that region.
Therefore, this region is called the depletion region or space charge region (SCR). This in turn creates charge separation
in the depletion region, with fixed ionised acceptor atoms remaining in the p-type and fixed ionised donor atoms in the
n-region.
Thus in the depletion region when we neglect any free mobile carriers the Poisson equation becomes:
𝑑E
𝜀 = 𝑒𝑁𝐷 in the depletion region extending in the n-Si
𝑑𝑥
𝑑E
𝜀 = −𝑒𝑁𝐴 in the depletion region extending in the n-Si
𝑑𝑥
Outside the depletion region the layers are charge neutral, thus (x) = 0 C cm-3.
Thus diffusion of holes from the p-type region leaves the ionised acceptor doping atoms behind. These are negatively
charged since they lost a hole, but also they are fixed in the Si lattice and cannot move. This means that these fixed
ionised charges cannot carry current! Similarly, diffusion of electrons from the n-type region across the junction leaves
behind positively charged donor atoms which are fixed in the lattice. Thus we have fixed charges at opposite sides of
the junctions of opposite character. The internal electric field will point from the positively charged region to the
negatively charge region (and thus “uphill” in the energy band diagram). The larger the internal field the larger the
regions with fixed ionised charges and thus the wider the depletion width W0.

Thus at zero bias there is a steady flow of carriers due to diffusion and an opposite and equal amount of carriers flow
due to the internal electric field.
Particle flow Current
The current due to drift of hole diffusion
carriers under E-field hole drift
exactly cancels diffusion
current under zero bias. electron diffusion
electron drift
39
Figure 4: particle flow and current across a pn junction in equilibrium (V = 0V).

Deriving the built-in voltage V0 across a junction is easy when using the energy band diagram of the pn diode in fig. 3.
From the right diagram we find: eV0 = Ecp – Ecn. The built-in voltage is the difference between the position of the
conduction band in the p-type region and the conduction band in the n-type region. The position of the bands can be
derived from the doping concentration and the position of the Fermi level:
(𝐸 −𝐸 )
In n-type 𝑛𝑛 = 𝑁𝐶 𝑒𝑥𝑝 (− 𝐶𝑛 𝐹 ) but also 𝑛𝑛 = 𝑁𝐷
𝑘𝑇
(𝐸𝐶𝑝 −𝐸𝐹 ) 𝑛𝑖2
In p-type 𝑛𝑝0 = 𝑁𝐶 𝑒𝑥𝑝 (− ) and 𝑛𝑝0 =
𝑘𝑇 𝑁𝐴
Combining these gives the built-in voltage:
kT  nn  kT  N A N D 
V0 = ln = ln  (1)
e  n p 0  e  ni2 
With
Electrons are majority carriers in n-type material and at equilibrium: nn
Holes are minority carriers in n-type material and at equilibrium: pn0
A similar equation can be derived using the valence band:
eV0 = Evp – Evn
𝑘𝑇 𝑝𝑝 𝑁𝐴 𝑁𝐷
𝑉0 = 𝑙𝑛 ( ) = 𝑉𝑇 𝑙𝑛 ( ) (2)
𝑒 𝑝𝑛 0 𝑛𝑖2
Holes are majority carriers in p-type material and at equilibrium: pp
Electrons are minority carriers in p-type material and at equilibrium: np0

The potential barrier height across the junction is of the order of 1 V (see fig. 5) for Si and depends on the doping
density.
V0 (V)
0.9

0.7

N AND
10 10
10 15 ni2
Figure 5: The variation of the built-in voltage V0 as a function of doping density.

Calculate the built-in potential of a pn diode with ND=1020 cm-3 and NA=1020 cm-3. How does this solution compare to
the bandgap of Si? ni=1.45 1010 cm-3, kT/e = VT = 0.026V at room temperature and Eg(Si)=1.11eV. Sketch the energy
band diagram of this pn junction to help to explain your answer.

Note that another way of extracting the build-in voltage is through the workfunction difference.

3.2.2 Depletion region – for information only61

Before moving on to the analysis and derivation of the current, we first take a closer look at the depletion region. This
region gives the diode its capacitive character.

Figure 6: Depletion region with a width W0 builds up around the junction and depletes a part of the n-type and p-type
material leaving behind fixed ionised charges.

61
The concept of depletion region must be understood but the derivations of it width is only for information
40
W0 is the depletion width when no external bias is applied (fig. 6). The carrier gradient causes diffusion of mobile
carriers which leaves behind fixed ionised doping atoms that induce an internal electric field that causes drift. This
region is almost empty of mobile carriers and consists of a large density of fixed ionised doping atoms. In order to find
the width of the depletion region we need to solve the Poisson equation that relates the carrier concentrations to the
electric field across the junction.
dE(x) e
dx
( )
= p( x) − n( x) + N D+ ( x) − N A− ( x)

(3)

 is the permittivity of silicon, value 11.70. We notice that this equation is a function of the carrier concentrations and
the concentration of the ionised doping atoms. In this module we deal with abrupt junctions, this means that, if x = 0 is
the coordinate of the junction, then NA = 0 for x > 0 and ND = 0 for x < 0. Note that each region has homogeneous
doping. What we do not see so easily is the function of n(x) and p(x) across the junction. In order to get an insight in
this we draw the energy band diagram in fig. 6 identifying the intrinsic level.

Figure 6: The energy band diagram of a pn diode at equilibrium. Note that EF is constant whilst Ei (potential energy)
varies with x.

Making use of the intrinsic level Ei we can write the carrier concentrations as:
 E − Ei ( x) 
n( x) = ni exp F 
 kT  (4)
 E ( x ) − E F 
p( x) = ni exp i 
 kT 
Thus the mobile carrier concentrations are decreasing exponentially across the depletion region, as schematically
illustrated in fig. 7:

Figure 7: showing the fast variation of the free carriers through the depletion region.

It is clear that solving eq. (3) with the exponential function of (4) is not an easy feat. However, noticing that the free
carrier concentrations drop quickly (exponentially) to very small values within the depletion regions allows us to make
the approximation to set n(x) = p(x) = 0 within the depletion region. This is called the depletion approximation in which
it is assumed that the depletion region is completely free of mobile carriers. The error that is made by this
approximation is small.

Taking the following definition62: wn is the depletion width extending in the n-doped region, wp is the depletion width

62
The solution of the Poisson equation that is given below is not examinable. It is included for completeness. Fig. 8 on
page 42 however is very useful and you are encouraged to study that.
41
into the p-doped region (the total depletion width is the sum of the two), then we can rewrite the Poisson equation in
each region of the diode under the depletion approximation and abrupt junction. In the neutral regions the total charge is
zero: (x) = 0. In the depletion region of the p-type material: -wp < x < 0 it is only the ionised acceptor concentration
(x) = -eNA. In the n-type region, 0 < x < wn it is only the ionised donor concentration (x) = eND.
dE e +
dx 
( )
= N D when 0  x  wn

dE e
dx 
( )
= − N A− when - w p  x  0
(5)

dE
= 0 elsewhere
dx
In order to calculate the depletion width, the Poisson equation needs to be solved in each region of the device. The
solution in each region will depend on integration constants that have to be determined via the boundary conditions.
These are determined by physics:
- the electric field should be continuous across the homojunction
- the electrostatic potential should be continuous
- charge neutrality should be maintained

We will assume that the electric field in the neutral regions is sufficiently small to be negligible. This then gives the
solutions in the neutral regions:
E = 0 V/cm63 for x < -wp and x > wn.

In the depletion region the integration to obtain E(x) is (the boundary conditions at the neutral regions are taken up in
the integration boundary):
E(x)
𝐸(𝑥) 𝑥 −𝑒𝑁𝐴
∫0 𝑑𝐸(𝑥)E(x) = ∫−𝑤 𝑑𝑥 − 𝑤𝑝 < 𝑥 < 0
𝑝 𝜀
0 𝑤𝑛 𝑒𝑁𝐷
∫𝐸(𝑥)
E(x)
E(x)
𝑑𝐸(𝑥) = ∫𝑥 𝜀 𝑑𝑥 0 < 𝑥 < 𝑤𝑛

Giving:
−𝑒𝑁𝐴
E(x) = (𝑥 + 𝑤𝑝 ) − 𝑤𝑝 < 𝑥 < 0 (6a)
𝜀
𝑒𝑁𝐷
E(x) = (𝑥 − 𝑤𝑛 ) 0 < 𝑥 < 𝑤𝑛 (6b)
𝜀
e + e
Calculating E(x) in x=0 gives: E min = −
Emin N D wn = − N A− w p (6c)
 
Thus we find the larges amplitude of the electric field at the junction. For typical doping concentrations we find |Emin|
> 106 V.m-1 i.e. the absolute value of the electric field within a p-n junction is very large and will cause the diode to
breakdown when large reverse bias voltages are applied.
At x=0 the electric displacement D should be continuous (D =  E). This is always the case, however in a homojunction
this conditions is equal to a continuity of electric field. Thus in x=0 we write the continuity condition:
𝐷(𝑥 = 0)|−𝑤𝑝 <𝑥<0 = 𝐷(𝑥 = 0)|0<𝑥<𝑤𝑛
𝜀 E𝐸(𝑥 = 0)|−𝑤𝑝 <𝑥<0 = 𝜀 E𝐸(𝑥 = 0)|0<𝑥<𝑤𝑛
from (15a) and (15b) in x=0 we get:
𝑁𝐴 𝑥𝑝 = 𝑁𝐷 𝑥𝑛 (7)

This equation is simply a consequence of charge neutrality. The electrostatic potential is related to the electric field via:
−𝑑𝑉
E(x) =
𝑑𝑥
Thus eq. (15a&b) become:
𝑑𝑉 𝑒𝑁
= 𝐴 (𝑥 + 𝑤𝑝 ) − 𝑤𝑝 < 𝑥 < 0
𝑑𝑥 𝜀
𝑑𝑉 −𝑒𝑁𝐷
= (𝑥 − 𝑤𝑛 ) 0 < 𝑥 < 𝑤𝑛
𝑑𝑥 𝜀
Integrating each of them across the depletion width and realising that V(x) is a potential difference, thus we can ground
one node, e.g. the p-side node (V(-wp) = 0). Moreover, from the energy band diagram we see that in that case the total
built-in voltage needs to occur at wn, thus V(wn) = V0. The built-in voltage is also often denoted with Vbi.
𝑉(𝑥) 𝑥 𝑒𝑁𝐴
∫0 𝑑𝑉(𝑥) = ∫−𝑤 (𝑥 + 𝑤𝑝 )𝑑𝑥 − 𝑤𝑝 < 𝑥 < 0
𝑝 𝜀
𝑉𝑏𝑖 𝑤𝑛 −𝑒𝑁𝐷
∫𝑉(𝑥) 𝑑𝑉(𝑥) = ∫𝑥 𝜀 (𝑥 − 𝑤𝑛 )𝑑𝑥 0 < 𝑥 < 𝑤𝑛

63
When potential energy is implied then this will be made clear with using Ei or Ec, Ev
42
 𝑒𝑁𝐴 2
𝑉(𝑥) = (𝑥 + 𝑤𝑝 ) − 𝑤𝑝 < 𝑥 < 0 (8a)
2𝜀
𝑒𝑁𝐷
𝑉(𝑥) = 𝑉𝑏𝑖 − (𝑥 − 𝑤𝑛 )2 0 < 𝑥 < 𝑤𝑛 (8b)
2𝜀
Another way to look at the relation between electric field and electrostatic potential is:
𝑑𝑉
E(x) = −
𝑑𝑥
𝑤
-V0 = ∫−𝑤𝑛 E(x) dx
𝑝
Thus the negative built-in voltage is simply the area underneath the E(x), which is a triangle, thus can be easily
calculated as:
1E w 1e
V0 = − E max w depl = N D wn wdepl
2
max depl
2
wn N D = w p N A
wdepl = wn + w p
wdepl N A
wn =
N A + ND
1 e N AND
V0 = 2
wdepl
2  N A + ND
This gives the relation between the build-in voltage and the depletion width.
To find the depletion widths we set that V(x) must be continuous across x=0. Together with the other equations, this
allows the derivation of wp and wn. Rather than doing this derivation here, we will first look at the influence of an
applied external voltage.

Figure 8 gives the graphical solutions found from solving the Poisson equation across the pn junction.

Figure 8: (a): the pn junction with depletion region and neutral regions defined. (b): the total density of charges in each
region of the diode. The total density of charges in the neutral regions is zero as holes, electrons and ionised doping
atoms cancel each other out. (c) Charge density: In the depletion region we have assumed no free carriers, so only the
doping atoms are left. These are different at the p-side and the n-side. (d): the variation of the electric field. We have
assumed that the electric field is zero in the neutral regions. (e): the variation of the electrostatic potential. The
maximum potential at zero bias is the built-in voltage V0.

43
3.3 The pn diode under bias in the dark
In order to derive the analytical expression for the current in pn junctions we will make the following assumptions:
o No light impinges on the diode thus G = 0 s-1 cm-3
o There is no recombination, nor generation of carriers in the depletion region
o The ohmic contacts are ideal64
o The density of minority carriers is always smaller than the density of majority carriers
o The externally applied voltage drops completely across the depletion region

The derivation of the current in a pn diode goes in two steps: first we will look at carrier injection across the depletion
region. The energy band diagram is a great tool to visualise what is happening and will allow us to extract useful
equations for the concentration of the carriers at the edges of the depletion region. In the second step, we will look how
the injected carriers flow to the contacts. We will see that the maximum diffusion current that can flow in each region of
the pn diode separately determines the total diode current.

3.3.1 Forward bias

The assumption that there is no voltage drop outside the depletion region is based on circuit analysis methods. You
know that in a series connection of 3 resistors with the middle one have a much larger resistance than the other two, that
the voltage applied across the series connection will mainly drop across the higher resistance. Similarly in pn diodes the
p and n regions are full of mobile carriers and therefore their resistance is small whilst there are no mobile carriers in
the depletion region making its resistance is much bigger. This leads us to accept that the externally applied voltage will
mainly drop across the depletion region.
V p-Si n-Si
ext

n'p nn
p n np0
Ec
EF EF
E0
Eext E
p'n pn0 v
E0- Eext pp
Figure 9: pn diode in forward bias. (left a) E0 is the internal electric field, Eext is the external electric field and the
vector sum of the two is the remaining electric field across the depletion region of the pn diode. (right b) the energy
band diagram with the carriers at either side of the junction that can diffuse across the junction.

In forward bias the externally imposed electric field is opposite to the internal electric field and thus decreases the net
electric field across the depletion region (see fig. 9a). A reduced total electric field, E will reduce the change in the
electrostatic potential, Vtot across the depletion region and thus lowers the potential energy barrier across the junction.
Therefore, more electrons will have an energy higher than the barrier and diffuse from n to p and more holes will be
able to overcome the barrier and diffuse from p to n (see fig. 9b). Remember that the internal electric field was built up
under zero bias in order to compensate for the diffusion of carriers from high to low concentration (so electrons from n
to p and holes from p to n). Now an external bias has been applied that lowers the total field across the junction, this
means that the resulting electric field is not sufficiently large any more to compensate the diffusion of electrons and
holes.
Another way to see is to refer back to fig. 22 in Chapter 2: the carriers that first participate in the current flow are those
in the top of the Fermi-tail. We can expect an exponential increase of the current due to the exponential increase in
density of carriers with sufficient energy to cross the potential barrier when this barrier is lowering with the applied
voltage.

In fig. 10 we see that the potential barrier is reduced to a value e(V0 - |Vext|). Since there is a smaller electric field across
the depletion region there is less ionised charge separation needed to maintain this field, thus the depletion region is
shrinking. Also note that due to the external bias, the Fermi levels are separated. The Fermi level in p-Si has lowered
with a value = e |Vext| compared to the Fermi level in the n-Si region. Thus a positive voltage lowers the PE, thus
reducing the EF of p with respect to n. Note that we can assign the ground node to the n-Si terminal and thus +V to the
p-Si terminal. This will shift the p-Si band diagram with the whole value of the applied voltage.

64
Due infinite generation/recombination at the contact, the equilibrium carrier concentration is maintained. In addition
we assume that no voltage drops across the semiconductor-contact regions. Thus no band bending due to the contacts is
taken into account for the derivation of the currents in diodes.
44
 V

depletion regions

-- ++
p-type ++ n-type
--
neutral region -- ++ neutral region
-- ++
-- ++

Wp Wn fixed donor ions

fixed acceptor ions

Ec free electrons

e (V0 - |V|)

eV
EF
Ev
+
+
+

free holes
Figure 10: pn junction under forward bias and the change in the energy band diagram and in depletion region width.

In conclusion, in forward bias diffusion of carriers across the potential barrier is larger than drift of carriers due to the
electric field. Thus we have a net increase of minority carriers at the depletion region edges. Let’s call the new minority
carrier concentration at the edges of the depletion region: p’n the hole concentration in the n-type region at x=wn (zero a
is at the junction) and n’p the electron concentration in the p-type region at x=-wp. p’n > pn = ni2/ND and n’p > np =
ni2/NA. Thus we have an excess of minority carriers at the depletion region edges compared to the equilibrium
concentrations.

3.3.2 Reverse bias

Vext p-Si n-Si

n'p
p n Ec e- nn

EF Ec
E0 Ev EF
Eext pp Ev
h+
E0+Eext p'n
Figure 11: pn diode in reverse bias. (left a) E0 is the internal electric field, Eext is the external electric field and the
vector sum of the two is the remaining electric field across the depletion region of the pn diode. (right b) the energy
band diagram with the carriers at either side of the junction. No carriers are availael that can diffuse across the
junction.

The reverse bias adds to the built-in voltage, increasing the potential barriers, therefore there are no carriers with
sufficient energy to travel across the barrier. However, there will be a leakage current due to the very small amount of
minority carriers available in the p-type region that can drift to the n-type region and vice versa. Thus the reverse bias
current will be determined by the amount of minority carriers available close to the depletion region edges. This
concentration is determined by generation in the neutral regions and under normal circumstances (room temperature and
no light shining on the junction) is very small. The drift of electrons from the p-region to the n-region is creating a deficit
of minority carrier electrons at the depletion region edge (x=-wp). The drift of hole from the n-region to the p-region is
creating a deficit of minority carrier holes at the depletion region edge (x=wn).

In fig. 12 we notice that the potential barrier has increased to a value e(V0 + |Vext|). Since the field is larger across the
depletion region we need more charge separation to maintain it (Poisson equation). Thus more ionised charges are
needed making the depletion width wider.

45
 V

--- ++ +
p-type n-type
--- ++ +
neutral region --- ++ + neutral region
--- ++ +
--- ++ +

Wp Wn

Ec
free electrons

e (V0 + |V|)

EF
Ev eV
+
+
+

free holes

Figure 12: pn junction under reverse bias and the change in the energy band diagram and the depletion region.

In conclusion, in reverrse bias diffusion of carriers across the potential barrier is inhibited. There only remains drift of
minority carriers across the junction due to the electric field. Thus we have a net decrease of minority carriers at the
depletion region edges. Let’s call the new minority carrier concentration at the edges of the depletion region: p’ n the
hole concentration in the n-type region at x=wn (zero a is at the junction) and n’p the electron concentration in the p-type
region at x=-wp. p’n < pn = ni2/ND and n’p < np = ni2/NA. Thus we have an excess of minority carriers at the depletion
region edges compared to the equilibrium concentrations.

3.3.3 The minority carrier concentration at the depletion region edges

The energy band diagrams give a good visual tool to derive the minority carrier concentrations at the depletion region
edges. The energy band diagram at equilibrium and under forward bias is given in fig.13. together with the majority and
minority carrier concentrations at the depletion region edges and the expression of the potential barrier.

Figure 13: Left, unbiased pn diode. Right, pn diode under forward bias. Note the reduction in potential barrier.

When looking at the energy band diagram given in fig. 13, we can derive the minority carrier concentration that is due to
charge injection across the junction in the same way as we have derived the build-in voltage in equilibrium.

First take equation (1) for zero bias (equilibrium condition, no external voltage supplied and T constant):
kT  nn   eV 
V0 = ln → n p 0 = nn exp − 0 
e  n p 0   kT 
with np0 the equilibrium minority carrier concentration in p-type bulk. This equation relates the minority carrier
concentration at one side of the junction to the majority carrier concentration at the other side, via the potential barrier (e
V0).
Now the barrier has decreased to e(V0-V). We can assume that the relationship between the majority nn and minority n'p
concentration at each side of the depletion region edge still follows the same approach as that used for eq. (1). We
assume that the majority carrier concentration nn remains constant throughout the whole system. Indeed this breaks
charge neutrality but as long as n'p is much smaller than the majority carrier concentration in that region the error we
make is small and we gain the possibility of deriving analytical equations65. Using the same approach as for equilibrium,
we can write the associated injected minority carrier concentration under bias as:

65
The assumption of low carrier injection across the junction breaks down for high levels of injection as those occurring
in power devices and thus this approximation can no longer be made.
46
  e(V − V ) 
n' p = nn exp − 0  (9)
 kT 
with the reduced potential barrier. Combining equation (1) and (9) gives:
 e(V − V ) 
n' p = nn exp − 0 
 kT 
 eV 
n p 0 = nn exp − 0 
 kT 
and eliminating nn, gives the carrier concentrations at the depletion region edges:
 eV 
n' p = n p0 exp 
 kT  (10)
 eV 
p'n = pn0 exp 
 kT 
For the holes a similar derivation can be used.

Since V > 0 V for forward bias, the minority carrier concentration at the depletion region edge is larger than the
equilibrium concentration that we find back at the contact. For reverse bias V < 0 V thus the minority carrier
concentration at the depletion region edges are smaller than the equilibrium concentration. We now see that there will be
a process of diffusion of minority carriers in the quasi charge neutral regions (QNRs) – the p and n region outside the
depletion region.

3.3.4 Currents in the charge neutral regions

In the previous section, we have derived what happens across the depletion region. The steady state injection process66
across the depletion region creates and excess or deficit in minority carriers at the depletion region edges. Since the
contacts keep the equilibrium charge concentration constant, the minority carrier concentration has a gradient from the
depletion region edge to the contacts and thus diffusion of minority carriers must occur.
In order to calculate currents we need to solve the drift-diffusion equations derived in Chapter 2 in both the n and p
region of the pn diode. We use current densities in the equations that are the currents normalised to the cross sectional
through which the carriers are flowing. Note that the total current that flows in each region is the sum of the electron
and hole currents (see the picture next to the eqs.).
dn( x)
J n ( x) = e n n( x) E x) + eDn
E((x) Jtot Jtot = Jn+ Jp Jtot = Jn+ Jp Jtot
dx p-Si n-Si
dp( x)
J p ( x) = e p p ( x) EE(x)
( x) − eD p -Xp 0 Xn
x
dx
These equations state that both drift and diffusion of both carriers types will occur in each layer of the diode. However,
with the information currently available we can only derive the minority carrier diffusion currents in the QNRs as
knowledge of the electric field in these regions is not available – we only know it is negligibly small. In addition, we
made the assumption that the majority carrier density is constant, breaking the law of charge neutrality. We have argued
we can get away with this approach under low carrier injection. For instance, under low injection conditions VA << 0.7
Vin Si, the injected minority carrier concentration is of the order of 10 6 cm-3, compared to 103 cm-3 in equilibrium. This
is a difference in 3 orders of magnitude. On the other hand, the doping is ~10 17 cm-3 thus the majority carrier
concentration is ~1017 cm-3. For charge neutrality at the depletion region edge we would need to add ~10 6 cm-3 to ~1017
cm-3. It is obvious that this still gives ~1017 cm-3 majority carriers. In the calculations we will, in first instance, ignore
the gradient in majority carriers. Later on we will correct the interpretation of current flow of electrons and holes in
each region neglecting the assumptions where convenient.
Thus of the total current that can flow through the pn diode we have enough information to derive the diffusion current
density of minority carriers in each region:
𝑑𝑛 J J
𝐽𝑛 = 𝑒𝐷𝑛 in the p-type region J
tot
n J p
tot
𝑑𝑥 p-Si n-Si
𝑑𝑝
𝐽𝑝 = −𝑒𝐷𝑝 in the n-type region x
𝑑𝑥 -Xp 0 Xn

We can already state with great confidence that we can ignore the drift currents associated to the minority carriers as
their concentration is much smaller than the majority carrier concentration and the electric field in the QNRs is also
extremely small. If drift is important in these derivations, it will be drift of majority carriers. We will deal with this after
we have derived the main current contribution from minority carriers.

We will derive the currents in the pn diode under the assumption that the material layers are short: Xp < Ln and Xn < Lp,

66
Steady state because we apply a DC voltage
47
where Xp is the position of the contact of the p-layer and Xn is the position of the contact in the n-layer67. In that case
recombination can be neglected and the variation of the minority carriers is linear. The expression for np(x) and pn(x) are
given by the continuity equations in Chapter 2. These can be written in terms of excess carrier concentrations:
np(x) = np(x) – ni2/NA minority carrier electrons in p-Si
pn(x) = pn(x) – ni2/ND minority carrier holes in n-Si
 2pn ( x)
=0
x 2 thus pn ( x) = Ax + B (11, 12)
 2n p ( x) n p ( x) = Cx + D
=0
x 2
The integration constants are determined by (see fig. 23):
pn ( x = 0) = p'n − pn0
pn ( x = L p ) = 0
n p ( x = 0) = n' p −n p0

n p ( x = − Ln ) = 0
x=0 is the edge of the respective depletion regions. Note that at the contacts, the excess carrier concentration is zero. The
linear variation of the minority carrier concentration is only valid when no recombination of minority carriers occurs
whilst they diffuse through the neutral regions. The maximum lengths of the neutral regions for which this
approximation is valid are the minority carrier diffusion lengths Ln and Lp. The physical interpretation of these lengths
are that they give the average distance an electron can travel in the p-type region without recombining (Ln) and a hole
can travel in the n-type region without recombining (Lp). The general expression for the diffusion length is given by:
L = D
with D the diffusion constant and  the average lifetime (is the average time before recombination occurs).
In figure 22 the variation of the minority carrier concentration as a function of distance in both regions of the short pn
junction under forward bias is given.

LLnp n'
p p'n Lpn
L n p = minority electron concentration in
p-type contact at zero bias
np p p = minority hole concentration in
n n
n-type contact at zero bias
p-type depletion n-type
layer
Figure 22: Linear variation of the minority carrier concentration as a function of distance of a short pn diode under
forward bias. Note that the lengths of the neutral regions are chosen to be the diffusion length of the minority carriers.
Any length larger than this diffusion length makes the short diode approximation invalid.

The current through a device is given by the drift-diffusion equation.

As argued before, the maximum electron and hole current that can flow within the pn diode is the minority carrier
diffusion current. Thus the diffusion of minority carriers limits to total flow of carriers that can occur in the pn diode. It
is therefore a good approximation to derive the currents in a pn diode from diffusion of minority carriers only. Due to
current continuity throughout the whole structure we can say that the total electron current is due to the diffusion of
electrons in the p-doped region and the total hole current is due to the diffusion of the holes in the n-type region. The
total current through the diode is the sum of the hole and the electron current.
Thus the current density in a pn diode can be found by solving:
dn( x)
J ntot = eDn
dx
dp( x)
J ptot = −eD p
dx
for the minority carriers only.
The hole diffusion current is by definition given by the gradient of the holes in the n-type region:

67
Ln and Lp are the diffusion lengths of the minority carrier electrons and holes, respectively. This is the average length
a carrier moves before recombining. The average time between recombination events, called the lifetime of the carrier,
is equal to the time the carrier can travel before recombining. This is equivalent to the distance the carrier can travel
before recombining.
48
 dp dp
I p = −eADh note  0 but holes diffuse in + x direction
dx dx

I p = eADh
(p '
n − pn )
Lp
The electron diffusion current is given by the gradient of the electrons in the p-type region:
dn dn
I n = eADn note  0 but electrons diffuse in - x direction
dx dx

I n = eADn
(n '
p − np )
Ln
Thus the total current-voltage equation is found:
I tot = I p + I n
 eV 
I tot = I 0  e kT − 1 (13)
 
 D p pn Dn n p 
I 0 = eA +  reverse saturation (leakage) current
 Lp Ln 
 
The forward bias current is exponentially dependent on the applied voltage and the reverse leakage current, I0 is indeed
defined by the available minority carriers in the bulk.
Figure 23 gives an insight in the minority and majority carrier currents flowing in the diode.
current
Depletion region

p+-region n-region

Itot

Ip

In

junction contact
contact
Minority carrier diffusion currents
Remains constant in
space charge region.
Majority carrier drift currents
Figure 23: The contribution of the minority and majority carrier current to the total current through the pn junction.
Majority carriers injected across the junction are re-supplied via drift through the contact and diffuse to the other
contact through the minority carrier gradient region. The minority carrier gradients determine the total current
completely. The current remains constant in the space charge region because there is no recombination no generation
of carriers (assumption).

3.3.5 Depletion region of a diode under bias68

We have seen that at zero bias a depletion layer width consistent with the magnitude of the internal electric field is
created. When a voltage is applied externally, the external field will be superimposed on the internal field. The
assumption we make here is that we neglect that any of the externally applied voltage will drop across the neutral
regions (this are the n and p-region where no depletion occurs). We also neglect that any voltage that is dropped across
the Ohmic contacts that must exist at the edges of the neutral regions. In many cases it is acceptable to just add series
resistances to the ideal Ohmic contact to give a more realistic picture. In what follows we will assume that the contacts
are ideal and that the externally applied voltage will drop solely across the depletion region – the resistance of the
depletion region is many times higher (no free carriers) than the resistance of the charge quasi neutral regions (plenty of
free carriers).

68
the derivation of equations is for information only. The fact that the depletion region changes with electric field must
be known (this is a direct consequence of the Poisson equation).
49
We can expect that when the externally applied electric field is opposite to the internal electric field then the depletion
width will decrease as the total field across the junction will have reduced – this is the case in forward bias. In contrast,
when the external electric field adds to the internal electric field, the total electric field across the junction will increase
and thus the depletion width that supports this electric field will increase. This is schematically given in fig. 20.

Wo

a)
p-type n-type

b)
p-type n-type

W<Wo

c)
p-type n-type

W>Wo

Figure 20: The depletion layer width, W, at (a) zero bias (b) forward bias, and (c) reverse bias

How do our previous calculations change when a voltage VA is applied across the pn diode then eq. (8b) changes to take
the change in the potential barrier into account:
𝑒𝑁
𝑉(𝑥) = (𝑉0 − 𝑉𝐴 ) − 𝐷 (𝑥 − 𝑤𝑛 )2 0 < 𝑥 < 𝑤𝑛 (17)
2𝜀𝑛
If there are no dipoles at the junctions then V(x) is continuous at x=0. This gives us:
2 2
𝑒𝑁𝐴 𝑤𝑝
𝑒𝑁𝐷 𝑤𝑛
𝑉0 − 𝑉𝐴 − = (18)
2𝜀 2𝜀
We now have two equations: from which we can derive the expressions of wn and wp.
1⁄
2𝜀𝑛 𝜀𝑝 𝑁𝐷 (𝑉0 −𝑉𝐴 ) 2
𝑤𝑝 = [ ] (19a)
𝑒𝑁𝐴 (𝑁𝐴 𝜀𝑝 +𝑁𝐷 𝜀𝑛 )
1⁄
2𝜀𝑛 𝜀𝑝 𝑁𝐴 (𝑉0 −𝑉𝐴 ) 2
𝑤𝑛 = [ ] (19b)
𝑒𝑁𝐷 (𝑁𝐴 𝜀𝑝 +𝑁𝐷 𝜀𝑛 )

The total depletion width is the sum of (19 a&b).

3.4 Small signal equivalent circuit of a pn diode69

Small signal equivalent circuits of devices with non-linear characteristics are important for analogue electronics. These
equivalent circuits linearise the operation of the devices around their biasing point for easy circuit analysis. This
linearization can of course only be applied when the voltage variations applied are small. pn diodes are devices with a
non-linear current-voltage characteristic. To estimate their influence in circuits and systems where small AC signal are
applied, the diode response needs to be linearised. This can be done by proposing an equivalent circuit for the diode:
each little segment of the nonlinear curve for very small voltage variations looks linear.
. In fig. 25 a cross-sectional view of a diode is given:
contact depletion region contact

n-Si p-Si

Figure 25: a cross sectional view of the pn diode consisting of two ohmic contacts, two doped semiconductor regions
with opposite doping and a depletion region with a voltage dependent width.

The influence of the contacts and the doped semiconductor regions can be represented via a series resistance.
The slope of the exponential current-voltage characteristic is dependent on the chosen biasing condition. This slope is
given by:
dI
gd =
dV

69
See the module ADC
50
Introducing the diode current expression, gives:
  eV  
dI 0  exp  − 1
  kT   eI
gd =  for sufficiently large forward bias
dV kT

The depletion width (without mobile charges) is sandwiched between two doped semiconductor regions and thus
behaves as a parallel plate capacitance. Moreover, the depletion width will change quite dramatically in reverse bias as a
function of applied voltage. As a consequence this will be represented in the equivalent circuit via a capacitor given by:
 0 Si
Cj = A
W (V )
With W(V) the depletion width as a function of applied voltage and A the cross sectional area of the diode (see figure
below).

|V1|
|V2|>|V1|
Depletion region
Wdepl

2e 0e r æ N A + ND ö
Wdepl (V ) = wn + w p = çç ÷÷(V0 - V )
e è N AND ø

The depletion capacitance will be important in reverse bias, whilst the conductance is important in forward bias.
The small signal equivalent circuit:

Rs

r d = 1/gd C

Figure 26: small signal equivalent circuit of the pn-diode.

3.5 The pn diode as solar cell70

Resources (these contain a lot more information than what we cover in this introduction):
https://www.pveducation.org/pvcdrom/pn-junctions/diffusion
https://ocw.mit.edu/courses/mechanical-engineering/2-627-fundamentals-of-photovoltaics-fall-2013/index.htm

3.5.1 pn diode in the dark and illuminated

We have seen that the current-voltage characteristic for the pn diode in the dark is given by:
𝑉
( )
𝐼𝑡𝑜𝑡 = 𝐼𝑠 (𝑒 𝑉𝑇 − 1) (1)
with V the externally applied voltage, VT the thermal voltage kT/e (=0.026 V at 300K) and Is the reverse leakage current
given by:
𝑛𝑝0 𝐷𝑛 𝑝𝑛0 𝐷𝑝
𝐼𝑠 = 𝑒𝐴 ( + ) (2)
𝐿𝑛 𝐿𝑝
with e the unit charge: 1.6 10-19 C, A the cross-sectional area through which the current flows, np0 (pn0) are the
equilibrium minority carrier concentrations for electrons in the p region (holes in the n region), Dn (Dp) are the minority
carrier diffusion constants for the electron (hole) and Ln (Lp) are the minority carrier diffusion length for electrons
(holes).
Some relations that govern these material parameters:
𝑛𝑖2 𝑛𝑖2
The equilibrium minority carrier concentrations: 𝑛𝑝0 = & 𝑝𝑛0 = . These values are small, making Is small.
𝑁𝐴 𝑁𝐷

70
Calculations are for information only. Important is to understand the operation principles based on physics insight.
51
 𝐷𝑛 𝐷𝑝
The Einstein equation: = 𝑉𝑇 & = 𝑉𝑇
𝜇𝑛 𝜇𝑝

The diffusion length: 𝐿𝑛 = √𝐷𝑛 𝜏𝑛 & 𝐿𝑝 = √𝐷𝑝 𝜏𝑝 with  the average lifetime of the minority carrier.
The diffusion length L of the minority carrier is the average length this carrier can travel before recombining with a
majority carrier. The average time it takes for a minority carrier to travel before it recombines is the carrier lifetime .
This parameter is very important for solar cells. Materials must be designed such that this length is maximised.

Remember that the diode current is determined by sum of the maximum minority carrier diffusion currents (these
minority carrier limit the maximum carrier flux that can occur in each layer – electron diffusion in the p region and hole
diffusion in the n region). The diffusion currents are a function of the minority carrier gradients. The variation of the
minority carriers was extracted from the continuity equations (see Chapter 2 eq. (21)). Under steady state (constant
voltage, constant illumination, thus no time variation in the sources) these equations can be written as 71:
𝑑 2 𝛿𝑛𝑝 (𝑥)
𝐷𝑛 + 𝐺𝐿 − 𝑅𝑛 = 0
𝑑𝑥 2
𝑑 2 𝛿𝑝𝑛 (𝑥)
𝐷𝑝 + 𝐺𝐿 − 𝑅𝑝 = 0 (3)
𝑑𝑥 2
The term GL is the generation rate of electron-hole pairs due to illumination and GL = 0 cm-3 s-1 in the dark. To first
approximation, the recombination rate Rn, Rp is directly proportional to the excess (or deficit) carrier concentration.
𝛿𝑛𝑝 (𝑥)
𝑅𝑛 =
𝜏𝑛
𝛿𝑝𝑛 (𝑥)
𝑅𝑝 =
𝜏𝑝
Thus, for the diode in the dark the continuity equation becomes:
𝑑 2 𝛿𝑛𝑝 (𝑥) 𝛿𝑛𝑝 (𝑥)
𝐷𝑛 − =0
𝑑𝑥 2 𝜏𝑛
𝑑 2 𝛿𝑝𝑛 (𝑥) 𝛿𝑝𝑛(𝑥)
𝐷𝑝 − =0
𝑑𝑥 2 𝜏𝑝
𝛿𝑛𝑝 (𝑥) 𝛿𝑝𝑛 (𝑥)
Note that >0& > 0 in forward bias indicating recombination of minority carriers as there is an excess. In
𝜏𝑛 𝜏𝑝
𝛿𝑛𝑝 (𝑥) 𝛿𝑝𝑛 (𝑥)
reverse bias <0& < 0 indicating that minority carriers must be generated as there is a deficit.
𝜏𝑛 𝜏𝑝
The main difference between the diode under dark and light conditions is thus the non-zero illumination related
generation rate: GL. Under certain conditions, related to the diffusion length, this generation of additional electron-hole
pairs will increase the reverse bias current (cfr. the generation of electron-hole pairs within a diffusion length of the
edges of the depletion region is equivalent to making more minority carriers available near the junction that are caught
by the electric field and drift across the depletion region → increasing the drift current across the junction).
Without further derivation one can see that the current under illumination can be written as:
𝑉
( )
𝐼𝑡𝑜𝑡 = 𝐼𝑠 (𝑒 𝑉𝑇 − 1) − 𝐼𝐿 (4)

with 𝐼𝐿 = 𝑒𝐴𝐺𝐿 (𝐿𝑝 + 𝐿𝑛 )72 (5)

The current-voltage characteristic of the illuminated pn diode is given in fig. 1.
dark
I (A)

illuminated

Is
V (V)

Is -IL

Figure 1: the pn diode current-voltage characteristic in the dark (blue) and under illumination (red). The dark
characteristic has shifted downwards under illumination.

71
To note is that in the extraction of the currents in pn diodes we neglected generation and recombination effects to
simplify the calculations. For solar cells this is no longer allowed as both processes are the main reason of why a solar
cell generates a current under illumination and load.
72
The simplification made here is to assume GL is constant as a function of x. This is not correct as GL is in fact an
exponentially decreasing function in x (depth of the PV cell = transport direction) because absorption of light is
exponentially decreasing with depth of the material. Assuming GL constant allows this easy expression but gives an
overestimation of the generated current as a function of illumination.
52
 3.5.2 Some insight into the physical processes
The purpose of this section is to give some insight into the processes happening in the diode under illuminations without
going into too much detail73.
Referring to fig. 2, light of different wavelengths fall onto the surface of the pn diode. Since
the index of refraction of Si is different from air, part of the light will be reflected at the
surface. For solar cells, tremendous research effort on anti-reflection coatings is spent on the
reduction of this reflection. In addition, contact areas (yellow blocks) need to be minimised as
n light cannot penetrate the metal and is lost in the current generation process. The light that is
not reflected at the surface is transmitted through the material and dependent on wavelength,
will be absorbed at different depths in the pn diode. For short wavelengths, the absorption
will happen in the top layer, whilst absorption for longer wavelength waves will happen
deeper in the pn diode (in the substrate). The absorbed light does not necessarily generate free
p electron-hole pairs, the energy of the light must be larger than the bandgap EG to allow
sufficient covalent bonds to break. The light that is absorbed without breaking covalent bonds
is transferred into heat. This energy is lost for current generation however it will change the
Figure 2: schematic material parameters of the pn diode because the temperature is increasing.
of light reflection and The energy of light (photons – particles of light) was proposed by Planck and is given by74:
absorption in a pn ℎ×𝑐
diode. 𝐸 =ℎ×𝑓 =
𝜆
Thus, short wavelengths → high energy and long wavelength → low energy. For the long
wavelength photons with energy E < EG, the absorbed photons will heat the lattice (lattice vibrations) but not generate
electron-hole pairs. Once E ≥ EG75 then electrons will “jump” from the valence band into the conduction band. The
electrons are free and leave free holes behind in the valence band. For long wavelengths, the energy of the photons is
much larger than the band gap. These photons will make the electrons freed from the covalent bond jump higher into the
conduction band or free up holes deeper down in the valence band. These electrons and holes might have energies at
energy levels in the bands higher than lower-lying empty levels (states). If that is the case, these high-energy electrons
and holes will thermalize. This means that they will release energy and fall back into a lower energy state in the band and
by doing so will release their extra energy as heat in the lattice (increased lattice vibrations that can also be described as
particles called phonons).

EC EF EV Thus, if light absorption happens and if the photon energy is such that
electron-hole pairs are generated, what else is needed to generate
n
+ currents? It is easy to understand that due to the opposite charge sign of
E electrons and holes they might wish to stick together (called an exciton)
- due to Coulomb forces. Also, whilst they are travelling, we know that
after an average time , lifetime, they will recombine. Thus, something is
p needed to pull the electron-hole pair apart. Remember that across the
depletion region of a pn diode is an electric field, also in its unbiased
condition. Thus, if the electron-hole pair comes sufficiently close to the
Figure 3: left: the material cross section edge of the depletion region then the electric field will split the pair and
with electrons (red circles) and holes dependent on charge sign and orientation of the electric field one of the
(empty circles) generated by light two carriers will drift across the junction. How close to the junction is
absorption in the pn diode. Right: the close enough? We know that if the carrier is within a diffusion length of
energy band diagram. Those minority the depletion edge then there is a good chance (50% in 1D) that it will
carrier electrons in the p region (orange) diffuse in the direction of the depletion region edge, cross the whole
that diffuse close to the depletion region distance without recombining and then drift across the junction due to
edge “see” the electric field and will “roll the electric field (cfr. the explanation of the diffusion process section
down the potential hill”. The minority 2.3.2). Thus, now we have found the final condition for current
carrier holes in the n-region (green) that generation: the electron-hole pairs must be created within approximately
diffuse close to the depletion region edge a minority carrier diffusion length of the depletion region edge to be
will “see” the electric field and will “roll caught by the electric field. Then the minority carriers are dragged across
up the potential hill”. the depletion region by the electric field. This is illustrated in fig. 3.

73
Check the online resource information if you would like more detail on solar cells. This is not required to achieve the
learning outcomes of this module and is for interest only.
74
In physics the frequency is often denoted by the Greek letter . In engineering f is used to denote frequency. h is
Planck’s constant.
75
The process of electron-hole pair generation is more complex than this picture due to the complex 3D energy band
structure of different materials. For some materials momentum changes in wave vector space must also happen. This
topic is for later in the degree e.g. in optical communications.
53
This current, IL is opposite to the forward bias current. Remember that in forward bias the current is due to diffusion of
majority carriers across the junction. Under illumination what happens is drift of extra (those generated within a
diffusion length) minority carriers across the junction. Thus, the illumination-generated current is –IL. This has a large
impact on the current for Vext < Voc (see fig. 4) as the diode current is small. IL also approximately determines the current
that will flow in reverse bias Is << IL. In forward bias, at V > Voc, the amplitude of the current does not change much as it
is governed by the normal majority carrier injection across the junction of a pn diode.

IPV (A)
I (A) Isc

II

V (V) V (V)
I II Voc Voc

Is -Isc

Figure 4: left: the diode current-voltage characteristic under illumination. I is the region in which the diode is used as
light detector, II is the region where the diode is used as solar cell. Right: The IV flipped across it voltage axes
representing the operation of the diode as a solar cell. I PV = solar cell current, IL is the short circuit current and Voc the
open circuit voltage. The hashed areas are irrelevant for solar cell operation.

In fig. 4 (left), region I is the region where the pn diode can be used as a light sensor (detector). The reverse bias current
will increase with increasing intensity of illumination and thus the current density is a measure of the intensity of the
light falling onto the pn diode. Thus, this is the detector mode.
In fig. 4 (left), region II is the region where the pn diode operates as a solar cell (PV cell = PhotoVoltaic cell).
Illumination onto the pn diode generates current under load (under load means that a resistor – or something that
represents a resistance/impedance – is placed in series in the circuit to close the circuit and allows a current to flow). This
operation region is normally given as in fig. 4 (right), where the IV characteristic of fig. 4 (left) is flipped along the
voltage axis and the current is defined as IPV:
𝑉
( )
𝐼𝑃𝑉 = 𝐼𝐿 − 𝐼𝑠 (𝑒 𝑉𝑇 − 1) (6)

3.5.3 Analysing the performance of the PV cell

In fig. 4 (right) two operation parameters occur that are of relevance for the power generated by the solar cell. They are
the short circuit current, Isc and the open circuit voltage, Voc. Isc is the current that flows when the load resistance is
replaced by a metal wire (considered to have no or negligible resistance). In that case the voltage drop across the diode is
zero: V = 0 V in eq. (6).
0
( )
𝐼𝑠𝑐 = 𝐼𝐿 − 𝐼𝑠 (𝑒 𝑉𝑇 − 1) = 𝐼𝐿 + 𝐼𝑠 ≈ 𝐼𝐿 (7)
The open circuit voltage occurs when the load resistance is taken out of the circuit and no connection is made across the
diode, thus IPV = 0 A as no current can flow in an open circuit.
𝑉
( 𝑜𝑐 )
𝐼𝑃𝑉 = 𝐼𝐿 − 𝐼𝑠 (𝑒 𝑉𝑇 − 1) = 0
𝑉
( 𝑜𝑐 )
0 = 𝐼𝐿 − 𝐼𝑠 (𝑒 𝑉𝑇 − 1)
𝑉 𝑉
( 𝑜𝑐 ) ( 𝑜𝑐 ) 𝐼𝐿 𝐼
𝐼𝑠 (𝑒 𝑉𝑇 − 1) = 𝐼𝐿 → 𝑒 𝑉𝑇 = + 1 → 𝑉𝑜𝑐 = 𝑉𝑇 𝑙𝑛 ( 𝐿 + 1 )
𝐼𝑠 𝐼𝑠
𝐼𝐿+𝐼𝑠
𝑉𝑜𝑐 = 𝑉𝑇 𝑙𝑛 ( ) (8)
𝐼𝑠
We are interested in the power generated by the solar cell:
𝑉
( )
𝑃 = 𝐼𝑃𝑉 × 𝑉 = (𝐼𝐿 − 𝐼𝑠 (𝑒 𝑉𝑇 − 1)) × 𝑉 (9)

The power output is illustrated in fig. 5.

54
 I (A)
current

Im

er
pow

V (V)
Vm
Figure 5: current and power (I×V) in a PV cell. The maximum power point (MPP) is where P = P m at I =Im and V = Vm.

For maximum power P we solve eq. (9) mathematically. This means that the first derivative of the power, eq. (9) to the
voltage needs to be equal to zero:
𝑑𝑃
𝑃𝑚𝑎𝑥 → = 0
𝑑𝑉
𝑉
( )
𝑑(𝐼𝐿−𝐼𝑠 (𝑒 𝑉𝑇 −1))×𝑉
𝑑𝑃
= = 0 → 𝑉𝑚
𝑑𝑉 𝑑𝑉
The voltage at which the maximum power can be obtained, Vm is then given by the solution of:
𝑉 𝑉 𝐼
(1 + 𝑚 ) 𝑒𝑥𝑝 ( 𝑚 ) = 1 + 𝐿
𝑉𝑇 𝑉𝑇 𝐼𝑠
The current at this voltage Vm is:
𝑉
𝐼𝑚 = (𝐼𝑠 + 𝐼𝐿 ) [ 𝑚 ]
𝑉𝑚 +𝑉𝑇
The maximum power is then given by:
𝑉
𝑃𝑚𝑎𝑥 = 𝑉𝑚 × 𝐼𝑚 = 𝑉𝑚 (𝐼𝑠 + 𝐼𝐿 ) [ 𝑚 ]
𝑉𝑚 +𝑉𝑇
The optimal load to generate the maximum power is:
𝑉 𝑉 +𝑉
𝑅𝑜𝑝𝑡 = 𝑚 = 𝑚 𝑇
𝐼𝑚 𝐼𝐿 +𝐼𝑠
The maximum efficiency of a solar cell is the maximum output power divided by the input power:
𝑉 𝐼
𝜂 = 𝑚 𝑚 with Pin the input power.
𝑃𝑖𝑛
This is often written as:
𝑉 𝐼
𝜂 = 𝐹𝐹 𝑜𝑐 𝐿 with FF the fill factor.
𝑃𝑖𝑛
What does this mean? With reference to fig. 6, the maximum power is given by the rectangle 𝑃𝑚 = 𝐼𝑚 × 𝑉𝑚 . Ideally, the
power that could be obtained by the PV cell is the rectangle: 𝑃𝑖𝑑𝑒𝑎𝑙 = 𝐼𝑠𝑐 × 𝑉𝑜𝑐
The fill factor is thus:
𝑉 𝐼
𝐹𝐹 = 𝑚 𝑚 and is smaller than 1.
𝑉𝑜𝑐 𝐼𝑠𝑐

Isc
I
Isc I Increasing Rsh

Im Im
Increasing Rs

Vm Voc Vm Voc
(a) V (b) V
Figure 6: (a) gives the square (the smaller dashed lines) representing the maximum power 𝑃𝑚 = 𝐼𝑚 × 𝑉𝑚 and comparing
it to the ideal power that could be generated 𝑃𝑖𝑑𝑒𝑎𝑙 = 𝐼𝑠𝑐 × 𝑉𝑜𝑐 (the larger dashed lines). The red IV line represents
better output power performance than the blue line. It is “more square”. (b) In order to optimise the pn diode’s
performance for a solar cell the shunt resistance and series resistance has to decrease.

Thus, what this means is that we need to design the diode to have a more rectangular shape (more the red than the blue in
fig. 6a). Thus, the diode needs to have long recombination lengths – less recombination of the generated excess minority
carriers and reduced resistance of the contacts onto the diode. Other optimisations are related to a reduction of the
amount of reflected light – antireflection coatings and minimisation of shaded areas e.g. by the contacts).

55
 3.5.4 Equivalent circuit of a solar cell
In section 3.4 we derived the equivalent circuit of a pn diode in the dark. The equivalent circuit is given in fig. 7. For the
equivalent circuit of the diode as a PV cell (under illumination) we need to take the generated current IL into account.
This is a current source in parallel with the diode in the dark. The series resistance Rs is the same as the one of the diode
in the dark and is mainly due to contact resistances consisting of the resistance due to the metal-semiconductor interface
and the resistance of the metal contact itself. In addition, a shunt resistance, Rsh is added in parallel. This resistance
describes the leakage current due to carrier recombination processes at the surfaces and at defects. For the solar cell the
dark current ID and the leakage current Ish are losses to the current output.

Vj

-
Figure 7: Equivalent circuit of a pn diode as a solar cell.

From the equivalent circuit in fig. 7 we see that the current generated by the illumination, I L is opposite to the diode
current ID. At the same time, there is leakage current represented by I sh and the diode series resistance that under higher
current levels is no longer negligible. Thus the output current of the solar cell is:
I = IL − ID – Ish
With:
• I = output current
• IL = photo-generated current
• ID = diode dark current
• Ish = leakage current due to defects in the material where carriers recombine.
The useful output voltage is lowered by the presence of the series resistance:
V = Vj - I × RS
with
• Vj = voltage across diode and shunt resistor Rsh
• V = the output voltage
• I = output current
• RS = series resistance (resistance of the materials and the contacts).

From a diode performance perspective, reducing the contact resistance and reducing the leakage via defects in the
material (see fig. 6b) is required to optimize performance. Those steps effectively make the IV characteristic more
square (see fig. 6a) and thus increases the fill factor FF.

3.6 Conclusion
The currents of a pn diode in the dark are determined by the minority carrier diffusion current in each region of the pn
diode. Thus minority carrier electron diffusion in the p-region limits the maximum electron flux that can flow in the pn
diode through the closed circuit with the external voltage supply. Equivalently, minority carrier hole diffusion in the n-
region limits the maximum hole flux that can flow in the pn diode. Since current is continuous in the circuit, the total
current that can flow in the pn diode is the sum of the maximum minority carrier diffusion currents.

When the pn diode is in forward bias, there is an excess minority carrier concentration in each quasi-neutral region
𝛿𝑛𝑝 𝛿𝑝𝑛
(QNR). The recombination rate of minority carriers is 𝑅𝑛 = & 𝑅𝑝 = . In reverse bias the excess carrier
𝜏𝑛 𝜏𝑝
concentrations are negative leading to a carrier generation rate due to the deficit of minority carriers in the QNRs. When
R is different from zero – in the case the material lengths are larger than the minority carrier diffusion lengths – then the
minority carrier concentrations vary exponentially. The contacts keep the minority carrier concentration at their
equilibrium value. When the material lengths are short, shorter than the minority carrier diffusion length then
recombination can be neglected – the minority carrier reaches the contact before it recombines. Thus that is similar to
setting R = 0 cm-3/s in the continuity equations, leading to linear variations of the minority carriers.

When the pn diode is illuminated, it can be used as a light detector or a solar cell. When using the diode as a solar cell, a
load is connected to the diode and a current will flow under illumination. To extract maximum power, the load needs to
56
be optimised. At the same time the diode needs to be designed such that the fill factor FF is as close to 1 as possible. This
can be done by e.g. reducing the shunt resistance that is due to leakage currents through defects in the Si lattice and
reducing the contact resistances.

The use of pn diodes is varied, from rectification, to light detectors and solar cells but they are also the basic components
of more complex devices such as MOSFETs and BJTs. The physics principles behind pn diode operation explains the
operation of the more complex devices and also their strengths and limitations.

57
4 The Bipolar Transistor – BJT

In contrast to the MOSFET that is a majority carrier device where the strong inversion characteristics are determined by
drift, the bipolar junction transistor is a minority carrier device meaning that the minority carriers in the different regions
of the device will determine the current governed by diffusion76. The bipolar transistor is a relatively complicated device
when compared to the MOSFET. However under the right assumptions, the calculation of currents simplifies to
calculations of currents in short pn diodes as we have seen in chapter 2. Therefore in the EE1 course we will study BJT
which consist of short diodes only77.

4.1 Principles behind the operation of a BJT

A bipolar transistor consists of a connection of three materials in the form of an npn or a pnp junction. Thus there are
two pn junctions in this device. When looking back at the MOSFET we see that actually the source-channel-drain also
forms an npn or pnp junction. The question is therefore, why is the BJT different from the MOSFET. The first
important difference is that the BJT does not have a control contact that is insulated from the middle layer of the device
as in a MOSFET. In contrast, the control contact in BJT is an Ohmic contact to the middle layer of the device that is
able to inject carriers (current). It is the magnitude of this current that will influence the magnitude of the output current
between the two ohmic contacts on the other layers of the BJT. The injection of the current through the middle contact
keeps this layer charge neutral. Voltages applied will be mainly dropped across the junction rather than across the
middle region. In fig. 1 a schematic cross section of a planar BJT is given 78.

Figure 1: Left: Schematic cross section of a planar npn bipolar transistor on a p-type Si substrate. The control contact
is B (base). The current in the base will control the current between E and C (emitter and collector).Right: the cross
section of a pMOS for comparison. The main difference in operation is that B injects carriers to maintain the majority
carriers type in the base whilst G causes a field effect to invert the region under the control contact – thus change the
majority carrier type.

In order to understand why the connection of two pn junctions can give transistor family current-voltage curves,
controlled via a current, we must take a closer look at the pn diodes involved.

4.1.1 Reverse biased p-n junction, I=Isat independent of voltage V

The reverse bias current in a pn diode is due to injection of minority carriers across the junction. As the supply of
minority carriers is limited (small amount of minority carriers available) the current is small and constant as a function
of electric field. The current Isat is given by (see chapter 2):
 D p p n Dn n p   Dp Dn 
I sat = eA +  = eAni2  +  (1)
 L Ln  N L 
 p   D p N A Ln 

76
Note that drift of minority carriers results in very small currents only for any acceptable magnitude of applied
voltage. Thus when minority carriers are important, current will be due to diffusion as in diffusion gradients rather than
absolute values of the carrier density are important.
77
This will be extended in the EE2 course.
78
In integrated circuits, all contacts have to be defined on the top for easy circuit integration. This makes the processing
of BJT more complex than the MOSFET.
58
Figure 2: pn diode under reverse bias (left) and the off-leakage current (right).

4.1.2 Minority carrier injection by a hypothetical device (hole injector)

If we want to increase the off leakage current in a pn diode, we have to find a method to generate more minority carriers
near the depletion region edge than already available under bulk conditions. This can for instance be done by shining
light with an energy (and thus associated wavelength – “colour”) larger than the bandgap of the semiconductor (
h
E = h =  EG ). This will create electron-hole pairs and thus increase the minority carrier concentration substantially

compared to what was originally available79. Thus increasing minority carrier concentrations n p and pn in equation (1)
through this process will increase the off-current as illustrated in fig. 3.

Figure 3: Reverse biased pn junction with light shining of the device. When the intensity of the light increases, more
minority carriers are generated and the off current |Isat| increases.

4.1.3 Minority carrier injection by a semiconductor device (hole injector)

Remember the pn diode under forward bias. Then majority carriers are injected across the junction: holes diffuse from
the p-region into the n-region and electrons diffuse from the n-region into the p-region. In case we make an asymmetric
pn diode with a heavily doped p-region and a lowly doped n-region, the density of holes injected from p to n is a lot
larger than the density of electrons injected from n to p. Proving this:
 eV  ni  eV 
2
p ' n = p n0 exp = exp 
 kT  N D  kT 
 eV  ni  eV 
2
n' p = n p0 exp = exp 
 kT  N A  kT 
ni2 n2 (2)
N A  N D   i  n' p  p ' n
NA ND
I p  p ' n & I n  n' p
I p  I n  I tot  I p

Thus a forward biased p+-n junction is a hole injector. This forward biased p +-n junction can replace the light used in the
previous example in order to inject holes into the n region of a reverse biased np junction. In that case the holes injected
by the first junction increases the minority carriers in the second layer which will be collected by the reverse biased
junction. The result is given in fig. 4.

79
It will also increase the majority carriers but since there are already a large amount available to start with (1017 cm-3) a
bit more (e.g. 103 cm-3) will not make a big difference. The picture is completely different for minority carriers as
originally there were only about 103 cm-3 available.
59
Figure 4: Left: a connection of two pn junctions, one p+n is forward biased and the second one np is reverse biased.
The output current at C will then be the off-current of the second junction as shown in the middle. This is a common
base configuration.Right: symbols for BJT (top npn, bottom pnp)
The heavily doped p layer on the forward biased junction is called the emitter. The middle layer is called the base and
the other outer layer, of the reverse biased junction, is called the collector. This structure is a pnp BJT. When the emitter
is heavily doped n-type, the base lowly doped p and the collector lowly doped n then we have an npn transistor. The
main current component in a pnp transistor are holes, in an npn transistor are electrons. The control current through the
base is respectively electrons and holes (thus opposite to the carriers forming the main output current). In what follows,
we study the pnp rather than the npn BJT, this is solely for convenience because hole flux and hole current point in the
same direction, and thus simplifying the graphical picture.

An extremely important remark for BJTs is that in order to function properly, the middle region – the base – should be
sufficiently short. If the base is short the minority carriers injected into it from the emitter will all be collected by the
reverse biased collector junction80. One can easily understand that if the base is long then the excess carriers injected
into the base by the emitter will all recombine whilst diffusing to the collector. Thus whatever excess carriers that is
made available will be lost in recombination. In what follows we will assume that the base region is thinner than the
diffusion length L of the minority carriers.

Find the two main differences between the layer structure from source to drain through channel of an nMOS (no bias
applied) and an npn BJT.

4.2 Currents in a short BJT

The energy band diagrams of a BJT under different bias conditions do not add additional information compared to what we
have seen for the pn diode. The biasing across the junctions allows or disallows diffusion of carriers by lowering or
increasing the potential barrier. Outside the depletion regions across the junction, the quasi-neutral region will be considered
without electric field. Thus there will be no band banding within these regions. There are 4 operation regimes for the BJT:
OFF (both junctions reverse biased), forward active mode (EB junction forward biased and BC junction reverse), reverse
active mode (EB junction reverse biased and BC junction forward) and saturation (EB junction forward biased and BC
junction also forward). These different regimes are most easily demonstrated by looking at the common base configuration,
given in fig. 4. The easiest way to draw the energy band diagrams of the BJT in different bias conditions is to ground the base
node and shift the emitter and collector EF depending on whether the junction is forward of reverse biased. An example of a
BJT in forward active mode is given in fig. 5.

80
A proof will be given in the 3rd year course
60
Figure 5: left energy band diagram under zero bias, right energy band diagram under forward active mode. Dashed line
(red) is the energy level of the base that is kept grounded.

The energy band diagram shows that the emitter-based barrier for hole and electron diffusion is lowered and thus we can
expect electrons to be injected from base into emitter and holes from emitter to base. Since the emitter is more heavily doped
than the base, the hole injection will be higher than the electron injection. Thus electrons are disappearing from the base and
in order to keep this region charge neutral this loss will need to be compensated by an injection of holes via the base contact.
The holes will diffuse through the base (this is clear from the minority carrier concentration gradients that we’ll draw next).
They see the large electric field (reverse bias) at the base-collector and thus holes will be swept across to the collector.
Remember that holes “roll up the hill”. Electrons will “roll down the hill” from collector to base, but since there are only few,
this will be only a very small leakage current81.

The currents in a bipolar transistor are determined by diffusion of carries in the different regions, similar to the pn diode. The
main difference with the BJT is that the minority carrier concentrations at the EB and BC junctions are controlled by the
voltage across it rather than being controlled by the ohmic contacts. We will investigate each current component I E (emitter
current), IC (collector current) and IB (base current) separately (see fig. 6 for the definition of the different currents in a BJT)
for the transistor is active mode (EB junction forward biased and BC junction reverse biased).

Figure 6: Top. Common base biasing of a pnp BJT with definition of voltages and currents. Bottom. The minority carrier
variations for forward active mode, completely determined by the bias across the junction across each diode separately.

4.2.1 The emitter current IE

The emitter current is defined as the total current across the emitter-base junction (fig. 7). In forward bias across a pn
junction, holes are injected from the p region to the n region – thus from emitter to base and electrons are injected from the n

81
In forward active mode this electron leakage will normally be ignored as it is a lot smaller than the hole current.
However, when the BJT is off, then this leakage will become important.
61
region to the p region – thus from base to emitter. The total current across the E-B junction is the sum of these two current
components. If we assume the emitter base is a short diode, then the emitter current can be easily calculated.
Minority carrier concentration
(cm-3)

E B

Base-Collector junction
Ideal ohmic contact

p+ n
p’n Ip
h+

In
e- n’p
Determined by VBC

np0 p”n
xe Wb Distance in the
direction of current
flow
VEB

Figure 7: Minority carrier concentration in a forward biased emitter base p +n junction. The width of the emitter is xe
and of the base is Wb. The total emitter current is In+Ip.

Due to the knowledge on the variation of the minority carrier concentration we can calculate the diffusion currents across
the EB junction in exactly the same way as was done for pn diodes:
( p ' − p"n )  eAD p n' = eAD p p n0 exp eVEB 
I p EB = eAD p n p
Wb Wb Wb  kT  (3)
(n p − n p0 )
' '
n p eADn n p0  eV 
I nEB = eADn  eADn = exp EB 
xe xe xe  kT 
I E = I nEB + I pEB
Note that the minority carrier concentration in the base at the collector side is determined by the base-collector voltage,
which in active mode is reverse biased (VBC<0). For sufficiently large forward bias conditions, the minority carrier
concentration at the EB junction is a lot larger than the minority carrier concentration at the contact and at the BC
junction.

4.2.2 The collector current IC

Figure 8: Currents across the base-collector junction. Note that the minority carrier concentration at the right edge of
this pn diode is governed by the EB voltage rather than by an Ohmic contact.

62
The reverse biased collector will collect all the minority carriers made available by the base at the BC junction (see fig.
8). Since all the holes injected into the base by the emitter are diffusing from the base to the collector, all these holes will
be collected82. The current associated to this hole flow is determined by the minority carrier gradient in the base region.
On the other hand, the collector junction is reverse biased and there will be a reverse biased current component that is
due to the electrons injected from the collector into the base across the BC junction (thus is not related to the emitter).
This current is the off-leakage current of the reverse biased pn junction that is determined by the gradient in the collector.
Note that this gradient is in the opposite direction as that in the base. The collector current is given by the sum of the hole
current in the base and the electron current in the collector:
( p ' − p"n )  eAD p n' = eAD p p n0 exp eVEB 
I p BC = eAD p n p
Wb Wb Wb  kT  (3)
(n p − n p0 )
''
np eADn n p0
I nBC = −eADn  eADn 0 =
xe xe xe
I C = I nBC + I pBC

The off-leakage current in a pn junction is very small and is negligible compared to the injected hole current that is
flowing in the base. Therefore the total collector current is:

eAD p p n0  eV 
I C  I pBC = exp EB  (4)
Wb  kT 

Thus we see that the emitter current is determined by the EB diode and the collector current by the BC diode. These
currents are completely determined by the gradients of the minority carriers in the materials surrounding the junctions.

4.2.3 The base current IB

In principle is it now very easy to derive the base current from the knowledge of the collector and emitter current. Since
no current can be lost in the device we have to find that the base current has to make up for the difference between the
emitter and collector current following (fig. 9):
IC

IB

IE

IE=IB+IC
Figure 9: The currents in a pnp BJT in active mode. Applying nodal analysis in the base node gives the relationship
between all currents.

Thus from eq. (3) and (4) we find that

eADn n p0  eV  (5)
IB = In = exp EB 
xe  kT 

Although this approach is completely acceptable, we have lost the physical reason behind the fact that the base current is the
resupply of the electrons that are escaping via the electron current from the base into the emitter across the forward biased EB
junction. In what follows we will re-establish this physical interpretation.
Holes are injected into the thin base from the forward biased emitter. They diffuse towards the collector where they are
accelerated by the large electric field across the reverse biased base/collector junction and contribute to the collector current.
Looking at fig. 10 we see: 1) holes injected from emitter to base and reaching the reverse-biased collector junction; 2)
electrons injected across the forward-biased emitter junction from base into emitter and 3) thermally generated electrons
making up the reverse saturation current of the collector junction.

IB = IB’ + - ICBO
whereIB’ = base current injected into the emitter
ICBO = reverse bias leakage current into collector (very small indeed)
The base current comes from the fact that the electrons that are disappearing out of the base via the forward bias junction
need to be re-supplied in order to avoid losing equilibrium charge conditions. If the carriers would not be re-supplied then

82
Remember that recombination was neglected.
63
equilibrium charge condition can only be obtained by a changing voltage drop across the junctions. Since the majority
carriers are depleting, the depletion region increases across the EB junction, thus reducing the carrier injection density.

VEB VBC

IB
p+ e -
n p
2)
IE
3) IC

1) h+

Figure 10: Different carrier fluxes that are flowing in the base under the condition of a short base (W b shorter than the
diffusion length of the minority carriers that are flowing through the base) in a pnp BJT in forward active mode.(online:
purple: hole flux, green: electron flux).

4.3 Current gain in a short BJT

The current gain is the ratio of the collector current to the base current and this is given by (see eq. (4) & (5)):
 eV 
eAD p pn0 xe exp EB 
=
IC I p
=   kT  = D p N AE xe (6)
IB In  eV  Dn N DB Wb
eADn n p0Wb exp EB 
 kT 
In order to increase the current gain one can: a) increase the doping density of the emitter or decrease the width of the base.
Changes in the other parameters lead to other detrimental effects (e.g. high base resistance when lowering the base doping).

1. Emitter injection efficiency in a short BJT

The emitter injection efficiency is the ratio of the “useful” current over the total injected current across the EB junction:
I Ip 1 1
 = p = = =
I E In + I p 1 + In 1 + 1
Ip 
The emitter efficiency describes which part of the total emitter current is used to generate the collector current. Thus for a
good BJT we want  to be large and  to be equal to 1.

Using BJT performance parameters, explain why a BJT in reverse active mode will have poorer performance than when the
same BJT is operated in forward active mode.

4.4 Other BJT connections

IC IC
(a) Active (b)
Active
Saturation
Saturation

IE IB

ICB0 IE=0A ICB0 IB=0A

VBC VEC
Figure 11: Family curves of the pnp BJT. Note that the definition of saturation in the BJT is different from the
MOSFET83. The regions with constant current are the active regions and outside the active region is the saturation
region. (a): in common base connection the control current is the emitter current and no real gain can be found

83
This is rather confusing as the saturation region is the region where there is a steep linear increase in output current.
This is opposite to the region that is called saturation in a MOSFET.
64
between emitter and collector current. (b): in common-emitter configuration, the base current is the control current and
there exists a gain between the base current and the output current when the BJT is in forward active mode.

In the previous we used the common base connection in order to explain the currents in the BJT. This is because in
common base a direct control of the junction biases is available that allows a straightforward connection of the BJT to
the pn junction diodes operations. In most circuits however the common emitter configuration is more popular
(amplifier). In the common emitter configuration the two bias voltages used in BJT biasing are: one between the
emitter and base (control of IB) and one between the emitter and collector. Thus the bias across the base-collector
junction can change with both VBE and VEC. The family of output characteristics is given in fig. 11.

Note: in the saturation region the base-collector junction is forward biased.

4.5 Physics behind the BJT small signal equivalent circuit

ib ic
B C
ib
vbe rbe or rce
gmvbe

Figure 12: Simplified small signal equivalent circuit of a BJT. Small-signal current dependent current source:  ib
(alternative symbol hfe).

Small signal current gain:

dI C ic
= =
dIB ib

for high gain we require

(i) small base width W
(ii) large emitter doping, compared to base doping.

Transconductance (derivative of output current to control voltage cfr. MOSFET):

ic dIC
gm = =
vbe dVBE
Input resistance, rbe
dVBE dVBE dIC
rbe = =
dI B dIC dI B
Note: in a MOSFET the input resistance is infinite (in case of an ideal gate oxide) because no gate current flows for
DC bias conditions. In the BJT the input resistance is determined by the pn diode differential resistance as given in
chapter 2. In bipolar transistors the input impedance is low, such that a small input voltage change can result in a high
current change.

Output resistance, rce

dVCE
rce =
dIC
In real BJTs the current in active mode is not completely constant but increases slightly with increasing bias voltage.
This feature is due to base width modulation, similar to gate length modulation in MOSFETs. For increasing bias in
the active region, the base-collector junction is increasingly reverse biased. This has the consequence that the depletion
region of the BC junction widens. Therefore the resulting active base width (un-depleted base width) is decreasing as
the reverse bias voltage goes up. Since the collector current is indirectly proportional to the active base width, the
current increases with increasing reverse bias across the BC junction.

65
4.6 Conclusion
The BJT is, like the pn diode, a minority carrier device: the currents are determined by the diffusion of minority
carriers. A BJT can only function with gain when the base width is sufficiently small. The word bipolar stands for the
fact that both electrons and holes are important to describe carrier transport in this device.
In the case of short layers and when ignoring the reverse bias current from collector into base, then all currents in a
BJT in forward active mode are defined by the emitter-base diode:
IE = emitter-base diode current = minority carrier current in base + minority carrier current in emitter
IC = minority carrier current in base
IB = minority carrier current in emitter
I E = IC + IB

66
5 The Metal-Oxide-Semiconductor Field Effect Transistor – MOSFET

In the previous chapter, we presented devices with 2 metal contacts. In these devices the current-voltage characteristics
are fixed by the processing and material parameters. There is only 1 IV characteristic associated to each device. In
transistors a third contact is introduced. This contact will control the current that is flowing between the two other
contacts. Transistors are characterised by a set of current-voltage graphs, one IV graph per control signal value. This
third contact will allow on-off switching of electrical signals – an electronic switch rather than a mechanical switch –
in digital applications. It will also allow amplification – a small signal on the third (control) contact will result in a
larger signal at the other contact – in analogue applications. This increased functionality of 3-terminal devices has
made them most popular in integrated circuits (ICs).
In this chapter we will investigate the MOSFET. In a MOSFET the third contact controls the current between the two
other contacts via an electric field across a capacitor.

5.1 Fabrication
Fabrication of Si MOSFETs is a massive industry with big companies such as Intel, IBM, AMD and Toshiba the main
drivers behind the technological field. Fabrication of MOSFETs (and other semiconductor devices) is based on the
repetition of 4 important fabrication steps within an ultra-clean environment – clean room.
The 5 steps are:
- lithography (determination of protected and un-protected areas)
- implantation of doping atoms
- etching (chemical and chemical/mechanical removal of material in the unprotected areas)
- oxidation at high temperatures (~1000°C) in pure O 2
- deposition of metals, insulators, ….
All semiconductor devices consist of 3 types of materials: semiconductors (Si, Ge, GaAs,…), metals (Al, Ti, W,
Au…) and insulators (SiO2, Si3N4,…). The number of metal layers in an IC (e.g. the processor in your computers) is at
the moment as high as 10, each separated by insulators.
These IC’s, which consists of a billion transistors, are then packaged intro a chip carrier for protection and easy
connection to the external world.

Figure 1: Left a microscope picture of IBM's PPC 970 die (from

http://www.theinquirer.net/images/articles/ppc970.jpg) this IC consists of areas with memories, busses, etc. The
different colours are due to the different thicknesses and types of insulators, and due to metal pads. Right: What one
buys/sees after packaging – a “black” box. Inset: TEM cross section of the gate region of a 28nm pMOS from global
foundries84.

In this chapter a simple long85 channel MOSFET will be considered.

84
http://electroiq.com/chipworks_real_chips_blog/
85
Current MOSFETs have channels below 45 nm length. Although their basic operation is still as that explained in this
chapter their operation is strongly influenced by different unwanted electrostatic interactions between the contacts.
67
 channel
SiO2 ~ 50 nm thick

Source Gate Drain

Contact Contact Contact

n+ Source n+ Drain

L = 0.1 - 10µm
p-type Si body
Figure 2: left: cartoon of a MOSFET35, middle: a schematic cross-section of a MOSFET. L is called the gate length.
Current gate lengths are below 45 nm and oxide thickness is ~1.2 nm enforced with a high k dielectric, right: top:
nMOS, bottom: pMOS.

The two contacts between which the currents are flowing are called the source (sourcing of carriers) and the drain
(draining of carriers) contact. These are Ohmic contacts made on heavily doped (indicated via the superscript + next to
the doping type) semiconductor to make an as ideal contact as possible. Any influence of the contact will be taken into
account via a resistance, if necessary. In this particular example the doping in the contacts is n-type and is opposite to
the doping in the substrate (body, bulk). The substrate is a ~500 m thick Si wafer (polished disks of Si) on which the
surface is modified via the fabrication steps (processing steps) to make devices. The depth to which the substrate is
changed depends on the technology. For large gate lengths this depth will be down to 500 nm, for short gate length (90
nm, 45 nm) this depth reduces to 20-50 nm.
In between the Ohmic contacts is the control contact – called the gate. The gate consists of a MOS capacitor and is
made of a thin high quality SiO2 insulator on Si and a metal or heavily doped polySi on top of the oxide. The success
of the MOSFET is completely due to the success in fabricating extremely high quality gate oxides. In this course we
will assume that the oxide is a perfect insulator. The length of this gate is the distance between the source and drain
contact in fig.2. This length is a parameter that has an important influence on the current density and the speed of the
MOSFETs. The structure given in fig.2 will results in an n-channel MOSFET.

5.2 Metal-oxide-semiconductor junction – MOS capacitor

The gate-oxide-semiconductor structure acts as a parallel plate capacitance Cox. When a positive voltage is applied on the
gate contact VGS>0V, it puts positive charge on this contact. Charge neutrality requires that this charge is compensated by
negative charges at the opposite contact, thus in the semiconductor. Thus, electrons move to the SiO2 interface to form this
charge. Similarly for a negative gate voltage. This will attract positive charges, thus holes to the top of the semiconductor
underneath the oxide.
The capacitance Cox is determined by the oxide thickness tox and its permittivity . The gate capacitance is:
 0  oxWL
C max = = C oxWL (1)
t ox
With ox = 4.0
W width, L length of gate
tox oxide thickness
When the free charge in the channel created by the gate voltage – electrons (nMOS) or holes (pMOS) is equal to the free
majority charge density in the substrate, then threshold is reached. This gate voltage is called the threshold voltage and is
defined as the voltage where a channel is opened.
If VGS = Vth then
nchannel = psubstrate for nMOS
pchannel = nsubstrate for pMOS

5.3 Functioning of MOSFETs

In a MOSFET the conduction between DRAIN and SOURCE is controlled by the voltage applied to the GATE that
will form a channel to allow conduction. With reference to fig.2 and based on the knowledge of the MOS capacitor,
the operation of the MOSFET can be explained as follows: as the gate voltage increases from zero, holes (majority
carriers in the bulk) are first repelled from the channel region under the gate (depletion of majority carriers) thus a
depletion region is built underneath the gate oxide between the source and the drain. Further increase beyond the
threshold voltage causes accumulation of electrons to the surface, forming the conducting channel between source and

68
drain (inversion)86. Thus, seen from gate into bulk, at voltages larger than the threshold voltage first a region with free
electrons is found, followed by a depletion region without mobile carriers, followed by the p-type region of the
substrate. Seen from source to drain, through the channel, at inversion, an n+ region is followed by an n region and
then by an n+ region. In contrast, at zero gate voltage an n+ region is followed by a p region followed by an n+ region.
There clearly exist pn junctions between the source and drain that disappear when the gate voltage becomes larger than
the threshold voltage. Thus the influence of the gate voltage on the source-channel and drain-channel pn junctions is to
lower the potential barriers between contact and channel.
Terminal voltages are usually by convention quoted relative to the source, e.g. VDS is the Drain voltage relative to
Source. The source is normally grounded. VDS is conventionally POSITIVE in an n-channel transistor. The body, or
substrate, is normally connected to the source. This ensures that the drain-body p-n junction is always reverse-biased,
thus isolating the drain from the source in the absence of a positive gate voltage. The gate voltage is also applied
between gate and source: VGS is the Gate voltage relative to Source.

There exist different types of MOSFETs depending on the type of carriers available in the channel and dependent on
the existence or not of a channel at zero gate voltage.
(i) p–channel – pMOS: inversion layer consists of holes and I DS is carried by holes in the channel
(ii) n–channel – nMOS: inversion layer consists of electrons and I DS carried by electrons in the channel
of which, each type can be either
a) enhancement mode (normally-off, will not conduct at VGS = 0)
b) depletion mode (normally-on, conducts at VGS = 0)

5.3.1 n-channel enhancement mode MOSFET

VDS = 0

VGS
- +
Gate

SiO 2 t
ox
Source Drain
Figure 3: Enhancement mode nMOS with gate biasing but without drain biasing

With VDS = 0V no current flows in the structure when the gate oxide is ideal (no current through the gate contact).
The device behaves like a capacitor when the voltage VGS is varied. There are three different cases to consider:
i) When VGS < Vth no conducting channel exists.
This is when the MOS capacitor is in depletion or accumulation. The MOSFET is off.
ii) When VGS = Vth, an inversion layer is being formed. Then the MOS capacitance is at its minimum. Note that at
VGS=Vth the density of inversion charge in the channel is equal to the density of doping in the substrate. The
charge of carriers in channel and substrate after inversion is opposite. The MOSFET is turning on.
iii) When VGS > Vth, the gate attracts more electrons to form a conducting channel (density of inversion charge is
now larger than the density of doping atoms in the substrate), which forms the lower "plate" of the capacitor.
This is the condition for strong inversion. The MOSFET is on.

The energy band diagram from source to drain through the channel is given in fig. 4. It is clear that the potential barrier
between source/drain and channel is decreasing with increasing gate voltage, allowing electrons to diffuse into the channel
and create an inversion layer.

86
While in a MOS capacitor the inversion is created by generation of carriers, in a MOSFET the inversion is created by
reducing the potential barrier between source and channel and between drain and channel allowing electron diffusion
into the p-type region underneath the gate oxide. This process is a lot faster than waiting for carrier generation.
69
 Energy
source channel drain
VGS

Ec
EF

Ev

Distance from source to drain

Figure 4: The influence of the gate voltage on the energythrough
bandchannel
diagram of an nMOS drawn from the source to the
drain through the channel region under the gate oxide. With increasing gate voltage, the channel region turns n-type
and the potential barrier at the contact-channel interfaces lowers.

As in a parallel plate capacitor, increasing the amount of charges on the metal of the capacitor, increases the amount of
opposite charges at the opposite side of the insulator with the same amount. Thus increasing VGS beyond Vth must
results in an extra carriers and thus extra charge. Remembering C = dQ with Q the density of charges and V the
dV
applied voltage gives the number of charges on the gate electrode as: Q = C ox (VGS − Vth ) (1)
Assuming that the charge in the channel is zero when V GS =Vth, a charge equal to -Q must then be present in the
channel. This charge is carried by the electrons in the channel. –Q is the inversion charge density.
When a drain voltage is applied as shown in fig. 5, a part of VDS is dropped across the drain-channel reverse biased pn
junction and the other part across the channel between source and drain. The bands bend
VDS Energy
source channel drain
VGS E

Gate

t Ec
SiO ox
2
EFS
Source Drain EFD

x=0 x x=L
y into
paper Ev

z Distance from source to drain

through channel
Figure 5: Left: Enhancement mode nMOS with gate biasing and drain biasing. Right: The influence of the gate voltage
(2 values of VGS) and drain voltage (1 value of VDS) on the energy band diagram of an nMOS drawn from the source to
the drain through the channel region under the gate oxide. Applying a drain voltage will create an electric field across
the channel region → energy bands tilt and e - “roll down the hill”. In the case VGS is well below Vth (top curve) the
potential barrier between source and channel blocks the injection of electrons into the channel region (where hardly
any are available) and thus no current flows. In the case V GS is above Vth (2nd curve down) the potential barrier between
source and channel is lowered and injection of electrons into the channel region occurs. These electrons are then
transported through the channel via drift thus a current occurs. Increasing the drain voltage will increase the slope ot
the curve. At saturation the supply of electrons is limited by the source-channel barrier independent on the electric field
across the channel and then the current remains constant.

Fig. 5 shows the energy band diagram from source to drain for the MOSFET operating at VDS  VGS − Vth . The
electric field as a consequence of VDS is dropped across the reverse biased drain-channel region and the remainder
across the channel region. In a long gate length MOSFET, this electric field has no influence on the source-channel
barrier. This figure demonstrates the majority carrier electrons drifting through the channel down the potential hill. It
also demonstrates that if VGS is small (black line) the barrier between source and channel is high and only a limited
density of electrons can diffuse from source into the channel region. We expect the current to be small. When V GS
increases (blue line) the barrier lowers allowing more electrons to diffuse from source to channel allowing more current
to flow.

70
As shown previously, the inversion charge at the Si/SiO2 interface is given by:
QC = −Cox (VGS − Vth ) when VDS = 0 (2)
QC is the charge per unit area carried by electrons in the channel (therefore the negative sign). The area is the area of
the gate (gate length x gate width).
Cox is the capacitance per unit area and is called the oxide capacitance. C =  0  ox with t the oxide thickness
ox ox
t ox

But when VDS >0, the voltage across the gate/oxide/channel sandwich varies at different points in the channel between
the source and drain. If the potential at a point x along the channel relative to the source is V(x) then at point x along the
channel, the voltage across the oxide capacitance is VGS - V(x). Thus the voltage across the gate oxide at the source side
is VGS and the voltage across the gate oxide at the drain side is V GS - VDS=VGD which smaller than VGS for positive drain
voltages. And in general, the voltage across the gate oxide at point x in the channel is VGS-V(x).

Then the charge per unit area in the channel at the some point x is given by:
Qc ( x) = −CC (VGS − V ( x) − Vth ) for VDS > 0 (3)

Once the region underneath the gate oxide is inverted (strong inversion), the pn diodes that existed between the channel
and the ohmic contact regions will have disappeared. Looking from the source towards the drain through the channel we
see an n-type region contacted by two “ideal” contacts. When applying a voltage across this structure from source to
drain we expect only electron (now the majority carriers in each region) current. Since in strong inversion the minority
carriers are unimportant, the current through the inverted channel will be via drift only. Therefore, the MOSFET is often
called a majority carrier device. It is unipolar as only the majority carriers are of influence on the current in strong
inversion87. If the width of the channel is W (in the y-direction), the amount of charge passing point x per second is
QCWve then the current flowing from drain to source is:
I DS = −QCWv e (4)
With ve, the velocity of the electrons in the inverted channel region.
The horizontal electric field strength at the point x, is -dV(x)/dx and the electron drift velocity ve from source to drain
varies with x88:
dV(x)
ve = µe (5)
dx
Introducing (3) and (5) in (4) gives:
I DS = C oxW e (VGS − V ( x) − Vth )
dV
dx
At every point in the channel the drain current is the same, i.e. IDS = constant and solving the above differential
equation is straightforward:
L VDS

I DS dx = C ox W e (VGS − V ( x) − Vth )dV

0 0
With L the gate length and VDS the voltage applied on the drain with respect to the source a distance L removed from
the high doping implanted ohmic contact region.
Hence:
C oxW e  2
VDS 
I DS = (
 GS
V − Vth )V DS −  (6)
L  2 
Note: i) This result is only valid for VGS  Vth & VDS  VGS − Vth
C oxW e
ii) The value of the quantity = 2 K is used by circuit designers. For example in the Analogue
L
electronics modules.
iii) For the same biasing arrangements, devices with different length to width ratios will carry different
currents.
iv) p- and n-channel devices with exactly the same geometry and biasing will carry different currents because
of the different value of the mobility µ of holes and electrons.

87
In weak inversion around VGS = Vth, this is no longer true. The current is then composed by drift and diffusion.
However to keep calculations simple we assume this year that when VGS = Vth the inversion charge is zero and the
MOSFET off. Once VGS > Vth the MOSFET is considered on and the diffusion current is negligible due to the large
density of inversion charge in the channel.
88
Cfr. Velocity-field curve in chapter 1.
71
The value of the current now needs to be determined for VDS  VGS − Vth . The condition VDS = VGS − Vth is called
the onset of saturation in MOSFETs. For an ideal MOSFET the current in the saturation region – saturation current – is
constant as a function of applied voltage on the drain.

5.3.2 Ideal MOSFET output characteristics

𝑠𝑎𝑡
When 𝑉𝐷𝑆 = 𝑉𝐺𝑆 − 𝑉𝑡ℎ (the pinch-off or saturation voltage 𝑉𝐷𝑆 , the potential difference between the gate and the
drain end of the channel is now just 𝑉𝑡ℎ and thus theoretically, no inversion layer exists at the drain end of the channel.
In contrast, the drain end of the channel is depleted and thus there are no free electrons near the drain. The channel is
said to be pinched off at the drain. This marks the onset of drain current saturation. To obtain an expression for the
C W e
𝑠𝑎𝑡
drain current in saturation, we use eq. (6) and replace 𝑉𝐷𝑆 by 𝑉𝐷𝑆 sat
givin: I DS = ox (VGS − Vth )2 (7)
2L

Figure 6: The plot of the electrostatic potential at each point of the MOSFET between source and drain along the
channel. The different colours are for different VDS. The difference between Vx(x) at x=-0.5 (source) and Vx(x) at
x=+0.5 (drain) is equal to VDS. Figure taken from: http://www.eng.auburn.edu/~niuguof/elec6710dev/html/idvd.html
The pinched off region of the channel is very resistive, so the additional drain voltage (VDS - VDSsat)>0 drops
completely across this region preventing an increase in the electric field across the channel and thus preventing further
increase in current. Thus, in an ideal MOSFET the current remains constant as VDS is increased further.
TCAD simulations in which the transport equations are solved numerically via the finite element method provides
proof for this statement. Results for this statement are given in fig.6. When VDS is relatively low (indicated with linear)
we see that with an increase in VDS the slope of Vx(x) is increasing in the channel, thus the electric field in the channel
increases and increases the current. When VDS is relatively large (indicated with saturation) we see that with an
increase in VDS the slope of Vx(x) remains constant in the channel, thus the electric field in the channel increases and
increases the current. The jump in Vx(x) at x=0.5 becomes larger and larger, indicating an increase of the voltage drop
across the channel-drain depletion region. This confirms our previous statement.
In fig. 7 the ensemble of the output current-voltage characteristics of an ideal MOSFET is given.

V GS3
ID

locus of points
at which
V DS =V GS - Vth
V GS2

V GS3 >V GS2 > VGS1

V GS1

V DS

Figure 7: The family of current-voltage characteristics for an enhancement mode nMOS. Each curve corresponds to
one gate voltage value. The higher the gate voltage the higher the current. The MOSFET reached pinch-off at different
drain voltages dependent on the gate voltage. The locus of the pinch-off voltage position is given by the grey line.
72
From the family curves given in fig. 7 we see two major operation regimes in the MOSFET. At low VDS voltages, well
below the saturation point (left of the saturation locus) is called the triode region. In this region the MOSFET behaves
as a voltage controlled resistor. The other region is above the point of saturation where the MOSFET behaves as a
voltage controlled current source. The gate voltage is the control voltage.

5.4 Types of MOSFETs

Different types of MOSFETs exist are shown below. These differentiate themselves dependent on the doping of the
substrate that influence the carrier that forms the output current (electron and hole) or differentiate themselves in
whether or not the MOSFET is conduction when no gate voltage is applied. This latter effect is determined by the
workfunction difference between the gate metal and the semiconductor bulk. The different types are given below:

5.4.1 Enhancement mode - depletion mode

source gate drain source gate drain

n+ n+ n+ n n+
p-type Si body p-type Si body

Enhancement Depletion
Figure 8: nMOS. Left: enhancement mode. No channel when no gate voltage is applied. Right: depletion mode a
channel exists without application of a gate voltage as a result of a metal-semiconductor work functioning difference
or as a result of implantation of the bulk in the channel region with donor atoms

Figure 9: The family of current-voltage characteristics for an enhancement mode nMOS (left) and a depletion mode
nMOS (right).The transfer characteristic IDS versus VGS for 1 VDS is also shown for VDS in the saturation region. The
threshold voltage is indicated in both cases.

5.4.2 n-channel - p-channel enhancement mode

+ -
G + G -
S D S D

n+ n+ p+ p+

p n

ID
ID VGS
6
-3 VDS
5
-4
4
-5
3
-6
VDS VGS
Figure 10: Left: Enhancement mode nMOS. Right: enhancement mode pMOS. Top: structure and bottom: family of IV
curves. Note the biasing condition on the pMOS.

73
5.5 CMOS
One of the strengths of MOSFETs is that it is easy to fabricate the combination of an nMOS and a pMOS on one substrate.
This combined structure is called a complementary MOS or CMOS and immediately behaves as an inverter! This makes the
CMOS the device par excellent for digital applications. In fig. 18 a sketch of the material cross section of the CMOS is given
together with its equivalent circuit. When the input voltage on the gates of the MOSFETs is high, the output voltage will be
low because the pMOS is open and the nMOS is closed (shorted to ground). On the other hand, when the input in low, the
pMOS is on and the nMOS is off. Thus, the pMOS connects the output to VDD. The reason why the pMOS and nMOS are on
under different input voltages is to do with the fact that the pMOS has negative threshold voltage and the nMOS positive.

Figure 11: left: a schematic cross section of a CMOS. The left part of the structure is the p-MOS and the right part (in the p-
well) is the nMOS). Right: the CMOS connection for making an inverter. When the input is high the nMOS is on and pMOS is
off and grounds the output, when the input is low the nMOS is off and pMOS is on and connects the signal to V DD. Pictures
taken from http://www.tf.uni-kiel.de/matwis/amat/elmat_en/kap_5/backbone/r5_1_5.html.

5.6 Small signal equivalent circuit of a MOSFET

Gate id
Drain

g mv gs
v gs C gs r ds

Source
Figure 12: Simple small signal equivalent circuit for a MOSFET that is valid in saturation.

Some important parameters that determine the operation of the MOSFET can be extracted via experimental
characterisation and are used to linearise the MOSFET characteristics for use in circuit analysis in case small ac voltages
are applied on the gate.

One of the most important parameters is the transconductance g m.

Transconductance, gm
gm = dIDS / dVGS at constant VDS
The transconductance is defined as the first derivative of the output current to the control voltage. g m gives an indication
of how well the gate controls the carriers in the channel. The higher g m the better the control and the better the cut-off
frequency fT. (this is the frequency at which point the current gain disappears).

The output resistance gives an indication of channel length modulation and other effects associated with short channel
length MOSFETs which influence the character of the saturation current. It indicates how horizontal the output current
is in saturation.
rds = 1 / gds = (dID / dVDS ) -1 at constant VGS

The gate capacitance will be an important parameter for digital applications as it determines the gate delay of a digital
circuit. The input (Gate ) Capacitance, Cgs is given by:
W L SiO2 0
Cgs 
t ox
where W = gate width and L = gate length as before

This expression is actually only valid when no drain voltage is applied. In reality Cgs varies with VDS in quite a

74
complicated fashion, due to changes in the distribution of charge in the channel. At very low drain voltages a good
approximation is to take (gate capacitance equally shared between source and drain):
C oxWL
C gstriode =
2
In saturation, the input capacitance becomes more (drain capacitance 89 is zero because the channel at the drain is
pinched off):
2C oxWL
C gssat =
3
* Amplification in MOSFETs

The channel resistance of a MOSFET in its on-state is very low, such that a small change in VGS results in large current
changes.

* Switching in MOSFETs

For digital applications a low channel resistance means that the voltage drop across the MOSFET when operating as a
switch is very small in ON state. The MOSFET is nearly shorted.
The off-currents in a MOSFET are also very small and thus in the OFF state the MOSFET will draw only a small
amount of power.
For a CMOS switch, 1 MOSFET is always OFF when the other is ON, so the leakage current is very small. The power
consumption in a CMOS switch happens only when switching due to the charging effects of the gate capacitance. This
low power characteristic of MOSFETs has made it a popular digital electronics device. 90

5.7 Conclusion
The MOSFET is a three terminal device. Two terminals: source and drain (Ohmic contacts) generate the output current
while the third terminal (gate on top of an oxide) controls the current between source and drain. The control is via an
electric field effect (capacitance). The gate switches the source-drain current on and off.
Once the MOSFET is on, an inversion layer is formed, called a channel. The channel has the same carrier type as the
source and drain contact and the opposite carrier type from the bulk. The channel connects the source to the drain.
The potential barrier between the source and the channel is controlled by the gate. The gate lowers this potential barrier
to allow more carriers to be able to flow through the channel.
Once the MOSFET is on – thus a channel exists at the source side – the current through the channel is described by drift.
When the voltage across the channel is such that pinch-off occurs at the drain, then the current remains constant as a
function of drain voltage and the MOSFET operates as a voltage controlled current source. When the drain voltage is
low, the MOSFET can be used as a compact voltage controlled resistor.
The MOSFET is called a majority carrier device because once the channel is formed the carrier flow from source to
drain is via drift of majority carriers (carrier type in source, channel and drain is the same).

89
The drain-gate capacitance causes a feedback loop from output to input in a MOSFET and is called the Miller
capacitance.
90
Currently in order to drive the operation frequency of the MOSFETs up, the gate length is aggressively scaled down.
This downscaling benefit is speed but the drawback is the increase in leakage currents and thus power consumption.
Huge technological development have been undertaken in order to control these short channel effects. An evaluation of
short channel effects and methods to ameliorate them at devices level is the main contents of the 3 rd year Advance
Electronics Devices module.
75