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CENG 329 03 Logic Circuits

The document provides an overview of combinational and sequential logic circuits, including various logic gates (AND, OR, NOT, NAND, NOR, XOR) and their truth tables. It also covers half and full adders, decoders, multiplexers, and flip-flops (SR, D, and their variations). Additionally, it includes timing diagrams and counters using D flip-flops.

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11 views8 pages

CENG 329 03 Logic Circuits

The document provides an overview of combinational and sequential logic circuits, including various logic gates (AND, OR, NOT, NAND, NOR, XOR) and their truth tables. It also covers half and full adders, decoders, multiplexers, and flip-flops (SR, D, and their variations). Additionally, it includes timing diagrams and counters using D flip-flops.

Uploaded by

rushrushman207
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Download as PDF, TXT or read online on Scribd
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Combinational Logic - Gates

Buffer A Out NOT A Out


0 0 0 1
A Out A Out
1 1 1 0

A B Out A B Out
AND NAND
0 0 0 0 0 1
A 0 1 0 A 0 1 1
Out Out
B 1 0 0 B 1 0 1
1 1 1 1 1 0

OR A B Out NOR A B Out


0 0 0 0 0 1
A 0 1 1 A 0 1 0
Out Out
B 1 0 1 B 1 0 0
1 1 1 1 1 0

1 CENG 329 SE
Combinational Logic - Gates

XOR A B Out ADD A B Out


0 0 0 0 0 0
A 0 1 1 0 1 1
Out
B 1 0 1 1 0 1
1 1 0 1 1 0

FULL
HALF ADDER
ADDER Ci A B O Co

A B O C A
O 0 0 0 0 0
𝐎 = 𝐀 ⊕ 𝐁 ⊕ Ci
B 0 0 1 1 0
0 0 0 0
0 1 0 1 0
0 1 1 0
0 1 1 0 1
𝐂𝐨 = 𝐀𝐁 + 𝐂𝐢(𝐀 ⊕ 𝐁)
1 0 1 0 1 0 0 1 0
C
1 1 0 1 1 0 1 0 1
1 1 0 0 1
1 1 1 1 1

2 CENG 329 SE
Decoders/Multiplexers
A B
A B O0 O1 O2 O3
O0 0 0 1 0 0 0
O1 0 1 0 1 0 0
2x4
DECODER O2 1 0 0 0 1 0
O3 1 1 0 0 0 1

S0 S1 S0 S1
S0 S1 O
I0 0 0 I0 I0
MULTIPLEXER

00

I1 0 1 I1 I1 01
O
4x2

O I2 10
I2 1 0 I2
11
I3
I3 1 1 I3

3 CENG 329 SE
Sequential Logic – Flip-Flops
S R Q 𝑸𝒏
SR FF (Set/Reset)
1 1 0 0
No Change
1 1 1 1
S 0 1 0 1
𝐐 Set
0 1 1 1
1 0 0 0
Reset
1 0 1 0
ഥ
𝐐 0 0 1 ?
R Undefined
0 0 0 ?

A B Out
S R Q
0 0 1
NAND 0 0 ? Undefined
0 1 1 SR FF Set
0 1 1
1 0 1
1 0 0 Reset
1 1 0
1 1 Q No Change
4 CENG 329 SE
Sequential Logic – Flip-Flops
D FF D Q 𝑸𝒏
0 0 0
Reset
0 1 0
𝐐
1 0 1
Set
1 1 1

ഥ
𝐐
D Q ഥ
𝐐
D
0 0 1
A B Out
1 1 0
0 0 1
NAND
0 1 1
1 0 1
1 1 0

5 CENG 329 SE
D FF w/Enable
D FF E D Q Qn
D
0 0 0 0 NC
𝐐
0 0 1 1 NC
0 1 0 0 NC
E 0 1 1 1 NC
ഥ
𝐐 1 0 0 0 Reset
1 0 1 0 Reset
1 1 0 1 Set
A B Out
D 𝐐 1 1 1 1 Set
0 0 1
NAND 0 1 1
1 0 1 E ഥ
𝐐
1 1 0

6 CENG 329 SE
D FF w/Clock
D FF w/Clk
Timing Diagrams

D 𝐐

D
Clk
ഥ
𝐐

Clk

7 CENG 329 SE
Counters Using D-FF

00 Prs State Nxt State

Q1 Q0 Q1 Q0
D 𝐐
0 0 0 1
10 01 Q0
0 1 1 1
Clk ഥ
1 0 0 0
𝐐
11
1 1 1 0

D1 Q0 = 0 Q0 = 1
Q1 = 0 0 1
Q1 = 1 0 1
D 𝐐
D1 = Q0
Q1
Clk ഥ
D0 Q0 = 0 Q0 = 1 𝐐
Q1 = 0 1 1
Q1 = 1 0 0
D0 = Q1’

8 CENG 329 SE

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