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Integrated Analog/Digital Bicmos Process

The document discusses an integrated analog/digital BICMOS process that combines bipolar and CMOS fabrication steps. Key aspects of the process include: 1) Depositing an n+-buried layer and p-epitaxial layer to support the operating voltages of bipolar transistors while maintaining CMOS parameters. 2) Forming n-well and n+ collector regions through implantation and diffusion to create the bipolar transistor regions within the CMOS fabrication. 3) Developing the process in the 1980s by Texas Instruments and including steps like oxidation, implantation, diffusion, and deposition to form the necessary bipolar and CMOS structures.

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Jyothi Poorna
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58 views8 pages

Integrated Analog/Digital Bicmos Process

The document discusses an integrated analog/digital BICMOS process that combines bipolar and CMOS fabrication steps. Key aspects of the process include: 1) Depositing an n+-buried layer and p-epitaxial layer to support the operating voltages of bipolar transistors while maintaining CMOS parameters. 2) Forming n-well and n+ collector regions through implantation and diffusion to create the bipolar transistor regions within the CMOS fabrication. 3) Developing the process in the 1980s by Texas Instruments and including steps like oxidation, implantation, diffusion, and deposition to form the necessary bipolar and CMOS structures.

Uploaded by

Jyothi Poorna
Copyright
© Attribution Non-Commercial (BY-NC)
We take content rights seriously. If you suspect this is your content, claim it here.
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Download as PPT, PDF, TXT or read online on Scribd
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INTEGRATED ANALOG/DIGITAL BICMOS PROCESS

BICMOS=BIPOLAR+CMOS Bipolar oriented processes uses thicker epitaxial layer and deep p+-isolation suffer from poor package density n-well CMOS contains npn collector region is self isolating with the p-epitaxial acting as a isolation region
N-well CMOS process are commonly used in Analog and Digital applications

When integrating the necessary bipolar process step in to the existing CMOS process care must be taken without disturb the original CMOS parameters
(1) Types of n+-buried layer needed (2) Requirement on p-epitaxial layer thickness to support the bipolar operating voltage (3) Where to add the deep n+ collector diffusion. (4) source/drain regions as emitter and base region

The n+-buried layer process is typically the first module in the BICMOS process. The heat cycle associated with this operation does not affect any existing CMOS devices The resistivity and thickness of the epitaxial layer affect both bipolar and CMOS device characteristics Maximum epitaxial layer thickness for the given n-well depth is as shown in figure

The operating voltage for the npn bipolar transistor is limited by BVCEO BVCEO = BVCBO(plane)/[hFE] BVCBO is the collector-base breakdown voltage and the parameter n has typical value
of 3 to 6

Typical Analog/Digital BICMOS Process


In 1980 Texas instruments developed the analog/digital BICMOS ICs

The process starts with p-type substrate Oxidation the n+-buried layer are defined Implantation and diffusion n+-buried layer are formed Surface oxide is stripped Wafer surface is treated Hydrochloric acid(HCL)etch to remove any defect

P-epitaxial layer is deposited

Wafer is reoxidized to define windows for n-well region


Using phosphorus ion implantation and diffusion n-wells formed n+ collector regions are formed by using the n+collector heat cycle using phosphorus as a dopants The surface oxide is stripped and thin pad oxide is grown

The base region of the npn transistor is formed by implantation using boron as a dopant Nitride film is deposited over the pad oxide Phosphorus channel stop implant -increases threshold voltage of parasitic thick field oxide of PMOS device Boron channel stop implant -increases threshold voltage of parasitic thick field oxide of NMOS device

After strippin the photoresisit,1-um thick field oxide


A threshold adjust implant is performed Poly-1 is formed 30-100nm thick capacitor interlevel dielectric (ILD) is formed over poly-1 using OXO or oxide alone Poly -2 is formed in order to fabricate high resistive values of resistors

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