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Course Structure

This document outlines the course details for a Microprocessor & Controller course. It includes 14 topics covered over 15 weeks, with weekly topics ranging from introductions to microprocessors and microcontrollers to architecture, programming, interfacing, interrupts, I/O, DMA, and serial communications. Students will complete 3 assignments based on covered material and be evaluated through tests, assignments, quizzes, tutorials, and attendance. A related Microprocessor & Controller lab course is also described, with evaluation based on regular lab work, 2 practical tests, attendance, and a mini project.

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dhruvgoel1
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232 views

Course Structure

This document outlines the course details for a Microprocessor & Controller course. It includes 14 topics covered over 15 weeks, with weekly topics ranging from introductions to microprocessors and microcontrollers to architecture, programming, interfacing, interrupts, I/O, DMA, and serial communications. Students will complete 3 assignments based on covered material and be evaluated through tests, assignments, quizzes, tutorials, and attendance. A related Microprocessor & Controller lab course is also described, with evaluation based on regular lab work, 2 practical tests, attendance, and a mini project.

Uploaded by

dhruvgoel1
Copyright
© Attribution Non-Commercial (BY-NC)
Available Formats
Download as PPT, PDF, TXT or read online on Scribd
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Microprocessor & Controller 10B11CI401

Course Description
Course contain the following topics Introduction to Microprocessor and Microcontrollers Microprocessor and Microcontroller Architecture Addressing modes: addressing mode , 80x86 8086/8088 Hardware specification Programming the Microprocessors and Microcontroller Memory Interface Interrupts for Microprocessors and Microcontrollers I/O Interfacing: Memory organization & Interfacing, Internal architecture and programming of I/O Chips Direct Memory Access & DMA Controlled I/O Serial Data Communications

Weekly Lecture plan


Week No. Topic(s) Lecture Hrs Topic Reference

1 2 2 &3 3&4 5&6 7

Introduction to microprocessor (including 8085) Microprocessor architecture Addressing modes of 80x86 8086 family hardware specification Programming the microprocessor Memory interfacing with 80x86 family

3 2 3 4 6 2

T1: 1 T1: 2 T1:3 T1: 9 T1: 4, 5, 6, 7 T1: 10

7&8
8&9 10

Interrupts for microprocessor


I/O interfacing ICs DMA Controllers

3
4 2

T1: 12
T1: 11 T1: 13

10 & 11
11 12 12 & 13 13 14

Introduction of Microcontroller & Architecture


Addressing modes of 8051 & programming Memory interfacing & interrupts of 8051 Serial data communication Introduction to embedded systems System design notation and system testing

2
2 2 2 2 2

T2: 1,3
T2:4,5,10 T2: 3,8 T2: 11 T1: 14, 16, 17, 18, 19 T2: 10 T2: 9

Text and Reference Books


Text Book:
T1: The Intel Microprocessors 80x86, Pentium, Pentium Pro Processor, Pentium II, Pentium III, Pentium IV Architecture, Programming and Interfacing by Berry B. Bray, Six Edition, Prentice Hall T2: The 8051 microcontrollers Architecture, Programming & application ,2nd edition by Kenneth .J. Ayala R1: R.S. Gaonkar, Introduction to Microprocessors, Wiley Eastern (Latest Edition) R2: Advanced microprocessors and peripherals by AK Ray & K M Bhurchandi R3: Douglas Hall, Microprocessors & Interfacing, Programming and Hardware, TMH. R4: The 8086 Microprocessors programming & Interfacing the PC by Ayala R5: Embedded controller hardware design By Ken Arnold R6: Embedded Systems Design With 8051 Microcontrollers: Hardware and Software By Knud Smed Christensen, Zdravko Karakehayov, Ole Winther

Reference Book:
1. 2. 3. 4. 5. 6.

Assignment Details

Assignment Expected date of No. floating the assignment 1. 2. 3. 23rd Aug, 2012 27th Sept, 2012 14th Nov, 2012

Based of Coverage in Week No. 1 to 5 6 to 10 11 to 15

Expected Date of Submission 27th Aug, 2012 1st Oct, 2012 17th Nov, 2012

Evaluation Scheme:
Component & Nature
Test-1 (Closed Book) Test-2 (Closed Book) Test-3 (Closed Book) Assignments Attendance

Duration
1 hrs 1 hrs 30 min. 2 hrs

Marks / Weightage
15 25

Coverage
Topics covered up to T-1

Topic covered up to T-2 35 Full syllabus

-----------

05 05

-----

Quiz (3)
Tutorial

45 Min. Each 05 (Avg of All 3)


10 Total 100

Each one Before T1, T2, and T3

Microprocessor & Controller Lab 10B17CI407

Text and Reference Books


Text Book:
1. The Intel Microprocessors 80x86, Pentium, Pentium Pro Processor, Pentium II, Pentium III, Pentium IV Architecture, Programming and Interfacing by Berry B. Bray, Six Edition, Prentice Hall Advanced Microprocessors and Interfacing by Ram, Badri, 1st Edition, Tata McGraw Hill

2.

Reference Book:
1. 2. 3. The 8051 microcontrollers Architecture, Programming & application ,2nd edition by Kenneth .J. Ayala Embedded controller hardware design By Ken Arnold Embedded Systems Design With 8051 Microcontrollers: Hardware and Software By Knud Smed Christensen, Zdravko Karakehayov, Ole Winther

Evaluation Scheme:
1. 2. 3. 4. 5. Total Regular Evaluation Test-1 (P1) Test-2 (P2) Attendance Mini Project 15 15 15 05 50 ( 20% marks in P1, 20% Marks in P2,
60% Marks in Final Submission)

100

Process of regular Evaluation:


1. Every Lab will have weight-age of 10 marks. 2. Assignments will be floated on the same day separately for all lab days. 3. Problems in assignment may be categorized at Micro Level i.e. it mentioned therewhat should be done in Lab on that day & what should be treated as take home assignment. For the assignment of same day the students will be evaluated out of 10 marks, and full marks will be awarded to those students who will be able to solve the problem without help of any one, only on the basis of his knowledge and matter delivered during lectures/ lab informative sessions. All such evaluation will be done in later half of the Lab on call of students. If few other students are able to solve the problem with the help of faculty, such students may be awarded 6 to 9 marks depending on the input provided as help. Concern faculty should decide such issue at his/her own discretion.

4.

5.

Process of regular Evaluation: Cntd.


6. If few students are not in situation to solve the problem even with the help of faculty they will be allowed to show the solution in next Lab Session. He/She will be allowed to take help of all the means to solve the problem in off Lab Hrs. In next lab session he/she will be evaluated thoroughly well supported by viva. At that time he/she will be evaluated only out of 5 marks (his maximum marks will be 5 only). In first half of the Lab faculty will evaluate the Lab solutions of such previous Labs.
Those, who will not be able to solve the problem in next turn also or found absent in any lab they will be awarded 0 marks. All the students must also maintain the Lab records (in hard copy wherever possible); it will be checked /signed by faculties regularly.

7. 8.

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