PC HARDWARE AND INSIDE THE BOX

MOTHER BOARD

IT HOSTS THE PROCESSOR AND THE MEMORY CHIPS. THE CHIPSET ON THE MOTHERBOARD CARRIES OUT ALL THE FUNCTIONS NEEDED TO KEEP CONTROL OF INFROMATION TRANSFER BETWEEN THE PROCESSOR, THE MEMORY AND ALL THE PERPHERAL DEVICES. IT ALSO HOSTS THE REAL TIME CLOCK WITHIN IT THE BATTERY BACKED MEMORY THE CMOS, THE BIOS ROM.

The P55 Four: Lynnfield Motherboard Roundup

BUSES

SET OF PARALLEL ELECTRICAL CONNECTIONS ONE CONNECTION FOR EACH BIT OF INFORMATION AN 8 BIT BUS CAN TRANSFER ONE BYTE OF INFORMATION AT A TIME BUSERS DIRECTLY REPRESENT THE PERFORMANCES

THREE BUSES
ADDRESS BUS DATA BUS CONTROL BUS

DATA ADDRESS CONTROL

MEMORY

PROCESSOR

THREE BUSES

THE ADDRESS BUS PROVIDES THE MEANS BY WHICH, THE PROCESSOR CAN SIGNAL THE MEMORY WITH THE ADDRESS OF A BYTE TO WHICH IT WANTS ACCESS. THE DATA BUS PROVIDES THE MEANS BY WHICH THE DATA BITS ARE PASSED, IN PARALLEL BETWEEN THE MEMORY AND THE PROCESSOR AFTER THE ADDRESS OF THE REQUIRED BYTE HAS BEEN SPECIFIED BY THE ADDRESS BUS. THE CONTROL BUS CARRIES A NUMBER OF CONTROL LINES CONCERNED WITH THE HOUSE KEEPING THAT IS NECESSARY TO MAKE THIS ALL WORK.

CONTROL LINES INCLUDES..

SIGNALS TO INDICATE THE DATA BUS IS BEING USED READ/WRITE A BYTE FROM/TO THE MEMORY THE ADDRESS BUS IS CURRENTLY ACTIVE THE PROCESSOR IS USING THE SYSTEM BUSES

SIZE OF THE DATA BUS

THE SIZE OF DATA BUS, THAT IS, THE NUMBER OF BITS THAT CAN BE TRANSFERRED IN PARALLEL, IS GOING TO BE A MAJOR FACTOR IN DETERNINING OVERALL SYSTEM PERFORMANCE.THE WIDER THE BUS MORE DATA CAN BE PASSED IN PARALLEL ON EACH MACHINE CYCLE AND HENCE THE FASTER THE OVERALL SYSTEM TO BE ABLE TO RUN.

Size of Buses
The no. of bits that can be transferred in parallel a major factor that determines system performance Wider the bus, more data can be passed faster the system performance Early processors - 8bit only 8 pins for access to the external data bus Mid 70s - 16 bit processors - 64 bit or 8bytes at a time Intel Pentium 4 - the internal data bus on the chip itself is 256 bits wide

ADDRESS BUS

THE WIDTH OF THE ADDRESS BUS DETERMINES THE MAXIMUM NUMBER OF DIFFERENT DEVICES OR MEMORY BYTES THAT CAN BE INDIVIDUALLY ADDRESSED. IN PRACTICE, IT IMPOSES A LIMIT ON THE SIZE OF THE MEMORY THAT IS DIRECTLY ACCESSIBLE TO THE PROCESSOR, AND THUS DICTATES THE MEMORY CAPACITY OF THE SYSTEM. OBVIOUSLY, FOR HIGH PERFORMANCE AND HIGH CAPACITY, THE DATA AND ADDRESS BUSES TO BE AS LARGE AS POSSIBLE

PACKAGING OF CHIPS

DUAL-IN-LINE(DIL) CHIP OR PACAKAGE (DIP) INTEL 8088 IBM PC 4O PINS TOTAL - 20 DOWN EACH SIDE DATA BUS IS 8 BITS WIDE AND ADDRESS BUS IS 20 BITS WIDE, ALSO FOR CONTROL BUS 20 PINS ARE REQUIRED. HENCE MANY PINS ARE USED FOR MORE THAN ONE PURPOSE TECHNIQUE CALLED MULTIPLEXING

DIP

INTEL 8088

PACKAGING OF CHIPS

IN LATER PROCESSOR SYSTEMS AS THE NUMBER OF PIN CONNECTIONS REQUIRED INCREASED, THE DIL PACKAGING WAS FOUND TO BE TOO LIMITING AND SO REPLACED BY A SQUARE SHAPED PACKAGE WITH SEVERAL ROWS OF PINS ON EACH SIDE KNOWN AS PIN GRID ARRAY.

INTEL PENTIUM ROCESSOR

Direct Memory Access - DMA

Autonomous devices can operate without every action being controlled by processor Eg: writing of a memory block to a hard disk Here the task is initiated by the processor, disk controller takes over and performs the data transfer autonomously referring back to the processor with an interrupt after the data transfer

Packaging is now referred to Form Factor

ZIF Zero Insertion Force Sockets for easy replacement of pin array grid processor chips

Socket 8
is a Staggered Pin Grid Array designed for Pentium Pro Single Edge Contact (SEC) cartridge for some of Pentium II and III processors This form factor is called slot 1 Different form factor depending upon the pin

Table showing Socket nos

Socket No of Pins Layout Processor type

1
2

169
238

17 x 17
19 x 19

486, SX, DX, DX2,DX3, DX4, DX4 OVERDRIVE

486, SX, DX, DX2,DX3, DX4, DX4 OVERDRIVE - DO PENTIUM 60, 66, P 60, 66 OVERDRIVE P-75 -133, P75+OVERDRIVE 486, 486 OVERDRIVE

3 4 5 6

237 273 320 235

19 x 19 21 x 21 37 x 37 19 x 19

7
8 9

321
387

37 x 37
34 x 37

P-75 -200, P75+OVERDRIVE

Pentium Pro

BUS Routes

No of buses were introduced

Processor

Bus The I/O Bus and the Memory Bus

Processor bus is high speed bus. For eg: Pentium 64 data lines, 32 address lines and various control lines(operate at external clock rate) For a 66 MHZ motherboard clock speed meansthe transfer rate/bandwidth of the data bus is 66 x 64 = 4224 Mbit/sec

BUS Routes

Processor External cache

Processor bus Local bus Expansion cards

Built in I/O

I/O bus

Bus Controller Chipset

I/O bus ISA, MCA EISA

Expansion cards

Memory Bus Main Memory

BUS Routes

Memory Bus - transfers information from processor to main memory (DRAM) I/O Bus connects thru chipset all I/O devices
Secondary IDE controller(Integrated drive electronics), Floppy disk controller, serial and parallel ports, video controller, integrated mouse port & expansion slots Bus Mastering
Primary/

ISA - Industry Standard Architecture MCA - Micro Channel Architecture EISA Extended Industry Standard Architecture VESA Video Electronics Standards Association PCI Peripheral Component Interconnect

Northbridge & Southbridge Front Side Bus Accelerated Graphics Port Intel Hub Architecture Northbridge I/O controller hub Southbridge

Firewire & USB

Firewire IEEE 1394(1995), IEEE 1394a-2000, IEEE 1394b(apple computer 2006) USB (2000) Hotswapping of hard disk drives can be achieved by using either firewire or USB connections. This of significance to forensic analyst in that it enables the possible collection from a system that is kept running of a short while when first seized . This might be required when an encrypted container is found open on a computer that is switched on.

PCI - "Peripheral Component Interconnect" The smaller white connectors on PC motherboards, prevalent since 1995. A much faster 32-bit or 64-bit bus for "IBMCompatible" PC's. Most new cards for the PC use this bus. It is eight to sixteen times faster than the ISA Bus. Apple Macintosh abandoned its somewhat propritary "NuBus" architecture in favor of the PCI Bus. The Digital Equipment "Alpha" systems also use the PCI Bus. The PCI bus entirely replaced an earlier attempt at a PC highspeed bus, the "VESA" bus, mostly due to the fact that Intel Pentium chipsets support only the PCI Bus.

PCI Slots

PCI express slots

AGP SLOTS

Sound Ethernet
SATA PCI Express

AGP
Front side Bus

PATA

South Bridge

North Bridge

Processor

ISA USB Super I/O Fire wire

Parallel port Serial Port Keyboard

Memory Slots

Mouse

North Bridge & South Bridge

Floppy Disks

A Typical Motherboard

Eg: ASUS A8N32 SLI

PCI

expansion slots No ISA or VESA slots Three new slots(PCI express slots)
Two are known as SLI (Scalable Link Interface) for fitting two identical graphics cards Third is smaller

ZIF

socket 939 for the AMD processor Two IDE sockets for the ribbon cables to Primary and secondary Parallel ATA hard disks

A Typical Motherboard
Floppy disk socket Four SATA sockets SATA RAID Socket 8Mbyte flash EPROM that contains the BIOS The motherboard is controlled by the Northbridge and Southbridge chips These are connected together by copper heat pipe

Motherboard

Fan less quite motherboard COM 1 port socket USB AND Firewire (IEEE 1394 )sockets CR2032 Lithium cell battery provides for the real time clock and CMOS memory LAN sockets USB sockets The audio sockets Parallel ports PS2 mouse

Quad core processor comparison with dual core and single core

PC Memory Map

Memory map is limited to 1Mbyte(Address space of this processor family (20 Bits) 1st 1024 bytes are reserved for interrupt vectors (each is 4 byte pointer to an interrupt handling routine located elsewhere in the address space) Interrupt vectors are held in RAM so that they can be modified Before any volatile memory is loaded, the processor first starts executing code from an address that is 16bytes of the top address space This area is the ROM

PC Memory Map(PC-XT)
1M

ROM BIOS
896K

BIOS Extensions
768K

Video RAM
640K

Transient Portion of DOS Transient program area

DOS Data BIOS Data INT Vectors

0K

PC Memory Map

The entire address space 1Mbyte could not be allocated to RAM Hence, lower 640 Kbyte - RAM ( The upper part of the address is taken up by

ROM BIOS Video RAM to give room for future expansion with BIOS extn. The reason for 640 Kbytes - with the address buses of 16bits and user address space of 64 Kbytes of RAM it was felt that ten times this amount for significant improvement for the new PC

In practice, the transient program area in which the users application programs run does not get the whole of 640 Kbyte some are taken up by the interrupt vectors, BIOS data and the OS(DOS)

Design of the PC

ROM BIOS provides Programs for dealing with different kinds of HW related to that motherboard The OS and application programs can interact with the standard interface of BIOS provided that this STD is kept constant In such a case the OS and Application program are transportable to other PC having the same standard
STD BIOS uses another feature of the processor family SOFTWARE interrupt Upon detection of a particular interrupt number, the processor

Saves the current state of the system Causes the interrupt vector associated with that number to be loaded Transfers the control to the address to which the vector points

In hardware interrupt will be to the start location of where code to deal with some intervention from hardware resides In SW interrupt INT issued by some calling program appropriate part of the BIOS ROM code will be executed. In both cases the original state of the system, saved at the time of interrupt will be restored.

Design of the PC

Eg: We are having a original BIOS to control graphics display It will have a set of program which controls the display controller chips on the mother board When an application uses the display

It will issue a std BIOS interrupt and The associated interrupt vector will have been set up to transfer the control to the original BIOS graphics program Suppose we are using a new super high performance graphics controller expansion card and fit that one of the expansion slots on our PC. On the graphics card will be the new BIOS program dealing with the graphics controller that is fitted to this card Now, during the boot sequence, the graphics controller interrupt vector is changed from original BIOS to the new BIOS program where the new graphics card BIOS has been installed

PC System resources
Interrupt Request Channels Direct Memory Access I/O Port Address Main Memory address space

IRQs

Hardware interrupts are transmitted along IRQs Used by HW devices to signal to the processor that a request needs to be dealt with E.g: Input data from HW needs processing / or output data has now been dealt with for next sequence There are limited IRQs available Each has its own specific address in the interrupt vector table that points to the software driver to handle the Hardware that is assigned to that IRQ Many IRQ are pre-assigned by the systems to internal devices Allocation of IRQs to expansion card has to be carried out with care since the system is not able to distinguish between 2 HW devices which has been set to use the same IRQ channel Expansion card will have DIP (Dual Inline package ) switches - that selects for a given configuration to prevent IRQ conflicts

DMA
Direct Memory Access - Autonomous data transfer between a HW & the Main Memory without involvement of Processor These too are limited resources Some channels are pre-assigned, others are available for expansion cards DIP switches takes care of conflicts if two difft HW devices are using the same DMA channel

I/O Port address

8088 processor in addition to being able to address 1 Mbyte or main memory, it can also address 1 to 65,535 I/O ports Many HW device functions are - associated with port nos. Eg:IN instruction by processor to a particular port may be obtained from the HW associated with that address of current contents in status register Out instruction to a port may transfer a byte of data to the hardware This activity is called PIO (Programmed I/O or Processor I/O )

Main memory
The final system resource Greatest in demand the concept of Plug and Play (PnP) was introduced The system BIOS, OS and the PnP has to collaborate to identify the card, assign and configure the resources and find and load a suitable driver

DIMM

SODIMM

A RAM upgrade can greatly extend your computer's lifespan.

An AGP, or accelerated graphics port, allows the operating system to designate RAM for use by the graphics card (like the one above) on the fly.

BIOS

Processor

The Peripheral Component Interconnect (PCI) bus provides direct access to system memory for connected devices. PCI slots can be used for network, graphics and sound cards

PCI cards use 47 pins to attach to a PCI slot. Pins are thin metal feet that allow computer chips to be attached to a circuit board. The next piece of hardware replaced the PCI as the standard way to connect a graphic card.

An AGP, or accelerated graphics port, allows the operating system to designate RAM for use by the graphics card (like the one above) on the fly

Like a motherboard, a graphics card is a printed circuit board that houses a processor and RAM

PCI Express or PCIe eliminates the need for the AGP by accepting more data and supplying more power to video cards.

This hard drive has three platters, also called hard disks, and six read/write heads

HDD

Summary
Motherboard Buses Bus Routes Memory Map Components