MP Lecture – 4

Control Unit Design

Prepared By
Dr. Shazzad Hosain
Asst. Prof. EECS, NSU
 Design of the Control Unit
• Two types of control unit design
– Hardwired Control Design
– Micro-programmed Control Unit Design
Basic Concepts
Transfer to

Transfer 14th bit of to 1st bit of

Transfer to if E is enabled
Multiplication Using Addition

Microprocessor speed depends on bus architecture

 Bus Architecture
• Three types of bus architectures
– Single-bus architecture
– Two-bus architecture
– Three-bus architecture
Single Bus Architecture
Two-bus Architecture
 Timing Signals

• One of the main task of control unit is to sequence a set of

operations properly
• Use a ring counter to implement this
 Hardwired Control Design
• Eight Steps to follow
 Start
Step 1: Derive the Flow Chart

R 0
M  Multiplicand via inbus

Q  Multiplier via inbus

RR+M
QQ–1

no
Q=0

yes
Outbus  R

Stop
Step 2: Obtain register transfer description
Step 3: Specify processing hardware along with various components
 Step 4: Complete the design of the processing section

4 4
C0: R ← 0
C1: M ← inbus L C1 C C0 L C2
C2: Q ← inbus L C6 D C4
M C R Q
C3: F ← r + l
D D C
C4: Q ← Q – 1
C5: outbus ← R
4 4
C6: R ← F

4-bit C3
adder
F Z

C5
Step 5: Determine the block diagram of the controller

6
 Step 6: Obtain the state diagram of the controller

T0

T1

T2
Z=0
T3
Z=1
T4

T5

State Diagram
 Step 7: Specify the characteristics of the hardware for
generating the required timing signals

T0

T1

T2
Z=0
T3
Z=1
T4

T5

State Diagram
 Step 7: Specify the characteristics of the hardware for
generating the required timing signals

T0

T1

T2
Z=0
T3
Z=1
T4

T5

State Diagram
 Step 7: Specify the characteristics of the hardware for
generating the required timing signals

T0

T1

T2
Z=0
T3
Z=1
T4

T5

State Diagram
Step 8: Draw the logic circuit of the controller

Clock

Clock O2 0 T0 C0, C1
1 Enable
Reset Clear O1 1 T1 C2
O0 T2
Load 2 C3, C4, C6
T3
3 – to – 8 3
T4
L d2 d1 d0 Decoder 4 C5
T5
Sequence 5
Controller

unused
(SC) 6

Logic Diagram of the unsigned multiplier controller

 Sequence Controller Design
Inputs Outputs
Z T3 T5 L d2 d1 d0
_ 0 1 x 1 0 1 0
L = Z T3 + T5
x x 1 1 1 0 1
d2 = T 5 Truth Table
_
d1 = Z T3
d0 = T 5

T3
T5
 SC Alternative Design
_
L = Z T3 + T 5 Inputs Outputs
Z T3 T5 L d2 d1 d 0
d 2 = T5
_ 0 1 x 1 0 1 0
d 1 = Z T3 x x 1 1 1 0 1
d 0 = T5
Truth Table

Z
L
T3 d2
d1
T5 d0
Micro-programmed Control Unit Design
• Micro-programmed control unit contains programs
written using microinstructions
• The programs written in ROM inside the CPU
• The microprocessor reads each instruction into
instruction register from external memory
• The control unit translates the instructions for the
microprocessor
• A program consisting of a set of microinstructions is
executed in a sequence of micro-operations to complete
the instruction execution
• Each control word (micro-instruction) contains signals to
activate one or more micro-operations
 Micro-instruction format
• All micro-instructions have two fields
– Control word
• Indicates which control lines are to be activated
– Next address
• Specifies the address of the next micro-instruction to
be executed
 Design Decisions
• Cost of CPU depends on size of control memory
• Size depends on length of micro-instructions
• Major design decision is to reduce the length of
micro-instructions
• Length depends on two factors
– Degree of parallelism: number of microinstructions
that can be activated simultaneously i.e. control bits
– The method by which the address of next micro-
instruction is determined
 Control Bit Organization
• Several ways to organize
– Assign a single bit for each control line, un-
encoded format
• Allows full parallelism
• No decoding is necessary
– Assign n number of bits for 2n number of micro
instructions, encoded format
• Decoding is necessary
• Less parallelism
 Un-encoded vs. Encoded Format

C0: outbus  X
C1: outbus  Y

1. Each operation can be performed one at a time, because there is a one outbus
2. A single can be assigned for each transfer

Unencoded format Encoded format

Two operations are performed Three operations can be performed
Unencoded vs. Encoded Format Cont.
• If there are eight (8) different operations then 8
different control bits
Ins. Number C0 C1 C2 C3 C4 C5 C6 C7 Operation Performed
1 1 0 0 0 0 0 0 0 outbus  X
2 0 1 0 0 0 0 0 0 outbus  Y
* * * * * * * * * ********
8 0 0 0 0 0 0 0 1 X  outbus
Unencoded format Horizontal microinstruction

Ins. Number d d d Operation Performed

2 1 0

1 0 0 0 outbus  X
2 0 0 1 outbus  Y
* * * * ********
8 1 1 1 X  outbus
Encoded format Vertical microinstruction
Designing Micro-instructions

0
1
2
3
4
5
6
Designing Micro-instructions
 Load/increment Micro-program
Counter (MPC)
Reset

3
000 00 000 1100000
0 Control Memory
001 00 000 0010000
010 00 000 0001101
Z 1
1 011 (CM) 01 010 0000000
100
101
6 x 12
00 000 0000010
10 101 0000000
Vcc 2
MUX 12
Condition Branch Control CWR
Select Adder Functions (Control Word
2 3 Register)
C0 C1 ……… C6
 Components
• Micro-program Counter (MPC)
– Holds the address of the next micro-instruction
• Control Word Register (CWR)
– Contain three fields
• Condition select
• Branch address
• Control function
• MUX (Multiplexer)
 References
• Chapter 7, Fundamental of Digital Logic and
Microcomputer Design – by M. Rafiquzzaman
 References
• Chapter 7, Fundamental of Digital Logic and
Microcomputer Design – by M. Rafiquzzaman