Microprocessor Based

System Design
Evolution of electronics devices
• 1904 Vaccum tubes invented
• 1940 the invention of semiconductor
• 1947 Transistor (Shockley, Bardeen and Brattain)
• 1949, Integrated electronic circuits : Werner Jacobi
• 1953 The term IC was patented
• 1965 Moore’s law by Gordon E Moore (CEO of INTEL)
Moore's law is the observation that the number of transistors in a
dense integrated circuit doubles about every two years. The observation is
named after Gordon Moore, the co-founder of Intel, whose 1965 paper
described a doubling every year in the number of components per integrated
circuit
The advent of microprocessor was accidental.
 Intel corporation founded by Moore and Noyce in 1968 was initially
Focused on creating semiconductor Memory (DRAM and EPROM)
for digital computers.
In 1969, a Japanese calculator manufacturer approached Intel for a small
Calculator, which requires 12 custom chips. Tedhoff an Intel engineer
thought that a general purpose logic could replace the separate multiple
Components. This idea led to the development of microprocessors.

The first microprocessor introduced in the market was Intel 4004 in

Nov., 15 1971, which has a 4-bit CPU, it contains 2,300 transistors. It was
Not a true microprocessor, it was designed for calculators.
 Year No. Of Initial Address Data Bus Addressable
Processor transistors Clock Bus Memory
Speed
(kHz)
4004 1971 2300 108 kHz 10-bit 4-bit 640 bytes
8008 1972 3500 200 kHz 14-bit 8-bit 16 K
8080 1974 6000 2 MHz 16-bit 8-bit 64 K
8085 1976 6500 5 MHz 16-bit 8-bit 64K
8086 1978 29000 5MHz 20-bit 16-bit 1M
8088 1979 29000 5MHz 20-bit 8-bit* 1M
80286 1982 134000 8 MHz 24-bit 16-bit 16M
80386 1985 275000 16 MHz 32-bit 32-bit 4G
80486 1989 1.2 M 25 MHz 32-bit 32-bit 4G
Pentium 1993 3.1 M 60 MHz 32-bit 32/64-bit 4G
Pentium Pro 1995 5.5 M 150 MHz 36-bit 3/64-bit 64 G
Pentium II 1997 8.8 M 233 MHz 36-bit 64-bit 64 G
Pentium III 1999 9.5 M 650 MHz 36-bit 64-bit 64 G
At that time Texas instruments also developed a 4-bit microprocessor
TMS 1000 and are recognized as the inventor and owner of the first \
Microprocessor patent.

Typical features of microprocessors

 Smaller size (micro)
 Lower cost
 Higher reliability
 Lower power consumption (now a days fabrication is done
using CMOS device)
 Highly versatile (flexible)
 More powerful
Applications of microprocessors
 Washing machine
 TV
 Remote control
 Cell phones
 Robots
 Automobiles
 Gaming
 Calculators
 Industrial automation
 Communication, control systems, artificial intelligent systems
 Traffic lights and many more…
Educational need i.e. why we are studying this subject

 Hardware designer
 Software designer (e.g. Compiler designer, Simulator designer etc.)
 System integrator
 Digital system designer
Pin Diagram of 8085 Microprocessor
1. Address Bus and Data Bus:
The address bus is a group of sixteen lines i.e A0-A15. The address bus is unidirectional. Data bus
is a group of 8 lines i.e. D0-D7 and is bidirectional.

2. Control and Status Signals:

ALE – It is an Address Latch Enable signal. It goes high during first T state of a machine cycle and enables the
lower 8-bits of the address, if its value is 1 otherwise data bus is activated.

IO/M’ – It is a status signal which determines whether the address is for input-output or memory. When it is
high(1) the address on the address bus is for input-output devices. When it is low(0) the address on the
address bus is for the memory.

SO, S1 – These are status signals. They distinguish the various types of operations such as halt, reading,
instruction fetching or writing.
RD’ – It is a signal to control READ operation. When it is low the selected memory or input-output device is
read.

WR’ – It is a signal to control WRITE operation. When it goes low the data on the data bus is written into the
selected memory or I/O location.

READY – It senses whether a peripheral is ready to transfer data or not. If READY is high(1) the peripheral is
ready. If it is low(0) the microprocessor waits till it goes high. It is useful for interfacing low speed devices.

3. Power Supply and Clock Frequency:

Vcc – +5v power supply
Vss – Ground Reference

XI, X2 – A crystal is connected at these two pins. The frequency is internally divided by two, therefore, to
operate a system at 3MHZ the crystal should have frequency of 6MHZ.

CLK (OUT) – This signal can be used as the system clock for other devices.
4. Interrupts and Peripheral Initiated Signals:
The 8085 has five interrupt signals that can be used to interrupt a program execution.
(i) INTR
(ii) RST 7.5
(iii) RST 6.5
(iv) RST 5.5
(v) TRAP

The microprocessor acknowledges Interrupt Request by INTA’ signal

INTR – It is an interrupt request signal.
INTA’ – It is an interrupt acknowledgment sent by the microprocessor after INTR is received.
5. Reset Signals:

RESET IN’ – When the signal on this pin is low(0), the program-counter is set to zero, the buses are tri-
stated and the microprocessor unit is reset.

RESET OUT – This signal indicates that the MPU is being reset. The signal can be used to reset other
devices.

6. DMA Signals:
HOLD – It indicates that another device is requesting the use of the address and data bus. Having received HOLD
request the microprocessor relinquishes the use of the buses as soon as the current machine cycle is completed.
Internal processing may continue. After the removal of the HOLD signal the processor regains the bus.

HLDA – It is a signal which indicates that the hold request has been received after the removal of a HOLD request,
the HLDA goes low.

7. Serial I/O Ports:

Serial transmission in 8085 is implemented by the two signals,
SID and SOD – SID is a data line for serial input where as SOD is a data line for serial output.
A 8085 microprocessor, is a second generation 8-bit microprocessor and is the base for studying and using
all the microprocessor available in the market.

Registers in 8085:

1. Six 8-bit general purpose registers. These are B, C, D, E, H and L.

2. Specific purpose register: One 8-bit accumulator (ACC) i.e. register A and one 8-bit flag register.
3. One 16-bit program counter, PC.
4. Instruction register
5. Temporary Registers W,Z

1. General Purpose Registers –

The 8085 has six general-purpose registers to store 8-bit data; these are identified as- B, C, D, E, H, and L. These can
be combined as register pairs – BC, DE, and HL, to perform some 16-bit operation.
2. Specific Purpose Registers –

Accumulator:
The accumulator is an 8-bit register (can store 8-bit data) that is the part of the arithmetic and logical unit (ALU).
After performing arithmetical or logical operations, the result is stored in accumulator. Accumulator is also defined
as register A.

Flag registers:
The flag register is a special purpose register and it is completely different from other registers in microprocessor. It
consists of 8 bits and only 5 of them are useful.
1.Sign Flag S: It occupies the seventh bit of the flag register, which is also known as the most
significant bit. It helps the programmer to know whether the number stored in the accumulator is positive
or negative. If the sign flag is set, it means that number stored in the accumulator is negative, and if
reset, then the number is positive.

2.Zero Flag Z:: It occupies the sixth bit of the flag register. It is set, when the operation performed in the
ALU results in zero(all 8 bits are zero), otherwise it is reset. It helps in determining if two numbers are
equal or not.

3.Auxillary Carry Flag AC: It occupies the fourth bit of the flag register. In an arithmetic operation,
when a carry flag is generated by the third bit and passed on to the fourth bit, then Auxillary Carry flag is
set. If not flag is reset. This flag is used internally for BCD(Binary-Coded decimal Number) operations.

4.Parity Flag P: It occupies the second bit of the flag register. This flag tests for number of 1’s in the
accumulator. If the accumulator holds even number of 1’s, then this flag is set and it is said to even
parity. On the other hand if the number of 1’s is odd, then it is reset and it is said to be odd parity.

5.Carry Flag C: It occupies the zeroth bit of the flag register. If the arithmetic operation results in a
carry(if result is more than 8 bit), then Carry Flag is set; otherwise it is reset.
In addition to the above mentioned registers Intel 8085 microprocessor also contains address buffer
and data/address buffer.

The program counter PC, contains the address of the next instruction. The CPU fetches an instruction
from the memory executes it and increments the content of the program counter. Thus in the next
instruction cycle it will fetch next instruction. Instructions are executed sequentially unless an
instruction changes the content of the program counter.

The instruction register holds the instruction until it is decoded. This cannot be accessed by the
programmer.

The stack pointer SP, holds the address of the stack top. The stack is a sequence of memory locations
defined by the programmer. The stack is used to save the content of a register during the execution of
a program. The last memory location of the occupied portion of the stack is called stack top. PUSH and
POP instructions are used in SP.
Internal Architecture of microprocessor
Program Status World
The combination of 8 bits flag register is called Program Status Word (PSW). PSW and the accumulator are
treated as a 16-bit unit for stack operations.

Timing and Control Unit

The timing and control unit is a section of the CPU. It generates timing and control signals which are necessary
for the execution of instructions. It controls provides status, control and timing signals which are required for
the operation of memory and I/O devices. It controls the entire operation of the microprocessor and
peripherals consented to it. Thus it is seen that control unit of the CPU acts as a brain of the computer.
Time required to execute and fetch an entire instruction is called instruction cycle.
IC=FC+EC

•Fetch cycle (FC) – The next instruction is fetched by the address stored in program counter (PC) and
then stored in the instruction register.

•Decode instruction – Decoder interprets the encoded instruction from instruction register.

•Reading effective address – The address given in instruction is read from main memory and required
data is fetched. The effective address depends on direct addressing mode or indirect addressing mode.

•Execution cycle (EC)– consists memory read (MR), memory write (MW), input output read (IOR) and
input output write (IOW)
Schematic of Latching Lower order address Bus
SERIAL NO. 8085 MICROPROCESSOR 8086 MICROPROCESSOR

1 The data bus is of 8 bits. The data bus is of 16 bits.

2 The address bus is of 16 bits. The address bus is of 20 bits.

3 The memory capacity is 64 KB. The memory capacity is 1 MB.

4 The input/output port addresses are of 8 bits. The input/output port addresses are of 8 bits.

5 The operating frequency is 3 MHz. The operating frequency is 5 MHz.

It not have multiplication and division

6 It have multiplication and division instructions.
instructions.

It supports pipe-lining as it has two independent

7 It does not support pipe-lining. units Execution Unit (EU) and Bus Interface Unit
(BIU).

8 It does not support instruction queue. It supports instruction queue.

9 Memory space is not segmented. Memory space is segmented.

It consists of 9 flags(Overflow Flag, Direction Flag,

It consists of 5 flags(Sign Flag, Zero Flag, Auxiliary
10 Interrupt Flag, Trap Flag, Sign Flag, Zero Flag,
Carry Flag, Parity Flag, Carry Flag).
Auxiliary Carry Flag, Parity Flag, Carry Flag).
Power supply and frequency signals
It uses 5V DC supply at VCC pin 40, and uses ground at VSS pin 1 and 20 for its operation.

Clock signal
Clock signal is provided through Pin-19. It provides timing to the processor for operations.
Its frequency is different for different versions, i.e. 5MHz, 8MHz and 10MHz.

Address/data bus
AD0-AD15. These are 16 address/data bus. AD0-AD7 carries low order byte data and
AD8AD15 carries higher order byte data. During the first clock cycle, it carries 16-bit
address and after that it carries 16-bit data.

Address/status bus
A16-A19/S3-S6. These are the 4 address/status buses. During the first clock cycle, it carries 4-bit address and later
it carries status signals.

S7/BHE
BHE stands for Bus High Enable. It is available at pin 34 and used to indicate the transfer of data using data bus D8-
D15. This signal is low during the first clock cycle, thereafter it is active.
Read (RD’)
It is available at pin 32 and is used to read signal for Read operation.
Ready
It is available at pin 32. It is an acknowledgement signal from I/O devices that data is transferred. It is an
active high signal. When it is high, it indicates that the device is ready to transfer data. When it is low, it
indicates wait state.

RESET
It is available at pin 21 and is used to restart the execution. It causes the processor to immediately
terminate its present activity. This signal is active high for the first 4 clock cycles to RESET the
microprocessor.
INTR
It is available at pin 18. It is an interrupt request signal, which is sampled during the last clock cycle of each
instruction to determine if the processor considered this as an interrupt or not.
NMI
It stands for non-maskable interrupt and is available at pin 17. It is an edge triggered input, which causes an
interrupt request to the microprocessor.
TEST’
This signal is like wait state and is available at pin 23. When this signal is high,
then the processor has to wait for IDLE state, else the execution continues.

INTA
It is an interrupt acknowledgement signal and id available at pin 24. When the microprocessor receives
this signal, it acknowledges the interrupt.

MN/MX’
It stands for Minimum/Maximum and is available at pin 33. It indicates what mode the processor is to
operate in; when it is high, it works in the minimum mode and vice-a versa.

ALE
It stands for address enable latch and is available at pin 25. A positive pulse is generated each time the
processor begins any operation. This signal indicates the availability of a valid address on the
address/data lines.

DEN
It stands for Data Enable and is available at pin 26. It is used to enable Transreceiver 8286. The
transreceiver is a device used to separate data from the address/data bus.
QS0 QS1 Status
0 0 No operation
0 1 First byte of
opcode from the
queue
1 0 Empty the queue
1 1 Subsequent byte
from the queue
Functional
Architecture of
8086
Microproessor
Assembly language of 8085
microprocessor